Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:34:05.915643 lava-dispatcher, installed at version: 2024.01
2 02:34:05.916451 start: 0 validate
3 02:34:05.916916 Start time: 2024-11-07 02:34:05.916887+00:00 (UTC)
4 02:34:05.917464 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:34:05.918009 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:34:05.963261 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:34:05.963811 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:34:05.996927 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:34:05.997563 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:34:06.033772 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:34:06.034286 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:34:06.066728 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:34:06.067258 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:34:06.109840 validate duration: 0.19
16 02:34:06.111330 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:34:06.111940 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:34:06.112599 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:34:06.113560 Not decompressing ramdisk as can be used compressed.
20 02:34:06.114328 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:34:06.114854 saving as /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/ramdisk/initrd.cpio.gz
22 02:34:06.115372 total size: 5628169 (5 MB)
23 02:34:06.162056 progress 0 % (0 MB)
24 02:34:06.169391 progress 5 % (0 MB)
25 02:34:06.177274 progress 10 % (0 MB)
26 02:34:06.182324 progress 15 % (0 MB)
27 02:34:06.186643 progress 20 % (1 MB)
28 02:34:06.190549 progress 25 % (1 MB)
29 02:34:06.194744 progress 30 % (1 MB)
30 02:34:06.198907 progress 35 % (1 MB)
31 02:34:06.202587 progress 40 % (2 MB)
32 02:34:06.206880 progress 45 % (2 MB)
33 02:34:06.210574 progress 50 % (2 MB)
34 02:34:06.214762 progress 55 % (2 MB)
35 02:34:06.218794 progress 60 % (3 MB)
36 02:34:06.222548 progress 65 % (3 MB)
37 02:34:06.226735 progress 70 % (3 MB)
38 02:34:06.230421 progress 75 % (4 MB)
39 02:34:06.234417 progress 80 % (4 MB)
40 02:34:06.238039 progress 85 % (4 MB)
41 02:34:06.242264 progress 90 % (4 MB)
42 02:34:06.246155 progress 95 % (5 MB)
43 02:34:06.249445 progress 100 % (5 MB)
44 02:34:06.250102 5 MB downloaded in 0.13 s (39.84 MB/s)
45 02:34:06.250631 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:34:06.251521 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:34:06.251813 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:34:06.252110 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:34:06.252581 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/kernel/Image
51 02:34:06.252845 saving as /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/kernel/Image
52 02:34:06.253055 total size: 45713920 (43 MB)
53 02:34:06.253265 No compression specified
54 02:34:06.289665 progress 0 % (0 MB)
55 02:34:06.318767 progress 5 % (2 MB)
56 02:34:06.348075 progress 10 % (4 MB)
57 02:34:06.379525 progress 15 % (6 MB)
58 02:34:06.413710 progress 20 % (8 MB)
59 02:34:06.447028 progress 25 % (10 MB)
60 02:34:06.481034 progress 30 % (13 MB)
61 02:34:06.515010 progress 35 % (15 MB)
62 02:34:06.548918 progress 40 % (17 MB)
63 02:34:06.582727 progress 45 % (19 MB)
64 02:34:06.616517 progress 50 % (21 MB)
65 02:34:06.650137 progress 55 % (24 MB)
66 02:34:06.683961 progress 60 % (26 MB)
67 02:34:06.717327 progress 65 % (28 MB)
68 02:34:06.750861 progress 70 % (30 MB)
69 02:34:06.784295 progress 75 % (32 MB)
70 02:34:06.818358 progress 80 % (34 MB)
71 02:34:06.851530 progress 85 % (37 MB)
72 02:34:06.885320 progress 90 % (39 MB)
73 02:34:06.918898 progress 95 % (41 MB)
74 02:34:06.952372 progress 100 % (43 MB)
75 02:34:06.953053 43 MB downloaded in 0.70 s (62.28 MB/s)
76 02:34:06.953640 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:34:06.954637 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:34:06.954975 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:34:06.955301 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:34:06.955862 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:34:06.956225 saving as /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:34:06.956479 total size: 54703 (0 MB)
84 02:34:06.956731 No compression specified
85 02:34:06.998224 progress 59 % (0 MB)
86 02:34:06.999305 progress 100 % (0 MB)
87 02:34:07.000155 0 MB downloaded in 0.04 s (1.19 MB/s)
88 02:34:07.000874 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:34:07.002067 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:34:07.002513 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:34:07.002933 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:34:07.003597 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:34:07.003975 saving as /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/nfsrootfs/full.rootfs.tar
95 02:34:07.004351 total size: 120894716 (115 MB)
96 02:34:07.004693 Using unxz to decompress xz
97 02:34:07.050446 progress 0 % (0 MB)
98 02:34:07.843199 progress 5 % (5 MB)
99 02:34:08.683911 progress 10 % (11 MB)
100 02:34:09.477414 progress 15 % (17 MB)
101 02:34:10.226350 progress 20 % (23 MB)
102 02:34:10.818715 progress 25 % (28 MB)
103 02:34:11.639389 progress 30 % (34 MB)
104 02:34:12.429466 progress 35 % (40 MB)
105 02:34:12.788606 progress 40 % (46 MB)
106 02:34:13.161931 progress 45 % (51 MB)
107 02:34:13.881220 progress 50 % (57 MB)
108 02:34:14.764148 progress 55 % (63 MB)
109 02:34:15.543264 progress 60 % (69 MB)
110 02:34:16.297010 progress 65 % (74 MB)
111 02:34:17.127496 progress 70 % (80 MB)
112 02:34:17.977296 progress 75 % (86 MB)
113 02:34:18.758744 progress 80 % (92 MB)
114 02:34:19.515459 progress 85 % (98 MB)
115 02:34:20.363613 progress 90 % (103 MB)
116 02:34:21.140200 progress 95 % (109 MB)
117 02:34:21.966714 progress 100 % (115 MB)
118 02:34:21.979230 115 MB downloaded in 14.97 s (7.70 MB/s)
119 02:34:21.980127 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:34:21.981742 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:34:21.982281 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:34:21.983053 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:34:21.983890 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/modules.tar.xz
125 02:34:21.984398 saving as /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/modules/modules.tar
126 02:34:21.984818 total size: 11613904 (11 MB)
127 02:34:21.985244 Using unxz to decompress xz
128 02:34:22.039890 progress 0 % (0 MB)
129 02:34:22.118229 progress 5 % (0 MB)
130 02:34:22.206509 progress 10 % (1 MB)
131 02:34:22.320112 progress 15 % (1 MB)
132 02:34:22.410955 progress 20 % (2 MB)
133 02:34:22.491385 progress 25 % (2 MB)
134 02:34:22.567443 progress 30 % (3 MB)
135 02:34:22.645858 progress 35 % (3 MB)
136 02:34:22.718000 progress 40 % (4 MB)
137 02:34:22.793072 progress 45 % (5 MB)
138 02:34:22.876920 progress 50 % (5 MB)
139 02:34:22.954873 progress 55 % (6 MB)
140 02:34:23.039944 progress 60 % (6 MB)
141 02:34:23.120243 progress 65 % (7 MB)
142 02:34:23.201811 progress 70 % (7 MB)
143 02:34:23.279888 progress 75 % (8 MB)
144 02:34:23.364347 progress 80 % (8 MB)
145 02:34:23.444580 progress 85 % (9 MB)
146 02:34:23.523262 progress 90 % (9 MB)
147 02:34:23.603792 progress 95 % (10 MB)
148 02:34:23.682473 progress 100 % (11 MB)
149 02:34:23.694506 11 MB downloaded in 1.71 s (6.48 MB/s)
150 02:34:23.695173 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:34:23.696156 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:34:23.696707 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 02:34:23.697229 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 02:34:40.260920 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950018/extract-nfsrootfs-vv1xqpnr
156 02:34:40.261532 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:34:40.261817 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 02:34:40.262439 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2
159 02:34:40.262963 makedir: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin
160 02:34:40.263321 makedir: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/tests
161 02:34:40.263642 makedir: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/results
162 02:34:40.263974 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-add-keys
163 02:34:40.264549 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-add-sources
164 02:34:40.265060 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-background-process-start
165 02:34:40.265556 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-background-process-stop
166 02:34:40.266072 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-common-functions
167 02:34:40.266568 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-echo-ipv4
168 02:34:40.267044 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-install-packages
169 02:34:40.267521 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-installed-packages
170 02:34:40.268019 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-os-build
171 02:34:40.268516 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-probe-channel
172 02:34:40.268991 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-probe-ip
173 02:34:40.269466 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-target-ip
174 02:34:40.269942 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-target-mac
175 02:34:40.270412 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-target-storage
176 02:34:40.270892 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-case
177 02:34:40.271364 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-event
178 02:34:40.271856 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-feedback
179 02:34:40.272411 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-raise
180 02:34:40.272899 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-reference
181 02:34:40.273372 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-runner
182 02:34:40.273849 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-set
183 02:34:40.274322 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-test-shell
184 02:34:40.274808 Updating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-add-keys (debian)
185 02:34:40.275352 Updating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-add-sources (debian)
186 02:34:40.275852 Updating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-install-packages (debian)
187 02:34:40.276382 Updating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-installed-packages (debian)
188 02:34:40.276875 Updating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/bin/lava-os-build (debian)
189 02:34:40.277304 Creating /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/environment
190 02:34:40.277670 LAVA metadata
191 02:34:40.277929 - LAVA_JOB_ID=950018
192 02:34:40.278140 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:34:40.278503 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 02:34:40.279470 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:34:40.279787 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 02:34:40.280016 skipped lava-vland-overlay
197 02:34:40.280259 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:34:40.280512 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 02:34:40.280727 skipped lava-multinode-overlay
200 02:34:40.280966 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:34:40.281215 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 02:34:40.281461 Loading test definitions
203 02:34:40.281734 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 02:34:40.281951 Using /lava-950018 at stage 0
205 02:34:40.283057 uuid=950018_1.6.2.4.1 testdef=None
206 02:34:40.283364 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:34:40.283632 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 02:34:40.285252 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:34:40.286046 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 02:34:40.287955 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:34:40.288814 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 02:34:40.290668 runner path: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/0/tests/0_timesync-off test_uuid 950018_1.6.2.4.1
215 02:34:40.291243 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:34:40.292091 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 02:34:40.292318 Using /lava-950018 at stage 0
219 02:34:40.292678 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:34:40.292970 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/0/tests/1_kselftest-alsa'
221 02:34:43.766795 Running '/usr/bin/git checkout kernelci.org
222 02:34:44.211564 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 02:34:44.213896 uuid=950018_1.6.2.4.5 testdef=None
224 02:34:44.214499 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:34:44.215932 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 02:34:44.221338 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:34:44.222897 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 02:34:44.230177 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:34:44.231814 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 02:34:44.238854 runner path: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/0/tests/1_kselftest-alsa test_uuid 950018_1.6.2.4.5
234 02:34:44.239370 BOARD='meson-g12b-a311d-libretech-cc'
235 02:34:44.239771 BRANCH='broonie-sound'
236 02:34:44.240229 SKIPFILE='/dev/null'
237 02:34:44.240629 SKIP_INSTALL='True'
238 02:34:44.241016 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:34:44.241414 TST_CASENAME=''
240 02:34:44.241801 TST_CMDFILES='alsa'
241 02:34:44.242779 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:34:44.244359 Creating lava-test-runner.conf files
244 02:34:44.244763 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950018/lava-overlay-hlslbqy2/lava-950018/0 for stage 0
245 02:34:44.245420 - 0_timesync-off
246 02:34:44.245873 - 1_kselftest-alsa
247 02:34:44.246489 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:34:44.247015 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 02:35:07.528021 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 02:35:07.528478 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 02:35:07.528775 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:35:07.529084 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:35:07.529380 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 02:35:08.157932 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:35:08.158425 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 02:35:08.158681 extracting modules file /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950018/extract-nfsrootfs-vv1xqpnr
257 02:35:09.538282 extracting modules file /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk
258 02:35:10.939820 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:35:10.940320 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 02:35:10.940596 [common] Applying overlay to NFS
261 02:35:10.940809 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950018/compress-overlay-gu2jg04x/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950018/extract-nfsrootfs-vv1xqpnr
262 02:35:13.664649 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:35:13.665119 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 02:35:13.665390 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 02:35:13.665621 Converting downloaded kernel to a uImage
266 02:35:13.665944 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/kernel/Image /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/kernel/uImage
267 02:35:14.135933 output: Image Name:
268 02:35:14.136394 output: Created: Thu Nov 7 02:35:13 2024
269 02:35:14.136605 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:35:14.136810 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 02:35:14.137012 output: Load Address: 01080000
272 02:35:14.137212 output: Entry Point: 01080000
273 02:35:14.137408 output:
274 02:35:14.137744 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 02:35:14.138016 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 02:35:14.138286 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 02:35:14.138540 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:35:14.138798 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 02:35:14.139053 Building ramdisk /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk
280 02:35:16.366959 >> 166792 blocks
281 02:35:24.082365 Adding RAMdisk u-boot header.
282 02:35:24.082823 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk.cpio.gz.uboot
283 02:35:24.338240 output: Image Name:
284 02:35:24.338672 output: Created: Thu Nov 7 02:35:24 2024
285 02:35:24.338884 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:35:24.339091 output: Data Size: 23433925 Bytes = 22884.69 KiB = 22.35 MiB
287 02:35:24.339294 output: Load Address: 00000000
288 02:35:24.339493 output: Entry Point: 00000000
289 02:35:24.339697 output:
290 02:35:24.340646 rename /var/lib/lava/dispatcher/tmp/950018/extract-overlay-ramdisk-21iameyr/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
291 02:35:24.341379 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:35:24.341918 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 02:35:24.342440 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 02:35:24.342899 No LXC device requested
295 02:35:24.343451 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:35:24.343977 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 02:35:24.344514 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:35:24.344924 Checking files for TFTP limit of 4294967296 bytes.
299 02:35:24.347539 end: 1 tftp-deploy (duration 00:01:18) [common]
300 02:35:24.348135 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:35:24.348660 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:35:24.349157 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:35:24.349659 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:35:24.350180 Using kernel file from prepare-kernel: 950018/tftp-deploy-ypk3icmg/kernel/uImage
305 02:35:24.350800 substitutions:
306 02:35:24.351200 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:35:24.351601 - {DTB_ADDR}: 0x01070000
308 02:35:24.352019 - {DTB}: 950018/tftp-deploy-ypk3icmg/dtb/meson-g12b-a311d-libretech-cc.dtb
309 02:35:24.352425 - {INITRD}: 950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
310 02:35:24.352823 - {KERNEL_ADDR}: 0x01080000
311 02:35:24.353217 - {KERNEL}: 950018/tftp-deploy-ypk3icmg/kernel/uImage
312 02:35:24.353608 - {LAVA_MAC}: None
313 02:35:24.354036 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950018/extract-nfsrootfs-vv1xqpnr
314 02:35:24.354430 - {NFS_SERVER_IP}: 192.168.6.2
315 02:35:24.354817 - {PRESEED_CONFIG}: None
316 02:35:24.355203 - {PRESEED_LOCAL}: None
317 02:35:24.355589 - {RAMDISK_ADDR}: 0x08000000
318 02:35:24.355974 - {RAMDISK}: 950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
319 02:35:24.356396 - {ROOT_PART}: None
320 02:35:24.356786 - {ROOT}: None
321 02:35:24.357170 - {SERVER_IP}: 192.168.6.2
322 02:35:24.357555 - {TEE_ADDR}: 0x83000000
323 02:35:24.357940 - {TEE}: None
324 02:35:24.358324 Parsed boot commands:
325 02:35:24.358700 - setenv autoload no
326 02:35:24.359086 - setenv initrd_high 0xffffffff
327 02:35:24.359468 - setenv fdt_high 0xffffffff
328 02:35:24.359849 - dhcp
329 02:35:24.360255 - setenv serverip 192.168.6.2
330 02:35:24.360644 - tftpboot 0x01080000 950018/tftp-deploy-ypk3icmg/kernel/uImage
331 02:35:24.361034 - tftpboot 0x08000000 950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
332 02:35:24.361420 - tftpboot 0x01070000 950018/tftp-deploy-ypk3icmg/dtb/meson-g12b-a311d-libretech-cc.dtb
333 02:35:24.361807 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950018/extract-nfsrootfs-vv1xqpnr,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:35:24.362201 - bootm 0x01080000 0x08000000 0x01070000
335 02:35:24.362698 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:35:24.364193 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:35:24.364609 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 02:35:24.380379 Setting prompt string to ['lava-test: # ']
340 02:35:24.381903 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:35:24.382506 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:35:24.383054 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:35:24.383578 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:35:24.384736 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 02:35:24.422132 >> OK - accepted request
346 02:35:24.424743 Returned 0 in 0 seconds
347 02:35:24.525834 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:35:24.527442 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:35:24.528029 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:35:24.528536 Setting prompt string to ['Hit any key to stop autoboot']
352 02:35:24.528984 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:35:24.530552 Trying 192.168.56.21...
354 02:35:24.531034 Connected to conserv1.
355 02:35:24.531442 Escape character is '^]'.
356 02:35:24.531843
357 02:35:24.532298 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 02:35:24.532719
359 02:35:36.301063 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 02:35:36.301696 bl2_stage_init 0x01
361 02:35:36.302118 bl2_stage_init 0x81
362 02:35:36.306650 hw id: 0x0000 - pwm id 0x01
363 02:35:36.307106 bl2_stage_init 0xc1
364 02:35:36.307509 bl2_stage_init 0x02
365 02:35:36.307916
366 02:35:36.312216 L0:00000000
367 02:35:36.312663 L1:20000703
368 02:35:36.313063 L2:00008067
369 02:35:36.313459 L3:14000000
370 02:35:36.317862 B2:00402000
371 02:35:36.318278 B1:e0f83180
372 02:35:36.318677
373 02:35:36.319064 TE: 58124
374 02:35:36.319449
375 02:35:36.323299 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 02:35:36.323717
377 02:35:36.324138 Board ID = 1
378 02:35:36.329012 Set A53 clk to 24M
379 02:35:36.329421 Set A73 clk to 24M
380 02:35:36.329806 Set clk81 to 24M
381 02:35:36.334646 A53 clk: 1200 MHz
382 02:35:36.335053 A73 clk: 1200 MHz
383 02:35:36.335435 CLK81: 166.6M
384 02:35:36.335814 smccc: 00012a92
385 02:35:36.340198 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 02:35:36.345800 board id: 1
387 02:35:36.351663 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:35:36.362337 fw parse done
389 02:35:36.368343 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:35:36.410829 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:35:36.421755 PIEI prepare done
392 02:35:36.422266 fastboot data load
393 02:35:36.422661 fastboot data verify
394 02:35:36.427359 verify result: 266
395 02:35:36.433011 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 02:35:36.433434 LPDDR4 probe
397 02:35:36.433821 ddr clk to 1584MHz
398 02:35:36.440918 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:35:36.478136
400 02:35:36.478563 dmc_version 0001
401 02:35:36.484833 Check phy result
402 02:35:36.490807 INFO : End of CA training
403 02:35:36.491236 INFO : End of initialization
404 02:35:36.496329 INFO : Training has run successfully!
405 02:35:36.496744 Check phy result
406 02:35:36.501928 INFO : End of initialization
407 02:35:36.502340 INFO : End of read enable training
408 02:35:36.507553 INFO : End of fine write leveling
409 02:35:36.513121 INFO : End of Write leveling coarse delay
410 02:35:36.513543 INFO : Training has run successfully!
411 02:35:36.513936 Check phy result
412 02:35:36.518772 INFO : End of initialization
413 02:35:36.519185 INFO : End of read dq deskew training
414 02:35:36.524322 INFO : End of MPR read delay center optimization
415 02:35:36.529926 INFO : End of write delay center optimization
416 02:35:36.535552 INFO : End of read delay center optimization
417 02:35:36.536018 INFO : End of max read latency training
418 02:35:36.541152 INFO : Training has run successfully!
419 02:35:36.541573 1D training succeed
420 02:35:36.550310 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:35:36.597920 Check phy result
422 02:35:36.598361 INFO : End of initialization
423 02:35:36.619650 INFO : End of 2D read delay Voltage center optimization
424 02:35:36.639894 INFO : End of 2D read delay Voltage center optimization
425 02:35:36.691958 INFO : End of 2D write delay Voltage center optimization
426 02:35:36.741269 INFO : End of 2D write delay Voltage center optimization
427 02:35:36.746856 INFO : Training has run successfully!
428 02:35:36.747272
429 02:35:36.747665 channel==0
430 02:35:36.752474 RxClkDly_Margin_A0==88 ps 9
431 02:35:36.752889 TxDqDly_Margin_A0==98 ps 10
432 02:35:36.755811 RxClkDly_Margin_A1==88 ps 9
433 02:35:36.756307 TxDqDly_Margin_A1==88 ps 9
434 02:35:36.761414 TrainedVREFDQ_A0==74
435 02:35:36.761840 TrainedVREFDQ_A1==74
436 02:35:36.762231 VrefDac_Margin_A0==25
437 02:35:36.766980 DeviceVref_Margin_A0==40
438 02:35:36.767401 VrefDac_Margin_A1==25
439 02:35:36.772583 DeviceVref_Margin_A1==40
440 02:35:36.773020
441 02:35:36.773416
442 02:35:36.773803 channel==1
443 02:35:36.774187 RxClkDly_Margin_A0==98 ps 10
444 02:35:36.775879 TxDqDly_Margin_A0==98 ps 10
445 02:35:36.781455 RxClkDly_Margin_A1==88 ps 9
446 02:35:36.781905 TxDqDly_Margin_A1==88 ps 9
447 02:35:36.782303 TrainedVREFDQ_A0==77
448 02:35:36.787114 TrainedVREFDQ_A1==77
449 02:35:36.787639 VrefDac_Margin_A0==22
450 02:35:36.792735 DeviceVref_Margin_A0==37
451 02:35:36.793223 VrefDac_Margin_A1==24
452 02:35:36.793622 DeviceVref_Margin_A1==37
453 02:35:36.794011
454 02:35:36.798246 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:35:36.798690
456 02:35:36.831813 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 02:35:36.832390 2D training succeed
458 02:35:36.837402 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:35:36.843011 auto size-- 65535DDR cs0 size: 2048MB
460 02:35:36.843452 DDR cs1 size: 2048MB
461 02:35:36.848659 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:35:36.849193 cs0 DataBus test pass
463 02:35:36.849585 cs1 DataBus test pass
464 02:35:36.854316 cs0 AddrBus test pass
465 02:35:36.854758 cs1 AddrBus test pass
466 02:35:36.855153
467 02:35:36.859894 100bdlr_step_size ps== 420
468 02:35:36.860378 result report
469 02:35:36.860774 boot times 0Enable ddr reg access
470 02:35:36.869718 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:35:36.883148 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 02:35:37.456892 0.0;M3 CHK:0;cm4_sp_mode 0
473 02:35:37.457519 MVN_1=0x00000000
474 02:35:37.462269 MVN_2=0x00000000
475 02:35:37.468096 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 02:35:37.468548 OPS=0x10
477 02:35:37.468961 ring efuse init
478 02:35:37.469361 chipver efuse init
479 02:35:37.476218 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 02:35:37.476717 [0.018961 Inits done]
481 02:35:37.482973 secure task start!
482 02:35:37.483416 high task start!
483 02:35:37.483817 low task start!
484 02:35:37.484254 run into bl31
485 02:35:37.490499 NOTICE: BL31: v1.3(release):4fc40b1
486 02:35:37.498342 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 02:35:37.498828 NOTICE: BL31: G12A normal boot!
488 02:35:37.523673 NOTICE: BL31: BL33 decompress pass
489 02:35:37.528303 ERROR: Error initializing runtime service opteed_fast
490 02:35:38.762255
491 02:35:38.762826
492 02:35:38.770596 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 02:35:38.771032
494 02:35:38.771443 Model: Libre Computer AML-A311D-CC Alta
495 02:35:38.979180 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 02:35:39.002410 DRAM: 2 GiB (effective 3.8 GiB)
497 02:35:39.145399 Core: 408 devices, 31 uclasses, devicetree: separate
498 02:35:39.151225 WDT: Not starting watchdog@f0d0
499 02:35:39.183485 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 02:35:39.196171 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 02:35:39.201058 ** Bad device specification mmc 0 **
502 02:35:39.211282 Card did not respond to voltage select! : -110
503 02:35:39.218946 ** Bad device specification mmc 0 **
504 02:35:39.219474 Couldn't find partition mmc 0
505 02:35:39.227289 Card did not respond to voltage select! : -110
506 02:35:39.232831 ** Bad device specification mmc 0 **
507 02:35:39.233343 Couldn't find partition mmc 0
508 02:35:39.237869 Error: could not access storage.
509 02:35:40.501384 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 02:35:40.502022 bl2_stage_init 0x01
511 02:35:40.502510 bl2_stage_init 0x81
512 02:35:40.506960 hw id: 0x0000 - pwm id 0x01
513 02:35:40.507485 bl2_stage_init 0xc1
514 02:35:40.507950 bl2_stage_init 0x02
515 02:35:40.508511
516 02:35:40.512577 L0:00000000
517 02:35:40.513106 L1:20000703
518 02:35:40.513575 L2:00008067
519 02:35:40.514028 L3:14000000
520 02:35:40.518215 B2:00402000
521 02:35:40.518741 B1:e0f83180
522 02:35:40.519205
523 02:35:40.519661 TE: 58159
524 02:35:40.520153
525 02:35:40.523735 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 02:35:40.524293
527 02:35:40.524759 Board ID = 1
528 02:35:40.529361 Set A53 clk to 24M
529 02:35:40.529866 Set A73 clk to 24M
530 02:35:40.530323 Set clk81 to 24M
531 02:35:40.534956 A53 clk: 1200 MHz
532 02:35:40.535468 A73 clk: 1200 MHz
533 02:35:40.535924 CLK81: 166.6M
534 02:35:40.536420 smccc: 00012ab5
535 02:35:40.540552 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 02:35:40.546174 board id: 1
537 02:35:40.551082 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 02:35:40.562688 fw parse done
539 02:35:40.567750 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:35:40.610404 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 02:35:40.622150 PIEI prepare done
542 02:35:40.622632 fastboot data load
543 02:35:40.623075 fastboot data verify
544 02:35:40.627826 verify result: 266
545 02:35:40.633401 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 02:35:40.633883 LPDDR4 probe
547 02:35:40.634317 ddr clk to 1584MHz
548 02:35:40.641396 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 02:35:40.678601
550 02:35:40.679103 dmc_version 0001
551 02:35:40.685406 Check phy result
552 02:35:40.691205 INFO : End of CA training
553 02:35:40.691702 INFO : End of initialization
554 02:35:40.696774 INFO : Training has run successfully!
555 02:35:40.697250 Check phy result
556 02:35:40.702362 INFO : End of initialization
557 02:35:40.702833 INFO : End of read enable training
558 02:35:40.708011 INFO : End of fine write leveling
559 02:35:40.713580 INFO : End of Write leveling coarse delay
560 02:35:40.714055 INFO : Training has run successfully!
561 02:35:40.714489 Check phy result
562 02:35:40.719177 INFO : End of initialization
563 02:35:40.719646 INFO : End of read dq deskew training
564 02:35:40.724771 INFO : End of MPR read delay center optimization
565 02:35:40.730396 INFO : End of write delay center optimization
566 02:35:40.736014 INFO : End of read delay center optimization
567 02:35:40.736492 INFO : End of max read latency training
568 02:35:40.741582 INFO : Training has run successfully!
569 02:35:40.742063 1D training succeed
570 02:35:40.750772 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 02:35:40.798441 Check phy result
572 02:35:40.798941 INFO : End of initialization
573 02:35:40.819944 INFO : End of 2D read delay Voltage center optimization
574 02:35:40.840075 INFO : End of 2D read delay Voltage center optimization
575 02:35:40.892091 INFO : End of 2D write delay Voltage center optimization
576 02:35:40.941287 INFO : End of 2D write delay Voltage center optimization
577 02:35:40.946788 INFO : Training has run successfully!
578 02:35:40.947264
579 02:35:40.947703 channel==0
580 02:35:40.952420 RxClkDly_Margin_A0==88 ps 9
581 02:35:40.952896 TxDqDly_Margin_A0==98 ps 10
582 02:35:40.957969 RxClkDly_Margin_A1==88 ps 9
583 02:35:40.958443 TxDqDly_Margin_A1==88 ps 9
584 02:35:40.958881 TrainedVREFDQ_A0==74
585 02:35:40.963542 TrainedVREFDQ_A1==74
586 02:35:40.964047 VrefDac_Margin_A0==25
587 02:35:40.964488 DeviceVref_Margin_A0==40
588 02:35:40.969244 VrefDac_Margin_A1==25
589 02:35:40.969717 DeviceVref_Margin_A1==40
590 02:35:40.970146
591 02:35:40.970579
592 02:35:40.971009 channel==1
593 02:35:40.974790 RxClkDly_Margin_A0==98 ps 10
594 02:35:40.975279 TxDqDly_Margin_A0==98 ps 10
595 02:35:40.980372 RxClkDly_Margin_A1==88 ps 9
596 02:35:40.980848 TxDqDly_Margin_A1==88 ps 9
597 02:35:40.985991 TrainedVREFDQ_A0==77
598 02:35:40.986464 TrainedVREFDQ_A1==77
599 02:35:40.986900 VrefDac_Margin_A0==22
600 02:35:40.991591 DeviceVref_Margin_A0==37
601 02:35:40.992124 VrefDac_Margin_A1==24
602 02:35:40.997265 DeviceVref_Margin_A1==37
603 02:35:40.997737
604 02:35:40.998171 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 02:35:40.998603
606 02:35:41.030786 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000019 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 02:35:41.031370 2D training succeed
608 02:35:41.036370 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 02:35:41.041966 auto size-- 65535DDR cs0 size: 2048MB
610 02:35:41.042446 DDR cs1 size: 2048MB
611 02:35:41.047577 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 02:35:41.048090 cs0 DataBus test pass
613 02:35:41.053253 cs1 DataBus test pass
614 02:35:41.053734 cs0 AddrBus test pass
615 02:35:41.054166 cs1 AddrBus test pass
616 02:35:41.054595
617 02:35:41.058759 100bdlr_step_size ps== 420
618 02:35:41.059246 result report
619 02:35:41.064370 boot times 0Enable ddr reg access
620 02:35:41.069616 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 02:35:41.083100 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 02:35:41.655361 0.0;M3 CHK:0;cm4_sp_mode 0
623 02:35:41.656083 MVN_1=0x00000000
624 02:35:41.660727 MVN_2=0x00000000
625 02:35:41.666603 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 02:35:41.667080 OPS=0x10
627 02:35:41.667515 ring efuse init
628 02:35:41.667937 chipver efuse init
629 02:35:41.672008 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 02:35:41.677683 [0.018961 Inits done]
631 02:35:41.678175 secure task start!
632 02:35:41.678599 high task start!
633 02:35:41.682311 low task start!
634 02:35:41.682781 run into bl31
635 02:35:41.688958 NOTICE: BL31: v1.3(release):4fc40b1
636 02:35:41.696714 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 02:35:41.697193 NOTICE: BL31: G12A normal boot!
638 02:35:41.721953 NOTICE: BL31: BL33 decompress pass
639 02:35:41.727796 ERROR: Error initializing runtime service opteed_fast
640 02:35:42.960723
641 02:35:42.961395
642 02:35:42.969060 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 02:35:42.969578
644 02:35:42.970032 Model: Libre Computer AML-A311D-CC Alta
645 02:35:43.177591 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 02:35:43.200868 DRAM: 2 GiB (effective 3.8 GiB)
647 02:35:43.343839 Core: 408 devices, 31 uclasses, devicetree: separate
648 02:35:43.348820 WDT: Not starting watchdog@f0d0
649 02:35:43.381939 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 02:35:43.394415 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 02:35:43.399395 ** Bad device specification mmc 0 **
652 02:35:43.409840 Card did not respond to voltage select! : -110
653 02:35:43.417430 ** Bad device specification mmc 0 **
654 02:35:43.417953 Couldn't find partition mmc 0
655 02:35:43.425781 Card did not respond to voltage select! : -110
656 02:35:43.431151 ** Bad device specification mmc 0 **
657 02:35:43.431654 Couldn't find partition mmc 0
658 02:35:43.436320 Error: could not access storage.
659 02:35:43.778908 Net: eth0: ethernet@ff3f0000
660 02:35:43.779485 starting USB...
661 02:35:44.030916 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 02:35:44.031553 Starting the controller
663 02:35:44.037628 USB XHCI 1.10
664 02:35:45.752299 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 02:35:45.752986 bl2_stage_init 0x01
666 02:35:45.753467 bl2_stage_init 0x81
667 02:35:45.757989 hw id: 0x0000 - pwm id 0x01
668 02:35:45.758492 bl2_stage_init 0xc1
669 02:35:45.758950 bl2_stage_init 0x02
670 02:35:45.759400
671 02:35:45.763563 L0:00000000
672 02:35:45.764119 L1:20000703
673 02:35:45.764591 L2:00008067
674 02:35:45.765037 L3:14000000
675 02:35:45.766504 B2:00402000
676 02:35:45.766986 B1:e0f83180
677 02:35:45.767429
678 02:35:45.767866 TE: 58159
679 02:35:45.768354
680 02:35:45.777715 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 02:35:45.778236
682 02:35:45.778690 Board ID = 1
683 02:35:45.779134 Set A53 clk to 24M
684 02:35:45.779571 Set A73 clk to 24M
685 02:35:45.783276 Set clk81 to 24M
686 02:35:45.783771 A53 clk: 1200 MHz
687 02:35:45.784263 A73 clk: 1200 MHz
688 02:35:45.788853 CLK81: 166.6M
689 02:35:45.789348 smccc: 00012ab5
690 02:35:45.794411 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 02:35:45.794910 board id: 1
692 02:35:45.803187 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 02:35:45.813681 fw parse done
694 02:35:45.819820 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 02:35:45.862128 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 02:35:45.873027 PIEI prepare done
697 02:35:45.873520 fastboot data load
698 02:35:45.873980 fastboot data verify
699 02:35:45.878777 verify result: 266
700 02:35:45.884287 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 02:35:45.884778 LPDDR4 probe
702 02:35:45.885263 ddr clk to 1584MHz
703 02:35:45.892420 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 02:35:45.929549
705 02:35:45.930111 dmc_version 0001
706 02:35:45.936225 Check phy result
707 02:35:45.942066 INFO : End of CA training
708 02:35:45.942540 INFO : End of initialization
709 02:35:45.947672 INFO : Training has run successfully!
710 02:35:45.948191 Check phy result
711 02:35:45.953246 INFO : End of initialization
712 02:35:45.953728 INFO : End of read enable training
713 02:35:45.959003 INFO : End of fine write leveling
714 02:35:45.964470 INFO : End of Write leveling coarse delay
715 02:35:45.964963 INFO : Training has run successfully!
716 02:35:45.965411 Check phy result
717 02:35:45.970057 INFO : End of initialization
718 02:35:45.970539 INFO : End of read dq deskew training
719 02:35:45.975641 INFO : End of MPR read delay center optimization
720 02:35:45.981258 INFO : End of write delay center optimization
721 02:35:45.986928 INFO : End of read delay center optimization
722 02:35:45.987419 INFO : End of max read latency training
723 02:35:45.992466 INFO : Training has run successfully!
724 02:35:45.992968 1D training succeed
725 02:35:46.001790 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 02:35:46.049406 Check phy result
727 02:35:46.050065 INFO : End of initialization
728 02:35:46.071128 INFO : End of 2D read delay Voltage center optimization
729 02:35:46.091349 INFO : End of 2D read delay Voltage center optimization
730 02:35:46.143428 INFO : End of 2D write delay Voltage center optimization
731 02:35:46.192879 INFO : End of 2D write delay Voltage center optimization
732 02:35:46.198379 INFO : Training has run successfully!
733 02:35:46.199002
734 02:35:46.199504 channel==0
735 02:35:46.203907 RxClkDly_Margin_A0==88 ps 9
736 02:35:46.204488 TxDqDly_Margin_A0==98 ps 10
737 02:35:46.209492 RxClkDly_Margin_A1==88 ps 9
738 02:35:46.210015 TxDqDly_Margin_A1==88 ps 9
739 02:35:46.210487 TrainedVREFDQ_A0==74
740 02:35:46.215188 TrainedVREFDQ_A1==74
741 02:35:46.215803 VrefDac_Margin_A0==25
742 02:35:46.216323 DeviceVref_Margin_A0==40
743 02:35:46.220706 VrefDac_Margin_A1==25
744 02:35:46.221251 DeviceVref_Margin_A1==40
745 02:35:46.221707
746 02:35:46.222155
747 02:35:46.222597 channel==1
748 02:35:46.226276 RxClkDly_Margin_A0==98 ps 10
749 02:35:46.226850 TxDqDly_Margin_A0==98 ps 10
750 02:35:46.231933 RxClkDly_Margin_A1==98 ps 10
751 02:35:46.232551 TxDqDly_Margin_A1==88 ps 9
752 02:35:46.237450 TrainedVREFDQ_A0==77
753 02:35:46.237960 TrainedVREFDQ_A1==77
754 02:35:46.238412 VrefDac_Margin_A0==22
755 02:35:46.243153 DeviceVref_Margin_A0==37
756 02:35:46.243706 VrefDac_Margin_A1==24
757 02:35:46.248692 DeviceVref_Margin_A1==37
758 02:35:46.249235
759 02:35:46.249696 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 02:35:46.250144
761 02:35:46.282358 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 02:35:46.282944 2D training succeed
763 02:35:46.287955 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 02:35:46.293500 auto size-- 65535DDR cs0 size: 2048MB
765 02:35:46.294119 DDR cs1 size: 2048MB
766 02:35:46.299037 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 02:35:46.299569 cs0 DataBus test pass
768 02:35:46.304549 cs1 DataBus test pass
769 02:35:46.305104 cs0 AddrBus test pass
770 02:35:46.305558 cs1 AddrBus test pass
771 02:35:46.306006
772 02:35:46.310185 100bdlr_step_size ps== 420
773 02:35:46.310735 result report
774 02:35:46.315737 boot times 0Enable ddr reg access
775 02:35:46.320416 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 02:35:46.334696 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 02:35:46.908213 0.0;M3 CHK:0;cm4_sp_mode 0
778 02:35:46.908643 MVN_1=0x00000000
779 02:35:46.913757 MVN_2=0x00000000
780 02:35:46.919522 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 02:35:46.920114 OPS=0x10
782 02:35:46.920574 ring efuse init
783 02:35:46.921012 chipver efuse init
784 02:35:46.927791 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 02:35:46.928394 [0.018961 Inits done]
786 02:35:46.935285 secure task start!
787 02:35:46.935803 high task start!
788 02:35:46.936285 low task start!
789 02:35:46.936745 run into bl31
790 02:35:46.942044 NOTICE: BL31: v1.3(release):4fc40b1
791 02:35:46.949756 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 02:35:46.950265 NOTICE: BL31: G12A normal boot!
793 02:35:46.975222 NOTICE: BL31: BL33 decompress pass
794 02:35:46.980806 ERROR: Error initializing runtime service opteed_fast
795 02:35:48.213757
796 02:35:48.214408
797 02:35:48.222157 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 02:35:48.222648
799 02:35:48.223100 Model: Libre Computer AML-A311D-CC Alta
800 02:35:48.430535 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 02:35:48.453915 DRAM: 2 GiB (effective 3.8 GiB)
802 02:35:48.596908 Core: 408 devices, 31 uclasses, devicetree: separate
803 02:35:48.602564 WDT: Not starting watchdog@f0d0
804 02:35:48.635033 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 02:35:48.647497 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 02:35:48.652494 ** Bad device specification mmc 0 **
807 02:35:48.662826 Card did not respond to voltage select! : -110
808 02:35:48.670461 ** Bad device specification mmc 0 **
809 02:35:48.670940 Couldn't find partition mmc 0
810 02:35:48.678790 Card did not respond to voltage select! : -110
811 02:35:48.684352 ** Bad device specification mmc 0 **
812 02:35:48.684841 Couldn't find partition mmc 0
813 02:35:48.689431 Error: could not access storage.
814 02:35:49.032902 Net: eth0: ethernet@ff3f0000
815 02:35:49.033329 starting USB...
816 02:35:49.284684 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 02:35:49.285113 Starting the controller
818 02:35:49.291642 USB XHCI 1.10
819 02:35:51.451824 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
820 02:35:51.452520 bl2_stage_init 0x81
821 02:35:51.457197 hw id: 0x0000 - pwm id 0x01
822 02:35:51.457679 bl2_stage_init 0xc1
823 02:35:51.458098 bl2_stage_init 0x02
824 02:35:51.458507
825 02:35:51.462807 L0:00000000
826 02:35:51.463274 L1:20000703
827 02:35:51.463680 L2:00008067
828 02:35:51.464113 L3:14000000
829 02:35:51.464520 B2:00402000
830 02:35:51.465641 B1:e0f83180
831 02:35:51.466101
832 02:35:51.466511 TE: 58150
833 02:35:51.466914
834 02:35:51.476742 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 02:35:51.477228
836 02:35:51.477643 Board ID = 1
837 02:35:51.478044 Set A53 clk to 24M
838 02:35:51.478444 Set A73 clk to 24M
839 02:35:51.482361 Set clk81 to 24M
840 02:35:51.482824 A53 clk: 1200 MHz
841 02:35:51.483230 A73 clk: 1200 MHz
842 02:35:51.487922 CLK81: 166.6M
843 02:35:51.488419 smccc: 00012aac
844 02:35:51.493597 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 02:35:51.494062 board id: 1
846 02:35:51.502244 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 02:35:51.512969 fw parse done
848 02:35:51.518832 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 02:35:51.561503 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 02:35:51.572314 PIEI prepare done
851 02:35:51.572824 fastboot data load
852 02:35:51.573239 fastboot data verify
853 02:35:51.578000 verify result: 266
854 02:35:51.583492 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 02:35:51.583957 LPDDR4 probe
856 02:35:51.584412 ddr clk to 1584MHz
857 02:35:51.591455 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 02:35:51.628770
859 02:35:51.629275 dmc_version 0001
860 02:35:51.635458 Check phy result
861 02:35:51.641342 INFO : End of CA training
862 02:35:51.641814 INFO : End of initialization
863 02:35:51.646981 INFO : Training has run successfully!
864 02:35:51.647447 Check phy result
865 02:35:51.652509 INFO : End of initialization
866 02:35:51.652970 INFO : End of read enable training
867 02:35:51.655831 INFO : End of fine write leveling
868 02:35:51.661440 INFO : End of Write leveling coarse delay
869 02:35:51.667075 INFO : Training has run successfully!
870 02:35:51.667536 Check phy result
871 02:35:51.667945 INFO : End of initialization
872 02:35:51.672627 INFO : End of read dq deskew training
873 02:35:51.676056 INFO : End of MPR read delay center optimization
874 02:35:51.681611 INFO : End of write delay center optimization
875 02:35:51.687206 INFO : End of read delay center optimization
876 02:35:51.687667 INFO : End of max read latency training
877 02:35:51.692789 INFO : Training has run successfully!
878 02:35:51.693254 1D training succeed
879 02:35:51.700925 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 02:35:51.748554 Check phy result
881 02:35:51.749051 INFO : End of initialization
882 02:35:51.770933 INFO : End of 2D read delay Voltage center optimization
883 02:35:51.791119 INFO : End of 2D read delay Voltage center optimization
884 02:35:51.843005 INFO : End of 2D write delay Voltage center optimization
885 02:35:51.892299 INFO : End of 2D write delay Voltage center optimization
886 02:35:51.897821 INFO : Training has run successfully!
887 02:35:51.898287
888 02:35:51.898698 channel==0
889 02:35:51.903381 RxClkDly_Margin_A0==88 ps 9
890 02:35:51.903842 TxDqDly_Margin_A0==98 ps 10
891 02:35:51.906707 RxClkDly_Margin_A1==88 ps 9
892 02:35:51.907163 TxDqDly_Margin_A1==98 ps 10
893 02:35:51.912252 TrainedVREFDQ_A0==74
894 02:35:51.912724 TrainedVREFDQ_A1==75
895 02:35:51.917893 VrefDac_Margin_A0==25
896 02:35:51.918374 DeviceVref_Margin_A0==40
897 02:35:51.918769 VrefDac_Margin_A1==25
898 02:35:51.923358 DeviceVref_Margin_A1==39
899 02:35:51.923830
900 02:35:51.924257
901 02:35:51.924644 channel==1
902 02:35:51.925023 RxClkDly_Margin_A0==98 ps 10
903 02:35:51.926908 TxDqDly_Margin_A0==88 ps 9
904 02:35:51.932348 RxClkDly_Margin_A1==98 ps 10
905 02:35:51.932805 TxDqDly_Margin_A1==88 ps 9
906 02:35:51.933195 TrainedVREFDQ_A0==77
907 02:35:51.938113 TrainedVREFDQ_A1==77
908 02:35:51.938565 VrefDac_Margin_A0==22
909 02:35:51.943617 DeviceVref_Margin_A0==37
910 02:35:51.944091 VrefDac_Margin_A1==24
911 02:35:51.944478 DeviceVref_Margin_A1==37
912 02:35:51.944854
913 02:35:51.952563 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 02:35:51.953029
915 02:35:51.980568 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
916 02:35:51.981090 2D training succeed
917 02:35:51.991802 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 02:35:51.992302 auto size-- 65535DDR cs0 size: 2048MB
919 02:35:51.992694 DDR cs1 size: 2048MB
920 02:35:51.997379 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 02:35:51.997830 cs0 DataBus test pass
922 02:35:52.002989 cs1 DataBus test pass
923 02:35:52.003442 cs0 AddrBus test pass
924 02:35:52.008618 cs1 AddrBus test pass
925 02:35:52.009070
926 02:35:52.009460 100bdlr_step_size ps== 420
927 02:35:52.009861 result report
928 02:35:52.014220 boot times 0Enable ddr reg access
929 02:35:52.020579 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 02:35:52.034060 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 02:35:52.606201 0.0;M3 CHK:0;cm4_sp_mode 0
932 02:35:52.606840 MVN_1=0x00000000
933 02:35:52.611554 MVN_2=0x00000000
934 02:35:52.617315 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 02:35:52.617798 OPS=0x10
936 02:35:52.618217 ring efuse init
937 02:35:52.618621 chipver efuse init
938 02:35:52.625480 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 02:35:52.625963 [0.018961 Inits done]
940 02:35:52.633123 secure task start!
941 02:35:52.633594 high task start!
942 02:35:52.634004 low task start!
943 02:35:52.634401 run into bl31
944 02:35:52.639768 NOTICE: BL31: v1.3(release):4fc40b1
945 02:35:52.647559 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 02:35:52.648062 NOTICE: BL31: G12A normal boot!
947 02:35:52.673019 NOTICE: BL31: BL33 decompress pass
948 02:35:52.678583 ERROR: Error initializing runtime service opteed_fast
949 02:35:53.911494
950 02:35:53.912172
951 02:35:53.919834 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 02:35:53.920338
953 02:35:53.920757 Model: Libre Computer AML-A311D-CC Alta
954 02:35:54.128407 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 02:35:54.151620 DRAM: 2 GiB (effective 3.8 GiB)
956 02:35:54.294619 Core: 408 devices, 31 uclasses, devicetree: separate
957 02:35:54.300478 WDT: Not starting watchdog@f0d0
958 02:35:54.332704 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 02:35:54.345164 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 02:35:54.350148 ** Bad device specification mmc 0 **
961 02:35:54.360488 Card did not respond to voltage select! : -110
962 02:35:54.368166 ** Bad device specification mmc 0 **
963 02:35:54.368629 Couldn't find partition mmc 0
964 02:35:54.376673 Card did not respond to voltage select! : -110
965 02:35:54.382228 ** Bad device specification mmc 0 **
966 02:35:54.382917 Couldn't find partition mmc 0
967 02:35:54.387217 Error: could not access storage.
968 02:35:54.729624 Net: eth0: ethernet@ff3f0000
969 02:35:54.730417 starting USB...
970 02:35:54.981580 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 02:35:54.982280 Starting the controller
972 02:35:54.988513 USB XHCI 1.10
973 02:35:56.542751 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 02:35:56.550997 scanning usb for storage devices... 0 Storage Device(s) found
976 02:35:56.603021 Hit any key to stop autoboot: 1
977 02:35:56.604038 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 02:35:56.604718 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 02:35:56.605204 Setting prompt string to ['=>']
980 02:35:56.605684 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 02:35:56.618416 0
982 02:35:56.619510 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 02:35:56.620186 Sending with 10 millisecond of delay
985 02:35:57.755519 => setenv autoload no
986 02:35:57.766614 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 02:35:57.772856 setenv autoload no
988 02:35:57.773741 Sending with 10 millisecond of delay
990 02:35:59.571607 => setenv initrd_high 0xffffffff
991 02:35:59.582667 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 02:35:59.583768 setenv initrd_high 0xffffffff
993 02:35:59.584671 Sending with 10 millisecond of delay
995 02:36:01.201435 => setenv fdt_high 0xffffffff
996 02:36:01.212437 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
997 02:36:01.213505 setenv fdt_high 0xffffffff
998 02:36:01.214379 Sending with 10 millisecond of delay
1000 02:36:01.506583 => dhcp
1001 02:36:01.517374 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 02:36:01.518245 dhcp
1003 02:36:01.518684 Speed: 1000, full duplex
1004 02:36:01.519098 BOOTP broadcast 1
1005 02:36:01.526458 DHCP client bound to address 192.168.6.27 (9 ms)
1006 02:36:01.527208 Sending with 10 millisecond of delay
1008 02:36:03.203922 => setenv serverip 192.168.6.2
1009 02:36:03.214972 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1010 02:36:03.216112 setenv serverip 192.168.6.2
1011 02:36:03.216961 Sending with 10 millisecond of delay
1013 02:36:06.941240 => tftpboot 0x01080000 950018/tftp-deploy-ypk3icmg/kernel/uImage
1014 02:36:06.952075 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1015 02:36:06.952903 tftpboot 0x01080000 950018/tftp-deploy-ypk3icmg/kernel/uImage
1016 02:36:06.953348 Speed: 1000, full duplex
1017 02:36:06.953759 Using ethernet@ff3f0000 device
1018 02:36:06.954919 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 02:36:06.960323 Filename '950018/tftp-deploy-ypk3icmg/kernel/uImage'.
1020 02:36:06.964339 Load address: 0x1080000
1021 02:36:09.788736 Loading: *################################################## 43.6 MiB
1022 02:36:09.789558 15.4 MiB/s
1023 02:36:09.790145 done
1024 02:36:09.793377 Bytes transferred = 45713984 (2b98a40 hex)
1025 02:36:09.794472 Sending with 10 millisecond of delay
1027 02:36:14.483066 => tftpboot 0x08000000 950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
1028 02:36:14.494072 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1029 02:36:14.495139 tftpboot 0x08000000 950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot
1030 02:36:14.495706 Speed: 1000, full duplex
1031 02:36:14.496323 Using ethernet@ff3f0000 device
1032 02:36:14.497165 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 02:36:14.508750 Filename '950018/tftp-deploy-ypk3icmg/ramdisk/ramdisk.cpio.gz.uboot'.
1034 02:36:14.509289 Load address: 0x8000000
1035 02:36:16.066726 Loading: *################################################# UDP wrong checksum 00000005 00002c8f
1036 02:36:21.067538 T UDP wrong checksum 00000005 00002c8f
1037 02:36:31.070537 T T UDP wrong checksum 00000005 00002c8f
1038 02:36:40.580170 T UDP wrong checksum 000000ff 000016f7
1039 02:36:40.619802 UDP wrong checksum 000000ff 0000b2e9
1040 02:36:51.073279 T T UDP wrong checksum 00000005 00002c8f
1041 02:37:11.079752 T T T T
1042 02:37:11.080395 Retry count exceeded; starting again
1044 02:37:11.081812 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1047 02:37:11.083625 end: 2.4 uboot-commands (duration 00:01:47) [common]
1049 02:37:11.085111 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 02:37:11.086157 end: 2 uboot-action (duration 00:01:47) [common]
1053 02:37:11.087658 Cleaning after the job
1054 02:37:11.088230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/ramdisk
1055 02:37:11.089448 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/kernel
1056 02:37:11.135298 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/dtb
1057 02:37:11.136050 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/nfsrootfs
1058 02:37:11.299162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950018/tftp-deploy-ypk3icmg/modules
1059 02:37:11.319077 start: 4.1 power-off (timeout 00:00:30) [common]
1060 02:37:11.319718 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 02:37:11.353433 >> OK - accepted request
1062 02:37:11.355566 Returned 0 in 0 seconds
1063 02:37:11.456325 end: 4.1 power-off (duration 00:00:00) [common]
1065 02:37:11.457323 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 02:37:11.457984 Listened to connection for namespace 'common' for up to 1s
1067 02:37:12.457976 Finalising connection for namespace 'common'
1068 02:37:12.458467 Disconnecting from shell: Finalise
1069 02:37:12.458742 =>
1070 02:37:12.559528 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 02:37:12.560318 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950018
1072 02:37:15.570091 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950018
1073 02:37:15.570705 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.