Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:02:26.902649 lava-dispatcher, installed at version: 2024.01
2 03:02:26.903427 start: 0 validate
3 03:02:26.903909 Start time: 2024-11-07 03:02:26.903878+00:00 (UTC)
4 03:02:26.904466 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:02:26.905014 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:02:26.946668 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:02:26.947216 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:02:26.976969 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:02:26.977590 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:02:27.005537 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:02:27.006020 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:02:27.039111 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:02:27.039886 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:02:27.078419 validate duration: 0.17
16 03:02:27.079263 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:02:27.079593 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:02:27.079911 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:02:27.080522 Not decompressing ramdisk as can be used compressed.
20 03:02:27.080977 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 03:02:27.081264 saving as /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/ramdisk/initrd.cpio.gz
22 03:02:27.081534 total size: 5628140 (5 MB)
23 03:02:27.116576 progress 0 % (0 MB)
24 03:02:27.122584 progress 5 % (0 MB)
25 03:02:27.127325 progress 10 % (0 MB)
26 03:02:27.133941 progress 15 % (0 MB)
27 03:02:27.140870 progress 20 % (1 MB)
28 03:02:27.144479 progress 25 % (1 MB)
29 03:02:27.148542 progress 30 % (1 MB)
30 03:02:27.152494 progress 35 % (1 MB)
31 03:02:27.156082 progress 40 % (2 MB)
32 03:02:27.160044 progress 45 % (2 MB)
33 03:02:27.163690 progress 50 % (2 MB)
34 03:02:27.167684 progress 55 % (2 MB)
35 03:02:27.171659 progress 60 % (3 MB)
36 03:02:27.175222 progress 65 % (3 MB)
37 03:02:27.179161 progress 70 % (3 MB)
38 03:02:27.182721 progress 75 % (4 MB)
39 03:02:27.186698 progress 80 % (4 MB)
40 03:02:27.190443 progress 85 % (4 MB)
41 03:02:27.194369 progress 90 % (4 MB)
42 03:02:27.198073 progress 95 % (5 MB)
43 03:02:27.201274 progress 100 % (5 MB)
44 03:02:27.201923 5 MB downloaded in 0.12 s (44.59 MB/s)
45 03:02:27.202460 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:02:27.203329 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:02:27.203616 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:02:27.203883 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:02:27.204377 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/kernel/Image
51 03:02:27.204640 saving as /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/kernel/Image
52 03:02:27.204848 total size: 45713920 (43 MB)
53 03:02:27.205054 No compression specified
54 03:02:27.242753 progress 0 % (0 MB)
55 03:02:27.270992 progress 5 % (2 MB)
56 03:02:27.299548 progress 10 % (4 MB)
57 03:02:27.328161 progress 15 % (6 MB)
58 03:02:27.356890 progress 20 % (8 MB)
59 03:02:27.385173 progress 25 % (10 MB)
60 03:02:27.413793 progress 30 % (13 MB)
61 03:02:27.442184 progress 35 % (15 MB)
62 03:02:27.471422 progress 40 % (17 MB)
63 03:02:27.499594 progress 45 % (19 MB)
64 03:02:27.528787 progress 50 % (21 MB)
65 03:02:27.558234 progress 55 % (24 MB)
66 03:02:27.587009 progress 60 % (26 MB)
67 03:02:27.615479 progress 65 % (28 MB)
68 03:02:27.644200 progress 70 % (30 MB)
69 03:02:27.673132 progress 75 % (32 MB)
70 03:02:27.701762 progress 80 % (34 MB)
71 03:02:27.729767 progress 85 % (37 MB)
72 03:02:27.758450 progress 90 % (39 MB)
73 03:02:27.787121 progress 95 % (41 MB)
74 03:02:27.815163 progress 100 % (43 MB)
75 03:02:27.815700 43 MB downloaded in 0.61 s (71.37 MB/s)
76 03:02:27.816239 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:02:27.817109 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:02:27.817413 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:02:27.817701 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:02:27.818196 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:02:27.818486 saving as /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:02:27.818710 total size: 54703 (0 MB)
84 03:02:27.818927 No compression specified
85 03:02:27.860657 progress 59 % (0 MB)
86 03:02:27.861503 progress 100 % (0 MB)
87 03:02:27.862057 0 MB downloaded in 0.04 s (1.20 MB/s)
88 03:02:27.862521 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:02:27.863331 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:02:27.863593 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:02:27.863854 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:02:27.864337 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 03:02:27.864585 saving as /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/nfsrootfs/full.rootfs.tar
95 03:02:27.864789 total size: 474398908 (452 MB)
96 03:02:27.864996 Using unxz to decompress xz
97 03:02:27.904019 progress 0 % (0 MB)
98 03:02:28.997075 progress 5 % (22 MB)
99 03:02:30.439393 progress 10 % (45 MB)
100 03:02:30.884134 progress 15 % (67 MB)
101 03:02:31.684630 progress 20 % (90 MB)
102 03:02:32.231110 progress 25 % (113 MB)
103 03:02:32.596489 progress 30 % (135 MB)
104 03:02:33.209000 progress 35 % (158 MB)
105 03:02:34.144503 progress 40 % (181 MB)
106 03:02:35.005426 progress 45 % (203 MB)
107 03:02:35.633207 progress 50 % (226 MB)
108 03:02:36.282945 progress 55 % (248 MB)
109 03:02:37.512700 progress 60 % (271 MB)
110 03:02:39.018075 progress 65 % (294 MB)
111 03:02:40.675255 progress 70 % (316 MB)
112 03:02:43.754064 progress 75 % (339 MB)
113 03:02:46.177725 progress 80 % (361 MB)
114 03:02:49.086199 progress 85 % (384 MB)
115 03:02:52.228212 progress 90 % (407 MB)
116 03:02:55.452778 progress 95 % (429 MB)
117 03:02:58.572412 progress 100 % (452 MB)
118 03:02:58.585290 452 MB downloaded in 30.72 s (14.73 MB/s)
119 03:02:58.586151 end: 1.4.1 http-download (duration 00:00:31) [common]
121 03:02:58.587720 end: 1.4 download-retry (duration 00:00:31) [common]
122 03:02:58.588274 start: 1.5 download-retry (timeout 00:09:28) [common]
123 03:02:58.588784 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 03:02:58.589667 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/modules.tar.xz
125 03:02:58.590131 saving as /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/modules/modules.tar
126 03:02:58.590530 total size: 11613904 (11 MB)
127 03:02:58.590938 Using unxz to decompress xz
128 03:02:58.634234 progress 0 % (0 MB)
129 03:02:58.700123 progress 5 % (0 MB)
130 03:02:58.773181 progress 10 % (1 MB)
131 03:02:58.867607 progress 15 % (1 MB)
132 03:02:58.957350 progress 20 % (2 MB)
133 03:02:59.037260 progress 25 % (2 MB)
134 03:02:59.112141 progress 30 % (3 MB)
135 03:02:59.189706 progress 35 % (3 MB)
136 03:02:59.261239 progress 40 % (4 MB)
137 03:02:59.335534 progress 45 % (5 MB)
138 03:02:59.419174 progress 50 % (5 MB)
139 03:02:59.495442 progress 55 % (6 MB)
140 03:02:59.580382 progress 60 % (6 MB)
141 03:02:59.660190 progress 65 % (7 MB)
142 03:02:59.739522 progress 70 % (7 MB)
143 03:02:59.817069 progress 75 % (8 MB)
144 03:02:59.899403 progress 80 % (8 MB)
145 03:02:59.978258 progress 85 % (9 MB)
146 03:03:00.056053 progress 90 % (9 MB)
147 03:03:00.132867 progress 95 % (10 MB)
148 03:03:00.208898 progress 100 % (11 MB)
149 03:03:00.220704 11 MB downloaded in 1.63 s (6.79 MB/s)
150 03:03:00.221264 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:03:00.222116 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:03:00.222385 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 03:03:00.222650 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 03:03:16.313524 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950089/extract-nfsrootfs-p2d4op7q
156 03:03:16.314124 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 03:03:16.314406 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 03:03:16.315114 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge
159 03:03:16.315566 makedir: /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin
160 03:03:16.315896 makedir: /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/tests
161 03:03:16.316257 makedir: /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/results
162 03:03:16.316583 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-add-keys
163 03:03:16.317097 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-add-sources
164 03:03:16.317606 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-background-process-start
165 03:03:16.318103 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-background-process-stop
166 03:03:16.318628 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-common-functions
167 03:03:16.319231 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-echo-ipv4
168 03:03:16.319777 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-install-packages
169 03:03:16.320355 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-installed-packages
170 03:03:16.320850 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-os-build
171 03:03:16.321327 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-probe-channel
172 03:03:16.321800 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-probe-ip
173 03:03:16.322264 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-target-ip
174 03:03:16.322730 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-target-mac
175 03:03:16.323202 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-target-storage
176 03:03:16.323677 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-case
177 03:03:16.324180 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-event
178 03:03:16.324654 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-feedback
179 03:03:16.325150 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-raise
180 03:03:16.325639 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-reference
181 03:03:16.326165 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-runner
182 03:03:16.326659 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-set
183 03:03:16.327133 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-test-shell
184 03:03:16.327643 Updating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-install-packages (oe)
185 03:03:16.328194 Updating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/bin/lava-installed-packages (oe)
186 03:03:16.328644 Creating /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/environment
187 03:03:16.329014 LAVA metadata
188 03:03:16.329270 - LAVA_JOB_ID=950089
189 03:03:16.329481 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:03:16.329841 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 03:03:16.330794 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:03:16.331101 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 03:03:16.331307 skipped lava-vland-overlay
194 03:03:16.331545 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:03:16.331799 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 03:03:16.332039 skipped lava-multinode-overlay
197 03:03:16.332285 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:03:16.332535 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 03:03:16.332777 Loading test definitions
200 03:03:16.333051 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 03:03:16.333267 Using /lava-950089 at stage 0
202 03:03:16.334394 uuid=950089_1.6.2.4.1 testdef=None
203 03:03:16.334693 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:03:16.334956 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 03:03:16.336732 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:03:16.337514 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 03:03:16.339633 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:03:16.340482 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 03:03:16.342541 runner path: /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 950089_1.6.2.4.1
212 03:03:16.343090 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:03:16.343837 Creating lava-test-runner.conf files
215 03:03:16.344116 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950089/lava-overlay-_87co2ge/lava-950089/0 for stage 0
216 03:03:16.344470 - 0_v4l2-decoder-conformance-h265
217 03:03:16.344815 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:03:16.345086 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 03:03:16.366541 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:03:16.366919 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 03:03:16.367176 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:03:16.367438 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:03:16.367698 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 03:03:17.029362 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:03:17.029944 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 03:03:17.030253 extracting modules file /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950089/extract-nfsrootfs-p2d4op7q
227 03:03:18.617705 extracting modules file /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk
228 03:03:20.222153 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:03:20.222648 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 03:03:20.222941 [common] Applying overlay to NFS
231 03:03:20.223157 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950089/compress-overlay-kta5xe19/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950089/extract-nfsrootfs-p2d4op7q
232 03:03:20.254421 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:03:20.254884 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 03:03:20.255160 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 03:03:20.255391 Converting downloaded kernel to a uImage
236 03:03:20.255703 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/kernel/Image /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/kernel/uImage
237 03:03:20.848151 output: Image Name:
238 03:03:20.848574 output: Created: Thu Nov 7 03:03:20 2024
239 03:03:20.848784 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:03:20.848987 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 03:03:20.849186 output: Load Address: 01080000
242 03:03:20.849386 output: Entry Point: 01080000
243 03:03:20.849582 output:
244 03:03:20.849916 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 03:03:20.850184 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 03:03:20.850450 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 03:03:20.850700 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:03:20.850955 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 03:03:20.851208 Building ramdisk /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk
250 03:03:23.096546 >> 166792 blocks
251 03:03:30.831137 Adding RAMdisk u-boot header.
252 03:03:30.831831 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk.cpio.gz.uboot
253 03:03:31.077356 output: Image Name:
254 03:03:31.077770 output: Created: Thu Nov 7 03:03:30 2024
255 03:03:31.077982 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:03:31.078187 output: Data Size: 23432819 Bytes = 22883.61 KiB = 22.35 MiB
257 03:03:31.078388 output: Load Address: 00000000
258 03:03:31.078584 output: Entry Point: 00000000
259 03:03:31.078779 output:
260 03:03:31.079400 rename /var/lib/lava/dispatcher/tmp/950089/extract-overlay-ramdisk-8mqd_luu/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
261 03:03:31.079822 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 03:03:31.080273 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 03:03:31.080862 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 03:03:31.081373 No LXC device requested
265 03:03:31.081922 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:03:31.082482 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 03:03:31.083023 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:03:31.083473 Checking files for TFTP limit of 4294967296 bytes.
269 03:03:31.086376 end: 1 tftp-deploy (duration 00:01:04) [common]
270 03:03:31.087003 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:03:31.087574 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:03:31.088154 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:03:31.088710 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:03:31.089282 Using kernel file from prepare-kernel: 950089/tftp-deploy-wqnnos7t/kernel/uImage
275 03:03:31.089963 substitutions:
276 03:03:31.090403 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:03:31.090838 - {DTB_ADDR}: 0x01070000
278 03:03:31.091272 - {DTB}: 950089/tftp-deploy-wqnnos7t/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:03:31.091706 - {INITRD}: 950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
280 03:03:31.092183 - {KERNEL_ADDR}: 0x01080000
281 03:03:31.092614 - {KERNEL}: 950089/tftp-deploy-wqnnos7t/kernel/uImage
282 03:03:31.093042 - {LAVA_MAC}: None
283 03:03:31.093512 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950089/extract-nfsrootfs-p2d4op7q
284 03:03:31.093944 - {NFS_SERVER_IP}: 192.168.6.2
285 03:03:31.094369 - {PRESEED_CONFIG}: None
286 03:03:31.094796 - {PRESEED_LOCAL}: None
287 03:03:31.095222 - {RAMDISK_ADDR}: 0x08000000
288 03:03:31.095646 - {RAMDISK}: 950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
289 03:03:31.096096 - {ROOT_PART}: None
290 03:03:31.096526 - {ROOT}: None
291 03:03:31.096946 - {SERVER_IP}: 192.168.6.2
292 03:03:31.097369 - {TEE_ADDR}: 0x83000000
293 03:03:31.097791 - {TEE}: None
294 03:03:31.098212 Parsed boot commands:
295 03:03:31.098628 - setenv autoload no
296 03:03:31.099050 - setenv initrd_high 0xffffffff
297 03:03:31.099468 - setenv fdt_high 0xffffffff
298 03:03:31.099886 - dhcp
299 03:03:31.100333 - setenv serverip 192.168.6.2
300 03:03:31.100754 - tftpboot 0x01080000 950089/tftp-deploy-wqnnos7t/kernel/uImage
301 03:03:31.101176 - tftpboot 0x08000000 950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
302 03:03:31.101596 - tftpboot 0x01070000 950089/tftp-deploy-wqnnos7t/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:03:31.102014 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950089/extract-nfsrootfs-p2d4op7q,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:03:31.102447 - bootm 0x01080000 0x08000000 0x01070000
305 03:03:31.102991 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:03:31.104699 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:03:31.105168 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:03:31.120785 Setting prompt string to ['lava-test: # ']
310 03:03:31.122369 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:03:31.123012 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:03:31.123587 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:03:31.124329 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:03:31.125607 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:03:31.161973 >> OK - accepted request
316 03:03:31.164099 Returned 0 in 0 seconds
317 03:03:31.265285 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:03:31.267007 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:03:31.267634 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:03:31.268306 Setting prompt string to ['Hit any key to stop autoboot']
322 03:03:31.268839 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:03:31.270527 Trying 192.168.56.21...
324 03:03:31.271037 Connected to conserv1.
325 03:03:31.271491 Escape character is '^]'.
326 03:03:31.271949
327 03:03:31.272458 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 03:03:31.272919
329 03:03:43.212375 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:03:43.213000 bl2_stage_init 0x01
331 03:03:43.213416 bl2_stage_init 0x81
332 03:03:43.217998 hw id: 0x0000 - pwm id 0x01
333 03:03:43.218481 bl2_stage_init 0xc1
334 03:03:43.218874 bl2_stage_init 0x02
335 03:03:43.219262
336 03:03:43.223628 L0:00000000
337 03:03:43.224155 L1:20000703
338 03:03:43.224563 L2:00008067
339 03:03:43.224952 L3:14000000
340 03:03:43.226554 B2:00402000
341 03:03:43.227013 B1:e0f83180
342 03:03:43.227415
343 03:03:43.227807 TE: 58167
344 03:03:43.228239
345 03:03:43.237591 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:03:43.238054
347 03:03:43.238448 Board ID = 1
348 03:03:43.238830 Set A53 clk to 24M
349 03:03:43.239213 Set A73 clk to 24M
350 03:03:43.243278 Set clk81 to 24M
351 03:03:43.243727 A53 clk: 1200 MHz
352 03:03:43.244154 A73 clk: 1200 MHz
353 03:03:43.248823 CLK81: 166.6M
354 03:03:43.249272 smccc: 00012abe
355 03:03:43.254421 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:03:43.254871 board id: 1
357 03:03:43.259970 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:03:43.273814 fw parse done
359 03:03:43.279777 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:03:43.322347 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:03:43.333138 PIEI prepare done
362 03:03:43.333588 fastboot data load
363 03:03:43.333977 fastboot data verify
364 03:03:43.338860 verify result: 266
365 03:03:43.344433 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:03:43.344884 LPDDR4 probe
367 03:03:43.345281 ddr clk to 1584MHz
368 03:03:43.352485 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:03:43.389802
370 03:03:43.390363 dmc_version 0001
371 03:03:43.396495 Check phy result
372 03:03:43.402247 INFO : End of CA training
373 03:03:43.402713 INFO : End of initialization
374 03:03:43.407869 INFO : Training has run successfully!
375 03:03:43.408374 Check phy result
376 03:03:43.413439 INFO : End of initialization
377 03:03:43.413916 INFO : End of read enable training
378 03:03:43.416783 INFO : End of fine write leveling
379 03:03:43.422407 INFO : End of Write leveling coarse delay
380 03:03:43.427890 INFO : Training has run successfully!
381 03:03:43.428385 Check phy result
382 03:03:43.428796 INFO : End of initialization
383 03:03:43.433502 INFO : End of read dq deskew training
384 03:03:43.439069 INFO : End of MPR read delay center optimization
385 03:03:43.439550 INFO : End of write delay center optimization
386 03:03:43.444656 INFO : End of read delay center optimization
387 03:03:43.450405 INFO : End of max read latency training
388 03:03:43.450893 INFO : Training has run successfully!
389 03:03:43.455907 1D training succeed
390 03:03:43.461891 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:03:43.509606 Check phy result
392 03:03:43.510174 INFO : End of initialization
393 03:03:43.531223 INFO : End of 2D read delay Voltage center optimization
394 03:03:43.551570 INFO : End of 2D read delay Voltage center optimization
395 03:03:43.603581 INFO : End of 2D write delay Voltage center optimization
396 03:03:43.652899 INFO : End of 2D write delay Voltage center optimization
397 03:03:43.658510 INFO : Training has run successfully!
398 03:03:43.658986
399 03:03:43.659412 channel==0
400 03:03:43.664014 RxClkDly_Margin_A0==88 ps 9
401 03:03:43.664481 TxDqDly_Margin_A0==98 ps 10
402 03:03:43.669660 RxClkDly_Margin_A1==88 ps 9
403 03:03:43.670118 TxDqDly_Margin_A1==98 ps 10
404 03:03:43.670526 TrainedVREFDQ_A0==74
405 03:03:43.675246 TrainedVREFDQ_A1==74
406 03:03:43.675712 VrefDac_Margin_A0==25
407 03:03:43.676163 DeviceVref_Margin_A0==40
408 03:03:43.680863 VrefDac_Margin_A1==25
409 03:03:43.681317 DeviceVref_Margin_A1==40
410 03:03:43.681717
411 03:03:43.682115
412 03:03:43.686534 channel==1
413 03:03:43.686990 RxClkDly_Margin_A0==88 ps 9
414 03:03:43.687393 TxDqDly_Margin_A0==98 ps 10
415 03:03:43.692036 RxClkDly_Margin_A1==88 ps 9
416 03:03:43.692496 TxDqDly_Margin_A1==88 ps 9
417 03:03:43.697607 TrainedVREFDQ_A0==77
418 03:03:43.698060 TrainedVREFDQ_A1==77
419 03:03:43.698465 VrefDac_Margin_A0==22
420 03:03:43.703235 DeviceVref_Margin_A0==37
421 03:03:43.703689 VrefDac_Margin_A1==24
422 03:03:43.708842 DeviceVref_Margin_A1==37
423 03:03:43.709298
424 03:03:43.709705 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:03:43.710100
426 03:03:43.742345 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000016 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 03:03:43.742907 2D training succeed
428 03:03:43.747960 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:03:43.753520 auto size-- 65535DDR cs0 size: 2048MB
430 03:03:43.753981 DDR cs1 size: 2048MB
431 03:03:43.759085 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:03:43.759542 cs0 DataBus test pass
433 03:03:43.764705 cs1 DataBus test pass
434 03:03:43.765161 cs0 AddrBus test pass
435 03:03:43.765571 cs1 AddrBus test pass
436 03:03:43.765968
437 03:03:43.770452 100bdlr_step_size ps== 420
438 03:03:43.770921 result report
439 03:03:43.775930 boot times 0Enable ddr reg access
440 03:03:43.781191 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:03:43.794633 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:03:44.368261 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:03:44.368839 MVN_1=0x00000000
444 03:03:44.373920 MVN_2=0x00000000
445 03:03:44.379650 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:03:44.380442 OPS=0x10
447 03:03:44.380932 ring efuse init
448 03:03:44.381361 chipver efuse init
449 03:03:44.385252 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:03:44.390802 [0.018961 Inits done]
451 03:03:44.391272 secure task start!
452 03:03:44.391680 high task start!
453 03:03:44.395378 low task start!
454 03:03:44.395839 run into bl31
455 03:03:44.402043 NOTICE: BL31: v1.3(release):4fc40b1
456 03:03:44.409843 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:03:44.410337 NOTICE: BL31: G12A normal boot!
458 03:03:44.435199 NOTICE: BL31: BL33 decompress pass
459 03:03:44.440904 ERROR: Error initializing runtime service opteed_fast
460 03:03:45.673844
461 03:03:45.674484
462 03:03:45.682238 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:03:45.682723
464 03:03:45.683138 Model: Libre Computer AML-A311D-CC Alta
465 03:03:45.890662 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:03:45.913983 DRAM: 2 GiB (effective 3.8 GiB)
467 03:03:46.057017 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:03:46.062845 WDT: Not starting watchdog@f0d0
469 03:03:46.095097 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:03:46.107482 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:03:46.112549 ** Bad device specification mmc 0 **
472 03:03:46.122816 Card did not respond to voltage select! : -110
473 03:03:46.130483 ** Bad device specification mmc 0 **
474 03:03:46.130950 Couldn't find partition mmc 0
475 03:03:46.138849 Card did not respond to voltage select! : -110
476 03:03:46.144332 ** Bad device specification mmc 0 **
477 03:03:46.144790 Couldn't find partition mmc 0
478 03:03:46.149490 Error: could not access storage.
479 03:03:47.412821 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 03:03:47.413457 bl2_stage_init 0x01
481 03:03:47.413887 bl2_stage_init 0x81
482 03:03:47.418362 hw id: 0x0000 - pwm id 0x01
483 03:03:47.418854 bl2_stage_init 0xc1
484 03:03:47.419265 bl2_stage_init 0x02
485 03:03:47.419665
486 03:03:47.423891 L0:00000000
487 03:03:47.424388 L1:20000703
488 03:03:47.424798 L2:00008067
489 03:03:47.425196 L3:14000000
490 03:03:47.429462 B2:00402000
491 03:03:47.429928 B1:e0f83180
492 03:03:47.430329
493 03:03:47.430724 TE: 58124
494 03:03:47.431119
495 03:03:47.435051 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 03:03:47.435519
497 03:03:47.435927 Board ID = 1
498 03:03:47.440678 Set A53 clk to 24M
499 03:03:47.441142 Set A73 clk to 24M
500 03:03:47.441545 Set clk81 to 24M
501 03:03:47.446268 A53 clk: 1200 MHz
502 03:03:47.446743 A73 clk: 1200 MHz
503 03:03:47.447150 CLK81: 166.6M
504 03:03:47.447551 smccc: 00012a92
505 03:03:47.451881 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 03:03:47.457447 board id: 1
507 03:03:47.463428 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 03:03:47.474069 fw parse done
509 03:03:47.480017 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 03:03:47.522609 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 03:03:47.533571 PIEI prepare done
512 03:03:47.534073 fastboot data load
513 03:03:47.534490 fastboot data verify
514 03:03:47.539155 verify result: 266
515 03:03:47.544764 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 03:03:47.545261 LPDDR4 probe
517 03:03:47.545677 ddr clk to 1584MHz
518 03:03:47.552757 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 03:03:47.590095
520 03:03:47.590626 dmc_version 0001
521 03:03:47.596670 Check phy result
522 03:03:47.602512 INFO : End of CA training
523 03:03:47.602983 INFO : End of initialization
524 03:03:47.608135 INFO : Training has run successfully!
525 03:03:47.608622 Check phy result
526 03:03:47.613713 INFO : End of initialization
527 03:03:47.614183 INFO : End of read enable training
528 03:03:47.616967 INFO : End of fine write leveling
529 03:03:47.622587 INFO : End of Write leveling coarse delay
530 03:03:47.628165 INFO : Training has run successfully!
531 03:03:47.628653 Check phy result
532 03:03:47.629061 INFO : End of initialization
533 03:03:47.633754 INFO : End of read dq deskew training
534 03:03:47.637058 INFO : End of MPR read delay center optimization
535 03:03:47.642719 INFO : End of write delay center optimization
536 03:03:47.648318 INFO : End of read delay center optimization
537 03:03:47.648788 INFO : End of max read latency training
538 03:03:47.653944 INFO : Training has run successfully!
539 03:03:47.654431 1D training succeed
540 03:03:47.662121 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 03:03:47.709711 Check phy result
542 03:03:47.710216 INFO : End of initialization
543 03:03:47.732311 INFO : End of 2D read delay Voltage center optimization
544 03:03:47.752546 INFO : End of 2D read delay Voltage center optimization
545 03:03:47.804559 INFO : End of 2D write delay Voltage center optimization
546 03:03:47.854001 INFO : End of 2D write delay Voltage center optimization
547 03:03:47.859487 INFO : Training has run successfully!
548 03:03:47.859947
549 03:03:47.860410 channel==0
550 03:03:47.865124 RxClkDly_Margin_A0==88 ps 9
551 03:03:47.865593 TxDqDly_Margin_A0==98 ps 10
552 03:03:47.870762 RxClkDly_Margin_A1==88 ps 9
553 03:03:47.871231 TxDqDly_Margin_A1==98 ps 10
554 03:03:47.871641 TrainedVREFDQ_A0==74
555 03:03:47.876332 TrainedVREFDQ_A1==74
556 03:03:47.876804 VrefDac_Margin_A0==24
557 03:03:47.877210 DeviceVref_Margin_A0==40
558 03:03:47.881963 VrefDac_Margin_A1==25
559 03:03:47.882416 DeviceVref_Margin_A1==40
560 03:03:47.882815
561 03:03:47.883208
562 03:03:47.887503 channel==1
563 03:03:47.887956 RxClkDly_Margin_A0==98 ps 10
564 03:03:47.888399 TxDqDly_Margin_A0==88 ps 9
565 03:03:47.893124 RxClkDly_Margin_A1==98 ps 10
566 03:03:47.893577 TxDqDly_Margin_A1==88 ps 9
567 03:03:47.898708 TrainedVREFDQ_A0==77
568 03:03:47.899165 TrainedVREFDQ_A1==77
569 03:03:47.899571 VrefDac_Margin_A0==22
570 03:03:47.904326 DeviceVref_Margin_A0==37
571 03:03:47.904775 VrefDac_Margin_A1==24
572 03:03:47.909992 DeviceVref_Margin_A1==37
573 03:03:47.910461
574 03:03:47.910868 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 03:03:47.911264
576 03:03:47.943460 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 03:03:47.944021 2D training succeed
578 03:03:47.949157 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 03:03:47.954754 auto size-- 65535DDR cs0 size: 2048MB
580 03:03:47.955216 DDR cs1 size: 2048MB
581 03:03:47.960268 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 03:03:47.960728 cs0 DataBus test pass
583 03:03:47.965986 cs1 DataBus test pass
584 03:03:47.966444 cs0 AddrBus test pass
585 03:03:47.966844 cs1 AddrBus test pass
586 03:03:47.967245
587 03:03:47.971530 100bdlr_step_size ps== 420
588 03:03:47.972034 result report
589 03:03:47.977106 boot times 0Enable ddr reg access
590 03:03:47.982432 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 03:03:47.996026 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 03:03:48.569264 0.0;M3 CHK:0;cm4_sp_mode 0
593 03:03:48.569885 MVN_1=0x00000000
594 03:03:48.574587 MVN_2=0x00000000
595 03:03:48.580379 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 03:03:48.580873 OPS=0x10
597 03:03:48.581306 ring efuse init
598 03:03:48.581721 chipver efuse init
599 03:03:48.588536 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 03:03:48.589025 [0.018961 Inits done]
601 03:03:48.589418 secure task start!
602 03:03:48.596151 high task start!
603 03:03:48.596604 low task start!
604 03:03:48.596992 run into bl31
605 03:03:48.602669 NOTICE: BL31: v1.3(release):4fc40b1
606 03:03:48.610494 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 03:03:48.610948 NOTICE: BL31: G12A normal boot!
608 03:03:48.636106 NOTICE: BL31: BL33 decompress pass
609 03:03:48.641612 ERROR: Error initializing runtime service opteed_fast
610 03:03:49.874614
611 03:03:49.875194
612 03:03:49.883094 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 03:03:49.883566
614 03:03:49.883976 Model: Libre Computer AML-A311D-CC Alta
615 03:03:50.091549 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 03:03:50.114966 DRAM: 2 GiB (effective 3.8 GiB)
617 03:03:50.257839 Core: 408 devices, 31 uclasses, devicetree: separate
618 03:03:50.263757 WDT: Not starting watchdog@f0d0
619 03:03:50.295892 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 03:03:50.308372 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 03:03:50.313523 ** Bad device specification mmc 0 **
622 03:03:50.323684 Card did not respond to voltage select! : -110
623 03:03:50.331485 ** Bad device specification mmc 0 **
624 03:03:50.331945 Couldn't find partition mmc 0
625 03:03:50.339612 Card did not respond to voltage select! : -110
626 03:03:50.345133 ** Bad device specification mmc 0 **
627 03:03:50.345590 Couldn't find partition mmc 0
628 03:03:50.350252 Error: could not access storage.
629 03:03:50.691759 Net: eth0: ethernet@ff3f0000
630 03:03:50.692366 starting USB...
631 03:03:50.944543 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 03:03:50.945032 Starting the controller
633 03:03:50.951676 USB XHCI 1.10
634 03:03:52.661537 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 03:03:52.662156 bl2_stage_init 0x01
636 03:03:52.662576 bl2_stage_init 0x81
637 03:03:52.667108 hw id: 0x0000 - pwm id 0x01
638 03:03:52.667576 bl2_stage_init 0xc1
639 03:03:52.668036 bl2_stage_init 0x02
640 03:03:52.668451
641 03:03:52.672859 L0:00000000
642 03:03:52.673315 L1:20000703
643 03:03:52.673722 L2:00008067
644 03:03:52.674118 L3:14000000
645 03:03:52.678320 B2:00402000
646 03:03:52.678773 B1:e0f83180
647 03:03:52.679181
648 03:03:52.679580 TE: 58124
649 03:03:52.679977
650 03:03:52.683855 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 03:03:52.684345
652 03:03:52.684756 Board ID = 1
653 03:03:52.689534 Set A53 clk to 24M
654 03:03:52.689989 Set A73 clk to 24M
655 03:03:52.690394 Set clk81 to 24M
656 03:03:52.695109 A53 clk: 1200 MHz
657 03:03:52.695560 A73 clk: 1200 MHz
658 03:03:52.695962 CLK81: 166.6M
659 03:03:52.696397 smccc: 00012a92
660 03:03:52.700718 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 03:03:52.706240 board id: 1
662 03:03:52.712314 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 03:03:52.722802 fw parse done
664 03:03:52.727924 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 03:03:52.771355 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 03:03:52.782267 PIEI prepare done
667 03:03:52.782716 fastboot data load
668 03:03:52.783125 fastboot data verify
669 03:03:52.787882 verify result: 266
670 03:03:52.793461 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 03:03:52.793912 LPDDR4 probe
672 03:03:52.794319 ddr clk to 1584MHz
673 03:03:52.801461 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 03:03:52.838800
675 03:03:52.839248 dmc_version 0001
676 03:03:52.844540 Check phy result
677 03:03:52.851266 INFO : End of CA training
678 03:03:52.851711 INFO : End of initialization
679 03:03:52.856812 INFO : Training has run successfully!
680 03:03:52.857263 Check phy result
681 03:03:52.862455 INFO : End of initialization
682 03:03:52.862902 INFO : End of read enable training
683 03:03:52.868084 INFO : End of fine write leveling
684 03:03:52.873687 INFO : End of Write leveling coarse delay
685 03:03:52.874137 INFO : Training has run successfully!
686 03:03:52.874544 Check phy result
687 03:03:52.879198 INFO : End of initialization
688 03:03:52.879644 INFO : End of read dq deskew training
689 03:03:52.884917 INFO : End of MPR read delay center optimization
690 03:03:52.890459 INFO : End of write delay center optimization
691 03:03:52.896108 INFO : End of read delay center optimization
692 03:03:52.896564 INFO : End of max read latency training
693 03:03:52.901717 INFO : Training has run successfully!
694 03:03:52.902165 1D training succeed
695 03:03:52.910865 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 03:03:52.958427 Check phy result
697 03:03:52.958879 INFO : End of initialization
698 03:03:52.980232 INFO : End of 2D read delay Voltage center optimization
699 03:03:53.000451 INFO : End of 2D read delay Voltage center optimization
700 03:03:53.052582 INFO : End of 2D write delay Voltage center optimization
701 03:03:53.101884 INFO : End of 2D write delay Voltage center optimization
702 03:03:53.107380 INFO : Training has run successfully!
703 03:03:53.107849
704 03:03:53.108309 channel==0
705 03:03:53.113088 RxClkDly_Margin_A0==88 ps 9
706 03:03:53.113553 TxDqDly_Margin_A0==98 ps 10
707 03:03:53.116357 RxClkDly_Margin_A1==88 ps 9
708 03:03:53.116807 TxDqDly_Margin_A1==88 ps 9
709 03:03:53.121918 TrainedVREFDQ_A0==74
710 03:03:53.122365 TrainedVREFDQ_A1==74
711 03:03:53.122769 VrefDac_Margin_A0==25
712 03:03:53.127422 DeviceVref_Margin_A0==40
713 03:03:53.127870 VrefDac_Margin_A1==25
714 03:03:53.133083 DeviceVref_Margin_A1==40
715 03:03:53.133530
716 03:03:53.133932
717 03:03:53.134326 channel==1
718 03:03:53.134714 RxClkDly_Margin_A0==98 ps 10
719 03:03:53.138727 TxDqDly_Margin_A0==98 ps 10
720 03:03:53.139175 RxClkDly_Margin_A1==98 ps 10
721 03:03:53.144278 TxDqDly_Margin_A1==88 ps 9
722 03:03:53.144730 TrainedVREFDQ_A0==77
723 03:03:53.145137 TrainedVREFDQ_A1==77
724 03:03:53.149941 VrefDac_Margin_A0==22
725 03:03:53.150389 DeviceVref_Margin_A0==37
726 03:03:53.155446 VrefDac_Margin_A1==24
727 03:03:53.155893 DeviceVref_Margin_A1==37
728 03:03:53.156331
729 03:03:53.161025 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 03:03:53.161471
731 03:03:53.188985 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 03:03:53.194724 2D training succeed
733 03:03:53.200215 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 03:03:53.200666 auto size-- 65535DDR cs0 size: 2048MB
735 03:03:53.205841 DDR cs1 size: 2048MB
736 03:03:53.206287 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 03:03:53.211444 cs0 DataBus test pass
738 03:03:53.211889 cs1 DataBus test pass
739 03:03:53.212336 cs0 AddrBus test pass
740 03:03:53.217025 cs1 AddrBus test pass
741 03:03:53.217471
742 03:03:53.217872 100bdlr_step_size ps== 420
743 03:03:53.218273 result report
744 03:03:53.222714 boot times 0Enable ddr reg access
745 03:03:53.230391 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 03:03:53.243799 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 03:03:53.816897 0.0;M3 CHK:0;cm4_sp_mode 0
748 03:03:53.817521 MVN_1=0x00000000
749 03:03:53.822458 MVN_2=0x00000000
750 03:03:53.828268 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 03:03:53.828833 OPS=0x10
752 03:03:53.829282 ring efuse init
753 03:03:53.829719 chipver efuse init
754 03:03:53.833734 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 03:03:53.839192 [0.018961 Inits done]
756 03:03:53.839658 secure task start!
757 03:03:53.840141 high task start!
758 03:03:53.843778 low task start!
759 03:03:53.844258 run into bl31
760 03:03:53.850479 NOTICE: BL31: v1.3(release):4fc40b1
761 03:03:53.858310 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 03:03:53.858779 NOTICE: BL31: G12A normal boot!
763 03:03:53.883706 NOTICE: BL31: BL33 decompress pass
764 03:03:53.889336 ERROR: Error initializing runtime service opteed_fast
765 03:03:55.122325
766 03:03:55.122970
767 03:03:55.130733 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 03:03:55.131273
769 03:03:55.131741 Model: Libre Computer AML-A311D-CC Alta
770 03:03:55.339133 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 03:03:55.362518 DRAM: 2 GiB (effective 3.8 GiB)
772 03:03:55.505514 Core: 408 devices, 31 uclasses, devicetree: separate
773 03:03:55.511393 WDT: Not starting watchdog@f0d0
774 03:03:55.543669 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 03:03:55.556114 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 03:03:55.561123 ** Bad device specification mmc 0 **
777 03:03:55.571435 Card did not respond to voltage select! : -110
778 03:03:55.579105 ** Bad device specification mmc 0 **
779 03:03:55.579660 Couldn't find partition mmc 0
780 03:03:55.587452 Card did not respond to voltage select! : -110
781 03:03:55.593021 ** Bad device specification mmc 0 **
782 03:03:55.593550 Couldn't find partition mmc 0
783 03:03:55.598078 Error: could not access storage.
784 03:03:55.940444 Net: eth0: ethernet@ff3f0000
785 03:03:55.941029 starting USB...
786 03:03:56.192237 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 03:03:56.192789 Starting the controller
788 03:03:56.199205 USB XHCI 1.10
789 03:03:58.361531 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 03:03:58.362176 bl2_stage_init 0x01
791 03:03:58.362645 bl2_stage_init 0x81
792 03:03:58.367149 hw id: 0x0000 - pwm id 0x01
793 03:03:58.367635 bl2_stage_init 0xc1
794 03:03:58.368142 bl2_stage_init 0x02
795 03:03:58.368600
796 03:03:58.372693 L0:00000000
797 03:03:58.373179 L1:20000703
798 03:03:58.373626 L2:00008067
799 03:03:58.374069 L3:14000000
800 03:03:58.378279 B2:00402000
801 03:03:58.378763 B1:e0f83180
802 03:03:58.379210
803 03:03:58.379655 TE: 58167
804 03:03:58.380133
805 03:03:58.383880 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 03:03:58.384420
807 03:03:58.384876 Board ID = 1
808 03:03:58.389482 Set A53 clk to 24M
809 03:03:58.390002 Set A73 clk to 24M
810 03:03:58.390455 Set clk81 to 24M
811 03:03:58.395138 A53 clk: 1200 MHz
812 03:03:58.395630 A73 clk: 1200 MHz
813 03:03:58.396128 CLK81: 166.6M
814 03:03:58.396575 smccc: 00012abe
815 03:03:58.400547 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 03:03:58.406182 board id: 1
817 03:03:58.412130 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 03:03:58.422741 fw parse done
819 03:03:58.428765 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 03:03:58.471307 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 03:03:58.482185 PIEI prepare done
822 03:03:58.482669 fastboot data load
823 03:03:58.483122 fastboot data verify
824 03:03:58.487834 verify result: 266
825 03:03:58.493446 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 03:03:58.493939 LPDDR4 probe
827 03:03:58.494389 ddr clk to 1584MHz
828 03:03:58.501492 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 03:03:58.538668
830 03:03:58.539184 dmc_version 0001
831 03:03:58.545366 Check phy result
832 03:03:58.551178 INFO : End of CA training
833 03:03:58.551676 INFO : End of initialization
834 03:03:58.556813 INFO : Training has run successfully!
835 03:03:58.557298 Check phy result
836 03:03:58.562410 INFO : End of initialization
837 03:03:58.562889 INFO : End of read enable training
838 03:03:58.567976 INFO : End of fine write leveling
839 03:03:58.573616 INFO : End of Write leveling coarse delay
840 03:03:58.574095 INFO : Training has run successfully!
841 03:03:58.574543 Check phy result
842 03:03:58.579183 INFO : End of initialization
843 03:03:58.579654 INFO : End of read dq deskew training
844 03:03:58.584813 INFO : End of MPR read delay center optimization
845 03:03:58.590400 INFO : End of write delay center optimization
846 03:03:58.596098 INFO : End of read delay center optimization
847 03:03:58.596581 INFO : End of max read latency training
848 03:03:58.601583 INFO : Training has run successfully!
849 03:03:58.602058 1D training succeed
850 03:03:58.610832 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 03:03:58.658419 Check phy result
852 03:03:58.658935 INFO : End of initialization
853 03:03:58.680060 INFO : End of 2D read delay Voltage center optimization
854 03:03:58.700169 INFO : End of 2D read delay Voltage center optimization
855 03:03:58.751143 INFO : End of 2D write delay Voltage center optimization
856 03:03:58.801329 INFO : End of 2D write delay Voltage center optimization
857 03:03:58.806971 INFO : Training has run successfully!
858 03:03:58.807453
859 03:03:58.807904 channel==0
860 03:03:58.812535 RxClkDly_Margin_A0==88 ps 9
861 03:03:58.813026 TxDqDly_Margin_A0==98 ps 10
862 03:03:58.818069 RxClkDly_Margin_A1==88 ps 9
863 03:03:58.818546 TxDqDly_Margin_A1==98 ps 10
864 03:03:58.819010 TrainedVREFDQ_A0==74
865 03:03:58.823727 TrainedVREFDQ_A1==75
866 03:03:58.824284 VrefDac_Margin_A0==25
867 03:03:58.824731 DeviceVref_Margin_A0==40
868 03:03:58.829345 VrefDac_Margin_A1==25
869 03:03:58.829855 DeviceVref_Margin_A1==39
870 03:03:58.830282
871 03:03:58.830704
872 03:03:58.834977 channel==1
873 03:03:58.835438 RxClkDly_Margin_A0==98 ps 10
874 03:03:58.835861 TxDqDly_Margin_A0==98 ps 10
875 03:03:58.840580 RxClkDly_Margin_A1==88 ps 9
876 03:03:58.841040 TxDqDly_Margin_A1==88 ps 9
877 03:03:58.846062 TrainedVREFDQ_A0==77
878 03:03:58.846523 TrainedVREFDQ_A1==77
879 03:03:58.846954 VrefDac_Margin_A0==22
880 03:03:58.851651 DeviceVref_Margin_A0==37
881 03:03:58.852134 VrefDac_Margin_A1==24
882 03:03:58.857289 DeviceVref_Margin_A1==37
883 03:03:58.857744
884 03:03:58.858169 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 03:03:58.858592
886 03:03:58.890751 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
887 03:03:58.891243 2D training succeed
888 03:03:58.896406 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 03:03:58.901925 auto size-- 65535DDR cs0 size: 2048MB
890 03:03:58.902389 DDR cs1 size: 2048MB
891 03:03:58.907509 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 03:03:58.907966 cs0 DataBus test pass
893 03:03:58.913145 cs1 DataBus test pass
894 03:03:58.913604 cs0 AddrBus test pass
895 03:03:58.914031 cs1 AddrBus test pass
896 03:03:58.914451
897 03:03:58.918731 100bdlr_step_size ps== 420
898 03:03:58.919199 result report
899 03:03:58.924405 boot times 0Enable ddr reg access
900 03:03:58.928808 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 03:03:58.943134 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 03:03:59.515272 0.0;M3 CHK:0;cm4_sp_mode 0
903 03:03:59.515939 MVN_1=0x00000000
904 03:03:59.520616 MVN_2=0x00000000
905 03:03:59.526444 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 03:03:59.526970 OPS=0x10
907 03:03:59.527429 ring efuse init
908 03:03:59.527872 chipver efuse init
909 03:03:59.532030 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 03:03:59.537613 [0.018960 Inits done]
911 03:03:59.538115 secure task start!
912 03:03:59.538563 high task start!
913 03:03:59.542191 low task start!
914 03:03:59.542675 run into bl31
915 03:03:59.548827 NOTICE: BL31: v1.3(release):4fc40b1
916 03:03:59.555685 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 03:03:59.556214 NOTICE: BL31: G12A normal boot!
918 03:03:59.581988 NOTICE: BL31: BL33 decompress pass
919 03:03:59.586843 ERROR: Error initializing runtime service opteed_fast
920 03:04:00.820769
921 03:04:00.821388
922 03:04:00.828108 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 03:04:00.828631
924 03:04:00.829096 Model: Libre Computer AML-A311D-CC Alta
925 03:04:01.037477 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 03:04:01.060821 DRAM: 2 GiB (effective 3.8 GiB)
927 03:04:01.203851 Core: 408 devices, 31 uclasses, devicetree: separate
928 03:04:01.209734 WDT: Not starting watchdog@f0d0
929 03:04:01.241911 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 03:04:01.254408 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 03:04:01.259380 ** Bad device specification mmc 0 **
932 03:04:01.269720 Card did not respond to voltage select! : -110
933 03:04:01.277367 ** Bad device specification mmc 0 **
934 03:04:01.277868 Couldn't find partition mmc 0
935 03:04:01.285732 Card did not respond to voltage select! : -110
936 03:04:01.291209 ** Bad device specification mmc 0 **
937 03:04:01.291692 Couldn't find partition mmc 0
938 03:04:01.296274 Error: could not access storage.
939 03:04:01.639831 Net: eth0: ethernet@ff3f0000
940 03:04:01.640515 starting USB...
941 03:04:01.891582 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 03:04:01.892187 Starting the controller
943 03:04:01.898534 USB XHCI 1.10
944 03:04:03.581693 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 03:04:03.583884 scanning usb for storage devices... 0 Storage Device(s) found
947 03:04:03.635125 Hit any key to stop autoboot: 1
948 03:04:03.636072 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 03:04:03.636480 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
950 03:04:03.636792 Setting prompt string to ['=>']
951 03:04:03.637090 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
952 03:04:03.878638 0
953 03:04:03.880170 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 03:04:03.880778 Sending with 10 millisecond of delay
956 03:04:05.015710 => setenv autoload no
957 03:04:05.026579 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
958 03:04:05.031464 setenv autoload no
959 03:04:05.032229 Sending with 10 millisecond of delay
961 03:04:06.829272 => setenv initrd_high 0xffffffff
962 03:04:06.840076 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
963 03:04:06.840846 setenv initrd_high 0xffffffff
964 03:04:06.841510 Sending with 10 millisecond of delay
966 03:04:08.459386 => setenv fdt_high 0xffffffff
967 03:04:08.470097 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 03:04:08.470767 setenv fdt_high 0xffffffff
969 03:04:08.471329 Sending with 10 millisecond of delay
971 03:04:08.762942 => dhcp
972 03:04:08.773718 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
973 03:04:09.030557 dhcp
974 03:04:09.031177 Speed: 1000, full duplex
975 03:04:09.031603 BOOTP broadcast 1
976 03:04:09.044268 DHCP client bound to address 192.168.6.27 (12 ms)
977 03:04:09.045095 Sending with 10 millisecond of delay
979 03:04:10.721593 => setenv serverip 192.168.6.2
980 03:04:10.732373 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
981 03:04:10.733179 setenv serverip 192.168.6.2
982 03:04:10.733874 Sending with 10 millisecond of delay
984 03:04:14.459373 => tftpboot 0x01080000 950089/tftp-deploy-wqnnos7t/kernel/uImage
985 03:04:14.470223 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 03:04:14.471096 tftpboot 0x01080000 950089/tftp-deploy-wqnnos7t/kernel/uImage
987 03:04:14.471541 Speed: 1000, full duplex
988 03:04:14.471938 Using ethernet@ff3f0000 device
989 03:04:14.473036 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 03:04:14.478652 Filename '950089/tftp-deploy-wqnnos7t/kernel/uImage'.
991 03:04:14.482404 Load address: 0x1080000
992 03:04:17.334527 Loading: *################################################## 43.6 MiB
993 03:04:17.335127 15.3 MiB/s
994 03:04:17.335551 done
995 03:04:17.338983 Bytes transferred = 45713984 (2b98a40 hex)
996 03:04:17.339736 Sending with 10 millisecond of delay
998 03:04:22.029787 => tftpboot 0x08000000 950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
999 03:04:22.040366 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1000 03:04:22.041219 tftpboot 0x08000000 950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot
1001 03:04:22.041643 Speed: 1000, full duplex
1002 03:04:22.042036 Using ethernet@ff3f0000 device
1003 03:04:22.043320 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 03:04:22.054944 Filename '950089/tftp-deploy-wqnnos7t/ramdisk/ramdisk.cpio.gz.uboot'.
1005 03:04:22.055395 Load address: 0x8000000
1006 03:04:28.814711 Loading: *###################T ############################## UDP wrong checksum 00000005 00008bca
1007 03:04:33.815689 T UDP wrong checksum 00000005 00008bca
1008 03:04:43.818755 T T UDP wrong checksum 00000005 00008bca
1009 03:04:50.242782 T UDP wrong checksum 000000ff 0000c66b
1010 03:04:50.290847 UDP wrong checksum 000000ff 0000605e
1011 03:05:03.821094 T T UDP wrong checksum 00000005 00008bca
1012 03:05:18.826752 T T T
1013 03:05:18.827190 Retry count exceeded; starting again
1015 03:05:18.828959 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1018 03:05:18.830756 end: 2.4 uboot-commands (duration 00:01:48) [common]
1020 03:05:18.832133 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 03:05:18.833144 end: 2 uboot-action (duration 00:01:48) [common]
1024 03:05:18.834708 Cleaning after the job
1025 03:05:18.835259 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/ramdisk
1026 03:05:18.836633 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/kernel
1027 03:05:18.881877 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/dtb
1028 03:05:18.882717 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/nfsrootfs
1029 03:05:19.232840 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950089/tftp-deploy-wqnnos7t/modules
1030 03:05:19.257194 start: 4.1 power-off (timeout 00:00:30) [common]
1031 03:05:19.257919 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 03:05:19.292756 >> OK - accepted request
1033 03:05:19.294846 Returned 0 in 0 seconds
1034 03:05:19.395812 end: 4.1 power-off (duration 00:00:00) [common]
1036 03:05:19.397000 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 03:05:19.397663 Listened to connection for namespace 'common' for up to 1s
1038 03:05:20.398597 Finalising connection for namespace 'common'
1039 03:05:20.399049 Disconnecting from shell: Finalise
1040 03:05:20.399367 =>
1041 03:05:20.500318 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 03:05:20.500813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950089
1043 03:05:23.145868 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950089
1044 03:05:23.146473 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.