Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:15:23.125137 lava-dispatcher, installed at version: 2024.01
2 01:15:23.125967 start: 0 validate
3 01:15:23.126438 Start time: 2024-11-07 01:15:23.126408+00:00 (UTC)
4 01:15:23.126986 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:15:23.127516 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 01:15:23.161904 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:15:23.162472 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:15:23.191545 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:15:23.192460 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:15:30.269305 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:15:30.269807 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 01:15:30.314229 validate duration: 7.19
14 01:15:30.315268 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:15:30.315655 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:15:30.316032 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:15:30.316659 Not decompressing ramdisk as can be used compressed.
18 01:15:30.317167 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 01:15:30.317455 saving as /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/ramdisk/rootfs.cpio.gz
20 01:15:30.317728 total size: 8181887 (7 MB)
21 01:15:30.362041 progress 0 % (0 MB)
22 01:15:30.374199 progress 5 % (0 MB)
23 01:15:30.386308 progress 10 % (0 MB)
24 01:15:30.397499 progress 15 % (1 MB)
25 01:15:30.403334 progress 20 % (1 MB)
26 01:15:30.409802 progress 25 % (1 MB)
27 01:15:30.415524 progress 30 % (2 MB)
28 01:15:30.421862 progress 35 % (2 MB)
29 01:15:30.427845 progress 40 % (3 MB)
30 01:15:30.434118 progress 45 % (3 MB)
31 01:15:30.440051 progress 50 % (3 MB)
32 01:15:30.446232 progress 55 % (4 MB)
33 01:15:30.452130 progress 60 % (4 MB)
34 01:15:30.458275 progress 65 % (5 MB)
35 01:15:30.464232 progress 70 % (5 MB)
36 01:15:30.470619 progress 75 % (5 MB)
37 01:15:30.476722 progress 80 % (6 MB)
38 01:15:30.484275 progress 85 % (6 MB)
39 01:15:30.489843 progress 90 % (7 MB)
40 01:15:30.495915 progress 95 % (7 MB)
41 01:15:30.501048 progress 100 % (7 MB)
42 01:15:30.501737 7 MB downloaded in 0.18 s (42.41 MB/s)
43 01:15:30.502301 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:15:30.503193 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:15:30.503490 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:15:30.503763 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:15:30.504259 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
49 01:15:30.504582 saving as /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/kernel/Image
50 01:15:30.504796 total size: 45713920 (43 MB)
51 01:15:30.505010 No compression specified
52 01:15:30.536673 progress 0 % (0 MB)
53 01:15:30.564763 progress 5 % (2 MB)
54 01:15:30.593057 progress 10 % (4 MB)
55 01:15:30.621266 progress 15 % (6 MB)
56 01:15:30.650208 progress 20 % (8 MB)
57 01:15:30.678126 progress 25 % (10 MB)
58 01:15:30.706516 progress 30 % (13 MB)
59 01:15:30.735348 progress 35 % (15 MB)
60 01:15:30.764005 progress 40 % (17 MB)
61 01:15:30.792299 progress 45 % (19 MB)
62 01:15:30.820925 progress 50 % (21 MB)
63 01:15:30.850118 progress 55 % (24 MB)
64 01:15:30.878720 progress 60 % (26 MB)
65 01:15:30.907373 progress 65 % (28 MB)
66 01:15:30.936348 progress 70 % (30 MB)
67 01:15:30.966514 progress 75 % (32 MB)
68 01:15:30.995827 progress 80 % (34 MB)
69 01:15:31.024109 progress 85 % (37 MB)
70 01:15:31.052827 progress 90 % (39 MB)
71 01:15:31.081247 progress 95 % (41 MB)
72 01:15:31.111648 progress 100 % (43 MB)
73 01:15:31.112261 43 MB downloaded in 0.61 s (71.77 MB/s)
74 01:15:31.112774 end: 1.2.1 http-download (duration 00:00:01) [common]
76 01:15:31.113588 end: 1.2 download-retry (duration 00:00:01) [common]
77 01:15:31.113892 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:15:31.114242 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:15:31.114721 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 01:15:31.115009 saving as /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 01:15:31.115218 total size: 53209 (0 MB)
82 01:15:31.115430 No compression specified
83 01:15:31.156191 progress 61 % (0 MB)
84 01:15:31.157052 progress 100 % (0 MB)
85 01:15:31.157618 0 MB downloaded in 0.04 s (1.20 MB/s)
86 01:15:31.158090 end: 1.3.1 http-download (duration 00:00:00) [common]
88 01:15:31.158966 end: 1.3 download-retry (duration 00:00:00) [common]
89 01:15:31.159248 start: 1.4 download-retry (timeout 00:09:59) [common]
90 01:15:31.159512 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 01:15:31.159963 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
92 01:15:31.160246 saving as /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/modules/modules.tar
93 01:15:31.160451 total size: 11607584 (11 MB)
94 01:15:31.160660 Using unxz to decompress xz
95 01:15:31.203781 progress 0 % (0 MB)
96 01:15:31.271384 progress 5 % (0 MB)
97 01:15:31.361511 progress 10 % (1 MB)
98 01:15:31.458213 progress 15 % (1 MB)
99 01:15:31.550278 progress 20 % (2 MB)
100 01:15:31.631338 progress 25 % (2 MB)
101 01:15:31.707651 progress 30 % (3 MB)
102 01:15:31.782061 progress 35 % (3 MB)
103 01:15:31.859396 progress 40 % (4 MB)
104 01:15:31.936367 progress 45 % (5 MB)
105 01:15:32.022209 progress 50 % (5 MB)
106 01:15:32.100623 progress 55 % (6 MB)
107 01:15:32.187376 progress 60 % (6 MB)
108 01:15:32.270742 progress 65 % (7 MB)
109 01:15:32.355142 progress 70 % (7 MB)
110 01:15:32.447543 progress 75 % (8 MB)
111 01:15:32.549562 progress 80 % (8 MB)
112 01:15:32.646924 progress 85 % (9 MB)
113 01:15:32.742659 progress 90 % (9 MB)
114 01:15:32.837022 progress 95 % (10 MB)
115 01:15:32.930877 progress 100 % (11 MB)
116 01:15:32.944055 11 MB downloaded in 1.78 s (6.21 MB/s)
117 01:15:32.945012 end: 1.4.1 http-download (duration 00:00:02) [common]
119 01:15:32.946607 end: 1.4 download-retry (duration 00:00:02) [common]
120 01:15:32.947125 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 01:15:32.947635 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 01:15:32.948161 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 01:15:32.948665 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 01:15:32.949690 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k
125 01:15:32.950533 makedir: /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin
126 01:15:32.951175 makedir: /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/tests
127 01:15:32.951815 makedir: /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/results
128 01:15:32.952482 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-add-keys
129 01:15:32.953518 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-add-sources
130 01:15:32.954463 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-background-process-start
131 01:15:32.955450 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-background-process-stop
132 01:15:32.956504 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-common-functions
133 01:15:32.957440 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-echo-ipv4
134 01:15:32.958348 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-install-packages
135 01:15:32.959370 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-installed-packages
136 01:15:32.960537 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-os-build
137 01:15:32.961540 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-probe-channel
138 01:15:32.962526 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-probe-ip
139 01:15:32.963515 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-target-ip
140 01:15:32.964499 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-target-mac
141 01:15:32.965473 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-target-storage
142 01:15:32.966504 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-case
143 01:15:32.967505 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-event
144 01:15:32.968483 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-feedback
145 01:15:32.969543 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-raise
146 01:15:32.970473 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-reference
147 01:15:32.971372 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-runner
148 01:15:32.977763 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-set
149 01:15:32.978769 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-test-shell
150 01:15:32.979750 Updating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-install-packages (oe)
151 01:15:32.980537 Updating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/bin/lava-installed-packages (oe)
152 01:15:32.981034 Creating /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/environment
153 01:15:32.981468 LAVA metadata
154 01:15:32.981734 - LAVA_JOB_ID=950944
155 01:15:32.981954 - LAVA_DISPATCHER_IP=192.168.6.2
156 01:15:32.982360 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 01:15:32.983467 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 01:15:32.983810 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 01:15:32.984050 skipped lava-vland-overlay
160 01:15:32.984334 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 01:15:32.984605 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 01:15:32.984827 skipped lava-multinode-overlay
163 01:15:32.985093 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 01:15:32.985392 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 01:15:32.985657 Loading test definitions
166 01:15:32.985946 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 01:15:32.986171 Using /lava-950944 at stage 0
168 01:15:32.987536 uuid=950944_1.5.2.4.1 testdef=None
169 01:15:32.987873 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 01:15:32.988213 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 01:15:32.990154 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 01:15:32.990967 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 01:15:32.993361 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 01:15:32.994200 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 01:15:32.996553 runner path: /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/0/tests/0_dmesg test_uuid 950944_1.5.2.4.1
178 01:15:32.997165 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 01:15:32.998022 Creating lava-test-runner.conf files
181 01:15:32.998267 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950944/lava-overlay-chlrfn2k/lava-950944/0 for stage 0
182 01:15:32.998679 - 0_dmesg
183 01:15:32.999115 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 01:15:32.999460 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 01:15:33.023817 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 01:15:33.024293 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 01:15:33.024565 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 01:15:33.024835 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 01:15:33.025099 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 01:15:33.972567 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 01:15:33.973039 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 01:15:33.973282 extracting modules file /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk
193 01:15:35.434678 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 01:15:35.435306 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 01:15:35.435681 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950944/compress-overlay-as6hrgz4/overlay-1.5.2.5.tar.gz to ramdisk
196 01:15:35.436073 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950944/compress-overlay-as6hrgz4/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk
197 01:15:35.467468 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 01:15:35.467909 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 01:15:35.468203 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 01:15:35.468431 Converting downloaded kernel to a uImage
201 01:15:35.468737 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/kernel/Image /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/kernel/uImage
202 01:15:35.925878 output: Image Name:
203 01:15:35.926303 output: Created: Thu Nov 7 01:15:35 2024
204 01:15:35.926511 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 01:15:35.926715 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 01:15:35.926916 output: Load Address: 01080000
207 01:15:35.927113 output: Entry Point: 01080000
208 01:15:35.927307 output:
209 01:15:35.927636 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 01:15:35.927900 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 01:15:35.928213 start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
212 01:15:35.928471 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 01:15:35.928725 start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
214 01:15:35.928987 Building ramdisk /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk
215 01:15:38.512593 >> 181575 blocks
216 01:15:46.996358 Adding RAMdisk u-boot header.
217 01:15:46.997047 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk.cpio.gz.uboot
218 01:15:47.317454 output: Image Name:
219 01:15:47.317863 output: Created: Thu Nov 7 01:15:46 2024
220 01:15:47.318074 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 01:15:47.318278 output: Data Size: 26051577 Bytes = 25440.99 KiB = 24.84 MiB
222 01:15:47.318478 output: Load Address: 00000000
223 01:15:47.318676 output: Entry Point: 00000000
224 01:15:47.318870 output:
225 01:15:47.319555 rename /var/lib/lava/dispatcher/tmp/950944/extract-overlay-ramdisk-n7kyito7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
226 01:15:47.319972 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 01:15:47.320546 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 01:15:47.321111 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 01:15:47.321562 No LXC device requested
230 01:15:47.322053 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 01:15:47.322553 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 01:15:47.323037 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 01:15:47.323445 Checking files for TFTP limit of 4294967296 bytes.
234 01:15:47.326089 end: 1 tftp-deploy (duration 00:00:17) [common]
235 01:15:47.326665 start: 2 uboot-action (timeout 00:05:00) [common]
236 01:15:47.327187 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 01:15:47.327679 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 01:15:47.328215 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 01:15:47.328747 Using kernel file from prepare-kernel: 950944/tftp-deploy-sxl8_p2z/kernel/uImage
240 01:15:47.329346 substitutions:
241 01:15:47.329747 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 01:15:47.330147 - {DTB_ADDR}: 0x01070000
243 01:15:47.330542 - {DTB}: 950944/tftp-deploy-sxl8_p2z/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 01:15:47.330936 - {INITRD}: 950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
245 01:15:47.331329 - {KERNEL_ADDR}: 0x01080000
246 01:15:47.331716 - {KERNEL}: 950944/tftp-deploy-sxl8_p2z/kernel/uImage
247 01:15:47.332133 - {LAVA_MAC}: None
248 01:15:47.332563 - {PRESEED_CONFIG}: None
249 01:15:47.332953 - {PRESEED_LOCAL}: None
250 01:15:47.333338 - {RAMDISK_ADDR}: 0x08000000
251 01:15:47.333721 - {RAMDISK}: 950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
252 01:15:47.334112 - {ROOT_PART}: None
253 01:15:47.334498 - {ROOT}: None
254 01:15:47.334883 - {SERVER_IP}: 192.168.6.2
255 01:15:47.335271 - {TEE_ADDR}: 0x83000000
256 01:15:47.335656 - {TEE}: None
257 01:15:47.336063 Parsed boot commands:
258 01:15:47.336443 - setenv autoload no
259 01:15:47.336830 - setenv initrd_high 0xffffffff
260 01:15:47.337212 - setenv fdt_high 0xffffffff
261 01:15:47.337594 - dhcp
262 01:15:47.337979 - setenv serverip 192.168.6.2
263 01:15:47.338360 - tftpboot 0x01080000 950944/tftp-deploy-sxl8_p2z/kernel/uImage
264 01:15:47.338745 - tftpboot 0x08000000 950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
265 01:15:47.339129 - tftpboot 0x01070000 950944/tftp-deploy-sxl8_p2z/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 01:15:47.339512 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 01:15:47.339902 - bootm 0x01080000 0x08000000 0x01070000
268 01:15:47.340427 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 01:15:47.341903 start: 2.3 connect-device (timeout 00:05:00) [common]
271 01:15:47.342340 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 01:15:47.356075 Setting prompt string to ['lava-test: # ']
273 01:15:47.357599 end: 2.3 connect-device (duration 00:00:00) [common]
274 01:15:47.358199 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 01:15:47.358763 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 01:15:47.359313 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 01:15:47.360656 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 01:15:47.396281 >> OK - accepted request
279 01:15:47.398461 Returned 0 in 0 seconds
280 01:15:47.499469 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 01:15:47.500536 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 01:15:47.500883 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 01:15:47.501189 Setting prompt string to ['Hit any key to stop autoboot']
285 01:15:47.501450 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 01:15:47.502390 Trying 192.168.56.21...
287 01:15:47.502672 Connected to conserv1.
288 01:15:47.502885 Escape character is '^]'.
289 01:15:47.503101
290 01:15:47.503314 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 01:15:47.503530
292 01:15:54.817656 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 01:15:54.818085 bl2_stage_init 0x01
294 01:15:54.818311 bl2_stage_init 0x81
295 01:15:54.823267 hw id: 0x0000 - pwm id 0x01
296 01:15:54.823557 bl2_stage_init 0xc1
297 01:15:54.827478 bl2_stage_init 0x02
298 01:15:54.827755
299 01:15:54.827969 L0:00000000
300 01:15:54.828211 L1:00000703
301 01:15:54.828414 L2:00008067
302 01:15:54.833017 L3:15000000
303 01:15:54.833291 S1:00000000
304 01:15:54.833499 B2:20282000
305 01:15:54.833699 B1:a0f83180
306 01:15:54.833897
307 01:15:54.834098 TE: 69691
308 01:15:54.838641
309 01:15:54.844310 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 01:15:54.844575
311 01:15:54.844784 Board ID = 1
312 01:15:54.845015 Set cpu clk to 24M
313 01:15:54.845229 Set clk81 to 24M
314 01:15:54.849824 Use GP1_pll as DSU clk.
315 01:15:54.850090 DSU clk: 1200 Mhz
316 01:15:54.850295 CPU clk: 1200 MHz
317 01:15:54.855422 Set clk81 to 166.6M
318 01:15:54.861044 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 01:15:54.861317 board id: 1
320 01:15:54.869618 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 01:15:54.880525 fw parse done
322 01:15:54.886525 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 01:15:54.929529 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 01:15:54.940705 PIEI prepare done
325 01:15:54.941094 fastboot data load
326 01:15:54.941307 fastboot data verify
327 01:15:54.946425 verify result: 266
328 01:15:54.951884 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 01:15:54.952268 LPDDR4 probe
330 01:15:54.952490 ddr clk to 1584MHz
331 01:15:54.959915 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 01:15:54.997585
333 01:15:54.998010 dmc_version 0001
334 01:15:55.004684 Check phy result
335 01:15:55.010601 INFO : End of CA training
336 01:15:55.010962 INFO : End of initialization
337 01:15:55.016292 INFO : Training has run successfully!
338 01:15:55.016650 Check phy result
339 01:15:55.021760 INFO : End of initialization
340 01:15:55.022120 INFO : End of read enable training
341 01:15:55.025129 INFO : End of fine write leveling
342 01:15:55.030728 INFO : End of Write leveling coarse delay
343 01:15:55.036299 INFO : Training has run successfully!
344 01:15:55.036658 Check phy result
345 01:15:55.036883 INFO : End of initialization
346 01:15:55.041911 INFO : End of read dq deskew training
347 01:15:55.047480 INFO : End of MPR read delay center optimization
348 01:15:55.047837 INFO : End of write delay center optimization
349 01:15:55.053057 INFO : End of read delay center optimization
350 01:15:55.058710 INFO : End of max read latency training
351 01:15:55.059062 INFO : Training has run successfully!
352 01:15:55.064270 1D training succeed
353 01:15:55.070204 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 01:15:55.118507 Check phy result
355 01:15:55.118845 INFO : End of initialization
356 01:15:55.145975 INFO : End of 2D read delay Voltage center optimization
357 01:15:55.170067 INFO : End of 2D read delay Voltage center optimization
358 01:15:55.227197 INFO : End of 2D write delay Voltage center optimization
359 01:15:55.280924 INFO : End of 2D write delay Voltage center optimization
360 01:15:55.286886 INFO : Training has run successfully!
361 01:15:55.287242
362 01:15:55.288237 channel==0
363 01:15:55.292063 RxClkDly_Margin_A0==78 ps 8
364 01:15:55.293315 TxDqDly_Margin_A0==98 ps 10
365 01:15:55.295368 RxClkDly_Margin_A1==78 ps 8
366 01:15:55.295954 TxDqDly_Margin_A1==88 ps 9
367 01:15:55.302022 TrainedVREFDQ_A0==74
368 01:15:55.302661 TrainedVREFDQ_A1==75
369 01:15:55.303206 VrefDac_Margin_A0==23
370 01:15:55.306501 DeviceVref_Margin_A0==40
371 01:15:55.306972 VrefDac_Margin_A1==23
372 01:15:55.312095 DeviceVref_Margin_A1==39
373 01:15:55.312575
374 01:15:55.312797
375 01:15:55.312997 channel==1
376 01:15:55.313194 RxClkDly_Margin_A0==78 ps 8
377 01:15:55.318012 TxDqDly_Margin_A0==98 ps 10
378 01:15:55.318311 RxClkDly_Margin_A1==78 ps 8
379 01:15:55.323427 TxDqDly_Margin_A1==88 ps 9
380 01:15:55.323735 TrainedVREFDQ_A0==75
381 01:15:55.324199 TrainedVREFDQ_A1==75
382 01:15:55.328808 VrefDac_Margin_A0==22
383 01:15:55.329293 DeviceVref_Margin_A0==39
384 01:15:55.335371 VrefDac_Margin_A1==20
385 01:15:55.335866 DeviceVref_Margin_A1==38
386 01:15:55.336325
387 01:15:55.340275 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 01:15:55.340761
389 01:15:55.367878 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000016 00000017 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
390 01:15:55.373988 2D training succeed
391 01:15:55.379186 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 01:15:55.379672 auto size-- 65535DDR cs0 size: 2048MB
393 01:15:55.384927 DDR cs1 size: 2048MB
394 01:15:55.385213 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 01:15:55.390294 cs0 DataBus test pass
396 01:15:55.390580 cs1 DataBus test pass
397 01:15:55.390786 cs0 AddrBus test pass
398 01:15:55.396907 cs1 AddrBus test pass
399 01:15:55.397423
400 01:15:55.397826 100bdlr_step_size ps== 478
401 01:15:55.398237 result report
402 01:15:55.401573 boot times 0Enable ddr reg access
403 01:15:55.410384 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 01:15:55.424091 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 01:15:56.083588 bl2z: ptr: 05129330, size: 00001e40
406 01:15:56.089475 0.0;M3 CHK:0;cm4_sp_mode 0
407 01:15:56.089976 MVN_1=0x00000000
408 01:15:56.090377 MVN_2=0x00000000
409 01:15:56.102883 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 01:15:56.103405 OPS=0x04
411 01:15:56.103804 ring efuse init
412 01:15:56.106877 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 01:15:56.107355 [0.017354 Inits done]
414 01:15:56.107755 secure task start!
415 01:15:56.115031 high task start!
416 01:15:56.115516 low task start!
417 01:15:56.115926 run into bl31
418 01:15:56.123486 NOTICE: BL31: v1.3(release):4fc40b1
419 01:15:56.130916 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 01:15:56.131411 NOTICE: BL31: G12A normal boot!
421 01:15:56.146497 NOTICE: BL31: BL33 decompress pass
422 01:15:56.153014 ERROR: Error initializing runtime service opteed_fast
423 01:15:58.869001 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 01:15:58.869910 bl2_stage_init 0x01
425 01:15:58.870513 bl2_stage_init 0x81
426 01:15:58.874404 hw id: 0x0000 - pwm id 0x01
427 01:15:58.874991 bl2_stage_init 0xc1
428 01:15:58.879422 bl2_stage_init 0x02
429 01:15:58.880184
430 01:15:58.880740 L0:00000000
431 01:15:58.881252 L1:00000703
432 01:15:58.881761 L2:00008067
433 01:15:58.885433 L3:15000000
434 01:15:58.886061 S1:00000000
435 01:15:58.886606 B2:20282000
436 01:15:58.887119 B1:a0f83180
437 01:15:58.887619
438 01:15:58.888155 TE: 69870
439 01:15:58.888659
440 01:15:58.896162 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 01:15:58.896786
442 01:15:58.897305 Board ID = 1
443 01:15:58.897799 Set cpu clk to 24M
444 01:15:58.898296 Set clk81 to 24M
445 01:15:58.901869 Use GP1_pll as DSU clk.
446 01:15:58.902465 DSU clk: 1200 Mhz
447 01:15:58.902978 CPU clk: 1200 MHz
448 01:15:58.908738 Set clk81 to 166.6M
449 01:15:58.912931 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 01:15:58.913533 board id: 1
451 01:15:58.920826 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 01:15:58.931735 fw parse done
453 01:15:58.937651 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 01:15:58.980790 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 01:15:58.991963 PIEI prepare done
456 01:15:58.992588 fastboot data load
457 01:15:58.993039 fastboot data verify
458 01:15:58.997462 verify result: 266
459 01:15:59.002938 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 01:15:59.003445 LPDDR4 probe
461 01:15:59.003847 ddr clk to 1584MHz
462 01:15:59.010952 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 01:15:59.048804
464 01:15:59.049416 dmc_version 0001
465 01:15:59.055859 Check phy result
466 01:15:59.061895 INFO : End of CA training
467 01:15:59.062453 INFO : End of initialization
468 01:15:59.067392 INFO : Training has run successfully!
469 01:15:59.067912 Check phy result
470 01:15:59.072970 INFO : End of initialization
471 01:15:59.073504 INFO : End of read enable training
472 01:15:59.078588 INFO : End of fine write leveling
473 01:15:59.085308 INFO : End of Write leveling coarse delay
474 01:15:59.086067 INFO : Training has run successfully!
475 01:15:59.086644 Check phy result
476 01:15:59.089792 INFO : End of initialization
477 01:15:59.090412 INFO : End of read dq deskew training
478 01:15:59.095515 INFO : End of MPR read delay center optimization
479 01:15:59.101244 INFO : End of write delay center optimization
480 01:15:59.106594 INFO : End of read delay center optimization
481 01:15:59.107659 INFO : End of max read latency training
482 01:15:59.112354 INFO : Training has run successfully!
483 01:15:59.113356 1D training succeed
484 01:15:59.121341 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 01:15:59.169750 Check phy result
486 01:15:59.170431 INFO : End of initialization
487 01:15:59.197311 INFO : End of 2D read delay Voltage center optimization
488 01:15:59.221298 INFO : End of 2D read delay Voltage center optimization
489 01:15:59.277990 INFO : End of 2D write delay Voltage center optimization
490 01:15:59.332169 INFO : End of 2D write delay Voltage center optimization
491 01:15:59.337593 INFO : Training has run successfully!
492 01:15:59.338136
493 01:15:59.338618 channel==0
494 01:15:59.343168 RxClkDly_Margin_A0==88 ps 9
495 01:15:59.343703 TxDqDly_Margin_A0==98 ps 10
496 01:15:59.348804 RxClkDly_Margin_A1==78 ps 8
497 01:15:59.349332 TxDqDly_Margin_A1==88 ps 9
498 01:15:59.349800 TrainedVREFDQ_A0==74
499 01:15:59.354356 TrainedVREFDQ_A1==74
500 01:15:59.354885 VrefDac_Margin_A0==24
501 01:15:59.355356 DeviceVref_Margin_A0==40
502 01:15:59.361618 VrefDac_Margin_A1==23
503 01:15:59.362154 DeviceVref_Margin_A1==40
504 01:15:59.362626
505 01:15:59.363088
506 01:15:59.363547 channel==1
507 01:15:59.365580 RxClkDly_Margin_A0==78 ps 8
508 01:15:59.366101 TxDqDly_Margin_A0==98 ps 10
509 01:15:59.371203 RxClkDly_Margin_A1==78 ps 8
510 01:15:59.371750 TxDqDly_Margin_A1==88 ps 9
511 01:15:59.376872 TrainedVREFDQ_A0==78
512 01:15:59.377412 TrainedVREFDQ_A1==75
513 01:15:59.377883 VrefDac_Margin_A0==23
514 01:15:59.382413 DeviceVref_Margin_A0==36
515 01:15:59.383032 VrefDac_Margin_A1==22
516 01:15:59.388052 DeviceVref_Margin_A1==39
517 01:15:59.388638
518 01:15:59.389116 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 01:15:59.389578
520 01:15:59.421704 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 01:15:59.422331 2D training succeed
522 01:15:59.427303 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 01:15:59.432813 auto size-- 65535DDR cs0 size: 2048MB
524 01:15:59.433352 DDR cs1 size: 2048MB
525 01:15:59.438599 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 01:15:59.439143 cs0 DataBus test pass
527 01:15:59.444020 cs1 DataBus test pass
528 01:15:59.444539 cs0 AddrBus test pass
529 01:15:59.445001 cs1 AddrBus test pass
530 01:15:59.445458
531 01:15:59.449527 100bdlr_step_size ps== 471
532 01:15:59.450049 result report
533 01:15:59.455181 boot times 0Enable ddr reg access
534 01:15:59.460374 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 01:15:59.474297 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 01:16:00.133880 bl2z: ptr: 05129330, size: 00001e40
537 01:16:00.143032 0.0;M3 CHK:0;cm4_sp_mode 0
538 01:16:00.143381 MVN_1=0x00000000
539 01:16:00.143663 MVN_2=0x00000000
540 01:16:00.154430 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 01:16:00.154765 OPS=0x04
542 01:16:00.154992 ring efuse init
543 01:16:00.160085 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 01:16:00.160399 [0.017354 Inits done]
545 01:16:00.160641 secure task start!
546 01:16:00.167649 high task start!
547 01:16:00.167958 low task start!
548 01:16:00.168226 run into bl31
549 01:16:00.176307 NOTICE: BL31: v1.3(release):4fc40b1
550 01:16:00.184158 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 01:16:00.184501 NOTICE: BL31: G12A normal boot!
552 01:16:00.199700 NOTICE: BL31: BL33 decompress pass
553 01:16:00.205345 ERROR: Error initializing runtime service opteed_fast
554 01:16:01.565354 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 01:16:01.566033 bl2_stage_init 0x01
556 01:16:01.566504 bl2_stage_init 0x81
557 01:16:01.570985 hw id: 0x0000 - pwm id 0x01
558 01:16:01.571492 bl2_stage_init 0xc1
559 01:16:01.576120 bl2_stage_init 0x02
560 01:16:01.576628
561 01:16:01.577084 L0:00000000
562 01:16:01.577532 L1:00000703
563 01:16:01.577977 L2:00008067
564 01:16:01.578420 L3:15000000
565 01:16:01.581818 S1:00000000
566 01:16:01.582371 B2:20282000
567 01:16:01.582823 B1:a0f83180
568 01:16:01.583263
569 01:16:01.583706 TE: 67209
570 01:16:01.584207
571 01:16:01.587210 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 01:16:01.587759
573 01:16:01.592742 Board ID = 1
574 01:16:01.593258 Set cpu clk to 24M
575 01:16:01.593704 Set clk81 to 24M
576 01:16:01.598356 Use GP1_pll as DSU clk.
577 01:16:01.598853 DSU clk: 1200 Mhz
578 01:16:01.599299 CPU clk: 1200 MHz
579 01:16:01.603965 Set clk81 to 166.6M
580 01:16:01.609573 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 01:16:01.610070 board id: 1
582 01:16:01.617171 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 01:16:01.628020 fw parse done
584 01:16:01.633961 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 01:16:01.677077 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 01:16:01.688403 PIEI prepare done
587 01:16:01.688986 fastboot data load
588 01:16:01.689451 fastboot data verify
589 01:16:01.693829 verify result: 266
590 01:16:01.699357 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 01:16:01.699879 LPDDR4 probe
592 01:16:01.700384 ddr clk to 1584MHz
593 01:16:01.707500 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 01:16:01.745115
595 01:16:01.745784 dmc_version 0001
596 01:16:01.752162 Check phy result
597 01:16:01.758119 INFO : End of CA training
598 01:16:01.758646 INFO : End of initialization
599 01:16:01.763701 INFO : Training has run successfully!
600 01:16:01.764258 Check phy result
601 01:16:01.769396 INFO : End of initialization
602 01:16:01.769941 INFO : End of read enable training
603 01:16:01.774896 INFO : End of fine write leveling
604 01:16:01.780730 INFO : End of Write leveling coarse delay
605 01:16:01.781636 INFO : Training has run successfully!
606 01:16:01.782504 Check phy result
607 01:16:01.786242 INFO : End of initialization
608 01:16:01.787142 INFO : End of read dq deskew training
609 01:16:01.791868 INFO : End of MPR read delay center optimization
610 01:16:01.797535 INFO : End of write delay center optimization
611 01:16:01.802998 INFO : End of read delay center optimization
612 01:16:01.803565 INFO : End of max read latency training
613 01:16:01.808704 INFO : Training has run successfully!
614 01:16:01.809271 1D training succeed
615 01:16:01.817758 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 01:16:01.866259 Check phy result
617 01:16:01.867007 INFO : End of initialization
618 01:16:01.893515 INFO : End of 2D read delay Voltage center optimization
619 01:16:01.917965 INFO : End of 2D read delay Voltage center optimization
620 01:16:01.974414 INFO : End of 2D write delay Voltage center optimization
621 01:16:02.028657 INFO : End of 2D write delay Voltage center optimization
622 01:16:02.034192 INFO : Training has run successfully!
623 01:16:02.034819
624 01:16:02.035322 channel==0
625 01:16:02.039598 RxClkDly_Margin_A0==78 ps 8
626 01:16:02.040189 TxDqDly_Margin_A0==98 ps 10
627 01:16:02.045059 RxClkDly_Margin_A1==88 ps 9
628 01:16:02.045610 TxDqDly_Margin_A1==98 ps 10
629 01:16:02.046114 TrainedVREFDQ_A0==74
630 01:16:02.050710 TrainedVREFDQ_A1==75
631 01:16:02.051270 VrefDac_Margin_A0==23
632 01:16:02.051770 DeviceVref_Margin_A0==40
633 01:16:02.056479 VrefDac_Margin_A1==23
634 01:16:02.057088 DeviceVref_Margin_A1==39
635 01:16:02.057576
636 01:16:02.058033
637 01:16:02.061898 channel==1
638 01:16:02.062467 RxClkDly_Margin_A0==78 ps 8
639 01:16:02.062997 TxDqDly_Margin_A0==98 ps 10
640 01:16:02.067429 RxClkDly_Margin_A1==88 ps 9
641 01:16:02.067971 TxDqDly_Margin_A1==88 ps 9
642 01:16:02.072945 TrainedVREFDQ_A0==78
643 01:16:02.073501 TrainedVREFDQ_A1==75
644 01:16:02.074015 VrefDac_Margin_A0==23
645 01:16:02.078618 DeviceVref_Margin_A0==36
646 01:16:02.079190 VrefDac_Margin_A1==22
647 01:16:02.084389 DeviceVref_Margin_A1==39
648 01:16:02.084921
649 01:16:02.085390 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 01:16:02.085844
651 01:16:02.117821 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000015 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000060
652 01:16:02.118413 2D training succeed
653 01:16:02.123382 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 01:16:02.128921 auto size-- 65535DDR cs0 size: 2048MB
655 01:16:02.129462 DDR cs1 size: 2048MB
656 01:16:02.134557 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 01:16:02.135089 cs0 DataBus test pass
658 01:16:02.140093 cs1 DataBus test pass
659 01:16:02.141010 cs0 AddrBus test pass
660 01:16:02.141484 cs1 AddrBus test pass
661 01:16:02.141939
662 01:16:02.145749 100bdlr_step_size ps== 471
663 01:16:02.146282 result report
664 01:16:02.151429 boot times 0Enable ddr reg access
665 01:16:02.156607 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 01:16:02.170466 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 01:16:02.830306 bl2z: ptr: 05129330, size: 00001e40
668 01:16:02.837184 0.0;M3 CHK:0;cm4_sp_mode 0
669 01:16:02.837827 MVN_1=0x00000000
670 01:16:02.838107 MVN_2=0x00000000
671 01:16:02.848663 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 01:16:02.849342 OPS=0x04
673 01:16:02.849765 ring efuse init
674 01:16:02.854416 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 01:16:02.854845 [0.017354 Inits done]
676 01:16:02.855216 secure task start!
677 01:16:02.861809 high task start!
678 01:16:02.862307 low task start!
679 01:16:02.862590 run into bl31
680 01:16:02.870313 NOTICE: BL31: v1.3(release):4fc40b1
681 01:16:02.878772 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 01:16:02.879317 NOTICE: BL31: G12A normal boot!
683 01:16:02.893596 NOTICE: BL31: BL33 decompress pass
684 01:16:02.899326 ERROR: Error initializing runtime service opteed_fast
685 01:16:03.694604
686 01:16:03.694996
687 01:16:03.699929 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 01:16:03.700261
689 01:16:03.703584 Model: Libre Computer AML-S905D3-CC Solitude
690 01:16:03.850894 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 01:16:03.865952 DRAM: 2 GiB (effective 3.8 GiB)
692 01:16:03.967117 Core: 406 devices, 33 uclasses, devicetree: separate
693 01:16:03.972798 WDT: Not starting watchdog@f0d0
694 01:16:03.997933 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 01:16:04.012215 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 01:16:04.015036 ** Bad device specification mmc 0 **
697 01:16:04.025333 Card did not respond to voltage select! : -110
698 01:16:04.032723 ** Bad device specification mmc 0 **
699 01:16:04.033111 Couldn't find partition mmc 0
700 01:16:04.041055 Card did not respond to voltage select! : -110
701 01:16:04.046536 ** Bad device specification mmc 0 **
702 01:16:04.046886 Couldn't find partition mmc 0
703 01:16:04.051592 Error: could not access storage.
704 01:16:04.348155 Net: eth0: ethernet@ff3f0000
705 01:16:04.348864 starting USB...
706 01:16:04.592803 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 01:16:04.593247 Starting the controller
708 01:16:04.599641 USB XHCI 1.10
709 01:16:06.154165 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 01:16:06.162482 scanning usb for storage devices... 0 Storage Device(s) found
712 01:16:06.214129 Hit any key to stop autoboot: 1
713 01:16:06.215349 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 01:16:06.216104 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 01:16:06.216673 Setting prompt string to ['=>']
716 01:16:06.217220 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 01:16:06.228532 0
718 01:16:06.229565 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 01:16:06.330991 => setenv autoload no
721 01:16:06.332078 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 01:16:06.337510 setenv autoload no
724 01:16:06.439129 => setenv initrd_high 0xffffffff
725 01:16:06.440153 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 01:16:06.444355 setenv initrd_high 0xffffffff
728 01:16:06.545947 => setenv fdt_high 0xffffffff
729 01:16:06.546739 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 01:16:06.551036 setenv fdt_high 0xffffffff
732 01:16:06.652721 => dhcp
733 01:16:06.653775 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 01:16:06.658196 dhcp
735 01:16:07.263711 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 01:16:07.264323 Speed: 1000, full duplex
737 01:16:07.264731 BOOTP broadcast 1
738 01:16:07.277198 DHCP client bound to address 192.168.6.21 (13 ms)
740 01:16:07.378329 => setenv serverip 192.168.6.2
741 01:16:07.379159 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 01:16:07.383628 setenv serverip 192.168.6.2
744 01:16:07.485244 => tftpboot 0x01080000 950944/tftp-deploy-sxl8_p2z/kernel/uImage
745 01:16:07.486464 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 01:16:07.493193 tftpboot 0x01080000 950944/tftp-deploy-sxl8_p2z/kernel/uImage
747 01:16:07.493681 Speed: 1000, full duplex
748 01:16:07.493975 Using ethernet@ff3f0000 device
749 01:16:07.498647 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 01:16:07.504029 Filename '950944/tftp-deploy-sxl8_p2z/kernel/uImage'.
751 01:16:07.508018 Load address: 0x1080000
752 01:16:10.338991 Loading: *################################################## 43.6 MiB
753 01:16:10.339376 15.4 MiB/s
754 01:16:10.339596 done
755 01:16:10.343489 Bytes transferred = 45713984 (2b98a40 hex)
757 01:16:10.444550 => tftpboot 0x08000000 950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
758 01:16:10.445256 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
759 01:16:10.452033 tftpboot 0x08000000 950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot
760 01:16:10.452875 Speed: 1000, full duplex
761 01:16:10.453475 Using ethernet@ff3f0000 device
762 01:16:10.457631 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
763 01:16:10.467319 Filename '950944/tftp-deploy-sxl8_p2z/ramdisk/ramdisk.cpio.gz.uboot'.
764 01:16:10.468026 Load address: 0x8000000
765 01:16:12.076650 Loading: *################################################# UDP wrong checksum 00000005 0000441c
766 01:16:17.078482 T UDP wrong checksum 00000005 0000441c
767 01:16:25.522638 T UDP wrong checksum 000000ff 0000d650
768 01:16:25.561368 UDP wrong checksum 000000ff 00006743
769 01:16:26.122295 UDP wrong checksum 000000ff 0000c6e4
770 01:16:26.182281 UDP wrong checksum 000000ff 000060d7
771 01:16:27.080340 UDP wrong checksum 00000005 0000441c
772 01:16:30.972334 T UDP wrong checksum 000000ff 000088dd
773 01:16:31.042058 UDP wrong checksum 000000ff 000023d0
774 01:16:36.447770 T UDP wrong checksum 000000ff 0000c1ca
775 01:16:36.461054 UDP wrong checksum 000000ff 00004abd
776 01:16:47.085122 T T T UDP wrong checksum 00000005 0000441c
777 01:17:07.089523 T T T
778 01:17:07.090136 Retry count exceeded; starting again
780 01:17:07.091543 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
783 01:17:07.093415 end: 2.4 uboot-commands (duration 00:01:20) [common]
785 01:17:07.094800 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
787 01:17:07.095830 end: 2 uboot-action (duration 00:01:20) [common]
789 01:17:07.097414 Cleaning after the job
790 01:17:07.097952 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/ramdisk
791 01:17:07.099193 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/kernel
792 01:17:07.143662 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/dtb
793 01:17:07.144564 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950944/tftp-deploy-sxl8_p2z/modules
794 01:17:07.163570 start: 4.1 power-off (timeout 00:00:30) [common]
795 01:17:07.164226 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
796 01:17:07.196261 >> OK - accepted request
797 01:17:07.198279 Returned 0 in 0 seconds
798 01:17:07.299093 end: 4.1 power-off (duration 00:00:00) [common]
800 01:17:07.300818 start: 4.2 read-feedback (timeout 00:10:00) [common]
801 01:17:07.301916 Listened to connection for namespace 'common' for up to 1s
802 01:17:08.302696 Finalising connection for namespace 'common'
803 01:17:08.303406 Disconnecting from shell: Finalise
804 01:17:08.303911 =>
805 01:17:08.404920 end: 4.2 read-feedback (duration 00:00:01) [common]
806 01:17:08.405525 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950944
807 01:17:08.696691 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950944
808 01:17:08.697312 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.