Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:27:23.411396 lava-dispatcher, installed at version: 2024.01
2 01:27:23.412209 start: 0 validate
3 01:27:23.412698 Start time: 2024-11-07 01:27:23.412669+00:00 (UTC)
4 01:27:23.413239 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:27:23.413779 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:27:23.458212 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:27:23.458782 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:27:23.491789 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:27:23.492445 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:27:23.520287 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:27:23.520784 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:27:23.552075 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:27:23.552577 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:27:23.591231 validate duration: 0.18
16 01:27:23.592849 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:27:23.593483 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:27:23.594083 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:27:23.595038 Not decompressing ramdisk as can be used compressed.
20 01:27:23.595803 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:27:23.596353 saving as /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/ramdisk/initrd.cpio.gz
22 01:27:23.596876 total size: 5628182 (5 MB)
23 01:27:23.640749 progress 0 % (0 MB)
24 01:27:23.650801 progress 5 % (0 MB)
25 01:27:23.660995 progress 10 % (0 MB)
26 01:27:23.670289 progress 15 % (0 MB)
27 01:27:23.676318 progress 20 % (1 MB)
28 01:27:23.680834 progress 25 % (1 MB)
29 01:27:23.685956 progress 30 % (1 MB)
30 01:27:23.690996 progress 35 % (1 MB)
31 01:27:23.695405 progress 40 % (2 MB)
32 01:27:23.700400 progress 45 % (2 MB)
33 01:27:23.704959 progress 50 % (2 MB)
34 01:27:23.709984 progress 55 % (2 MB)
35 01:27:23.714996 progress 60 % (3 MB)
36 01:27:23.719624 progress 65 % (3 MB)
37 01:27:23.724632 progress 70 % (3 MB)
38 01:27:23.729172 progress 75 % (4 MB)
39 01:27:23.734339 progress 80 % (4 MB)
40 01:27:23.738812 progress 85 % (4 MB)
41 01:27:23.744007 progress 90 % (4 MB)
42 01:27:23.748891 progress 95 % (5 MB)
43 01:27:23.752861 progress 100 % (5 MB)
44 01:27:23.753683 5 MB downloaded in 0.16 s (34.23 MB/s)
45 01:27:23.754381 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:27:23.755516 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:27:23.755909 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:27:23.756318 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:27:23.756926 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
51 01:27:23.757297 saving as /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/kernel/Image
52 01:27:23.757590 total size: 45713920 (43 MB)
53 01:27:23.757856 No compression specified
54 01:27:23.794664 progress 0 % (0 MB)
55 01:27:23.829772 progress 5 % (2 MB)
56 01:27:23.865002 progress 10 % (4 MB)
57 01:27:23.900091 progress 15 % (6 MB)
58 01:27:23.935285 progress 20 % (8 MB)
59 01:27:23.971377 progress 25 % (10 MB)
60 01:27:24.006763 progress 30 % (13 MB)
61 01:27:24.041769 progress 35 % (15 MB)
62 01:27:24.076874 progress 40 % (17 MB)
63 01:27:24.111618 progress 45 % (19 MB)
64 01:27:24.146358 progress 50 % (21 MB)
65 01:27:24.181694 progress 55 % (24 MB)
66 01:27:24.216762 progress 60 % (26 MB)
67 01:27:24.251776 progress 65 % (28 MB)
68 01:27:24.280966 progress 70 % (30 MB)
69 01:27:24.310188 progress 75 % (32 MB)
70 01:27:24.339657 progress 80 % (34 MB)
71 01:27:24.368657 progress 85 % (37 MB)
72 01:27:24.397930 progress 90 % (39 MB)
73 01:27:24.427385 progress 95 % (41 MB)
74 01:27:24.456207 progress 100 % (43 MB)
75 01:27:24.456736 43 MB downloaded in 0.70 s (62.36 MB/s)
76 01:27:24.457224 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:27:24.458045 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:27:24.458323 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:27:24.458587 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:27:24.459117 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:27:24.459382 saving as /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:27:24.459593 total size: 54703 (0 MB)
84 01:27:24.459801 No compression specified
85 01:27:24.501094 progress 59 % (0 MB)
86 01:27:24.501941 progress 100 % (0 MB)
87 01:27:24.502494 0 MB downloaded in 0.04 s (1.22 MB/s)
88 01:27:24.502968 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:27:24.503789 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:27:24.504090 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:27:24.504366 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:27:24.504821 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:27:24.505067 saving as /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/nfsrootfs/full.rootfs.tar
95 01:27:24.505273 total size: 107552908 (102 MB)
96 01:27:24.505481 Using unxz to decompress xz
97 01:27:24.539098 progress 0 % (0 MB)
98 01:27:25.189009 progress 5 % (5 MB)
99 01:27:25.914169 progress 10 % (10 MB)
100 01:27:26.634159 progress 15 % (15 MB)
101 01:27:27.393649 progress 20 % (20 MB)
102 01:27:27.964644 progress 25 % (25 MB)
103 01:27:28.620037 progress 30 % (30 MB)
104 01:27:29.378216 progress 35 % (35 MB)
105 01:27:29.728138 progress 40 % (41 MB)
106 01:27:30.149615 progress 45 % (46 MB)
107 01:27:30.837456 progress 50 % (51 MB)
108 01:27:31.513575 progress 55 % (56 MB)
109 01:27:32.265050 progress 60 % (61 MB)
110 01:27:33.016167 progress 65 % (66 MB)
111 01:27:33.743719 progress 70 % (71 MB)
112 01:27:34.523317 progress 75 % (76 MB)
113 01:27:35.203534 progress 80 % (82 MB)
114 01:27:35.919281 progress 85 % (87 MB)
115 01:27:36.649091 progress 90 % (92 MB)
116 01:27:37.355531 progress 95 % (97 MB)
117 01:27:38.105681 progress 100 % (102 MB)
118 01:27:38.117652 102 MB downloaded in 13.61 s (7.54 MB/s)
119 01:27:38.118339 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:27:38.119969 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:27:38.120541 start: 1.5 download-retry (timeout 00:09:45) [common]
123 01:27:38.121062 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 01:27:38.121853 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
125 01:27:38.122312 saving as /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/modules/modules.tar
126 01:27:38.122724 total size: 11607584 (11 MB)
127 01:27:38.123142 Using unxz to decompress xz
128 01:27:38.169378 progress 0 % (0 MB)
129 01:27:38.235911 progress 5 % (0 MB)
130 01:27:38.309475 progress 10 % (1 MB)
131 01:27:38.404568 progress 15 % (1 MB)
132 01:27:38.495426 progress 20 % (2 MB)
133 01:27:38.575560 progress 25 % (2 MB)
134 01:27:38.650300 progress 30 % (3 MB)
135 01:27:38.723501 progress 35 % (3 MB)
136 01:27:38.799892 progress 40 % (4 MB)
137 01:27:38.875202 progress 45 % (5 MB)
138 01:27:38.958196 progress 50 % (5 MB)
139 01:27:39.034781 progress 55 % (6 MB)
140 01:27:39.118932 progress 60 % (6 MB)
141 01:27:39.200660 progress 65 % (7 MB)
142 01:27:39.276421 progress 70 % (7 MB)
143 01:27:39.357826 progress 75 % (8 MB)
144 01:27:39.440586 progress 80 % (8 MB)
145 01:27:39.521962 progress 85 % (9 MB)
146 01:27:39.600178 progress 90 % (9 MB)
147 01:27:39.677136 progress 95 % (10 MB)
148 01:27:39.755063 progress 100 % (11 MB)
149 01:27:39.765943 11 MB downloaded in 1.64 s (6.74 MB/s)
150 01:27:39.766952 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:27:39.768792 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:27:39.769367 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 01:27:39.769933 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 01:27:49.475282 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950964/extract-nfsrootfs-ngf8xmt_
156 01:27:49.475882 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:27:49.476216 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 01:27:49.476915 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj
159 01:27:49.477393 makedir: /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin
160 01:27:49.477752 makedir: /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/tests
161 01:27:49.478077 makedir: /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/results
162 01:27:49.478420 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-add-keys
163 01:27:49.478955 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-add-sources
164 01:27:49.479469 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-background-process-start
165 01:27:49.479970 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-background-process-stop
166 01:27:49.480540 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-common-functions
167 01:27:49.481040 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-echo-ipv4
168 01:27:49.481563 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-install-packages
169 01:27:49.482078 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-installed-packages
170 01:27:49.482588 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-os-build
171 01:27:49.483081 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-probe-channel
172 01:27:49.483567 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-probe-ip
173 01:27:49.484075 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-target-ip
174 01:27:49.484580 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-target-mac
175 01:27:49.485072 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-target-storage
176 01:27:49.485591 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-case
177 01:27:49.486107 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-event
178 01:27:49.486620 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-feedback
179 01:27:49.487106 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-raise
180 01:27:49.487587 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-reference
181 01:27:49.488088 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-runner
182 01:27:49.488580 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-set
183 01:27:49.489065 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-test-shell
184 01:27:49.489579 Updating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-install-packages (oe)
185 01:27:49.490134 Updating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/bin/lava-installed-packages (oe)
186 01:27:49.490579 Creating /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/environment
187 01:27:49.490970 LAVA metadata
188 01:27:49.491235 - LAVA_JOB_ID=950964
189 01:27:49.491452 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:27:49.491808 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 01:27:49.492787 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:27:49.493102 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 01:27:49.493312 skipped lava-vland-overlay
194 01:27:49.493556 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:27:49.493810 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 01:27:49.494027 skipped lava-multinode-overlay
197 01:27:49.494272 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:27:49.494522 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 01:27:49.494769 Loading test definitions
200 01:27:49.495045 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 01:27:49.495265 Using /lava-950964 at stage 0
202 01:27:49.496455 uuid=950964_1.6.2.4.1 testdef=None
203 01:27:49.496764 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:27:49.497031 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 01:27:49.498876 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:27:49.499663 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 01:27:49.501950 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:27:49.502775 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 01:27:49.504970 runner path: /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/0/tests/0_dmesg test_uuid 950964_1.6.2.4.1
212 01:27:49.505533 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:27:49.506285 Creating lava-test-runner.conf files
215 01:27:49.506486 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950964/lava-overlay-irjp7sqj/lava-950964/0 for stage 0
216 01:27:49.506830 - 0_dmesg
217 01:27:49.507171 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:27:49.507446 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 01:27:49.529745 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:27:49.530132 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 01:27:49.530395 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:27:49.530662 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:27:49.530925 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 01:27:50.200807 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:27:50.201273 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 01:27:50.201521 extracting modules file /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950964/extract-nfsrootfs-ngf8xmt_
227 01:27:51.558761 extracting modules file /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk
228 01:27:52.975939 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:27:52.976415 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 01:27:52.976689 [common] Applying overlay to NFS
231 01:27:52.976901 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950964/compress-overlay-pgbclc1z/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950964/extract-nfsrootfs-ngf8xmt_
232 01:27:53.006966 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:27:53.007349 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 01:27:53.007617 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 01:27:53.007843 Converting downloaded kernel to a uImage
236 01:27:53.008177 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/kernel/Image /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/kernel/uImage
237 01:27:53.484968 output: Image Name:
238 01:27:53.485372 output: Created: Thu Nov 7 01:27:53 2024
239 01:27:53.485584 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:27:53.485791 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 01:27:53.485993 output: Load Address: 01080000
242 01:27:53.486195 output: Entry Point: 01080000
243 01:27:53.486395 output:
244 01:27:53.486728 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:27:53.486992 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:27:53.487260 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 01:27:53.487510 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:27:53.487764 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 01:27:53.488045 Building ramdisk /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk
250 01:27:56.310072 >> 166792 blocks
251 01:28:04.050738 Adding RAMdisk u-boot header.
252 01:28:04.051447 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk.cpio.gz.uboot
253 01:28:04.310499 output: Image Name:
254 01:28:04.310925 output: Created: Thu Nov 7 01:28:04 2024
255 01:28:04.311138 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:28:04.311344 output: Data Size: 23432341 Bytes = 22883.15 KiB = 22.35 MiB
257 01:28:04.311546 output: Load Address: 00000000
258 01:28:04.311745 output: Entry Point: 00000000
259 01:28:04.311941 output:
260 01:28:04.313243 rename /var/lib/lava/dispatcher/tmp/950964/extract-overlay-ramdisk-jxd6f0t2/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
261 01:28:04.314034 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 01:28:04.314633 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 01:28:04.315208 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 01:28:04.315700 No LXC device requested
265 01:28:04.316292 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:28:04.316851 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 01:28:04.317391 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:28:04.317839 Checking files for TFTP limit of 4294967296 bytes.
269 01:28:04.320788 end: 1 tftp-deploy (duration 00:00:41) [common]
270 01:28:04.321420 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:28:04.321996 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:28:04.322541 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:28:04.323091 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:28:04.323661 Using kernel file from prepare-kernel: 950964/tftp-deploy-hemgy2y0/kernel/uImage
275 01:28:04.324385 substitutions:
276 01:28:04.324832 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:28:04.325279 - {DTB_ADDR}: 0x01070000
278 01:28:04.325717 - {DTB}: 950964/tftp-deploy-hemgy2y0/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:28:04.326152 - {INITRD}: 950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
280 01:28:04.326587 - {KERNEL_ADDR}: 0x01080000
281 01:28:04.327015 - {KERNEL}: 950964/tftp-deploy-hemgy2y0/kernel/uImage
282 01:28:04.327445 - {LAVA_MAC}: None
283 01:28:04.327918 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950964/extract-nfsrootfs-ngf8xmt_
284 01:28:04.328417 - {NFS_SERVER_IP}: 192.168.6.2
285 01:28:04.328852 - {PRESEED_CONFIG}: None
286 01:28:04.329278 - {PRESEED_LOCAL}: None
287 01:28:04.329705 - {RAMDISK_ADDR}: 0x08000000
288 01:28:04.330127 - {RAMDISK}: 950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
289 01:28:04.330554 - {ROOT_PART}: None
290 01:28:04.330983 - {ROOT}: None
291 01:28:04.331408 - {SERVER_IP}: 192.168.6.2
292 01:28:04.331834 - {TEE_ADDR}: 0x83000000
293 01:28:04.332291 - {TEE}: None
294 01:28:04.332721 Parsed boot commands:
295 01:28:04.333138 - setenv autoload no
296 01:28:04.333558 - setenv initrd_high 0xffffffff
297 01:28:04.333976 - setenv fdt_high 0xffffffff
298 01:28:04.334395 - dhcp
299 01:28:04.334814 - setenv serverip 192.168.6.2
300 01:28:04.335235 - tftpboot 0x01080000 950964/tftp-deploy-hemgy2y0/kernel/uImage
301 01:28:04.335659 - tftpboot 0x08000000 950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
302 01:28:04.336112 - tftpboot 0x01070000 950964/tftp-deploy-hemgy2y0/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:28:04.336541 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950964/extract-nfsrootfs-ngf8xmt_,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:28:04.336980 - bootm 0x01080000 0x08000000 0x01070000
305 01:28:04.337530 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:28:04.339155 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:28:04.339611 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:28:04.355829 Setting prompt string to ['lava-test: # ']
310 01:28:04.357428 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:28:04.358086 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:28:04.358672 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:28:04.359234 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:28:04.360599 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:28:04.397749 >> OK - accepted request
316 01:28:04.400103 Returned 0 in 0 seconds
317 01:28:04.501383 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:28:04.503100 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:28:04.503719 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:28:04.504340 Setting prompt string to ['Hit any key to stop autoboot']
322 01:28:04.504857 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:28:04.506561 Trying 192.168.56.21...
324 01:28:04.507094 Connected to conserv1.
325 01:28:04.507562 Escape character is '^]'.
326 01:28:04.508065
327 01:28:04.508546 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:28:04.509015
329 01:28:15.836179 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:28:15.836857 bl2_stage_init 0x01
331 01:28:15.837310 bl2_stage_init 0x81
332 01:28:15.841813 hw id: 0x0000 - pwm id 0x01
333 01:28:15.842316 bl2_stage_init 0xc1
334 01:28:15.842753 bl2_stage_init 0x02
335 01:28:15.843184
336 01:28:15.847382 L0:00000000
337 01:28:15.847865 L1:20000703
338 01:28:15.848379 L2:00008067
339 01:28:15.848813 L3:14000000
340 01:28:15.852845 B2:00402000
341 01:28:15.853327 B1:e0f83180
342 01:28:15.853762
343 01:28:15.854193 TE: 58159
344 01:28:15.854625
345 01:28:15.858455 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:28:15.858947
347 01:28:15.859386 Board ID = 1
348 01:28:15.864092 Set A53 clk to 24M
349 01:28:15.864589 Set A73 clk to 24M
350 01:28:15.865023 Set clk81 to 24M
351 01:28:15.869598 A53 clk: 1200 MHz
352 01:28:15.870088 A73 clk: 1200 MHz
353 01:28:15.870522 CLK81: 166.6M
354 01:28:15.870947 smccc: 00012ab5
355 01:28:15.875352 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:28:15.880828 board id: 1
357 01:28:15.886713 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:28:15.897372 fw parse done
359 01:28:15.903434 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:28:15.945917 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:28:15.956801 PIEI prepare done
362 01:28:15.957304 fastboot data load
363 01:28:15.957741 fastboot data verify
364 01:28:15.962540 verify result: 266
365 01:28:15.968159 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:28:15.968670 LPDDR4 probe
367 01:28:15.969131 ddr clk to 1584MHz
368 01:28:15.976066 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:28:16.013311
370 01:28:16.013821 dmc_version 0001
371 01:28:16.019977 Check phy result
372 01:28:16.025826 INFO : End of CA training
373 01:28:16.026309 INFO : End of initialization
374 01:28:16.031435 INFO : Training has run successfully!
375 01:28:16.031915 Check phy result
376 01:28:16.037055 INFO : End of initialization
377 01:28:16.037533 INFO : End of read enable training
378 01:28:16.040430 INFO : End of fine write leveling
379 01:28:16.045951 INFO : End of Write leveling coarse delay
380 01:28:16.051541 INFO : Training has run successfully!
381 01:28:16.052092 Check phy result
382 01:28:16.052551 INFO : End of initialization
383 01:28:16.057234 INFO : End of read dq deskew training
384 01:28:16.062831 INFO : End of MPR read delay center optimization
385 01:28:16.063341 INFO : End of write delay center optimization
386 01:28:16.068436 INFO : End of read delay center optimization
387 01:28:16.073956 INFO : End of max read latency training
388 01:28:16.074441 INFO : Training has run successfully!
389 01:28:16.079536 1D training succeed
390 01:28:16.085473 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:28:16.133078 Check phy result
392 01:28:16.133607 INFO : End of initialization
393 01:28:16.154759 INFO : End of 2D read delay Voltage center optimization
394 01:28:16.175052 INFO : End of 2D read delay Voltage center optimization
395 01:28:16.227110 INFO : End of 2D write delay Voltage center optimization
396 01:28:16.276543 INFO : End of 2D write delay Voltage center optimization
397 01:28:16.281902 INFO : Training has run successfully!
398 01:28:16.282381
399 01:28:16.282823 channel==0
400 01:28:16.287612 RxClkDly_Margin_A0==88 ps 9
401 01:28:16.288128 TxDqDly_Margin_A0==98 ps 10
402 01:28:16.290887 RxClkDly_Margin_A1==88 ps 9
403 01:28:16.291358 TxDqDly_Margin_A1==98 ps 10
404 01:28:16.296503 TrainedVREFDQ_A0==74
405 01:28:16.296980 TrainedVREFDQ_A1==74
406 01:28:16.302001 VrefDac_Margin_A0==25
407 01:28:16.302468 DeviceVref_Margin_A0==40
408 01:28:16.302906 VrefDac_Margin_A1==25
409 01:28:16.307625 DeviceVref_Margin_A1==40
410 01:28:16.308115
411 01:28:16.308555
412 01:28:16.308991 channel==1
413 01:28:16.309416 RxClkDly_Margin_A0==98 ps 10
414 01:28:16.311083 TxDqDly_Margin_A0==98 ps 10
415 01:28:16.316666 RxClkDly_Margin_A1==98 ps 10
416 01:28:16.317145 TxDqDly_Margin_A1==88 ps 9
417 01:28:16.317587 TrainedVREFDQ_A0==77
418 01:28:16.322158 TrainedVREFDQ_A1==77
419 01:28:16.322629 VrefDac_Margin_A0==22
420 01:28:16.327812 DeviceVref_Margin_A0==37
421 01:28:16.328310 VrefDac_Margin_A1==22
422 01:28:16.328740 DeviceVref_Margin_A1==37
423 01:28:16.329163
424 01:28:16.336838 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:28:16.337314
426 01:28:16.364763 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 01:28:16.365344 2D training succeed
428 01:28:16.376072 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:28:16.376554 auto size-- 65535DDR cs0 size: 2048MB
430 01:28:16.376989 DDR cs1 size: 2048MB
431 01:28:16.381496 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:28:16.381967 cs0 DataBus test pass
433 01:28:16.387073 cs1 DataBus test pass
434 01:28:16.387548 cs0 AddrBus test pass
435 01:28:16.392715 cs1 AddrBus test pass
436 01:28:16.393187
437 01:28:16.393621 100bdlr_step_size ps== 420
438 01:28:16.394061 result report
439 01:28:16.398359 boot times 0Enable ddr reg access
440 01:28:16.404873 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:28:16.418423 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:28:16.992054 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:28:16.992590 MVN_1=0x00000000
444 01:28:16.997567 MVN_2=0x00000000
445 01:28:17.003402 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:28:17.003890 OPS=0x10
447 01:28:17.004386 ring efuse init
448 01:28:17.004832 chipver efuse init
449 01:28:17.008920 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:28:17.014517 [0.018960 Inits done]
451 01:28:17.015005 secure task start!
452 01:28:17.015450 high task start!
453 01:28:17.019099 low task start!
454 01:28:17.019584 run into bl31
455 01:28:17.025747 NOTICE: BL31: v1.3(release):4fc40b1
456 01:28:17.033564 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:28:17.034057 NOTICE: BL31: G12A normal boot!
458 01:28:17.058936 NOTICE: BL31: BL33 decompress pass
459 01:28:17.064616 ERROR: Error initializing runtime service opteed_fast
460 01:28:18.297462
461 01:28:18.297991
462 01:28:18.305893 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:28:18.306394
464 01:28:18.306848 Model: Libre Computer AML-A311D-CC Alta
465 01:28:18.514291 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:28:18.537692 DRAM: 2 GiB (effective 3.8 GiB)
467 01:28:18.680721 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:28:18.686717 WDT: Not starting watchdog@f0d0
469 01:28:18.718815 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:28:18.731277 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:28:18.736291 ** Bad device specification mmc 0 **
472 01:28:18.746639 Card did not respond to voltage select! : -110
473 01:28:18.754266 ** Bad device specification mmc 0 **
474 01:28:18.754754 Couldn't find partition mmc 0
475 01:28:18.762639 Card did not respond to voltage select! : -110
476 01:28:18.768149 ** Bad device specification mmc 0 **
477 01:28:18.768636 Couldn't find partition mmc 0
478 01:28:18.773172 Error: could not access storage.
479 01:28:20.036166 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:28:20.036694 bl2_stage_init 0x01
481 01:28:20.037148 bl2_stage_init 0x81
482 01:28:20.041835 hw id: 0x0000 - pwm id 0x01
483 01:28:20.042324 bl2_stage_init 0xc1
484 01:28:20.042774 bl2_stage_init 0x02
485 01:28:20.043213
486 01:28:20.047347 L0:00000000
487 01:28:20.047832 L1:20000703
488 01:28:20.048352 L2:00008067
489 01:28:20.048801 L3:14000000
490 01:28:20.052954 B2:00402000
491 01:28:20.053442 B1:e0f83180
492 01:28:20.053889
493 01:28:20.054328 TE: 58124
494 01:28:20.054766
495 01:28:20.058583 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:28:20.059080
497 01:28:20.059530 Board ID = 1
498 01:28:20.064145 Set A53 clk to 24M
499 01:28:20.064631 Set A73 clk to 24M
500 01:28:20.065079 Set clk81 to 24M
501 01:28:20.069817 A53 clk: 1200 MHz
502 01:28:20.070306 A73 clk: 1200 MHz
503 01:28:20.070752 CLK81: 166.6M
504 01:28:20.071191 smccc: 00012a92
505 01:28:20.075329 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:28:20.080915 board id: 1
507 01:28:20.086895 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:28:20.097475 fw parse done
509 01:28:20.103444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:28:20.146054 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:28:20.156971 PIEI prepare done
512 01:28:20.157456 fastboot data load
513 01:28:20.157914 fastboot data verify
514 01:28:20.162657 verify result: 266
515 01:28:20.168217 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:28:20.168701 LPDDR4 probe
517 01:28:20.169149 ddr clk to 1584MHz
518 01:28:20.176204 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:28:20.213449
520 01:28:20.213928 dmc_version 0001
521 01:28:20.220160 Check phy result
522 01:28:20.226006 INFO : End of CA training
523 01:28:20.226488 INFO : End of initialization
524 01:28:20.231644 INFO : Training has run successfully!
525 01:28:20.232170 Check phy result
526 01:28:20.237214 INFO : End of initialization
527 01:28:20.237696 INFO : End of read enable training
528 01:28:20.242908 INFO : End of fine write leveling
529 01:28:20.248413 INFO : End of Write leveling coarse delay
530 01:28:20.248888 INFO : Training has run successfully!
531 01:28:20.249339 Check phy result
532 01:28:20.254029 INFO : End of initialization
533 01:28:20.254505 INFO : End of read dq deskew training
534 01:28:20.259654 INFO : End of MPR read delay center optimization
535 01:28:20.265215 INFO : End of write delay center optimization
536 01:28:20.270907 INFO : End of read delay center optimization
537 01:28:20.271387 INFO : End of max read latency training
538 01:28:20.276413 INFO : Training has run successfully!
539 01:28:20.276904 1D training succeed
540 01:28:20.285588 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:28:20.333205 Check phy result
542 01:28:20.333698 INFO : End of initialization
543 01:28:20.355022 INFO : End of 2D read delay Voltage center optimization
544 01:28:20.375141 INFO : End of 2D read delay Voltage center optimization
545 01:28:20.427156 INFO : End of 2D write delay Voltage center optimization
546 01:28:20.476540 INFO : End of 2D write delay Voltage center optimization
547 01:28:20.482133 INFO : Training has run successfully!
548 01:28:20.482607
549 01:28:20.483058 channel==0
550 01:28:20.487742 RxClkDly_Margin_A0==88 ps 9
551 01:28:20.488283 TxDqDly_Margin_A0==98 ps 10
552 01:28:20.493339 RxClkDly_Margin_A1==88 ps 9
553 01:28:20.493818 TxDqDly_Margin_A1==98 ps 10
554 01:28:20.494272 TrainedVREFDQ_A0==74
555 01:28:20.498954 TrainedVREFDQ_A1==75
556 01:28:20.499454 VrefDac_Margin_A0==25
557 01:28:20.499899 DeviceVref_Margin_A0==40
558 01:28:20.504571 VrefDac_Margin_A1==25
559 01:28:20.505062 DeviceVref_Margin_A1==39
560 01:28:20.505509
561 01:28:20.505942
562 01:28:20.510156 channel==1
563 01:28:20.510643 RxClkDly_Margin_A0==98 ps 10
564 01:28:20.511088 TxDqDly_Margin_A0==98 ps 10
565 01:28:20.515745 RxClkDly_Margin_A1==98 ps 10
566 01:28:20.516254 TxDqDly_Margin_A1==88 ps 9
567 01:28:20.521347 TrainedVREFDQ_A0==77
568 01:28:20.521827 TrainedVREFDQ_A1==77
569 01:28:20.522274 VrefDac_Margin_A0==22
570 01:28:20.526926 DeviceVref_Margin_A0==37
571 01:28:20.527419 VrefDac_Margin_A1==24
572 01:28:20.532529 DeviceVref_Margin_A1==37
573 01:28:20.533004
574 01:28:20.533455 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:28:20.538146
576 01:28:20.566120 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 01:28:20.566632 2D training succeed
578 01:28:20.571765 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:28:20.577344 auto size-- 65535DDR cs0 size: 2048MB
580 01:28:20.577829 DDR cs1 size: 2048MB
581 01:28:20.582965 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:28:20.583439 cs0 DataBus test pass
583 01:28:20.588550 cs1 DataBus test pass
584 01:28:20.589031 cs0 AddrBus test pass
585 01:28:20.589476 cs1 AddrBus test pass
586 01:28:20.589913
587 01:28:20.594134 100bdlr_step_size ps== 420
588 01:28:20.594633 result report
589 01:28:20.599753 boot times 0Enable ddr reg access
590 01:28:20.605178 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:28:20.618651 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:28:21.192244 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:28:21.192780 MVN_1=0x00000000
594 01:28:21.197896 MVN_2=0x00000000
595 01:28:21.203599 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:28:21.204186 OPS=0x10
597 01:28:21.204653 ring efuse init
598 01:28:21.205115 chipver efuse init
599 01:28:21.209193 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:28:21.214733 [0.018961 Inits done]
601 01:28:21.215228 secure task start!
602 01:28:21.215657 high task start!
603 01:28:21.219338 low task start!
604 01:28:21.219821 run into bl31
605 01:28:21.225987 NOTICE: BL31: v1.3(release):4fc40b1
606 01:28:21.233870 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:28:21.234368 NOTICE: BL31: G12A normal boot!
608 01:28:21.259805 NOTICE: BL31: BL33 decompress pass
609 01:28:21.265406 ERROR: Error initializing runtime service opteed_fast
610 01:28:22.498490
611 01:28:22.499104
612 01:28:22.506946 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:28:22.507453
614 01:28:22.507907 Model: Libre Computer AML-A311D-CC Alta
615 01:28:22.715307 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:28:22.738721 DRAM: 2 GiB (effective 3.8 GiB)
617 01:28:22.881612 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:28:22.887689 WDT: Not starting watchdog@f0d0
619 01:28:22.919752 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:28:22.932149 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:28:22.937351 ** Bad device specification mmc 0 **
622 01:28:22.947596 Card did not respond to voltage select! : -110
623 01:28:22.955357 ** Bad device specification mmc 0 **
624 01:28:22.955879 Couldn't find partition mmc 0
625 01:28:22.963564 Card did not respond to voltage select! : -110
626 01:28:22.969041 ** Bad device specification mmc 0 **
627 01:28:22.969559 Couldn't find partition mmc 0
628 01:28:22.974229 Error: could not access storage.
629 01:28:23.317609 Net: eth0: ethernet@ff3f0000
630 01:28:23.318261 starting USB...
631 01:28:23.569570 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:28:23.570204 Starting the controller
633 01:28:23.576437 USB XHCI 1.10
634 01:28:25.286589 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 01:28:25.287246 bl2_stage_init 0x01
636 01:28:25.287679 bl2_stage_init 0x81
637 01:28:25.292158 hw id: 0x0000 - pwm id 0x01
638 01:28:25.292679 bl2_stage_init 0xc1
639 01:28:25.293101 bl2_stage_init 0x02
640 01:28:25.293515
641 01:28:25.297700 L0:00000000
642 01:28:25.298204 L1:20000703
643 01:28:25.298622 L2:00008067
644 01:28:25.299033 L3:14000000
645 01:28:25.303295 B2:00402000
646 01:28:25.303824 B1:e0f83180
647 01:28:25.304288
648 01:28:25.304711 TE: 58167
649 01:28:25.305115
650 01:28:25.308835 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 01:28:25.309353
652 01:28:25.309779 Board ID = 1
653 01:28:25.314442 Set A53 clk to 24M
654 01:28:25.314937 Set A73 clk to 24M
655 01:28:25.315350 Set clk81 to 24M
656 01:28:25.320024 A53 clk: 1200 MHz
657 01:28:25.320536 A73 clk: 1200 MHz
658 01:28:25.320949 CLK81: 166.6M
659 01:28:25.321352 smccc: 00012abe
660 01:28:25.325628 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 01:28:25.331253 board id: 1
662 01:28:25.337158 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 01:28:25.347802 fw parse done
664 01:28:25.353774 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 01:28:25.396357 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 01:28:25.407251 PIEI prepare done
667 01:28:25.407759 fastboot data load
668 01:28:25.408218 fastboot data verify
669 01:28:25.412981 verify result: 266
670 01:28:25.418495 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 01:28:25.419009 LPDDR4 probe
672 01:28:25.419428 ddr clk to 1584MHz
673 01:28:25.426510 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 01:28:25.463837
675 01:28:25.464377 dmc_version 0001
676 01:28:25.470400 Check phy result
677 01:28:25.476309 INFO : End of CA training
678 01:28:25.476809 INFO : End of initialization
679 01:28:25.481891 INFO : Training has run successfully!
680 01:28:25.482378 Check phy result
681 01:28:25.487484 INFO : End of initialization
682 01:28:25.487972 INFO : End of read enable training
683 01:28:25.490735 INFO : End of fine write leveling
684 01:28:25.496315 INFO : End of Write leveling coarse delay
685 01:28:25.501885 INFO : Training has run successfully!
686 01:28:25.502370 Check phy result
687 01:28:25.502786 INFO : End of initialization
688 01:28:25.507490 INFO : End of read dq deskew training
689 01:28:25.513124 INFO : End of MPR read delay center optimization
690 01:28:25.513621 INFO : End of write delay center optimization
691 01:28:25.518675 INFO : End of read delay center optimization
692 01:28:25.524276 INFO : End of max read latency training
693 01:28:25.524763 INFO : Training has run successfully!
694 01:28:25.529866 1D training succeed
695 01:28:25.535846 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 01:28:25.583440 Check phy result
697 01:28:25.583956 INFO : End of initialization
698 01:28:25.605169 INFO : End of 2D read delay Voltage center optimization
699 01:28:25.625513 INFO : End of 2D read delay Voltage center optimization
700 01:28:25.677596 INFO : End of 2D write delay Voltage center optimization
701 01:28:25.726938 INFO : End of 2D write delay Voltage center optimization
702 01:28:25.732510 INFO : Training has run successfully!
703 01:28:25.733004
704 01:28:25.733425 channel==0
705 01:28:25.738097 RxClkDly_Margin_A0==88 ps 9
706 01:28:25.738582 TxDqDly_Margin_A0==98 ps 10
707 01:28:25.743760 RxClkDly_Margin_A1==88 ps 9
708 01:28:25.744309 TxDqDly_Margin_A1==88 ps 9
709 01:28:25.744734 TrainedVREFDQ_A0==74
710 01:28:25.749190 TrainedVREFDQ_A1==74
711 01:28:25.749672 VrefDac_Margin_A0==25
712 01:28:25.750085 DeviceVref_Margin_A0==40
713 01:28:25.754897 VrefDac_Margin_A1==25
714 01:28:25.755376 DeviceVref_Margin_A1==40
715 01:28:25.755785
716 01:28:25.756240
717 01:28:25.756657 channel==1
718 01:28:25.760507 RxClkDly_Margin_A0==98 ps 10
719 01:28:25.760986 TxDqDly_Margin_A0==98 ps 10
720 01:28:25.766067 RxClkDly_Margin_A1==98 ps 10
721 01:28:25.766548 TxDqDly_Margin_A1==88 ps 9
722 01:28:25.771739 TrainedVREFDQ_A0==77
723 01:28:25.772262 TrainedVREFDQ_A1==77
724 01:28:25.772680 VrefDac_Margin_A0==22
725 01:28:25.777206 DeviceVref_Margin_A0==37
726 01:28:25.777675 VrefDac_Margin_A1==23
727 01:28:25.782881 DeviceVref_Margin_A1==37
728 01:28:25.783361
729 01:28:25.783771 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 01:28:25.784216
731 01:28:25.816547 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
732 01:28:25.817079 2D training succeed
733 01:28:25.822074 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 01:28:25.827660 auto size-- 65535DDR cs0 size: 2048MB
735 01:28:25.828168 DDR cs1 size: 2048MB
736 01:28:25.833178 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 01:28:25.833642 cs0 DataBus test pass
738 01:28:25.838710 cs1 DataBus test pass
739 01:28:25.839178 cs0 AddrBus test pass
740 01:28:25.839592 cs1 AddrBus test pass
741 01:28:25.840025
742 01:28:25.844322 100bdlr_step_size ps== 420
743 01:28:25.844801 result report
744 01:28:25.849928 boot times 0Enable ddr reg access
745 01:28:25.855268 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 01:28:25.868788 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 01:28:26.442551 0.0;M3 CHK:0;cm4_sp_mode 0
748 01:28:26.443238 MVN_1=0x00000000
749 01:28:26.448113 MVN_2=0x00000000
750 01:28:26.453870 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 01:28:26.454448 OPS=0x10
752 01:28:26.454898 ring efuse init
753 01:28:26.455330 chipver efuse init
754 01:28:26.459392 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 01:28:26.465052 [0.018961 Inits done]
756 01:28:26.465576 secure task start!
757 01:28:26.466010 high task start!
758 01:28:26.469547 low task start!
759 01:28:26.470044 run into bl31
760 01:28:26.476188 NOTICE: BL31: v1.3(release):4fc40b1
761 01:28:26.484028 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 01:28:26.484554 NOTICE: BL31: G12A normal boot!
763 01:28:26.509367 NOTICE: BL31: BL33 decompress pass
764 01:28:26.514993 ERROR: Error initializing runtime service opteed_fast
765 01:28:27.747957
766 01:28:27.748656
767 01:28:27.756378 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 01:28:27.756910
769 01:28:27.757369 Model: Libre Computer AML-A311D-CC Alta
770 01:28:27.964804 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 01:28:27.988203 DRAM: 2 GiB (effective 3.8 GiB)
772 01:28:28.131173 Core: 408 devices, 31 uclasses, devicetree: separate
773 01:28:28.137177 WDT: Not starting watchdog@f0d0
774 01:28:28.169271 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 01:28:28.181737 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 01:28:28.186605 ** Bad device specification mmc 0 **
777 01:28:28.196961 Card did not respond to voltage select! : -110
778 01:28:28.204643 ** Bad device specification mmc 0 **
779 01:28:28.205208 Couldn't find partition mmc 0
780 01:28:28.213103 Card did not respond to voltage select! : -110
781 01:28:28.218565 ** Bad device specification mmc 0 **
782 01:28:28.219111 Couldn't find partition mmc 0
783 01:28:28.223600 Error: could not access storage.
784 01:28:28.567252 Net: eth0: ethernet@ff3f0000
785 01:28:28.567907 starting USB...
786 01:28:28.818988 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 01:28:28.819634 Starting the controller
788 01:28:28.825790 USB XHCI 1.10
789 01:28:30.986503 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 01:28:30.987180 bl2_stage_init 0x01
791 01:28:30.987657 bl2_stage_init 0x81
792 01:28:30.992059 hw id: 0x0000 - pwm id 0x01
793 01:28:30.992574 bl2_stage_init 0xc1
794 01:28:30.993038 bl2_stage_init 0x02
795 01:28:30.993493
796 01:28:30.997742 L0:00000000
797 01:28:30.998244 L1:20000703
798 01:28:30.998698 L2:00008067
799 01:28:30.999140 L3:14000000
800 01:28:31.003302 B2:00402000
801 01:28:31.003794 B1:e0f83180
802 01:28:31.004287
803 01:28:31.004747 TE: 58159
804 01:28:31.005192
805 01:28:31.008911 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 01:28:31.009409
807 01:28:31.009864 Board ID = 1
808 01:28:31.014522 Set A53 clk to 24M
809 01:28:31.015118 Set A73 clk to 24M
810 01:28:31.015594 Set clk81 to 24M
811 01:28:31.020183 A53 clk: 1200 MHz
812 01:28:31.020707 A73 clk: 1200 MHz
813 01:28:31.021168 CLK81: 166.6M
814 01:28:31.021615 smccc: 00012ab5
815 01:28:31.025796 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 01:28:31.031396 board id: 1
817 01:28:31.037085 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 01:28:31.047735 fw parse done
819 01:28:31.053733 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 01:28:31.096451 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 01:28:31.107366 PIEI prepare done
822 01:28:31.107868 fastboot data load
823 01:28:31.108372 fastboot data verify
824 01:28:31.112996 verify result: 266
825 01:28:31.118551 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 01:28:31.119041 LPDDR4 probe
827 01:28:31.119492 ddr clk to 1584MHz
828 01:28:31.126562 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 01:28:31.163798
830 01:28:31.164350 dmc_version 0001
831 01:28:31.170565 Check phy result
832 01:28:31.176312 INFO : End of CA training
833 01:28:31.176823 INFO : End of initialization
834 01:28:31.181975 INFO : Training has run successfully!
835 01:28:31.182538 Check phy result
836 01:28:31.187489 INFO : End of initialization
837 01:28:31.188015 INFO : End of read enable training
838 01:28:31.193112 INFO : End of fine write leveling
839 01:28:31.198751 INFO : End of Write leveling coarse delay
840 01:28:31.199268 INFO : Training has run successfully!
841 01:28:31.199726 Check phy result
842 01:28:31.204303 INFO : End of initialization
843 01:28:31.204789 INFO : End of read dq deskew training
844 01:28:31.209886 INFO : End of MPR read delay center optimization
845 01:28:31.215474 INFO : End of write delay center optimization
846 01:28:31.221101 INFO : End of read delay center optimization
847 01:28:31.221596 INFO : End of max read latency training
848 01:28:31.226741 INFO : Training has run successfully!
849 01:28:31.227227 1D training succeed
850 01:28:31.235879 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 01:28:31.283619 Check phy result
852 01:28:31.284179 INFO : End of initialization
853 01:28:31.305149 INFO : End of 2D read delay Voltage center optimization
854 01:28:31.325402 INFO : End of 2D read delay Voltage center optimization
855 01:28:31.377683 INFO : End of 2D write delay Voltage center optimization
856 01:28:31.426884 INFO : End of 2D write delay Voltage center optimization
857 01:28:31.432435 INFO : Training has run successfully!
858 01:28:31.432939
859 01:28:31.433395 channel==0
860 01:28:31.437964 RxClkDly_Margin_A0==88 ps 9
861 01:28:31.438450 TxDqDly_Margin_A0==98 ps 10
862 01:28:31.441326 RxClkDly_Margin_A1==88 ps 9
863 01:28:31.441808 TxDqDly_Margin_A1==98 ps 10
864 01:28:31.446934 TrainedVREFDQ_A0==74
865 01:28:31.447441 TrainedVREFDQ_A1==74
866 01:28:31.447927 VrefDac_Margin_A0==25
867 01:28:31.452537 DeviceVref_Margin_A0==40
868 01:28:31.453078 VrefDac_Margin_A1==25
869 01:28:31.458147 DeviceVref_Margin_A1==40
870 01:28:31.458684
871 01:28:31.459118
872 01:28:31.459545 channel==1
873 01:28:31.459969 RxClkDly_Margin_A0==98 ps 10
874 01:28:31.463733 TxDqDly_Margin_A0==88 ps 9
875 01:28:31.464245 RxClkDly_Margin_A1==98 ps 10
876 01:28:31.469272 TxDqDly_Margin_A1==88 ps 9
877 01:28:31.469744 TrainedVREFDQ_A0==76
878 01:28:31.470179 TrainedVREFDQ_A1==77
879 01:28:31.474931 VrefDac_Margin_A0==22
880 01:28:31.475400 DeviceVref_Margin_A0==38
881 01:28:31.480524 VrefDac_Margin_A1==24
882 01:28:31.480989 DeviceVref_Margin_A1==37
883 01:28:31.481413
884 01:28:31.486121 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 01:28:31.486585
886 01:28:31.514060 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 01:28:31.519700 2D training succeed
888 01:28:31.525315 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 01:28:31.525859 auto size-- 65535DDR cs0 size: 2048MB
890 01:28:31.530958 DDR cs1 size: 2048MB
891 01:28:31.531438 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 01:28:31.536629 cs0 DataBus test pass
893 01:28:31.537139 cs1 DataBus test pass
894 01:28:31.537572 cs0 AddrBus test pass
895 01:28:31.541994 cs1 AddrBus test pass
896 01:28:31.542469
897 01:28:31.542901 100bdlr_step_size ps== 420
898 01:28:31.543337 result report
899 01:28:31.547572 boot times 0Enable ddr reg access
900 01:28:31.555286 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 01:28:31.568728 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 01:28:32.142429 0.0;M3 CHK:0;cm4_sp_mode 0
903 01:28:32.142907 MVN_1=0x00000000
904 01:28:32.147951 MVN_2=0x00000000
905 01:28:32.153713 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 01:28:32.154281 OPS=0x10
907 01:28:32.154629 ring efuse init
908 01:28:32.154855 chipver efuse init
909 01:28:32.159258 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 01:28:32.165110 [0.018961 Inits done]
911 01:28:32.165496 secure task start!
912 01:28:32.165726 high task start!
913 01:28:32.169636 low task start!
914 01:28:32.170162 run into bl31
915 01:28:32.177131 NOTICE: BL31: v1.3(release):4fc40b1
916 01:28:32.184387 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 01:28:32.185038 NOTICE: BL31: G12A normal boot!
918 01:28:32.209451 NOTICE: BL31: BL33 decompress pass
919 01:28:32.215020 ERROR: Error initializing runtime service opteed_fast
920 01:28:33.447924
921 01:28:33.448391
922 01:28:33.456171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 01:28:33.456595
924 01:28:33.456932 Model: Libre Computer AML-A311D-CC Alta
925 01:28:33.665087 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 01:28:33.688047 DRAM: 2 GiB (effective 3.8 GiB)
927 01:28:33.830994 Core: 408 devices, 31 uclasses, devicetree: separate
928 01:28:33.836802 WDT: Not starting watchdog@f0d0
929 01:28:33.869066 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 01:28:33.881656 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 01:28:33.886534 ** Bad device specification mmc 0 **
932 01:28:33.896849 Card did not respond to voltage select! : -110
933 01:28:33.904481 ** Bad device specification mmc 0 **
934 01:28:33.904968 Couldn't find partition mmc 0
935 01:28:33.912800 Card did not respond to voltage select! : -110
936 01:28:33.918383 ** Bad device specification mmc 0 **
937 01:28:33.918675 Couldn't find partition mmc 0
938 01:28:33.923365 Error: could not access storage.
939 01:28:34.266913 Net: eth0: ethernet@ff3f0000
940 01:28:34.267496 starting USB...
941 01:28:34.518843 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 01:28:34.519287 Starting the controller
943 01:28:34.525688 USB XHCI 1.10
944 01:28:36.080038 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 01:28:36.088282 scanning usb for storage devices... 0 Storage Device(s) found
947 01:28:36.139930 Hit any key to stop autoboot: 1
948 01:28:36.140830 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 01:28:36.141663 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 01:28:36.142205 Setting prompt string to ['=>']
951 01:28:36.142750 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 01:28:36.155626 0
953 01:28:36.156714 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 01:28:36.157289 Sending with 10 millisecond of delay
956 01:28:37.292131 => setenv autoload no
957 01:28:37.303022 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 01:28:37.308848 setenv autoload no
959 01:28:37.309891 Sending with 10 millisecond of delay
961 01:28:39.108106 => setenv initrd_high 0xffffffff
962 01:28:39.118881 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 01:28:39.119676 setenv initrd_high 0xffffffff
964 01:28:39.120414 Sending with 10 millisecond of delay
966 01:28:40.737140 => setenv fdt_high 0xffffffff
967 01:28:40.747683 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 01:28:40.748244 setenv fdt_high 0xffffffff
969 01:28:40.748787 Sending with 10 millisecond of delay
971 01:28:41.040464 => dhcp
972 01:28:41.051090 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 01:28:41.051760 dhcp
974 01:28:41.052151 Speed: 1000, full duplex
975 01:28:41.052478 BOOTP broadcast 1
976 01:28:41.065135 DHCP client bound to address 192.168.6.27 (14 ms)
977 01:28:41.065789 Sending with 10 millisecond of delay
979 01:28:42.748019 => setenv serverip 192.168.6.2
980 01:28:42.758943 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 01:28:42.760222 setenv serverip 192.168.6.2
982 01:28:42.761166 Sending with 10 millisecond of delay
984 01:28:46.487264 => tftpboot 0x01080000 950964/tftp-deploy-hemgy2y0/kernel/uImage
985 01:28:46.498001 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 01:28:46.498794 tftpboot 0x01080000 950964/tftp-deploy-hemgy2y0/kernel/uImage
987 01:28:46.499232 Speed: 1000, full duplex
988 01:28:46.499643 Using ethernet@ff3f0000 device
989 01:28:46.500823 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 01:28:46.506295 Filename '950964/tftp-deploy-hemgy2y0/kernel/uImage'.
991 01:28:46.510184 Load address: 0x1080000
992 01:28:49.284413 Loading: *################################################## 43.6 MiB
993 01:28:49.285017 15.7 MiB/s
994 01:28:49.285445 done
995 01:28:49.288982 Bytes transferred = 45713984 (2b98a40 hex)
996 01:28:49.289785 Sending with 10 millisecond of delay
998 01:28:53.975562 => tftpboot 0x08000000 950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
999 01:28:53.986364 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 01:28:53.987146 tftpboot 0x08000000 950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot
1001 01:28:53.987587 Speed: 1000, full duplex
1002 01:28:53.988028 Using ethernet@ff3f0000 device
1003 01:28:53.989108 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 01:28:53.997718 Filename '950964/tftp-deploy-hemgy2y0/ramdisk/ramdisk.cpio.gz.uboot'.
1005 01:28:53.998165 Load address: 0x8000000
1006 01:28:55.015489 Loading: *####################### UDP wrong checksum 000000ff 0000de50
1007 01:28:55.046956 UDP wrong checksum 000000ff 00006f43
1008 01:29:00.528540 T ########################## UDP wrong checksum 00000005 0000c391
1009 01:29:05.531024 T UDP wrong checksum 00000005 0000c391
1010 01:29:15.533069 T T UDP wrong checksum 00000005 0000c391
1011 01:29:35.537151 T T T T UDP wrong checksum 00000005 0000c391
1012 01:29:50.541072 T T
1013 01:29:50.541746 Retry count exceeded; starting again
1015 01:29:50.543258 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1018 01:29:50.545420 end: 2.4 uboot-commands (duration 00:01:46) [common]
1020 01:29:50.546945 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 01:29:50.548123 end: 2 uboot-action (duration 00:01:46) [common]
1024 01:29:50.549791 Cleaning after the job
1025 01:29:50.550345 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/ramdisk
1026 01:29:50.551710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/kernel
1027 01:29:50.602215 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/dtb
1028 01:29:50.603278 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/nfsrootfs
1029 01:29:50.772634 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950964/tftp-deploy-hemgy2y0/modules
1030 01:29:50.793814 start: 4.1 power-off (timeout 00:00:30) [common]
1031 01:29:50.794479 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 01:29:50.828208 >> OK - accepted request
1033 01:29:50.830431 Returned 0 in 0 seconds
1034 01:29:50.931274 end: 4.1 power-off (duration 00:00:00) [common]
1036 01:29:50.932322 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 01:29:50.933047 Listened to connection for namespace 'common' for up to 1s
1038 01:29:51.933958 Finalising connection for namespace 'common'
1039 01:29:51.934456 Disconnecting from shell: Finalise
1040 01:29:51.934741 =>
1041 01:29:52.035400 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 01:29:52.035899 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950964
1043 01:29:53.917271 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950964
1044 01:29:53.917896 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.