Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:53:51.138138 lava-dispatcher, installed at version: 2024.01
2 04:53:51.138942 start: 0 validate
3 04:53:51.139409 Start time: 2024-11-07 04:53:51.139378+00:00 (UTC)
4 04:53:51.139952 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:53:51.140522 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 04:53:51.183966 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:53:51.184565 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:53:51.215763 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:53:51.216533 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:53:51.248454 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:53:51.248940 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 04:53:51.281805 validate duration: 0.14
14 04:53:51.282661 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 04:53:51.282991 start: 1.1 download-retry (timeout 00:10:00) [common]
16 04:53:51.283298 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 04:53:51.283885 Not decompressing ramdisk as can be used compressed.
18 04:53:51.284360 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 04:53:51.284640 saving as /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/ramdisk/rootfs.cpio.gz
20 04:53:51.284922 total size: 47897469 (45 MB)
21 04:53:51.324739 progress 0 % (0 MB)
22 04:53:51.357089 progress 5 % (2 MB)
23 04:53:51.392356 progress 10 % (4 MB)
24 04:53:51.424958 progress 15 % (6 MB)
25 04:53:51.457832 progress 20 % (9 MB)
26 04:53:51.490819 progress 25 % (11 MB)
27 04:53:51.523947 progress 30 % (13 MB)
28 04:53:51.559342 progress 35 % (16 MB)
29 04:53:51.591272 progress 40 % (18 MB)
30 04:53:51.623292 progress 45 % (20 MB)
31 04:53:51.655370 progress 50 % (22 MB)
32 04:53:51.687605 progress 55 % (25 MB)
33 04:53:51.719962 progress 60 % (27 MB)
34 04:53:51.752512 progress 65 % (29 MB)
35 04:53:51.784595 progress 70 % (32 MB)
36 04:53:51.816558 progress 75 % (34 MB)
37 04:53:51.848435 progress 80 % (36 MB)
38 04:53:51.880246 progress 85 % (38 MB)
39 04:53:51.912548 progress 90 % (41 MB)
40 04:53:51.944511 progress 95 % (43 MB)
41 04:53:51.975746 progress 100 % (45 MB)
42 04:53:51.976536 45 MB downloaded in 0.69 s (66.05 MB/s)
43 04:53:51.977092 end: 1.1.1 http-download (duration 00:00:01) [common]
45 04:53:51.977984 end: 1.1 download-retry (duration 00:00:01) [common]
46 04:53:51.978277 start: 1.2 download-retry (timeout 00:09:59) [common]
47 04:53:51.978550 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 04:53:51.979023 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
49 04:53:51.979287 saving as /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/kernel/Image
50 04:53:51.979498 total size: 45713920 (43 MB)
51 04:53:51.979709 No compression specified
52 04:53:52.021929 progress 0 % (0 MB)
53 04:53:52.051664 progress 5 % (2 MB)
54 04:53:52.081831 progress 10 % (4 MB)
55 04:53:52.112217 progress 15 % (6 MB)
56 04:53:52.142540 progress 20 % (8 MB)
57 04:53:52.172797 progress 25 % (10 MB)
58 04:53:52.203043 progress 30 % (13 MB)
59 04:53:52.233703 progress 35 % (15 MB)
60 04:53:52.264234 progress 40 % (17 MB)
61 04:53:52.294621 progress 45 % (19 MB)
62 04:53:52.325160 progress 50 % (21 MB)
63 04:53:52.355842 progress 55 % (24 MB)
64 04:53:52.386478 progress 60 % (26 MB)
65 04:53:52.416563 progress 65 % (28 MB)
66 04:53:52.447106 progress 70 % (30 MB)
67 04:53:52.477748 progress 75 % (32 MB)
68 04:53:52.508321 progress 80 % (34 MB)
69 04:53:52.538530 progress 85 % (37 MB)
70 04:53:52.569269 progress 90 % (39 MB)
71 04:53:52.599639 progress 95 % (41 MB)
72 04:53:52.629193 progress 100 % (43 MB)
73 04:53:52.629730 43 MB downloaded in 0.65 s (67.05 MB/s)
74 04:53:52.630221 end: 1.2.1 http-download (duration 00:00:01) [common]
76 04:53:52.631074 end: 1.2 download-retry (duration 00:00:01) [common]
77 04:53:52.631354 start: 1.3 download-retry (timeout 00:09:59) [common]
78 04:53:52.631622 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 04:53:52.632126 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 04:53:52.632386 saving as /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 04:53:52.632596 total size: 53209 (0 MB)
82 04:53:52.632807 No compression specified
83 04:53:52.674968 progress 61 % (0 MB)
84 04:53:52.675825 progress 100 % (0 MB)
85 04:53:52.676402 0 MB downloaded in 0.04 s (1.16 MB/s)
86 04:53:52.676880 end: 1.3.1 http-download (duration 00:00:00) [common]
88 04:53:52.677698 end: 1.3 download-retry (duration 00:00:00) [common]
89 04:53:52.677958 start: 1.4 download-retry (timeout 00:09:59) [common]
90 04:53:52.678222 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 04:53:52.678687 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
92 04:53:52.678932 saving as /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/modules/modules.tar
93 04:53:52.679136 total size: 11607584 (11 MB)
94 04:53:52.679348 Using unxz to decompress xz
95 04:53:52.717427 progress 0 % (0 MB)
96 04:53:52.784647 progress 5 % (0 MB)
97 04:53:52.859025 progress 10 % (1 MB)
98 04:53:52.954655 progress 15 % (1 MB)
99 04:53:53.046349 progress 20 % (2 MB)
100 04:53:53.126940 progress 25 % (2 MB)
101 04:53:53.201913 progress 30 % (3 MB)
102 04:53:53.275717 progress 35 % (3 MB)
103 04:53:53.353510 progress 40 % (4 MB)
104 04:53:53.430554 progress 45 % (5 MB)
105 04:53:53.515265 progress 50 % (5 MB)
106 04:53:53.593141 progress 55 % (6 MB)
107 04:53:53.678209 progress 60 % (6 MB)
108 04:53:53.759372 progress 65 % (7 MB)
109 04:53:53.836097 progress 70 % (7 MB)
110 04:53:53.919170 progress 75 % (8 MB)
111 04:53:54.002726 progress 80 % (8 MB)
112 04:53:54.084144 progress 85 % (9 MB)
113 04:53:54.162839 progress 90 % (9 MB)
114 04:53:54.240854 progress 95 % (10 MB)
115 04:53:54.318492 progress 100 % (11 MB)
116 04:53:54.329513 11 MB downloaded in 1.65 s (6.71 MB/s)
117 04:53:54.330102 end: 1.4.1 http-download (duration 00:00:02) [common]
119 04:53:54.330933 end: 1.4 download-retry (duration 00:00:02) [common]
120 04:53:54.331209 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 04:53:54.331478 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 04:53:54.331728 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 04:53:54.332019 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 04:53:54.333013 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__
125 04:53:54.333844 makedir: /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin
126 04:53:54.334516 makedir: /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/tests
127 04:53:54.335134 makedir: /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/results
128 04:53:54.335747 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-add-keys
129 04:53:54.336780 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-add-sources
130 04:53:54.337713 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-background-process-start
131 04:53:54.338642 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-background-process-stop
132 04:53:54.339607 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-common-functions
133 04:53:54.340550 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-echo-ipv4
134 04:53:54.341447 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-install-packages
135 04:53:54.342322 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-installed-packages
136 04:53:54.343190 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-os-build
137 04:53:54.344116 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-probe-channel
138 04:53:54.345068 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-probe-ip
139 04:53:54.345956 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-target-ip
140 04:53:54.346829 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-target-mac
141 04:53:54.347700 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-target-storage
142 04:53:54.348710 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-case
143 04:53:54.349609 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-event
144 04:53:54.350480 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-feedback
145 04:53:54.351387 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-raise
146 04:53:54.352314 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-reference
147 04:53:54.353198 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-runner
148 04:53:54.354089 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-set
149 04:53:54.354989 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-test-shell
150 04:53:54.355889 Updating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-install-packages (oe)
151 04:53:54.356897 Updating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/bin/lava-installed-packages (oe)
152 04:53:54.357716 Creating /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/environment
153 04:53:54.358421 LAVA metadata
154 04:53:54.358908 - LAVA_JOB_ID=950922
155 04:53:54.359338 - LAVA_DISPATCHER_IP=192.168.6.2
156 04:53:54.360033 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 04:53:54.361823 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 04:53:54.362413 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 04:53:54.362829 skipped lava-vland-overlay
160 04:53:54.363318 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 04:53:54.363824 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 04:53:54.364294 skipped lava-multinode-overlay
163 04:53:54.364781 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 04:53:54.365284 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 04:53:54.365757 Loading test definitions
166 04:53:54.366301 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 04:53:54.366746 Using /lava-950922 at stage 0
168 04:53:54.368554 uuid=950922_1.5.2.4.1 testdef=None
169 04:53:54.368887 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 04:53:54.369167 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 04:53:54.370972 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 04:53:54.371800 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 04:53:54.374123 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 04:53:54.375011 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 04:53:54.377157 runner path: /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/0/tests/0_igt-gpu-panfrost test_uuid 950922_1.5.2.4.1
178 04:53:54.377741 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 04:53:54.378562 Creating lava-test-runner.conf files
181 04:53:54.378774 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950922/lava-overlay-bu4gji__/lava-950922/0 for stage 0
182 04:53:54.379129 - 0_igt-gpu-panfrost
183 04:53:54.379511 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 04:53:54.379801 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 04:53:54.403443 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 04:53:54.403869 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 04:53:54.404167 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 04:53:54.404442 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 04:53:54.404708 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 04:54:01.187807 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 04:54:01.188334 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 04:54:01.188609 extracting modules file /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk
193 04:54:02.762318 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 04:54:02.762822 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 04:54:02.763108 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950922/compress-overlay-15ngatr_/overlay-1.5.2.5.tar.gz to ramdisk
196 04:54:02.763327 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950922/compress-overlay-15ngatr_/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk
197 04:54:02.794088 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 04:54:02.794562 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 04:54:02.794843 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 04:54:02.795076 Converting downloaded kernel to a uImage
201 04:54:02.795393 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/kernel/Image /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/kernel/uImage
202 04:54:03.300619 output: Image Name:
203 04:54:03.301023 output: Created: Thu Nov 7 04:54:02 2024
204 04:54:03.301234 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 04:54:03.301440 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 04:54:03.301643 output: Load Address: 01080000
207 04:54:03.301845 output: Entry Point: 01080000
208 04:54:03.302046 output:
209 04:54:03.302377 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 04:54:03.302647 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 04:54:03.302916 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 04:54:03.303173 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 04:54:03.303433 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 04:54:03.303702 Building ramdisk /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk
215 04:54:10.293709 >> 502380 blocks
216 04:54:31.979874 Adding RAMdisk u-boot header.
217 04:54:31.980370 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk.cpio.gz.uboot
218 04:54:32.719146 output: Image Name:
219 04:54:32.719579 output: Created: Thu Nov 7 04:54:31 2024
220 04:54:32.719790 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 04:54:32.720078 output: Data Size: 65715277 Bytes = 64175.08 KiB = 62.67 MiB
222 04:54:32.720490 output: Load Address: 00000000
223 04:54:32.720888 output: Entry Point: 00000000
224 04:54:32.721300 output:
225 04:54:32.722793 rename /var/lib/lava/dispatcher/tmp/950922/extract-overlay-ramdisk-jv6s4ob_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
226 04:54:32.723316 end: 1.5.8 compress-ramdisk (duration 00:00:29) [common]
227 04:54:32.723680 end: 1.5 prepare-tftp-overlay (duration 00:00:38) [common]
228 04:54:32.724034 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 04:54:32.724335 No LXC device requested
230 04:54:32.724638 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 04:54:32.724940 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 04:54:32.725236 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 04:54:32.725480 Checking files for TFTP limit of 4294967296 bytes.
234 04:54:32.726979 end: 1 tftp-deploy (duration 00:00:41) [common]
235 04:54:32.727325 start: 2 uboot-action (timeout 00:05:00) [common]
236 04:54:32.727602 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 04:54:32.727856 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 04:54:32.728151 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 04:54:32.728446 Using kernel file from prepare-kernel: 950922/tftp-deploy-lzh2looz/kernel/uImage
240 04:54:32.728778 substitutions:
241 04:54:32.728993 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 04:54:32.729197 - {DTB_ADDR}: 0x01070000
243 04:54:32.729398 - {DTB}: 950922/tftp-deploy-lzh2looz/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 04:54:32.729599 - {INITRD}: 950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
245 04:54:32.729796 - {KERNEL_ADDR}: 0x01080000
246 04:54:32.729991 - {KERNEL}: 950922/tftp-deploy-lzh2looz/kernel/uImage
247 04:54:32.730189 - {LAVA_MAC}: None
248 04:54:32.730406 - {PRESEED_CONFIG}: None
249 04:54:32.730605 - {PRESEED_LOCAL}: None
250 04:54:32.730800 - {RAMDISK_ADDR}: 0x08000000
251 04:54:32.730993 - {RAMDISK}: 950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
252 04:54:32.731189 - {ROOT_PART}: None
253 04:54:32.731383 - {ROOT}: None
254 04:54:32.731578 - {SERVER_IP}: 192.168.6.2
255 04:54:32.731775 - {TEE_ADDR}: 0x83000000
256 04:54:32.731968 - {TEE}: None
257 04:54:32.732188 Parsed boot commands:
258 04:54:32.732379 - setenv autoload no
259 04:54:32.732573 - setenv initrd_high 0xffffffff
260 04:54:32.732766 - setenv fdt_high 0xffffffff
261 04:54:32.732959 - dhcp
262 04:54:32.733154 - setenv serverip 192.168.6.2
263 04:54:32.733346 - tftpboot 0x01080000 950922/tftp-deploy-lzh2looz/kernel/uImage
264 04:54:32.733540 - tftpboot 0x08000000 950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
265 04:54:32.733734 - tftpboot 0x01070000 950922/tftp-deploy-lzh2looz/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 04:54:32.733927 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 04:54:32.734122 - bootm 0x01080000 0x08000000 0x01070000
268 04:54:32.734383 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 04:54:32.735132 start: 2.3 connect-device (timeout 00:05:00) [common]
271 04:54:32.735360 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 04:54:32.747243 Setting prompt string to ['lava-test: # ']
273 04:54:32.748171 end: 2.3 connect-device (duration 00:00:00) [common]
274 04:54:32.748494 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 04:54:32.748770 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 04:54:32.749031 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 04:54:32.749675 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 04:54:32.784020 >> OK - accepted request
279 04:54:32.786262 Returned 0 in 0 seconds
280 04:54:32.887336 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 04:54:32.888953 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 04:54:32.889508 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 04:54:32.890001 Setting prompt string to ['Hit any key to stop autoboot']
285 04:54:32.890452 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 04:54:32.892058 Trying 192.168.56.21...
287 04:54:32.892538 Connected to conserv1.
288 04:54:32.892960 Escape character is '^]'.
289 04:54:32.893375
290 04:54:32.893806 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 04:54:32.894248
292 04:54:39.937749 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 04:54:39.938387 bl2_stage_init 0x01
294 04:54:39.938816 bl2_stage_init 0x81
295 04:54:39.943292 hw id: 0x0000 - pwm id 0x01
296 04:54:39.943752 bl2_stage_init 0xc1
297 04:54:39.948921 bl2_stage_init 0x02
298 04:54:39.949214
299 04:54:39.949464 L0:00000000
300 04:54:39.949697 L1:00000703
301 04:54:39.949931 L2:00008067
302 04:54:39.950163 L3:15000000
303 04:54:39.954465 S1:00000000
304 04:54:39.954752 B2:20282000
305 04:54:39.954990 B1:a0f83180
306 04:54:39.955219
307 04:54:39.955452 TE: 69511
308 04:54:39.955681
309 04:54:39.960001 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 04:54:39.960281
311 04:54:39.965625 Board ID = 1
312 04:54:39.965906 Set cpu clk to 24M
313 04:54:39.966146 Set clk81 to 24M
314 04:54:39.971184 Use GP1_pll as DSU clk.
315 04:54:39.971466 DSU clk: 1200 Mhz
316 04:54:39.971701 CPU clk: 1200 MHz
317 04:54:39.976713 Set clk81 to 166.6M
318 04:54:39.982411 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 04:54:39.982691 board id: 1
320 04:54:39.989653 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 04:54:40.000456 fw parse done
322 04:54:40.005651 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 04:54:40.048892 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 04:54:40.059815 PIEI prepare done
325 04:54:40.060168 fastboot data load
326 04:54:40.060414 fastboot data verify
327 04:54:40.065453 verify result: 266
328 04:54:40.070970 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 04:54:40.071252 LPDDR4 probe
330 04:54:40.071492 ddr clk to 1584MHz
331 04:54:40.078967 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 04:54:40.115510
333 04:54:40.115928 dmc_version 0001
334 04:54:40.122928 Check phy result
335 04:54:40.128807 INFO : End of CA training
336 04:54:40.129111 INFO : End of initialization
337 04:54:40.134455 INFO : Training has run successfully!
338 04:54:40.134756 Check phy result
339 04:54:40.140005 INFO : End of initialization
340 04:54:40.140314 INFO : End of read enable training
341 04:54:40.143549 INFO : End of fine write leveling
342 04:54:40.149063 INFO : End of Write leveling coarse delay
343 04:54:40.154705 INFO : Training has run successfully!
344 04:54:40.155050 Check phy result
345 04:54:40.155292 INFO : End of initialization
346 04:54:40.160249 INFO : End of read dq deskew training
347 04:54:40.163714 INFO : End of MPR read delay center optimization
348 04:54:40.169246 INFO : End of write delay center optimization
349 04:54:40.174895 INFO : End of read delay center optimization
350 04:54:40.175243 INFO : End of max read latency training
351 04:54:40.180548 INFO : Training has run successfully!
352 04:54:40.180865 1D training succeed
353 04:54:40.188592 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 04:54:40.236040 Check phy result
355 04:54:40.236413 INFO : End of initialization
356 04:54:40.258388 INFO : End of 2D read delay Voltage center optimization
357 04:54:40.277571 INFO : End of 2D read delay Voltage center optimization
358 04:54:40.329493 INFO : End of 2D write delay Voltage center optimization
359 04:54:40.378857 INFO : End of 2D write delay Voltage center optimization
360 04:54:40.384386 INFO : Training has run successfully!
361 04:54:40.384862
362 04:54:40.385274 channel==0
363 04:54:40.389892 RxClkDly_Margin_A0==78 ps 8
364 04:54:40.390337 TxDqDly_Margin_A0==98 ps 10
365 04:54:40.395617 RxClkDly_Margin_A1==78 ps 8
366 04:54:40.396107 TxDqDly_Margin_A1==88 ps 9
367 04:54:40.396516 TrainedVREFDQ_A0==74
368 04:54:40.401252 TrainedVREFDQ_A1==75
369 04:54:40.401683 VrefDac_Margin_A0==23
370 04:54:40.402078 DeviceVref_Margin_A0==40
371 04:54:40.406851 VrefDac_Margin_A1==23
372 04:54:40.407293 DeviceVref_Margin_A1==39
373 04:54:40.407689
374 04:54:40.408134
375 04:54:40.408570 channel==1
376 04:54:40.412412 RxClkDly_Margin_A0==78 ps 8
377 04:54:40.412994 TxDqDly_Margin_A0==98 ps 10
378 04:54:40.417954 RxClkDly_Margin_A1==88 ps 9
379 04:54:40.418556 TxDqDly_Margin_A1==88 ps 9
380 04:54:40.423642 TrainedVREFDQ_A0==78
381 04:54:40.424145 TrainedVREFDQ_A1==75
382 04:54:40.424549 VrefDac_Margin_A0==23
383 04:54:40.429150 DeviceVref_Margin_A0==36
384 04:54:40.429599 VrefDac_Margin_A1==23
385 04:54:40.434772 DeviceVref_Margin_A1==39
386 04:54:40.435225
387 04:54:40.435628 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 04:54:40.436058
389 04:54:40.468347 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
390 04:54:40.468911 2D training succeed
391 04:54:40.473930 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 04:54:40.479535 auto size-- 65535DDR cs0 size: 2048MB
393 04:54:40.479971 DDR cs1 size: 2048MB
394 04:54:40.485030 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 04:54:40.485454 cs0 DataBus test pass
396 04:54:40.490639 cs1 DataBus test pass
397 04:54:40.491064 cs0 AddrBus test pass
398 04:54:40.491457 cs1 AddrBus test pass
399 04:54:40.491844
400 04:54:40.496252 100bdlr_step_size ps== 464
401 04:54:40.496684 result report
402 04:54:40.501882 boot times 0Enable ddr reg access
403 04:54:40.506985 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 04:54:40.520809 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 04:54:41.176118 bl2z: ptr: 05129330, size: 00001e40
406 04:54:41.183972 0.0;M3 CHK:0;cm4_sp_mode 0
407 04:54:41.185481 MVN_1=0x00000000
408 04:54:41.185705 MVN_2=0x00000000
409 04:54:41.195436 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 04:54:41.195910 OPS=0x04
411 04:54:41.196369 ring efuse init
412 04:54:41.201090 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 04:54:41.201547 [0.017319 Inits done]
414 04:54:41.201958 secure task start!
415 04:54:41.208187 high task start!
416 04:54:41.208654 low task start!
417 04:54:41.209063 run into bl31
418 04:54:41.216870 NOTICE: BL31: v1.3(release):4fc40b1
419 04:54:41.223685 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 04:54:41.224211 NOTICE: BL31: G12A normal boot!
421 04:54:41.240148 NOTICE: BL31: BL33 decompress pass
422 04:54:41.245800 ERROR: Error initializing runtime service opteed_fast
423 04:54:43.988936 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 04:54:43.989571 bl2_stage_init 0x01
425 04:54:43.990008 bl2_stage_init 0x81
426 04:54:43.994631 hw id: 0x0000 - pwm id 0x01
427 04:54:43.995112 bl2_stage_init 0xc1
428 04:54:44.000249 bl2_stage_init 0x02
429 04:54:44.000744
430 04:54:44.001145 L0:00000000
431 04:54:44.001541 L1:00000703
432 04:54:44.001930 L2:00008067
433 04:54:44.002313 L3:15000000
434 04:54:44.005544 S1:00000000
435 04:54:44.005970 B2:20282000
436 04:54:44.006364 B1:a0f83180
437 04:54:44.006751
438 04:54:44.007140 TE: 69300
439 04:54:44.007530
440 04:54:44.011146 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 04:54:44.011560
442 04:54:44.016847 Board ID = 1
443 04:54:44.017351 Set cpu clk to 24M
444 04:54:44.017745 Set clk81 to 24M
445 04:54:44.022504 Use GP1_pll as DSU clk.
446 04:54:44.023000 DSU clk: 1200 Mhz
447 04:54:44.023396 CPU clk: 1200 MHz
448 04:54:44.028134 Set clk81 to 166.6M
449 04:54:44.033564 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 04:54:44.033992 board id: 1
451 04:54:44.040718 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 04:54:44.051297 fw parse done
453 04:54:44.057252 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 04:54:44.100022 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 04:54:44.110847 PIEI prepare done
456 04:54:44.111290 fastboot data load
457 04:54:44.111684 fastboot data verify
458 04:54:44.116407 verify result: 266
459 04:54:44.122033 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 04:54:44.122477 LPDDR4 probe
461 04:54:44.122869 ddr clk to 1584MHz
462 04:54:44.130057 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 04:54:44.167232
464 04:54:44.167696 dmc_version 0001
465 04:54:44.173661 Check phy result
466 04:54:44.180148 INFO : End of CA training
467 04:54:44.180582 INFO : End of initialization
468 04:54:44.185454 INFO : Training has run successfully!
469 04:54:44.185889 Check phy result
470 04:54:44.191044 INFO : End of initialization
471 04:54:44.191473 INFO : End of read enable training
472 04:54:44.196657 INFO : End of fine write leveling
473 04:54:44.202259 INFO : End of Write leveling coarse delay
474 04:54:44.202692 INFO : Training has run successfully!
475 04:54:44.203096 Check phy result
476 04:54:44.207863 INFO : End of initialization
477 04:54:44.208329 INFO : End of read dq deskew training
478 04:54:44.213430 INFO : End of MPR read delay center optimization
479 04:54:44.219034 INFO : End of write delay center optimization
480 04:54:44.224656 INFO : End of read delay center optimization
481 04:54:44.225113 INFO : End of max read latency training
482 04:54:44.230249 INFO : Training has run successfully!
483 04:54:44.230681 1D training succeed
484 04:54:44.239442 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 04:54:44.287112 Check phy result
486 04:54:44.287566 INFO : End of initialization
487 04:54:44.309374 INFO : End of 2D read delay Voltage center optimization
488 04:54:44.328563 INFO : End of 2D read delay Voltage center optimization
489 04:54:44.380415 INFO : End of 2D write delay Voltage center optimization
490 04:54:44.429806 INFO : End of 2D write delay Voltage center optimization
491 04:54:44.435192 INFO : Training has run successfully!
492 04:54:44.435644
493 04:54:44.436106 channel==0
494 04:54:44.440798 RxClkDly_Margin_A0==88 ps 9
495 04:54:44.441234 TxDqDly_Margin_A0==98 ps 10
496 04:54:44.446426 RxClkDly_Margin_A1==88 ps 9
497 04:54:44.446856 TxDqDly_Margin_A1==98 ps 10
498 04:54:44.447267 TrainedVREFDQ_A0==74
499 04:54:44.452059 TrainedVREFDQ_A1==75
500 04:54:44.452495 VrefDac_Margin_A0==23
501 04:54:44.452902 DeviceVref_Margin_A0==40
502 04:54:44.457601 VrefDac_Margin_A1==23
503 04:54:44.458045 DeviceVref_Margin_A1==39
504 04:54:44.458456
505 04:54:44.458863
506 04:54:44.463177 channel==1
507 04:54:44.463610 RxClkDly_Margin_A0==78 ps 8
508 04:54:44.464044 TxDqDly_Margin_A0==98 ps 10
509 04:54:44.468813 RxClkDly_Margin_A1==88 ps 9
510 04:54:44.469247 TxDqDly_Margin_A1==88 ps 9
511 04:54:44.474415 TrainedVREFDQ_A0==75
512 04:54:44.474848 TrainedVREFDQ_A1==77
513 04:54:44.475255 VrefDac_Margin_A0==23
514 04:54:44.480055 DeviceVref_Margin_A0==39
515 04:54:44.480482 VrefDac_Margin_A1==21
516 04:54:44.485600 DeviceVref_Margin_A1==37
517 04:54:44.486027
518 04:54:44.486432 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 04:54:44.486838
520 04:54:44.519202 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
521 04:54:44.519702 2D training succeed
522 04:54:44.524788 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 04:54:44.530404 auto size-- 65535DDR cs0 size: 2048MB
524 04:54:44.530854 DDR cs1 size: 2048MB
525 04:54:44.536094 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 04:54:44.536544 cs0 DataBus test pass
527 04:54:44.541642 cs1 DataBus test pass
528 04:54:44.542117 cs0 AddrBus test pass
529 04:54:44.542528 cs1 AddrBus test pass
530 04:54:44.542929
531 04:54:44.547258 100bdlr_step_size ps== 478
532 04:54:44.547713 result report
533 04:54:44.552843 boot times 0Enable ddr reg access
534 04:54:44.558673 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 04:54:44.571905 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 04:54:45.228130 bl2z: ptr: 05129330, size: 00001e40
537 04:54:45.234658 0.0;M3 CHK:0;cm4_sp_mode 0
538 04:54:45.235123 MVN_1=0x00000000
539 04:54:45.235532 MVN_2=0x00000000
540 04:54:45.246204 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 04:54:45.246661 OPS=0x04
542 04:54:45.247074 ring efuse init
543 04:54:45.251823 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 04:54:45.252305 [0.017319 Inits done]
545 04:54:45.252718 secure task start!
546 04:54:45.258647 high task start!
547 04:54:45.259084 low task start!
548 04:54:45.259487 run into bl31
549 04:54:45.268148 NOTICE: BL31: v1.3(release):4fc40b1
550 04:54:45.275957 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 04:54:45.276430 NOTICE: BL31: G12A normal boot!
552 04:54:45.291454 NOTICE: BL31: BL33 decompress pass
553 04:54:45.297204 ERROR: Error initializing runtime service opteed_fast
554 04:54:46.687612 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 04:54:46.688221 bl2_stage_init 0x01
556 04:54:46.688468 bl2_stage_init 0x81
557 04:54:46.693126 hw id: 0x0000 - pwm id 0x01
558 04:54:46.693613 bl2_stage_init 0xc1
559 04:54:46.698739 bl2_stage_init 0x02
560 04:54:46.699242
561 04:54:46.699705 L0:00000000
562 04:54:46.700165 L1:00000703
563 04:54:46.700385 L2:00008067
564 04:54:46.700606 L3:15000000
565 04:54:46.704250 S1:00000000
566 04:54:46.704727 B2:20282000
567 04:54:46.705165 B1:a0f83180
568 04:54:46.705610
569 04:54:46.706054 TE: 69249
570 04:54:46.706496
571 04:54:46.709866 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 04:54:46.710361
573 04:54:46.715453 Board ID = 1
574 04:54:46.715965 Set cpu clk to 24M
575 04:54:46.716448 Set clk81 to 24M
576 04:54:46.721048 Use GP1_pll as DSU clk.
577 04:54:46.721458 DSU clk: 1200 Mhz
578 04:54:46.721695 CPU clk: 1200 MHz
579 04:54:46.726574 Set clk81 to 166.6M
580 04:54:46.732245 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 04:54:46.732748 board id: 1
582 04:54:46.739416 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 04:54:46.750053 fw parse done
584 04:54:46.756056 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 04:54:46.798731 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 04:54:46.809704 PIEI prepare done
587 04:54:46.809999 fastboot data load
588 04:54:46.810241 fastboot data verify
589 04:54:46.815376 verify result: 266
590 04:54:46.820915 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 04:54:46.821423 LPDDR4 probe
592 04:54:46.821888 ddr clk to 1584MHz
593 04:54:46.828861 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 04:54:46.866143
595 04:54:46.866681 dmc_version 0001
596 04:54:46.872842 Check phy result
597 04:54:46.878731 INFO : End of CA training
598 04:54:46.879202 INFO : End of initialization
599 04:54:46.884448 INFO : Training has run successfully!
600 04:54:46.884919 Check phy result
601 04:54:46.889977 INFO : End of initialization
602 04:54:46.890446 INFO : End of read enable training
603 04:54:46.895524 INFO : End of fine write leveling
604 04:54:46.901171 INFO : End of Write leveling coarse delay
605 04:54:46.901639 INFO : Training has run successfully!
606 04:54:46.902055 Check phy result
607 04:54:46.906725 INFO : End of initialization
608 04:54:46.907188 INFO : End of read dq deskew training
609 04:54:46.912422 INFO : End of MPR read delay center optimization
610 04:54:46.917896 INFO : End of write delay center optimization
611 04:54:46.923523 INFO : End of read delay center optimization
612 04:54:46.924011 INFO : End of max read latency training
613 04:54:46.929174 INFO : Training has run successfully!
614 04:54:46.929635 1D training succeed
615 04:54:46.938281 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 04:54:46.985895 Check phy result
617 04:54:46.986390 INFO : End of initialization
618 04:54:47.008231 INFO : End of 2D read delay Voltage center optimization
619 04:54:47.027479 INFO : End of 2D read delay Voltage center optimization
620 04:54:47.079247 INFO : End of 2D write delay Voltage center optimization
621 04:54:47.128437 INFO : End of 2D write delay Voltage center optimization
622 04:54:47.133932 INFO : Training has run successfully!
623 04:54:47.134230
624 04:54:47.134456 channel==0
625 04:54:47.139687 RxClkDly_Margin_A0==69 ps 7
626 04:54:47.140014 TxDqDly_Margin_A0==98 ps 10
627 04:54:47.145138 RxClkDly_Margin_A1==78 ps 8
628 04:54:47.145427 TxDqDly_Margin_A1==98 ps 10
629 04:54:47.145650 TrainedVREFDQ_A0==74
630 04:54:47.151096 TrainedVREFDQ_A1==75
631 04:54:47.152165 VrefDac_Margin_A0==25
632 04:54:47.152839 DeviceVref_Margin_A0==40
633 04:54:47.156380 VrefDac_Margin_A1==23
634 04:54:47.156724 DeviceVref_Margin_A1==39
635 04:54:47.158157
636 04:54:47.158623
637 04:54:47.161937 channel==1
638 04:54:47.162323 RxClkDly_Margin_A0==78 ps 8
639 04:54:47.162652 TxDqDly_Margin_A0==98 ps 10
640 04:54:47.168016 RxClkDly_Margin_A1==88 ps 9
641 04:54:47.169192 TxDqDly_Margin_A1==88 ps 9
642 04:54:47.173159 TrainedVREFDQ_A0==78
643 04:54:47.173551 TrainedVREFDQ_A1==75
644 04:54:47.173902 VrefDac_Margin_A0==22
645 04:54:47.178757 DeviceVref_Margin_A0==36
646 04:54:47.179141 VrefDac_Margin_A1==20
647 04:54:47.184388 DeviceVref_Margin_A1==39
648 04:54:47.184973
649 04:54:47.185323 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 04:54:47.186270
651 04:54:47.218091 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
652 04:54:47.218723 2D training succeed
653 04:54:47.223673 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 04:54:47.229327 auto size-- 65535DDR cs0 size: 2048MB
655 04:54:47.229880 DDR cs1 size: 2048MB
656 04:54:47.234900 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 04:54:47.235447 cs0 DataBus test pass
658 04:54:47.240516 cs1 DataBus test pass
659 04:54:47.241061 cs0 AddrBus test pass
660 04:54:47.241512 cs1 AddrBus test pass
661 04:54:47.241949
662 04:54:47.246108 100bdlr_step_size ps== 464
663 04:54:47.246677 result report
664 04:54:47.251698 boot times 0Enable ddr reg access
665 04:54:47.256972 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 04:54:47.270760 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 04:54:47.925740 bl2z: ptr: 05129330, size: 00001e40
668 04:54:47.931906 0.0;M3 CHK:0;cm4_sp_mode 0
669 04:54:47.932525 MVN_1=0x00000000
670 04:54:47.933001 MVN_2=0x00000000
671 04:54:47.943350 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 04:54:47.943914 OPS=0x04
673 04:54:47.944427 ring efuse init
674 04:54:47.946401 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 04:54:47.952658 [0.017319 Inits done]
676 04:54:47.953191 secure task start!
677 04:54:47.953657 high task start!
678 04:54:47.954110 low task start!
679 04:54:47.956940 run into bl31
680 04:54:47.965582 NOTICE: BL31: v1.3(release):4fc40b1
681 04:54:47.973473 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 04:54:47.974063 NOTICE: BL31: G12A normal boot!
683 04:54:47.988838 NOTICE: BL31: BL33 decompress pass
684 04:54:47.994508 ERROR: Error initializing runtime service opteed_fast
685 04:54:48.790186
686 04:54:48.790840
687 04:54:48.795560 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 04:54:48.796151
689 04:54:48.797967 Model: Libre Computer AML-S905D3-CC Solitude
690 04:54:48.945949 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 04:54:48.961392 DRAM: 2 GiB (effective 3.8 GiB)
692 04:54:49.062590 Core: 406 devices, 33 uclasses, devicetree: separate
693 04:54:49.067632 WDT: Not starting watchdog@f0d0
694 04:54:49.093432 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 04:54:49.105801 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 04:54:49.109844 ** Bad device specification mmc 0 **
697 04:54:49.120939 Card did not respond to voltage select! : -110
698 04:54:49.127407 ** Bad device specification mmc 0 **
699 04:54:49.127913 Couldn't find partition mmc 0
700 04:54:49.137085 Card did not respond to voltage select! : -110
701 04:54:49.142021 ** Bad device specification mmc 0 **
702 04:54:49.142529 Couldn't find partition mmc 0
703 04:54:49.146171 Error: could not access storage.
704 04:54:49.443581 Net: eth0: ethernet@ff3f0000
705 04:54:49.444314 starting USB...
706 04:54:49.688190 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 04:54:49.688822 Starting the controller
708 04:54:49.695195 USB XHCI 1.10
709 04:54:51.248417 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 04:54:51.256750 scanning usb for storage devices... 0 Storage Device(s) found
712 04:54:51.310659 Hit any key to stop autoboot: 1
713 04:54:51.311728 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 04:54:51.312692 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 04:54:51.313234 Setting prompt string to ['=>']
716 04:54:51.313770 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 04:54:51.322813 0
718 04:54:51.323816 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 04:54:51.425185 => setenv autoload no
721 04:54:51.426007 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 04:54:51.430109 setenv autoload no
724 04:54:51.531218 => setenv initrd_high 0xffffffff
725 04:54:51.531784 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 04:54:51.536173 setenv initrd_high 0xffffffff
728 04:54:51.637811 => setenv fdt_high 0xffffffff
729 04:54:51.638579 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 04:54:51.642800 setenv fdt_high 0xffffffff
732 04:54:51.744365 => dhcp
733 04:54:51.745419 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 04:54:51.748466 dhcp
735 04:54:52.254720 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 04:54:52.255403 Speed: 1000, full duplex
737 04:54:52.255860 BOOTP broadcast 1
738 04:54:52.502979 BOOTP broadcast 2
739 04:54:52.516318 DHCP client bound to address 192.168.6.21 (261 ms)
741 04:54:52.617887 => setenv serverip 192.168.6.2
742 04:54:52.618641 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
743 04:54:52.622950 setenv serverip 192.168.6.2
745 04:54:52.724537 => tftpboot 0x01080000 950922/tftp-deploy-lzh2looz/kernel/uImage
746 04:54:52.725282 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
747 04:54:52.731915 tftpboot 0x01080000 950922/tftp-deploy-lzh2looz/kernel/uImage
748 04:54:52.732477 Speed: 1000, full duplex
749 04:54:52.732926 Using ethernet@ff3f0000 device
750 04:54:52.737309 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
751 04:54:52.742882 Filename '950922/tftp-deploy-lzh2looz/kernel/uImage'.
752 04:54:52.746717 Load address: 0x1080000
753 04:54:53.532291 Loading: *############# UDP wrong checksum 00000005 00008d04
754 04:54:56.469120 ##################################### 43.6 MiB
755 04:54:56.469791 11.7 MiB/s
756 04:54:56.470250 done
757 04:54:56.473421 Bytes transferred = 45713984 (2b98a40 hex)
759 04:54:56.575111 => tftpboot 0x08000000 950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
760 04:54:56.575963 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
761 04:54:56.582896 tftpboot 0x08000000 950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot
762 04:54:56.583419 Speed: 1000, full duplex
763 04:54:56.583863 Using ethernet@ff3f0000 device
764 04:54:56.588488 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
765 04:54:56.598317 Filename '950922/tftp-deploy-lzh2looz/ramdisk/ramdisk.cpio.gz.uboot'.
766 04:54:56.598852 Load address: 0x8000000
767 04:55:03.594913 Loading: *#################T ###### UDP wrong checksum 000000ff 00007452
768 04:55:03.600559 UDP wrong checksum 000000ff 00000145
769 04:55:05.883752 ########################## UDP wrong checksum 0000000f 0000b178
770 04:55:10.884944 T UDP wrong checksum 0000000f 0000b178
771 04:55:20.887168 T T UDP wrong checksum 0000000f 0000b178
772 04:55:40.891260 T T T T UDP wrong checksum 0000000f 0000b178
773 04:55:55.895086 T T
774 04:55:55.896876 Retry count exceeded; starting again
776 04:55:55.898512 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
779 04:55:55.900698 end: 2.4 uboot-commands (duration 00:01:23) [common]
781 04:55:55.902275 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
783 04:55:55.903514 end: 2 uboot-action (duration 00:01:23) [common]
785 04:55:55.905260 Cleaning after the job
786 04:55:55.905892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/ramdisk
787 04:55:55.907144 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/kernel
788 04:55:55.956170 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/dtb
789 04:55:55.957034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950922/tftp-deploy-lzh2looz/modules
790 04:55:55.979342 start: 4.1 power-off (timeout 00:00:30) [common]
791 04:55:55.980099 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
792 04:55:56.014376 >> OK - accepted request
793 04:55:56.016678 Returned 0 in 0 seconds
794 04:55:56.117899 end: 4.1 power-off (duration 00:00:00) [common]
796 04:55:56.119048 start: 4.2 read-feedback (timeout 00:10:00) [common]
797 04:55:56.119776 Listened to connection for namespace 'common' for up to 1s
798 04:55:57.120746 Finalising connection for namespace 'common'
799 04:55:57.121500 Disconnecting from shell: Finalise
800 04:55:57.122015 =>
801 04:55:57.223069 end: 4.2 read-feedback (duration 00:00:01) [common]
802 04:55:57.223813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950922
803 04:55:57.893808 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950922
804 04:55:57.894446 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.