Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:49:10.979261 lava-dispatcher, installed at version: 2024.01
2 04:49:10.980054 start: 0 validate
3 04:49:10.980556 Start time: 2024-11-07 04:49:10.980524+00:00 (UTC)
4 04:49:10.981100 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:49:10.981640 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:49:11.025693 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:49:11.026268 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:49:11.062658 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:49:11.063280 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:49:11.097049 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:49:11.097557 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:49:11.130265 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:49:11.130998 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:49:11.170569 validate duration: 0.19
16 04:49:11.171446 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:49:11.171785 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:49:11.172141 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:49:11.172732 Not decompressing ramdisk as can be used compressed.
20 04:49:11.173182 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:49:11.173474 saving as /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/ramdisk/initrd.cpio.gz
22 04:49:11.173750 total size: 5628140 (5 MB)
23 04:49:11.214794 progress 0 % (0 MB)
24 04:49:11.222072 progress 5 % (0 MB)
25 04:49:11.229140 progress 10 % (0 MB)
26 04:49:11.232906 progress 15 % (0 MB)
27 04:49:11.237132 progress 20 % (1 MB)
28 04:49:11.240821 progress 25 % (1 MB)
29 04:49:11.244928 progress 30 % (1 MB)
30 04:49:11.249075 progress 35 % (1 MB)
31 04:49:11.252777 progress 40 % (2 MB)
32 04:49:11.256825 progress 45 % (2 MB)
33 04:49:11.260472 progress 50 % (2 MB)
34 04:49:11.264519 progress 55 % (2 MB)
35 04:49:11.268555 progress 60 % (3 MB)
36 04:49:11.272165 progress 65 % (3 MB)
37 04:49:11.276125 progress 70 % (3 MB)
38 04:49:11.279765 progress 75 % (4 MB)
39 04:49:11.283820 progress 80 % (4 MB)
40 04:49:11.287445 progress 85 % (4 MB)
41 04:49:11.291654 progress 90 % (4 MB)
42 04:49:11.295718 progress 95 % (5 MB)
43 04:49:11.299047 progress 100 % (5 MB)
44 04:49:11.299703 5 MB downloaded in 0.13 s (42.62 MB/s)
45 04:49:11.300274 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:49:11.301169 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:49:11.301473 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:49:11.301744 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:49:11.302218 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
51 04:49:11.302484 saving as /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/kernel/Image
52 04:49:11.302694 total size: 45713920 (43 MB)
53 04:49:11.302903 No compression specified
54 04:49:11.341360 progress 0 % (0 MB)
55 04:49:11.369356 progress 5 % (2 MB)
56 04:49:11.397713 progress 10 % (4 MB)
57 04:49:11.425518 progress 15 % (6 MB)
58 04:49:11.453235 progress 20 % (8 MB)
59 04:49:11.480809 progress 25 % (10 MB)
60 04:49:11.508495 progress 30 % (13 MB)
61 04:49:11.536603 progress 35 % (15 MB)
62 04:49:11.564618 progress 40 % (17 MB)
63 04:49:11.591959 progress 45 % (19 MB)
64 04:49:11.619997 progress 50 % (21 MB)
65 04:49:11.648081 progress 55 % (24 MB)
66 04:49:11.675942 progress 60 % (26 MB)
67 04:49:11.703412 progress 65 % (28 MB)
68 04:49:11.731303 progress 70 % (30 MB)
69 04:49:11.759435 progress 75 % (32 MB)
70 04:49:11.787228 progress 80 % (34 MB)
71 04:49:11.814577 progress 85 % (37 MB)
72 04:49:11.842694 progress 90 % (39 MB)
73 04:49:11.870348 progress 95 % (41 MB)
74 04:49:11.897755 progress 100 % (43 MB)
75 04:49:11.898283 43 MB downloaded in 0.60 s (73.20 MB/s)
76 04:49:11.898760 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:49:11.899578 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:49:11.899853 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:49:11.900151 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:49:11.900619 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:49:11.900887 saving as /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:49:11.901095 total size: 54703 (0 MB)
84 04:49:11.901302 No compression specified
85 04:49:11.940161 progress 59 % (0 MB)
86 04:49:11.941008 progress 100 % (0 MB)
87 04:49:11.941551 0 MB downloaded in 0.04 s (1.29 MB/s)
88 04:49:11.942015 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:49:11.942830 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:49:11.943094 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:49:11.943357 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:49:11.943805 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:49:11.944083 saving as /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/nfsrootfs/full.rootfs.tar
95 04:49:11.944291 total size: 474398908 (452 MB)
96 04:49:11.944501 Using unxz to decompress xz
97 04:49:11.984860 progress 0 % (0 MB)
98 04:49:13.083064 progress 5 % (22 MB)
99 04:49:14.526856 progress 10 % (45 MB)
100 04:49:14.981227 progress 15 % (67 MB)
101 04:49:15.826405 progress 20 % (90 MB)
102 04:49:16.363466 progress 25 % (113 MB)
103 04:49:16.727108 progress 30 % (135 MB)
104 04:49:17.335886 progress 35 % (158 MB)
105 04:49:18.290196 progress 40 % (181 MB)
106 04:49:19.172344 progress 45 % (203 MB)
107 04:49:19.896051 progress 50 % (226 MB)
108 04:49:20.548286 progress 55 % (248 MB)
109 04:49:21.775615 progress 60 % (271 MB)
110 04:49:23.246690 progress 65 % (294 MB)
111 04:49:24.897624 progress 70 % (316 MB)
112 04:49:27.985809 progress 75 % (339 MB)
113 04:49:30.437080 progress 80 % (361 MB)
114 04:49:33.346448 progress 85 % (384 MB)
115 04:49:36.505636 progress 90 % (407 MB)
116 04:49:39.692244 progress 95 % (429 MB)
117 04:49:42.915463 progress 100 % (452 MB)
118 04:49:42.928395 452 MB downloaded in 30.98 s (14.60 MB/s)
119 04:49:42.929360 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:49:42.931160 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:49:42.931752 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:49:42.932387 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:49:42.933412 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
125 04:49:42.933960 saving as /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/modules/modules.tar
126 04:49:42.934426 total size: 11607584 (11 MB)
127 04:49:42.934905 Using unxz to decompress xz
128 04:49:42.984056 progress 0 % (0 MB)
129 04:49:43.050104 progress 5 % (0 MB)
130 04:49:43.123638 progress 10 % (1 MB)
131 04:49:43.219434 progress 15 % (1 MB)
132 04:49:43.311210 progress 20 % (2 MB)
133 04:49:43.392531 progress 25 % (2 MB)
134 04:49:43.468313 progress 30 % (3 MB)
135 04:49:43.542141 progress 35 % (3 MB)
136 04:49:43.619026 progress 40 % (4 MB)
137 04:49:43.694678 progress 45 % (5 MB)
138 04:49:43.778183 progress 50 % (5 MB)
139 04:49:43.854586 progress 55 % (6 MB)
140 04:49:43.938909 progress 60 % (6 MB)
141 04:49:44.019562 progress 65 % (7 MB)
142 04:49:44.096233 progress 70 % (7 MB)
143 04:49:44.178672 progress 75 % (8 MB)
144 04:49:44.262426 progress 80 % (8 MB)
145 04:49:44.342283 progress 85 % (9 MB)
146 04:49:44.420914 progress 90 % (9 MB)
147 04:49:44.498884 progress 95 % (10 MB)
148 04:49:44.577061 progress 100 % (11 MB)
149 04:49:44.588138 11 MB downloaded in 1.65 s (6.69 MB/s)
150 04:49:44.589136 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:49:44.590932 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:49:44.591519 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 04:49:44.592143 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 04:49:59.820295 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950946/extract-nfsrootfs-t1ngpz2o
156 04:49:59.820900 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 04:49:59.821190 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:49:59.821895 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk
159 04:49:59.822351 makedir: /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin
160 04:49:59.822681 makedir: /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/tests
161 04:49:59.822998 makedir: /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/results
162 04:49:59.823329 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-add-keys
163 04:49:59.823859 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-add-sources
164 04:49:59.824419 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-background-process-start
165 04:49:59.824935 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-background-process-stop
166 04:49:59.825469 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-common-functions
167 04:49:59.826023 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-echo-ipv4
168 04:49:59.826568 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-install-packages
169 04:49:59.827075 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-installed-packages
170 04:49:59.827563 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-os-build
171 04:49:59.828075 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-probe-channel
172 04:49:59.828593 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-probe-ip
173 04:49:59.829082 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-target-ip
174 04:49:59.829564 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-target-mac
175 04:49:59.830056 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-target-storage
176 04:49:59.830555 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-case
177 04:49:59.831045 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-event
178 04:49:59.831597 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-feedback
179 04:49:59.832123 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-raise
180 04:49:59.832614 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-reference
181 04:49:59.833095 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-runner
182 04:49:59.833578 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-set
183 04:49:59.834059 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-test-shell
184 04:49:59.834552 Updating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-install-packages (oe)
185 04:49:59.835094 Updating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/bin/lava-installed-packages (oe)
186 04:49:59.835538 Creating /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/environment
187 04:49:59.835928 LAVA metadata
188 04:49:59.836222 - LAVA_JOB_ID=950946
189 04:49:59.836439 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:49:59.836803 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:49:59.837773 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:49:59.838085 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:49:59.838291 skipped lava-vland-overlay
194 04:49:59.838531 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:49:59.838782 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:49:59.839000 skipped lava-multinode-overlay
197 04:49:59.839238 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:49:59.839486 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:49:59.839734 Loading test definitions
200 04:49:59.840038 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:49:59.840264 Using /lava-950946 at stage 0
202 04:49:59.841463 uuid=950946_1.6.2.4.1 testdef=None
203 04:49:59.841767 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:49:59.842025 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:49:59.843740 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:49:59.844557 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:49:59.846708 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:49:59.847536 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:49:59.849672 runner path: /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 950946_1.6.2.4.1
212 04:49:59.850238 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:49:59.850991 Creating lava-test-runner.conf files
215 04:49:59.851189 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950946/lava-overlay-b5famvjk/lava-950946/0 for stage 0
216 04:49:59.851530 - 0_v4l2-decoder-conformance-h264
217 04:49:59.851867 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:49:59.852178 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:49:59.873876 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:49:59.874259 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:49:59.874516 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:49:59.874780 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:49:59.875042 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:50:00.495712 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:50:00.496248 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 04:50:00.496509 extracting modules file /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950946/extract-nfsrootfs-t1ngpz2o
227 04:50:01.886398 extracting modules file /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk
228 04:50:03.302863 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:50:03.303346 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 04:50:03.303644 [common] Applying overlay to NFS
231 04:50:03.303876 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950946/compress-overlay-excotng4/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950946/extract-nfsrootfs-t1ngpz2o
232 04:50:03.333865 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:50:03.334323 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 04:50:03.334623 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 04:50:03.334873 Converting downloaded kernel to a uImage
236 04:50:03.335208 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/kernel/Image /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/kernel/uImage
237 04:50:03.832309 output: Image Name:
238 04:50:03.832733 output: Created: Thu Nov 7 04:50:03 2024
239 04:50:03.832944 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:50:03.833152 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:50:03.833355 output: Load Address: 01080000
242 04:50:03.833554 output: Entry Point: 01080000
243 04:50:03.833754 output:
244 04:50:03.834087 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:50:03.834354 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 04:50:03.834624 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:50:03.834879 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:50:03.835136 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:50:03.835401 Building ramdisk /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk
250 04:50:06.108597 >> 166792 blocks
251 04:50:13.888294 Adding RAMdisk u-boot header.
252 04:50:13.888746 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk.cpio.gz.uboot
253 04:50:14.134016 output: Image Name:
254 04:50:14.134448 output: Created: Thu Nov 7 04:50:13 2024
255 04:50:14.134926 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:50:14.135393 output: Data Size: 23431923 Bytes = 22882.74 KiB = 22.35 MiB
257 04:50:14.135848 output: Load Address: 00000000
258 04:50:14.136363 output: Entry Point: 00000000
259 04:50:14.136817 output:
260 04:50:14.138103 rename /var/lib/lava/dispatcher/tmp/950946/extract-overlay-ramdisk-u1j6ywj8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
261 04:50:14.138898 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:50:14.139520 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 04:50:14.140154 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 04:50:14.140675 No LXC device requested
265 04:50:14.141248 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:50:14.141826 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 04:50:14.142393 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:50:14.142857 Checking files for TFTP limit of 4294967296 bytes.
269 04:50:14.145858 end: 1 tftp-deploy (duration 00:01:03) [common]
270 04:50:14.146497 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:50:14.147102 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:50:14.147669 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:50:14.148266 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:50:14.148863 Using kernel file from prepare-kernel: 950946/tftp-deploy-w7fckx9r/kernel/uImage
275 04:50:14.149570 substitutions:
276 04:50:14.150032 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:50:14.150486 - {DTB_ADDR}: 0x01070000
278 04:50:14.150937 - {DTB}: 950946/tftp-deploy-w7fckx9r/dtb/meson-g12b-a311d-libretech-cc.dtb
279 04:50:14.151236 - {INITRD}: 950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
280 04:50:14.151449 - {KERNEL_ADDR}: 0x01080000
281 04:50:14.151656 - {KERNEL}: 950946/tftp-deploy-w7fckx9r/kernel/uImage
282 04:50:14.151871 - {LAVA_MAC}: None
283 04:50:14.152171 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950946/extract-nfsrootfs-t1ngpz2o
284 04:50:14.152645 - {NFS_SERVER_IP}: 192.168.6.2
285 04:50:14.153092 - {PRESEED_CONFIG}: None
286 04:50:14.153533 - {PRESEED_LOCAL}: None
287 04:50:14.153974 - {RAMDISK_ADDR}: 0x08000000
288 04:50:14.154408 - {RAMDISK}: 950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
289 04:50:14.154842 - {ROOT_PART}: None
290 04:50:14.155279 - {ROOT}: None
291 04:50:14.155716 - {SERVER_IP}: 192.168.6.2
292 04:50:14.156195 - {TEE_ADDR}: 0x83000000
293 04:50:14.156636 - {TEE}: None
294 04:50:14.157076 Parsed boot commands:
295 04:50:14.157503 - setenv autoload no
296 04:50:14.157942 - setenv initrd_high 0xffffffff
297 04:50:14.158376 - setenv fdt_high 0xffffffff
298 04:50:14.158807 - dhcp
299 04:50:14.159240 - setenv serverip 192.168.6.2
300 04:50:14.159673 - tftpboot 0x01080000 950946/tftp-deploy-w7fckx9r/kernel/uImage
301 04:50:14.160138 - tftpboot 0x08000000 950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
302 04:50:14.160580 - tftpboot 0x01070000 950946/tftp-deploy-w7fckx9r/dtb/meson-g12b-a311d-libretech-cc.dtb
303 04:50:14.161018 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950946/extract-nfsrootfs-t1ngpz2o,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:50:14.161472 - bootm 0x01080000 0x08000000 0x01070000
305 04:50:14.162041 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:50:14.163710 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:50:14.164221 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 04:50:14.178521 Setting prompt string to ['lava-test: # ']
310 04:50:14.179479 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:50:14.179939 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:50:14.180618 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:50:14.181440 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:50:14.182683 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 04:50:14.221075 >> OK - accepted request
316 04:50:14.223047 Returned 0 in 0 seconds
317 04:50:14.323832 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:50:14.325817 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:50:14.326481 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:50:14.327093 Setting prompt string to ['Hit any key to stop autoboot']
322 04:50:14.327638 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:50:14.329499 Trying 192.168.56.21...
324 04:50:14.330040 Connected to conserv1.
325 04:50:14.330532 Escape character is '^]'.
326 04:50:14.331014
327 04:50:14.331503 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:50:14.332000
329 04:50:25.510371 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 04:50:25.510805 bl2_stage_init 0x01
331 04:50:25.511032 bl2_stage_init 0x81
332 04:50:25.515821 hw id: 0x0000 - pwm id 0x01
333 04:50:25.516245 bl2_stage_init 0xc1
334 04:50:25.516704 bl2_stage_init 0x02
335 04:50:25.517160
336 04:50:25.521411 L0:00000000
337 04:50:25.521903 L1:20000703
338 04:50:25.522384 L2:00008067
339 04:50:25.522823 L3:14000000
340 04:50:25.527009 B2:00402000
341 04:50:25.527488 B1:e0f83180
342 04:50:25.527940
343 04:50:25.528429 TE: 58124
344 04:50:25.528868
345 04:50:25.532762 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 04:50:25.533245
347 04:50:25.533687 Board ID = 1
348 04:50:25.538264 Set A53 clk to 24M
349 04:50:25.538737 Set A73 clk to 24M
350 04:50:25.539175 Set clk81 to 24M
351 04:50:25.543903 A53 clk: 1200 MHz
352 04:50:25.544405 A73 clk: 1200 MHz
353 04:50:25.544841 CLK81: 166.6M
354 04:50:25.545270 smccc: 00012a91
355 04:50:25.549412 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 04:50:25.555163 board id: 1
357 04:50:25.560945 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:50:25.571505 fw parse done
359 04:50:25.577469 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:50:25.620100 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:50:25.630966 PIEI prepare done
362 04:50:25.631435 fastboot data load
363 04:50:25.631872 fastboot data verify
364 04:50:25.636704 verify result: 266
365 04:50:25.642237 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 04:50:25.642703 LPDDR4 probe
367 04:50:25.643138 ddr clk to 1584MHz
368 04:50:25.650221 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:50:25.687588
370 04:50:25.688116 dmc_version 0001
371 04:50:25.694214 Check phy result
372 04:50:25.700104 INFO : End of CA training
373 04:50:25.700572 INFO : End of initialization
374 04:50:25.705643 INFO : Training has run successfully!
375 04:50:25.706106 Check phy result
376 04:50:25.711280 INFO : End of initialization
377 04:50:25.711745 INFO : End of read enable training
378 04:50:25.714548 INFO : End of fine write leveling
379 04:50:25.720176 INFO : End of Write leveling coarse delay
380 04:50:25.725708 INFO : Training has run successfully!
381 04:50:25.726170 Check phy result
382 04:50:25.726606 INFO : End of initialization
383 04:50:25.731315 INFO : End of read dq deskew training
384 04:50:25.736902 INFO : End of MPR read delay center optimization
385 04:50:25.737391 INFO : End of write delay center optimization
386 04:50:25.742494 INFO : End of read delay center optimization
387 04:50:25.748076 INFO : End of max read latency training
388 04:50:25.748549 INFO : Training has run successfully!
389 04:50:25.753717 1D training succeed
390 04:50:25.759681 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:50:25.807258 Check phy result
392 04:50:25.807758 INFO : End of initialization
393 04:50:25.829853 INFO : End of 2D read delay Voltage center optimization
394 04:50:25.850017 INFO : End of 2D read delay Voltage center optimization
395 04:50:25.902092 INFO : End of 2D write delay Voltage center optimization
396 04:50:25.951552 INFO : End of 2D write delay Voltage center optimization
397 04:50:25.957046 INFO : Training has run successfully!
398 04:50:25.957523
399 04:50:25.957981 channel==0
400 04:50:25.962603 RxClkDly_Margin_A0==88 ps 9
401 04:50:25.963077 TxDqDly_Margin_A0==98 ps 10
402 04:50:25.965930 RxClkDly_Margin_A1==78 ps 8
403 04:50:25.966394 TxDqDly_Margin_A1==98 ps 10
404 04:50:25.971477 TrainedVREFDQ_A0==74
405 04:50:25.971960 TrainedVREFDQ_A1==74
406 04:50:25.976971 VrefDac_Margin_A0==24
407 04:50:25.977438 DeviceVref_Margin_A0==40
408 04:50:25.977875 VrefDac_Margin_A1==26
409 04:50:25.982624 DeviceVref_Margin_A1==40
410 04:50:25.983086
411 04:50:25.983525
412 04:50:25.983962 channel==1
413 04:50:25.984435 RxClkDly_Margin_A0==98 ps 10
414 04:50:25.986090 TxDqDly_Margin_A0==98 ps 10
415 04:50:25.991632 RxClkDly_Margin_A1==98 ps 10
416 04:50:25.992128 TxDqDly_Margin_A1==98 ps 10
417 04:50:25.997205 TrainedVREFDQ_A0==77
418 04:50:25.997670 TrainedVREFDQ_A1==78
419 04:50:25.998113 VrefDac_Margin_A0==22
420 04:50:26.002887 DeviceVref_Margin_A0==37
421 04:50:26.003349 VrefDac_Margin_A1==22
422 04:50:26.003785 DeviceVref_Margin_A1==36
423 04:50:26.004256
424 04:50:26.008388 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:50:26.008856
426 04:50:26.041957 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 04:50:26.042546 2D training succeed
428 04:50:26.047545 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:50:26.053231 auto size-- 65535DDR cs0 size: 2048MB
430 04:50:26.053714 DDR cs1 size: 2048MB
431 04:50:26.058753 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:50:26.059241 cs0 DataBus test pass
433 04:50:26.059683 cs1 DataBus test pass
434 04:50:26.064394 cs0 AddrBus test pass
435 04:50:26.064864 cs1 AddrBus test pass
436 04:50:26.065305
437 04:50:26.069952 100bdlr_step_size ps== 420
438 04:50:26.070435 result report
439 04:50:26.070871 boot times 0Enable ddr reg access
440 04:50:26.080031 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:50:26.093535 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 04:50:26.667292 0.0;M3 CHK:0;cm4_sp_mode 0
443 04:50:26.667724 MVN_1=0x00000000
444 04:50:26.672629 MVN_2=0x00000000
445 04:50:26.678404 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 04:50:26.678648 OPS=0x10
447 04:50:26.678858 ring efuse init
448 04:50:26.679059 chipver efuse init
449 04:50:26.684093 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 04:50:26.689626 [0.018961 Inits done]
451 04:50:26.690104 secure task start!
452 04:50:26.690544 high task start!
453 04:50:26.694168 low task start!
454 04:50:26.694636 run into bl31
455 04:50:26.700880 NOTICE: BL31: v1.3(release):4fc40b1
456 04:50:26.708713 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 04:50:26.709228 NOTICE: BL31: G12A normal boot!
458 04:50:26.734112 NOTICE: BL31: BL33 decompress pass
459 04:50:26.739727 ERROR: Error initializing runtime service opteed_fast
460 04:50:27.972759
461 04:50:27.973436
462 04:50:27.981020 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 04:50:27.981549
464 04:50:27.982019 Model: Libre Computer AML-A311D-CC Alta
465 04:50:28.189529 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 04:50:28.212851 DRAM: 2 GiB (effective 3.8 GiB)
467 04:50:28.355923 Core: 408 devices, 31 uclasses, devicetree: separate
468 04:50:28.361817 WDT: Not starting watchdog@f0d0
469 04:50:28.394015 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 04:50:28.406472 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 04:50:28.411385 ** Bad device specification mmc 0 **
472 04:50:28.421769 Card did not respond to voltage select! : -110
473 04:50:28.429387 ** Bad device specification mmc 0 **
474 04:50:28.429871 Couldn't find partition mmc 0
475 04:50:28.437718 Card did not respond to voltage select! : -110
476 04:50:28.443263 ** Bad device specification mmc 0 **
477 04:50:28.443745 Couldn't find partition mmc 0
478 04:50:28.448305 Error: could not access storage.
479 04:50:29.710660 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 04:50:29.711326 bl2_stage_init 0x01
481 04:50:29.711807 bl2_stage_init 0x81
482 04:50:29.716248 hw id: 0x0000 - pwm id 0x01
483 04:50:29.716752 bl2_stage_init 0xc1
484 04:50:29.717231 bl2_stage_init 0x02
485 04:50:29.717689
486 04:50:29.721840 L0:00000000
487 04:50:29.722323 L1:20000703
488 04:50:29.722777 L2:00008067
489 04:50:29.723227 L3:14000000
490 04:50:29.727447 B2:00402000
491 04:50:29.727945 B1:e0f83180
492 04:50:29.728450
493 04:50:29.728906 TE: 58167
494 04:50:29.729358
495 04:50:29.733033 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 04:50:29.733519
497 04:50:29.733976 Board ID = 1
498 04:50:29.738614 Set A53 clk to 24M
499 04:50:29.739094 Set A73 clk to 24M
500 04:50:29.739548 Set clk81 to 24M
501 04:50:29.744233 A53 clk: 1200 MHz
502 04:50:29.744713 A73 clk: 1200 MHz
503 04:50:29.745194 CLK81: 166.6M
504 04:50:29.745606 smccc: 00012abd
505 04:50:29.749786 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 04:50:29.755405 board id: 1
507 04:50:29.761320 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 04:50:29.772007 fw parse done
509 04:50:29.777993 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 04:50:29.820505 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 04:50:29.831496 PIEI prepare done
512 04:50:29.832035 fastboot data load
513 04:50:29.832523 fastboot data verify
514 04:50:29.837060 verify result: 266
515 04:50:29.842685 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 04:50:29.843173 LPDDR4 probe
517 04:50:29.843646 ddr clk to 1584MHz
518 04:50:29.850627 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 04:50:29.887912
520 04:50:29.888443 dmc_version 0001
521 04:50:29.894567 Check phy result
522 04:50:29.900458 INFO : End of CA training
523 04:50:29.900956 INFO : End of initialization
524 04:50:29.906042 INFO : Training has run successfully!
525 04:50:29.906524 Check phy result
526 04:50:29.911668 INFO : End of initialization
527 04:50:29.912186 INFO : End of read enable training
528 04:50:29.914957 INFO : End of fine write leveling
529 04:50:29.920460 INFO : End of Write leveling coarse delay
530 04:50:29.926097 INFO : Training has run successfully!
531 04:50:29.926623 Check phy result
532 04:50:29.927082 INFO : End of initialization
533 04:50:29.931665 INFO : End of read dq deskew training
534 04:50:29.937255 INFO : End of MPR read delay center optimization
535 04:50:29.937738 INFO : End of write delay center optimization
536 04:50:29.942950 INFO : End of read delay center optimization
537 04:50:29.948499 INFO : End of max read latency training
538 04:50:29.948979 INFO : Training has run successfully!
539 04:50:29.954083 1D training succeed
540 04:50:29.960073 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 04:50:30.007675 Check phy result
542 04:50:30.008253 INFO : End of initialization
543 04:50:30.029401 INFO : End of 2D read delay Voltage center optimization
544 04:50:30.049602 INFO : End of 2D read delay Voltage center optimization
545 04:50:30.101668 INFO : End of 2D write delay Voltage center optimization
546 04:50:30.151065 INFO : End of 2D write delay Voltage center optimization
547 04:50:30.156604 INFO : Training has run successfully!
548 04:50:30.157098
549 04:50:30.157554 channel==0
550 04:50:30.162214 RxClkDly_Margin_A0==88 ps 9
551 04:50:30.162708 TxDqDly_Margin_A0==98 ps 10
552 04:50:30.167810 RxClkDly_Margin_A1==88 ps 9
553 04:50:30.168344 TxDqDly_Margin_A1==98 ps 10
554 04:50:30.168802 TrainedVREFDQ_A0==74
555 04:50:30.173433 TrainedVREFDQ_A1==75
556 04:50:30.173971 VrefDac_Margin_A0==25
557 04:50:30.174443 DeviceVref_Margin_A0==40
558 04:50:30.179023 VrefDac_Margin_A1==25
559 04:50:30.179504 DeviceVref_Margin_A1==39
560 04:50:30.179953
561 04:50:30.180441
562 04:50:30.184609 channel==1
563 04:50:30.185111 RxClkDly_Margin_A0==98 ps 10
564 04:50:30.185564 TxDqDly_Margin_A0==98 ps 10
565 04:50:30.190182 RxClkDly_Margin_A1==88 ps 9
566 04:50:30.190678 TxDqDly_Margin_A1==88 ps 9
567 04:50:30.195770 TrainedVREFDQ_A0==77
568 04:50:30.196284 TrainedVREFDQ_A1==77
569 04:50:30.196743 VrefDac_Margin_A0==22
570 04:50:30.201428 DeviceVref_Margin_A0==37
571 04:50:30.201912 VrefDac_Margin_A1==24
572 04:50:30.207030 DeviceVref_Margin_A1==37
573 04:50:30.207512
574 04:50:30.207973 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 04:50:30.208458
576 04:50:30.240628 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 04:50:30.241221 2D training succeed
578 04:50:30.246211 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 04:50:30.251799 auto size-- 65535DDR cs0 size: 2048MB
580 04:50:30.252338 DDR cs1 size: 2048MB
581 04:50:30.257430 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 04:50:30.257933 cs0 DataBus test pass
583 04:50:30.263065 cs1 DataBus test pass
584 04:50:30.263562 cs0 AddrBus test pass
585 04:50:30.264043 cs1 AddrBus test pass
586 04:50:30.264501
587 04:50:30.268620 100bdlr_step_size ps== 420
588 04:50:30.269126 result report
589 04:50:30.274219 boot times 0Enable ddr reg access
590 04:50:30.279561 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 04:50:30.293036 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 04:50:30.866284 0.0;M3 CHK:0;cm4_sp_mode 0
593 04:50:30.866990 MVN_1=0x00000000
594 04:50:30.871718 MVN_2=0x00000000
595 04:50:30.877449 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 04:50:30.878037 OPS=0x10
597 04:50:30.878510 ring efuse init
598 04:50:30.878988 chipver efuse init
599 04:50:30.883089 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 04:50:30.888626 [0.018961 Inits done]
601 04:50:30.889179 secure task start!
602 04:50:30.889646 high task start!
603 04:50:30.893244 low task start!
604 04:50:30.893797 run into bl31
605 04:50:30.899892 NOTICE: BL31: v1.3(release):4fc40b1
606 04:50:30.907710 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 04:50:30.908290 NOTICE: BL31: G12A normal boot!
608 04:50:30.933015 NOTICE: BL31: BL33 decompress pass
609 04:50:30.938688 ERROR: Error initializing runtime service opteed_fast
610 04:50:32.171752
611 04:50:32.172483
612 04:50:32.180279 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 04:50:32.180824
614 04:50:32.181312 Model: Libre Computer AML-A311D-CC Alta
615 04:50:32.388730 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 04:50:32.412099 DRAM: 2 GiB (effective 3.8 GiB)
617 04:50:32.554848 Core: 408 devices, 31 uclasses, devicetree: separate
618 04:50:32.560839 WDT: Not starting watchdog@f0d0
619 04:50:32.593054 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 04:50:32.605479 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 04:50:32.610722 ** Bad device specification mmc 0 **
622 04:50:32.620925 Card did not respond to voltage select! : -110
623 04:50:32.628720 ** Bad device specification mmc 0 **
624 04:50:32.629314 Couldn't find partition mmc 0
625 04:50:32.636933 Card did not respond to voltage select! : -110
626 04:50:32.642361 ** Bad device specification mmc 0 **
627 04:50:32.642925 Couldn't find partition mmc 0
628 04:50:32.647511 Error: could not access storage.
629 04:50:32.991007 Net: eth0: ethernet@ff3f0000
630 04:50:32.991633 starting USB...
631 04:50:33.242771 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 04:50:33.243401 Starting the controller
633 04:50:33.249695 USB XHCI 1.10
634 04:50:34.960973 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 04:50:34.961694 bl2_stage_init 0x01
636 04:50:34.962185 bl2_stage_init 0x81
637 04:50:34.966468 hw id: 0x0000 - pwm id 0x01
638 04:50:34.966988 bl2_stage_init 0xc1
639 04:50:34.967450 bl2_stage_init 0x02
640 04:50:34.967904
641 04:50:34.972062 L0:00000000
642 04:50:34.972574 L1:20000703
643 04:50:34.973034 L2:00008067
644 04:50:34.973482 L3:14000000
645 04:50:34.975070 B2:00402000
646 04:50:34.975571 B1:e0f83180
647 04:50:34.976059
648 04:50:34.976515 TE: 58124
649 04:50:34.976964
650 04:50:34.986109 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 04:50:34.986627
652 04:50:34.987142 Board ID = 1
653 04:50:34.987620 Set A53 clk to 24M
654 04:50:34.988110 Set A73 clk to 24M
655 04:50:34.991725 Set clk81 to 24M
656 04:50:34.992267 A53 clk: 1200 MHz
657 04:50:34.992721 A73 clk: 1200 MHz
658 04:50:34.997280 CLK81: 166.6M
659 04:50:34.997786 smccc: 00012a92
660 04:50:35.002911 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 04:50:35.003432 board id: 1
662 04:50:35.011488 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 04:50:35.022206 fw parse done
664 04:50:35.028099 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 04:50:35.070851 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 04:50:35.081722 PIEI prepare done
667 04:50:35.082243 fastboot data load
668 04:50:35.082714 fastboot data verify
669 04:50:35.087336 verify result: 266
670 04:50:35.092927 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 04:50:35.093446 LPDDR4 probe
672 04:50:35.093913 ddr clk to 1584MHz
673 04:50:35.100879 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 04:50:35.138243
675 04:50:35.138843 dmc_version 0001
676 04:50:35.144947 Check phy result
677 04:50:35.150737 INFO : End of CA training
678 04:50:35.151303 INFO : End of initialization
679 04:50:35.156471 INFO : Training has run successfully!
680 04:50:35.157050 Check phy result
681 04:50:35.161946 INFO : End of initialization
682 04:50:35.162487 INFO : End of read enable training
683 04:50:35.167541 INFO : End of fine write leveling
684 04:50:35.173075 INFO : End of Write leveling coarse delay
685 04:50:35.173585 INFO : Training has run successfully!
686 04:50:35.174045 Check phy result
687 04:50:35.178679 INFO : End of initialization
688 04:50:35.179190 INFO : End of read dq deskew training
689 04:50:35.184386 INFO : End of MPR read delay center optimization
690 04:50:35.189852 INFO : End of write delay center optimization
691 04:50:35.195445 INFO : End of read delay center optimization
692 04:50:35.195966 INFO : End of max read latency training
693 04:50:35.201052 INFO : Training has run successfully!
694 04:50:35.201574 1D training succeed
695 04:50:35.210195 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 04:50:35.257916 Check phy result
697 04:50:35.258491 INFO : End of initialization
698 04:50:35.279475 INFO : End of 2D read delay Voltage center optimization
699 04:50:35.299610 INFO : End of 2D read delay Voltage center optimization
700 04:50:35.351484 INFO : End of 2D write delay Voltage center optimization
701 04:50:35.400710 INFO : End of 2D write delay Voltage center optimization
702 04:50:35.406273 INFO : Training has run successfully!
703 04:50:35.406812
704 04:50:35.407276 channel==0
705 04:50:35.411867 RxClkDly_Margin_A0==88 ps 9
706 04:50:35.412465 TxDqDly_Margin_A0==98 ps 10
707 04:50:35.417462 RxClkDly_Margin_A1==88 ps 9
708 04:50:35.417996 TxDqDly_Margin_A1==98 ps 10
709 04:50:35.418464 TrainedVREFDQ_A0==74
710 04:50:35.423085 TrainedVREFDQ_A1==74
711 04:50:35.423620 VrefDac_Margin_A0==25
712 04:50:35.424117 DeviceVref_Margin_A0==40
713 04:50:35.428649 VrefDac_Margin_A1==25
714 04:50:35.429163 DeviceVref_Margin_A1==40
715 04:50:35.429619
716 04:50:35.430068
717 04:50:35.434227 channel==1
718 04:50:35.434741 RxClkDly_Margin_A0==98 ps 10
719 04:50:35.435197 TxDqDly_Margin_A0==88 ps 9
720 04:50:35.439830 RxClkDly_Margin_A1==88 ps 9
721 04:50:35.440385 TxDqDly_Margin_A1==88 ps 9
722 04:50:35.445478 TrainedVREFDQ_A0==76
723 04:50:35.446020 TrainedVREFDQ_A1==77
724 04:50:35.446485 VrefDac_Margin_A0==22
725 04:50:35.451051 DeviceVref_Margin_A0==38
726 04:50:35.451574 VrefDac_Margin_A1==24
727 04:50:35.456609 DeviceVref_Margin_A1==37
728 04:50:35.457134
729 04:50:35.457590 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 04:50:35.458036
731 04:50:35.490184 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
732 04:50:35.490819 2D training succeed
733 04:50:35.495903 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 04:50:35.501361 auto size-- 65535DDR cs0 size: 2048MB
735 04:50:35.501715 DDR cs1 size: 2048MB
736 04:50:35.506942 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 04:50:35.507401 cs0 DataBus test pass
738 04:50:35.512532 cs1 DataBus test pass
739 04:50:35.512858 cs0 AddrBus test pass
740 04:50:35.513088 cs1 AddrBus test pass
741 04:50:35.513309
742 04:50:35.518173 100bdlr_step_size ps== 420
743 04:50:35.518679 result report
744 04:50:35.523763 boot times 0Enable ddr reg access
745 04:50:35.529017 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 04:50:35.542491 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 04:50:36.114516 0.0;M3 CHK:0;cm4_sp_mode 0
748 04:50:36.114964 MVN_1=0x00000000
749 04:50:36.120105 MVN_2=0x00000000
750 04:50:36.125756 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 04:50:36.126053 OPS=0x10
752 04:50:36.126267 ring efuse init
753 04:50:36.126473 chipver efuse init
754 04:50:36.131282 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 04:50:36.136858 [0.018961 Inits done]
756 04:50:36.137143 secure task start!
757 04:50:36.137354 high task start!
758 04:50:36.141434 low task start!
759 04:50:36.141728 run into bl31
760 04:50:36.148128 NOTICE: BL31: v1.3(release):4fc40b1
761 04:50:36.155934 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 04:50:36.156271 NOTICE: BL31: G12A normal boot!
763 04:50:36.181280 NOTICE: BL31: BL33 decompress pass
764 04:50:36.186935 ERROR: Error initializing runtime service opteed_fast
765 04:50:37.420096
766 04:50:37.420795
767 04:50:37.428297 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 04:50:37.428814
769 04:50:37.429285 Model: Libre Computer AML-A311D-CC Alta
770 04:50:37.636878 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 04:50:37.660199 DRAM: 2 GiB (effective 3.8 GiB)
772 04:50:37.803134 Core: 408 devices, 31 uclasses, devicetree: separate
773 04:50:37.808969 WDT: Not starting watchdog@f0d0
774 04:50:37.841212 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 04:50:37.853689 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 04:50:37.858667 ** Bad device specification mmc 0 **
777 04:50:37.869034 Card did not respond to voltage select! : -110
778 04:50:37.876643 ** Bad device specification mmc 0 **
779 04:50:37.877144 Couldn't find partition mmc 0
780 04:50:37.885031 Card did not respond to voltage select! : -110
781 04:50:37.890488 ** Bad device specification mmc 0 **
782 04:50:37.890983 Couldn't find partition mmc 0
783 04:50:37.895540 Error: could not access storage.
784 04:50:38.239088 Net: eth0: ethernet@ff3f0000
785 04:50:38.239757 starting USB...
786 04:50:38.491003 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 04:50:38.491649 Starting the controller
788 04:50:38.497852 USB XHCI 1.10
789 04:50:40.660989 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 04:50:40.661653 bl2_stage_init 0x01
791 04:50:40.662133 bl2_stage_init 0x81
792 04:50:40.666597 hw id: 0x0000 - pwm id 0x01
793 04:50:40.667094 bl2_stage_init 0xc1
794 04:50:40.667553 bl2_stage_init 0x02
795 04:50:40.668097
796 04:50:40.672133 L0:00000000
797 04:50:40.672621 L1:20000703
798 04:50:40.673077 L2:00008067
799 04:50:40.673524 L3:14000000
800 04:50:40.675081 B2:00402000
801 04:50:40.675562 B1:e0f83180
802 04:50:40.676039
803 04:50:40.676496 TE: 58159
804 04:50:40.676948
805 04:50:40.686142 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 04:50:40.686634
807 04:50:40.687089 Board ID = 1
808 04:50:40.687537 Set A53 clk to 24M
809 04:50:40.688005 Set A73 clk to 24M
810 04:50:40.691740 Set clk81 to 24M
811 04:50:40.692254 A53 clk: 1200 MHz
812 04:50:40.692706 A73 clk: 1200 MHz
813 04:50:40.697459 CLK81: 166.6M
814 04:50:40.697940 smccc: 00012ab5
815 04:50:40.703020 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 04:50:40.703511 board id: 1
817 04:50:40.711743 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 04:50:40.722127 fw parse done
819 04:50:40.728098 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 04:50:40.770735 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 04:50:40.781615 PIEI prepare done
822 04:50:40.782109 fastboot data load
823 04:50:40.782567 fastboot data verify
824 04:50:40.787216 verify result: 266
825 04:50:40.792825 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 04:50:40.793316 LPDDR4 probe
827 04:50:40.793767 ddr clk to 1584MHz
828 04:50:40.800797 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 04:50:40.838036
830 04:50:40.838544 dmc_version 0001
831 04:50:40.844734 Check phy result
832 04:50:40.850600 INFO : End of CA training
833 04:50:40.851085 INFO : End of initialization
834 04:50:40.856243 INFO : Training has run successfully!
835 04:50:40.856729 Check phy result
836 04:50:40.861787 INFO : End of initialization
837 04:50:40.862272 INFO : End of read enable training
838 04:50:40.867438 INFO : End of fine write leveling
839 04:50:40.873006 INFO : End of Write leveling coarse delay
840 04:50:40.873498 INFO : Training has run successfully!
841 04:50:40.873950 Check phy result
842 04:50:40.878583 INFO : End of initialization
843 04:50:40.879075 INFO : End of read dq deskew training
844 04:50:40.884222 INFO : End of MPR read delay center optimization
845 04:50:40.889802 INFO : End of write delay center optimization
846 04:50:40.895445 INFO : End of read delay center optimization
847 04:50:40.895932 INFO : End of max read latency training
848 04:50:40.900984 INFO : Training has run successfully!
849 04:50:40.901463 1D training succeed
850 04:50:40.910171 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 04:50:40.957805 Check phy result
852 04:50:40.958272 INFO : End of initialization
853 04:50:40.979541 INFO : End of 2D read delay Voltage center optimization
854 04:50:40.999818 INFO : End of 2D read delay Voltage center optimization
855 04:50:41.051905 INFO : End of 2D write delay Voltage center optimization
856 04:50:41.101209 INFO : End of 2D write delay Voltage center optimization
857 04:50:41.106778 INFO : Training has run successfully!
858 04:50:41.107248
859 04:50:41.107678 channel==0
860 04:50:41.112387 RxClkDly_Margin_A0==88 ps 9
861 04:50:41.112872 TxDqDly_Margin_A0==98 ps 10
862 04:50:41.117978 RxClkDly_Margin_A1==88 ps 9
863 04:50:41.118432 TxDqDly_Margin_A1==98 ps 10
864 04:50:41.118881 TrainedVREFDQ_A0==74
865 04:50:41.123615 TrainedVREFDQ_A1==74
866 04:50:41.124310 VrefDac_Margin_A0==25
867 04:50:41.124875 DeviceVref_Margin_A0==40
868 04:50:41.129191 VrefDac_Margin_A1==25
869 04:50:41.129699 DeviceVref_Margin_A1==40
870 04:50:41.130144
871 04:50:41.130581
872 04:50:41.134786 channel==1
873 04:50:41.135276 RxClkDly_Margin_A0==98 ps 10
874 04:50:41.135721 TxDqDly_Margin_A0==98 ps 10
875 04:50:41.140354 RxClkDly_Margin_A1==88 ps 9
876 04:50:41.140843 TxDqDly_Margin_A1==88 ps 9
877 04:50:41.145978 TrainedVREFDQ_A0==77
878 04:50:41.146469 TrainedVREFDQ_A1==77
879 04:50:41.146913 VrefDac_Margin_A0==22
880 04:50:41.151587 DeviceVref_Margin_A0==37
881 04:50:41.152095 VrefDac_Margin_A1==24
882 04:50:41.157186 DeviceVref_Margin_A1==37
883 04:50:41.157673
884 04:50:41.158113 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 04:50:41.158543
886 04:50:41.190780 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 04:50:41.191369 2D training succeed
888 04:50:41.196398 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 04:50:41.201998 auto size-- 65535DDR cs0 size: 2048MB
890 04:50:41.202488 DDR cs1 size: 2048MB
891 04:50:41.207574 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 04:50:41.208099 cs0 DataBus test pass
893 04:50:41.213189 cs1 DataBus test pass
894 04:50:41.213681 cs0 AddrBus test pass
895 04:50:41.214120 cs1 AddrBus test pass
896 04:50:41.214546
897 04:50:41.218777 100bdlr_step_size ps== 420
898 04:50:41.219267 result report
899 04:50:41.224381 boot times 0Enable ddr reg access
900 04:50:41.229730 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 04:50:41.243224 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 04:50:41.817050 0.0;M3 CHK:0;cm4_sp_mode 0
903 04:50:41.817743 MVN_1=0x00000000
904 04:50:41.822398 MVN_2=0x00000000
905 04:50:41.828181 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 04:50:41.828696 OPS=0x10
907 04:50:41.829175 ring efuse init
908 04:50:41.829640 chipver efuse init
909 04:50:41.833747 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 04:50:41.839351 [0.018961 Inits done]
911 04:50:41.839853 secure task start!
912 04:50:41.840387 high task start!
913 04:50:41.843923 low task start!
914 04:50:41.844458 run into bl31
915 04:50:41.850608 NOTICE: BL31: v1.3(release):4fc40b1
916 04:50:41.858370 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 04:50:41.858883 NOTICE: BL31: G12A normal boot!
918 04:50:41.883819 NOTICE: BL31: BL33 decompress pass
919 04:50:41.889461 ERROR: Error initializing runtime service opteed_fast
920 04:50:43.122471
921 04:50:43.123153
922 04:50:43.130743 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 04:50:43.131272
924 04:50:43.131755 Model: Libre Computer AML-A311D-CC Alta
925 04:50:43.339238 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 04:50:43.362498 DRAM: 2 GiB (effective 3.8 GiB)
927 04:50:43.505565 Core: 408 devices, 31 uclasses, devicetree: separate
928 04:50:43.511538 WDT: Not starting watchdog@f0d0
929 04:50:43.543778 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 04:50:43.556185 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 04:50:43.561185 ** Bad device specification mmc 0 **
932 04:50:43.571537 Card did not respond to voltage select! : -110
933 04:50:43.579167 ** Bad device specification mmc 0 **
934 04:50:43.579729 Couldn't find partition mmc 0
935 04:50:43.587506 Card did not respond to voltage select! : -110
936 04:50:43.593029 ** Bad device specification mmc 0 **
937 04:50:43.593574 Couldn't find partition mmc 0
938 04:50:43.598079 Error: could not access storage.
939 04:50:43.940479 Net: eth0: ethernet@ff3f0000
940 04:50:43.941087 starting USB...
941 04:50:44.192410 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 04:50:44.193052 Starting the controller
943 04:50:44.199343 USB XHCI 1.10
944 04:50:45.753576 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 04:50:45.761923 scanning usb for storage devices... 0 Storage Device(s) found
947 04:50:45.813596 Hit any key to stop autoboot: 1
948 04:50:45.814579 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 04:50:45.815464 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 04:50:45.816127 Setting prompt string to ['=>']
951 04:50:45.816719 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 04:50:45.829357 0
953 04:50:45.830371 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 04:50:45.830975 Sending with 10 millisecond of delay
956 04:50:46.965999 => setenv autoload no
957 04:50:46.976853 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 04:50:46.982259 setenv autoload no
959 04:50:46.983046 Sending with 10 millisecond of delay
961 04:50:48.780665 => setenv initrd_high 0xffffffff
962 04:50:48.791501 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 04:50:48.792483 setenv initrd_high 0xffffffff
964 04:50:48.793265 Sending with 10 millisecond of delay
966 04:50:50.409786 => setenv fdt_high 0xffffffff
967 04:50:50.420623 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 04:50:50.421551 setenv fdt_high 0xffffffff
969 04:50:50.422313 Sending with 10 millisecond of delay
971 04:50:50.714262 => dhcp
972 04:50:50.725059 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 04:50:50.725954 dhcp
974 04:50:50.726434 Speed: 1000, full duplex
975 04:50:50.726892 BOOTP broadcast 1
976 04:50:50.733410 DHCP client bound to address 192.168.6.27 (8 ms)
977 04:50:50.734188 Sending with 10 millisecond of delay
979 04:50:52.411161 => setenv serverip 192.168.6.2
980 04:50:52.422031 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 04:50:52.423048 setenv serverip 192.168.6.2
982 04:50:52.423800 Sending with 10 millisecond of delay
984 04:50:56.149338 => tftpboot 0x01080000 950946/tftp-deploy-w7fckx9r/kernel/uImage
985 04:50:56.160205 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 04:50:56.161167 tftpboot 0x01080000 950946/tftp-deploy-w7fckx9r/kernel/uImage
987 04:50:56.161683 Speed: 1000, full duplex
988 04:50:56.162147 Using ethernet@ff3f0000 device
989 04:50:56.163149 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 04:50:56.168608 Filename '950946/tftp-deploy-w7fckx9r/kernel/uImage'.
991 04:50:56.172489 Load address: 0x1080000
992 04:50:59.056480 Loading: *################################################## 43.6 MiB
993 04:50:59.057161 15.1 MiB/s
994 04:50:59.057644 done
995 04:50:59.060913 Bytes transferred = 45713984 (2b98a40 hex)
996 04:50:59.061772 Sending with 10 millisecond of delay
998 04:51:03.751533 => tftpboot 0x08000000 950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
999 04:51:03.762155 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 04:51:03.762673 tftpboot 0x08000000 950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot
1001 04:51:03.762910 Speed: 1000, full duplex
1002 04:51:03.763132 Using ethernet@ff3f0000 device
1003 04:51:03.764838 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 04:51:03.776679 Filename '950946/tftp-deploy-w7fckx9r/ramdisk/ramdisk.cpio.gz.uboot'.
1005 04:51:03.776988 Load address: 0x8000000
1006 04:51:10.805243 Loading: *################T ################################# UDP wrong checksum 00000005 00007bd9
1007 04:51:15.806264 T UDP wrong checksum 00000005 00007bd9
1008 04:51:25.808737 T T UDP wrong checksum 00000005 00007bd9
1009 04:51:45.813597 T T T T UDP wrong checksum 00000005 00007bd9
1010 04:51:47.610224 UDP wrong checksum 000000ff 00003aed
1011 04:51:47.650951 UDP wrong checksum 000000ff 0000cbdf
1012 04:52:00.818022 T T
1013 04:52:00.818833 Retry count exceeded; starting again
1015 04:52:00.820697 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1018 04:52:00.823126 end: 2.4 uboot-commands (duration 00:01:47) [common]
1020 04:52:00.824996 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 04:52:00.826294 end: 2 uboot-action (duration 00:01:47) [common]
1024 04:52:00.828279 Cleaning after the job
1025 04:52:00.828974 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/ramdisk
1026 04:52:00.830725 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/kernel
1027 04:52:00.876308 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/dtb
1028 04:52:00.877181 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/nfsrootfs
1029 04:52:01.190836 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950946/tftp-deploy-w7fckx9r/modules
1030 04:52:01.210917 start: 4.1 power-off (timeout 00:00:30) [common]
1031 04:52:01.211548 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 04:52:01.242129 >> OK - accepted request
1033 04:52:01.244114 Returned 0 in 0 seconds
1034 04:52:01.344836 end: 4.1 power-off (duration 00:00:00) [common]
1036 04:52:01.345759 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 04:52:01.346419 Listened to connection for namespace 'common' for up to 1s
1038 04:52:02.347355 Finalising connection for namespace 'common'
1039 04:52:02.347819 Disconnecting from shell: Finalise
1040 04:52:02.348142 =>
1041 04:52:02.449152 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 04:52:02.449560 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950946
1043 04:52:04.968587 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950946
1044 04:52:04.969233 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.