Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:50:51.030829 lava-dispatcher, installed at version: 2024.01
2 04:50:51.031623 start: 0 validate
3 04:50:51.032137 Start time: 2024-11-07 04:50:51.032107+00:00 (UTC)
4 04:50:51.032698 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:50:51.033265 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:50:51.077828 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:50:51.078387 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:50:51.110362 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:50:51.110983 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:50:51.143234 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:50:51.143958 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:50:51.176363 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:50:51.176831 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:50:51.221025 validate duration: 0.19
16 04:50:51.222542 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:50:51.223181 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:50:51.223765 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:50:51.224774 Not decompressing ramdisk as can be used compressed.
20 04:50:51.225554 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:50:51.226082 saving as /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/ramdisk/initrd.cpio.gz
22 04:50:51.226585 total size: 5628140 (5 MB)
23 04:50:51.270979 progress 0 % (0 MB)
24 04:50:51.278627 progress 5 % (0 MB)
25 04:50:51.286825 progress 10 % (0 MB)
26 04:50:51.293129 progress 15 % (0 MB)
27 04:50:51.297263 progress 20 % (1 MB)
28 04:50:51.301005 progress 25 % (1 MB)
29 04:50:51.305205 progress 30 % (1 MB)
30 04:50:51.309412 progress 35 % (1 MB)
31 04:50:51.313501 progress 40 % (2 MB)
32 04:50:51.318589 progress 45 % (2 MB)
33 04:50:51.323079 progress 50 % (2 MB)
34 04:50:51.329541 progress 55 % (2 MB)
35 04:50:51.333698 progress 60 % (3 MB)
36 04:50:51.337427 progress 65 % (3 MB)
37 04:50:51.341535 progress 70 % (3 MB)
38 04:50:51.345301 progress 75 % (4 MB)
39 04:50:51.349371 progress 80 % (4 MB)
40 04:50:51.353031 progress 85 % (4 MB)
41 04:50:51.357192 progress 90 % (4 MB)
42 04:50:51.361162 progress 95 % (5 MB)
43 04:50:51.364542 progress 100 % (5 MB)
44 04:50:51.365220 5 MB downloaded in 0.14 s (38.72 MB/s)
45 04:50:51.365777 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:50:51.366678 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:50:51.366978 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:50:51.367253 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:50:51.367731 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
51 04:50:51.368033 saving as /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/kernel/Image
52 04:50:51.368255 total size: 45713920 (43 MB)
53 04:50:51.368467 No compression specified
54 04:50:51.408974 progress 0 % (0 MB)
55 04:50:51.438468 progress 5 % (2 MB)
56 04:50:51.467272 progress 10 % (4 MB)
57 04:50:51.496777 progress 15 % (6 MB)
58 04:50:51.526208 progress 20 % (8 MB)
59 04:50:51.554889 progress 25 % (10 MB)
60 04:50:51.584296 progress 30 % (13 MB)
61 04:50:51.613509 progress 35 % (15 MB)
62 04:50:51.642740 progress 40 % (17 MB)
63 04:50:51.671550 progress 45 % (19 MB)
64 04:50:51.700583 progress 50 % (21 MB)
65 04:50:51.729792 progress 55 % (24 MB)
66 04:50:51.758969 progress 60 % (26 MB)
67 04:50:51.787950 progress 65 % (28 MB)
68 04:50:51.817461 progress 70 % (30 MB)
69 04:50:51.846627 progress 75 % (32 MB)
70 04:50:51.875789 progress 80 % (34 MB)
71 04:50:51.904285 progress 85 % (37 MB)
72 04:50:51.933422 progress 90 % (39 MB)
73 04:50:51.962467 progress 95 % (41 MB)
74 04:50:51.991043 progress 100 % (43 MB)
75 04:50:51.991566 43 MB downloaded in 0.62 s (69.94 MB/s)
76 04:50:51.992075 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:50:51.992912 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:50:51.993196 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:50:51.993463 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:50:51.994010 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:50:51.994307 saving as /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:50:51.994518 total size: 53209 (0 MB)
84 04:50:51.994730 No compression specified
85 04:50:52.038409 progress 61 % (0 MB)
86 04:50:52.039249 progress 100 % (0 MB)
87 04:50:52.039788 0 MB downloaded in 0.05 s (1.12 MB/s)
88 04:50:52.040308 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:50:52.041131 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:50:52.041400 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:50:52.041666 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:50:52.042116 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:50:52.042365 saving as /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/nfsrootfs/full.rootfs.tar
95 04:50:52.042571 total size: 474398908 (452 MB)
96 04:50:52.042781 Using unxz to decompress xz
97 04:50:52.084182 progress 0 % (0 MB)
98 04:50:53.214616 progress 5 % (22 MB)
99 04:50:54.659595 progress 10 % (45 MB)
100 04:50:55.103994 progress 15 % (67 MB)
101 04:50:55.880613 progress 20 % (90 MB)
102 04:50:56.414424 progress 25 % (113 MB)
103 04:50:56.837762 progress 30 % (135 MB)
104 04:50:57.444962 progress 35 % (158 MB)
105 04:50:58.373081 progress 40 % (181 MB)
106 04:50:59.221147 progress 45 % (203 MB)
107 04:50:59.988829 progress 50 % (226 MB)
108 04:51:00.631408 progress 55 % (248 MB)
109 04:51:01.858649 progress 60 % (271 MB)
110 04:51:03.368319 progress 65 % (294 MB)
111 04:51:05.011296 progress 70 % (316 MB)
112 04:51:08.119325 progress 75 % (339 MB)
113 04:51:10.560846 progress 80 % (361 MB)
114 04:51:13.450781 progress 85 % (384 MB)
115 04:51:16.603397 progress 90 % (407 MB)
116 04:51:19.773972 progress 95 % (429 MB)
117 04:51:22.944483 progress 100 % (452 MB)
118 04:51:22.958295 452 MB downloaded in 30.92 s (14.63 MB/s)
119 04:51:22.959011 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:51:22.960850 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:51:22.961437 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:51:22.962011 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:51:22.962856 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
125 04:51:22.963362 saving as /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/modules/modules.tar
126 04:51:22.963813 total size: 11607584 (11 MB)
127 04:51:22.964318 Using unxz to decompress xz
128 04:51:23.010564 progress 0 % (0 MB)
129 04:51:23.089944 progress 5 % (0 MB)
130 04:51:23.165780 progress 10 % (1 MB)
131 04:51:23.264474 progress 15 % (1 MB)
132 04:51:23.355059 progress 20 % (2 MB)
133 04:51:23.437326 progress 25 % (2 MB)
134 04:51:23.513389 progress 30 % (3 MB)
135 04:51:23.588188 progress 35 % (3 MB)
136 04:51:23.665349 progress 40 % (4 MB)
137 04:51:23.743584 progress 45 % (5 MB)
138 04:51:23.832221 progress 50 % (5 MB)
139 04:51:23.912672 progress 55 % (6 MB)
140 04:51:24.001441 progress 60 % (6 MB)
141 04:51:24.085422 progress 65 % (7 MB)
142 04:51:24.164555 progress 70 % (7 MB)
143 04:51:24.249930 progress 75 % (8 MB)
144 04:51:24.336190 progress 80 % (8 MB)
145 04:51:24.418119 progress 85 % (9 MB)
146 04:51:24.498124 progress 90 % (9 MB)
147 04:51:24.576585 progress 95 % (10 MB)
148 04:51:24.654279 progress 100 % (11 MB)
149 04:51:24.666092 11 MB downloaded in 1.70 s (6.50 MB/s)
150 04:51:24.666930 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:51:24.668565 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:51:24.669085 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 04:51:24.669615 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 04:51:39.855263 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950913/extract-nfsrootfs-w8u9zlg1
156 04:51:39.855872 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 04:51:39.856192 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:51:39.856798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q
159 04:51:39.857234 makedir: /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin
160 04:51:39.857583 makedir: /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/tests
161 04:51:39.857905 makedir: /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/results
162 04:51:39.858235 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-add-keys
163 04:51:39.858767 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-add-sources
164 04:51:39.859265 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-background-process-start
165 04:51:39.859756 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-background-process-stop
166 04:51:39.860325 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-common-functions
167 04:51:39.860829 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-echo-ipv4
168 04:51:39.861334 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-install-packages
169 04:51:39.861839 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-installed-packages
170 04:51:39.862311 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-os-build
171 04:51:39.862783 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-probe-channel
172 04:51:39.863254 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-probe-ip
173 04:51:39.863719 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-target-ip
174 04:51:39.864218 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-target-mac
175 04:51:39.864694 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-target-storage
176 04:51:39.865193 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-case
177 04:51:39.865680 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-event
178 04:51:39.866148 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-feedback
179 04:51:39.866613 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-raise
180 04:51:39.867070 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-reference
181 04:51:39.867532 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-runner
182 04:51:39.868107 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-set
183 04:51:39.868607 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-test-shell
184 04:51:39.869121 Updating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-install-packages (oe)
185 04:51:39.869668 Updating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/bin/lava-installed-packages (oe)
186 04:51:39.870103 Creating /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/environment
187 04:51:39.870459 LAVA metadata
188 04:51:39.870713 - LAVA_JOB_ID=950913
189 04:51:39.870923 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:51:39.871266 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:51:39.872246 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:51:39.872555 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:51:39.872760 skipped lava-vland-overlay
194 04:51:39.873001 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:51:39.873255 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:51:39.873469 skipped lava-multinode-overlay
197 04:51:39.873707 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:51:39.873955 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:51:39.874201 Loading test definitions
200 04:51:39.874472 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:51:39.874690 Using /lava-950913 at stage 0
202 04:51:39.875799 uuid=950913_1.6.2.4.1 testdef=None
203 04:51:39.876114 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:51:39.876377 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:51:39.878091 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:51:39.878870 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:51:39.881008 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:51:39.881825 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:51:39.883847 runner path: /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 950913_1.6.2.4.1
212 04:51:39.884420 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:51:39.885168 Creating lava-test-runner.conf files
215 04:51:39.885366 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950913/lava-overlay-94l707_q/lava-950913/0 for stage 0
216 04:51:39.885690 - 0_v4l2-decoder-conformance-h264
217 04:51:39.886023 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:51:39.886291 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:51:39.907369 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:51:39.907712 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:51:39.907968 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:51:39.908257 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:51:39.908519 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:51:40.518963 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:51:40.519439 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 04:51:40.519687 extracting modules file /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950913/extract-nfsrootfs-w8u9zlg1
227 04:51:41.876611 extracting modules file /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk
228 04:51:43.253739 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:51:43.254225 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 04:51:43.254506 [common] Applying overlay to NFS
231 04:51:43.254721 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950913/compress-overlay-n4520bg4/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950913/extract-nfsrootfs-w8u9zlg1
232 04:51:43.283901 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:51:43.284297 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 04:51:43.284571 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 04:51:43.284800 Converting downloaded kernel to a uImage
236 04:51:43.285106 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/kernel/Image /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/kernel/uImage
237 04:51:43.770797 output: Image Name:
238 04:51:43.771221 output: Created: Thu Nov 7 04:51:43 2024
239 04:51:43.771433 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:51:43.771637 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:51:43.771837 output: Load Address: 01080000
242 04:51:43.772074 output: Entry Point: 01080000
243 04:51:43.772279 output:
244 04:51:43.772612 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:51:43.772881 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:51:43.773153 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:51:43.773409 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:51:43.773667 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:51:43.773921 Building ramdisk /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk
250 04:51:45.941513 >> 166792 blocks
251 04:51:53.650607 Adding RAMdisk u-boot header.
252 04:51:53.651275 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk.cpio.gz.uboot
253 04:51:53.916049 output: Image Name:
254 04:51:53.916671 output: Created: Thu Nov 7 04:51:53 2024
255 04:51:53.917092 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:51:53.917499 output: Data Size: 23432425 Bytes = 22883.23 KiB = 22.35 MiB
257 04:51:53.917897 output: Load Address: 00000000
258 04:51:53.918288 output: Entry Point: 00000000
259 04:51:53.918675 output:
260 04:51:53.919674 rename /var/lib/lava/dispatcher/tmp/950913/extract-overlay-ramdisk-e7nguguy/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
261 04:51:53.920422 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:51:53.920968 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 04:51:53.921494 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 04:51:53.921944 No LXC device requested
265 04:51:53.922446 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:51:53.922951 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 04:51:53.923441 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:51:53.923849 Checking files for TFTP limit of 4294967296 bytes.
269 04:51:53.926530 end: 1 tftp-deploy (duration 00:01:03) [common]
270 04:51:53.927090 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:51:53.927608 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:51:53.928135 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:51:53.928645 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:51:53.929169 Using kernel file from prepare-kernel: 950913/tftp-deploy-mj1qv96g/kernel/uImage
275 04:51:53.929790 substitutions:
276 04:51:53.930190 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:51:53.930587 - {DTB_ADDR}: 0x01070000
278 04:51:53.930979 - {DTB}: 950913/tftp-deploy-mj1qv96g/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:51:53.931373 - {INITRD}: 950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
280 04:51:53.931763 - {KERNEL_ADDR}: 0x01080000
281 04:51:53.932185 - {KERNEL}: 950913/tftp-deploy-mj1qv96g/kernel/uImage
282 04:51:53.932575 - {LAVA_MAC}: None
283 04:51:53.933000 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950913/extract-nfsrootfs-w8u9zlg1
284 04:51:53.933393 - {NFS_SERVER_IP}: 192.168.6.2
285 04:51:53.933780 - {PRESEED_CONFIG}: None
286 04:51:53.934162 - {PRESEED_LOCAL}: None
287 04:51:53.934545 - {RAMDISK_ADDR}: 0x08000000
288 04:51:53.934923 - {RAMDISK}: 950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
289 04:51:53.935304 - {ROOT_PART}: None
290 04:51:53.935684 - {ROOT}: None
291 04:51:53.936122 - {SERVER_IP}: 192.168.6.2
292 04:51:53.936522 - {TEE_ADDR}: 0x83000000
293 04:51:53.936908 - {TEE}: None
294 04:51:53.937292 Parsed boot commands:
295 04:51:53.937663 - setenv autoload no
296 04:51:53.938048 - setenv initrd_high 0xffffffff
297 04:51:53.938428 - setenv fdt_high 0xffffffff
298 04:51:53.938812 - dhcp
299 04:51:53.939193 - setenv serverip 192.168.6.2
300 04:51:53.939572 - tftpboot 0x01080000 950913/tftp-deploy-mj1qv96g/kernel/uImage
301 04:51:53.939952 - tftpboot 0x08000000 950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
302 04:51:53.940372 - tftpboot 0x01070000 950913/tftp-deploy-mj1qv96g/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:51:53.940759 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950913/extract-nfsrootfs-w8u9zlg1,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:51:53.941157 - bootm 0x01080000 0x08000000 0x01070000
305 04:51:53.941647 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:51:53.943122 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:51:53.943538 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:51:53.957735 Setting prompt string to ['lava-test: # ']
310 04:51:53.959191 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:51:53.959771 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:51:53.960350 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:51:53.960875 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:51:53.961994 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:51:53.998649 >> OK - accepted request
316 04:51:54.000908 Returned 0 in 0 seconds
317 04:51:54.102034 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:51:54.103623 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:51:54.104239 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:51:54.104772 Setting prompt string to ['Hit any key to stop autoboot']
322 04:51:54.105236 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:51:54.106772 Trying 192.168.56.21...
324 04:51:54.107248 Connected to conserv1.
325 04:51:54.107666 Escape character is '^]'.
326 04:51:54.108112
327 04:51:54.108539 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:51:54.108955
329 04:52:01.075414 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:52:01.076085 bl2_stage_init 0x01
331 04:52:01.076522 bl2_stage_init 0x81
332 04:52:01.080831 hw id: 0x0000 - pwm id 0x01
333 04:52:01.081277 bl2_stage_init 0xc1
334 04:52:01.086304 bl2_stage_init 0x02
335 04:52:01.086734
336 04:52:01.087143 L0:00000000
337 04:52:01.087555 L1:00000703
338 04:52:01.087948 L2:00008067
339 04:52:01.088372 L3:15000000
340 04:52:01.091996 S1:00000000
341 04:52:01.092422 B2:20282000
342 04:52:01.092835 B1:a0f83180
343 04:52:01.093228
344 04:52:01.093622 TE: 67959
345 04:52:01.094017
346 04:52:01.097609 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:52:01.098036
348 04:52:01.103163 Board ID = 1
349 04:52:01.103590 Set cpu clk to 24M
350 04:52:01.104008 Set clk81 to 24M
351 04:52:01.108730 Use GP1_pll as DSU clk.
352 04:52:01.109153 DSU clk: 1200 Mhz
353 04:52:01.109548 CPU clk: 1200 MHz
354 04:52:01.114330 Set clk81 to 166.6M
355 04:52:01.119893 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:52:01.120330 board id: 1
357 04:52:01.127117 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:52:01.137693 fw parse done
359 04:52:01.143705 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:52:01.186347 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:52:01.197155 PIEI prepare done
362 04:52:01.197574 fastboot data load
363 04:52:01.197975 fastboot data verify
364 04:52:01.202754 verify result: 266
365 04:52:01.208386 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:52:01.208808 LPDDR4 probe
367 04:52:01.209201 ddr clk to 1584MHz
368 04:52:01.216341 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:52:01.253753
370 04:52:01.254270 dmc_version 0001
371 04:52:01.260296 Check phy result
372 04:52:01.266175 INFO : End of CA training
373 04:52:01.266600 INFO : End of initialization
374 04:52:01.271812 INFO : Training has run successfully!
375 04:52:01.272280 Check phy result
376 04:52:01.277416 INFO : End of initialization
377 04:52:01.277842 INFO : End of read enable training
378 04:52:01.282983 INFO : End of fine write leveling
379 04:52:01.288595 INFO : End of Write leveling coarse delay
380 04:52:01.289015 INFO : Training has run successfully!
381 04:52:01.289411 Check phy result
382 04:52:01.294182 INFO : End of initialization
383 04:52:01.294605 INFO : End of read dq deskew training
384 04:52:01.299784 INFO : End of MPR read delay center optimization
385 04:52:01.305412 INFO : End of write delay center optimization
386 04:52:01.310990 INFO : End of read delay center optimization
387 04:52:01.311410 INFO : End of max read latency training
388 04:52:01.316593 INFO : Training has run successfully!
389 04:52:01.317013 1D training succeed
390 04:52:01.325787 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:52:01.373486 Check phy result
392 04:52:01.373928 INFO : End of initialization
393 04:52:01.395843 INFO : End of 2D read delay Voltage center optimization
394 04:52:01.415038 INFO : End of 2D read delay Voltage center optimization
395 04:52:01.466818 INFO : End of 2D write delay Voltage center optimization
396 04:52:01.516058 INFO : End of 2D write delay Voltage center optimization
397 04:52:01.521595 INFO : Training has run successfully!
398 04:52:01.522023
399 04:52:01.522425 channel==0
400 04:52:01.527074 RxClkDly_Margin_A0==78 ps 8
401 04:52:01.527497 TxDqDly_Margin_A0==98 ps 10
402 04:52:01.532688 RxClkDly_Margin_A1==88 ps 9
403 04:52:01.533130 TxDqDly_Margin_A1==98 ps 10
404 04:52:01.533528 TrainedVREFDQ_A0==74
405 04:52:01.538255 TrainedVREFDQ_A1==75
406 04:52:01.538685 VrefDac_Margin_A0==23
407 04:52:01.539079 DeviceVref_Margin_A0==40
408 04:52:01.543873 VrefDac_Margin_A1==22
409 04:52:01.544329 DeviceVref_Margin_A1==39
410 04:52:01.544721
411 04:52:01.545114
412 04:52:01.549661 channel==1
413 04:52:01.550096 RxClkDly_Margin_A0==78 ps 8
414 04:52:01.550493 TxDqDly_Margin_A0==98 ps 10
415 04:52:01.555082 RxClkDly_Margin_A1==78 ps 8
416 04:52:01.555503 TxDqDly_Margin_A1==88 ps 9
417 04:52:01.560678 TrainedVREFDQ_A0==78
418 04:52:01.561100 TrainedVREFDQ_A1==75
419 04:52:01.561496 VrefDac_Margin_A0==22
420 04:52:01.566285 DeviceVref_Margin_A0==36
421 04:52:01.566711 VrefDac_Margin_A1==22
422 04:52:01.571874 DeviceVref_Margin_A1==38
423 04:52:01.572327
424 04:52:01.572727 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:52:01.573119
426 04:52:01.605590 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 04:52:01.606091 2D training succeed
428 04:52:01.611088 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:52:01.616656 auto size-- 65535DDR cs0 size: 2048MB
430 04:52:01.617075 DDR cs1 size: 2048MB
431 04:52:01.622265 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:52:01.622682 cs0 DataBus test pass
433 04:52:01.627880 cs1 DataBus test pass
434 04:52:01.628335 cs0 AddrBus test pass
435 04:52:01.628732 cs1 AddrBus test pass
436 04:52:01.629121
437 04:52:01.633565 100bdlr_step_size ps== 478
438 04:52:01.633992 result report
439 04:52:01.639061 boot times 0Enable ddr reg access
440 04:52:01.644324 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:52:01.658166 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:52:02.313079 bl2z: ptr: 05129330, size: 00001e40
443 04:52:02.319765 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:52:02.320276 MVN_1=0x00000000
445 04:52:02.320684 MVN_2=0x00000000
446 04:52:02.331265 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:52:02.331707 OPS=0x04
448 04:52:02.332139 ring efuse init
449 04:52:02.336875 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:52:02.337309 [0.017319 Inits done]
451 04:52:02.337706 secure task start!
452 04:52:02.344793 high task start!
453 04:52:02.345212 low task start!
454 04:52:02.345607 run into bl31
455 04:52:02.353554 NOTICE: BL31: v1.3(release):4fc40b1
456 04:52:02.654987 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:52:02.655353 NOTICE: BL31: G12A normal boot!
458 04:52:02.655572 NOTICE: BL31: BL33 decompress pass
459 04:52:02.658059 ERROR: Error initializing runtime service opteed_fast
460 04:52:05.127426 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:52:05.128178 bl2_stage_init 0x01
462 04:52:05.128651 bl2_stage_init 0x81
463 04:52:05.132983 hw id: 0x0000 - pwm id 0x01
464 04:52:05.133540 bl2_stage_init 0xc1
465 04:52:05.138598 bl2_stage_init 0x02
466 04:52:05.139181
467 04:52:05.139589 L0:00000000
468 04:52:05.140018 L1:00000703
469 04:52:05.140427 L2:00008067
470 04:52:05.140821 L3:15000000
471 04:52:05.144190 S1:00000000
472 04:52:05.144630 B2:20282000
473 04:52:05.145021 B1:a0f83180
474 04:52:05.145408
475 04:52:05.145794 TE: 70170
476 04:52:05.146181
477 04:52:05.149786 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:52:05.150235
479 04:52:05.155300 Board ID = 1
480 04:52:05.155739 Set cpu clk to 24M
481 04:52:05.156178 Set clk81 to 24M
482 04:52:05.160915 Use GP1_pll as DSU clk.
483 04:52:05.161363 DSU clk: 1200 Mhz
484 04:52:05.161757 CPU clk: 1200 MHz
485 04:52:05.166560 Set clk81 to 166.6M
486 04:52:05.172185 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:52:05.172625 board id: 1
488 04:52:05.179296 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:52:05.190137 fw parse done
490 04:52:05.196042 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:52:05.238564 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:52:05.249552 PIEI prepare done
493 04:52:05.250022 fastboot data load
494 04:52:05.250427 fastboot data verify
495 04:52:05.255085 verify result: 266
496 04:52:05.260701 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:52:05.261152 LPDDR4 probe
498 04:52:05.261549 ddr clk to 1584MHz
499 04:52:05.268829 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:52:05.305976
501 04:52:05.306453 dmc_version 0001
502 04:52:05.312608 Check phy result
503 04:52:05.318516 INFO : End of CA training
504 04:52:05.318963 INFO : End of initialization
505 04:52:05.324144 INFO : Training has run successfully!
506 04:52:05.324591 Check phy result
507 04:52:05.329729 INFO : End of initialization
508 04:52:05.330215 INFO : End of read enable training
509 04:52:05.335336 INFO : End of fine write leveling
510 04:52:05.340976 INFO : End of Write leveling coarse delay
511 04:52:05.341468 INFO : Training has run successfully!
512 04:52:05.341887 Check phy result
513 04:52:05.346504 INFO : End of initialization
514 04:52:05.346989 INFO : End of read dq deskew training
515 04:52:05.352188 INFO : End of MPR read delay center optimization
516 04:52:05.357730 INFO : End of write delay center optimization
517 04:52:05.363299 INFO : End of read delay center optimization
518 04:52:05.363787 INFO : End of max read latency training
519 04:52:05.369114 INFO : Training has run successfully!
520 04:52:05.369595 1D training succeed
521 04:52:05.378253 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 04:52:05.425902 Check phy result
523 04:52:05.426400 INFO : End of initialization
524 04:52:05.448221 INFO : End of 2D read delay Voltage center optimization
525 04:52:05.467491 INFO : End of 2D read delay Voltage center optimization
526 04:52:05.519220 INFO : End of 2D write delay Voltage center optimization
527 04:52:05.569292 INFO : End of 2D write delay Voltage center optimization
528 04:52:05.574387 INFO : Training has run successfully!
529 04:52:05.574908
530 04:52:05.575392 channel==0
531 04:52:05.580526 RxClkDly_Margin_A0==78 ps 8
532 04:52:05.581129 TxDqDly_Margin_A0==98 ps 10
533 04:52:05.585188 RxClkDly_Margin_A1==88 ps 9
534 04:52:05.585724 TxDqDly_Margin_A1==98 ps 10
535 04:52:05.586172 TrainedVREFDQ_A0==74
536 04:52:05.590738 TrainedVREFDQ_A1==74
537 04:52:05.591316 VrefDac_Margin_A0==23
538 04:52:05.591773 DeviceVref_Margin_A0==40
539 04:52:05.596401 VrefDac_Margin_A1==23
540 04:52:05.597034 DeviceVref_Margin_A1==40
541 04:52:05.597491
542 04:52:05.597930
543 04:52:05.602648 channel==1
544 04:52:05.603207 RxClkDly_Margin_A0==78 ps 8
545 04:52:05.603641 TxDqDly_Margin_A0==98 ps 10
546 04:52:05.608219 RxClkDly_Margin_A1==88 ps 9
547 04:52:05.608700 TxDqDly_Margin_A1==88 ps 9
548 04:52:05.614596 TrainedVREFDQ_A0==78
549 04:52:05.615103 TrainedVREFDQ_A1==75
550 04:52:05.615528 VrefDac_Margin_A0==22
551 04:52:05.619730 DeviceVref_Margin_A0==36
552 04:52:05.620231 VrefDac_Margin_A1==20
553 04:52:05.624377 DeviceVref_Margin_A1==38
554 04:52:05.624933
555 04:52:05.625404 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 04:52:05.625841
557 04:52:05.657754 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000016 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 04:52:05.658271 2D training succeed
559 04:52:05.663339 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 04:52:05.669038 auto size-- 65535DDR cs0 size: 2048MB
561 04:52:05.669492 DDR cs1 size: 2048MB
562 04:52:05.674593 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 04:52:05.675026 cs0 DataBus test pass
564 04:52:05.680235 cs1 DataBus test pass
565 04:52:05.680670 cs0 AddrBus test pass
566 04:52:05.681076 cs1 AddrBus test pass
567 04:52:05.681482
568 04:52:05.685827 100bdlr_step_size ps== 471
569 04:52:05.686267 result report
570 04:52:05.691430 boot times 0Enable ddr reg access
571 04:52:05.696704 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 04:52:05.710527 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 04:52:06.365764 bl2z: ptr: 05129330, size: 00001e40
574 04:52:06.374107 0.0;M3 CHK:0;cm4_sp_mode 0
575 04:52:06.374590 MVN_1=0x00000000
576 04:52:06.375013 MVN_2=0x00000000
577 04:52:06.384314 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 04:52:06.384784 OPS=0x04
579 04:52:06.385204 ring efuse init
580 04:52:06.387332 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 04:52:06.393701 [0.017310 Inits done]
582 04:52:06.394154 secure task start!
583 04:52:06.394564 high task start!
584 04:52:06.394966 low task start!
585 04:52:06.397790 run into bl31
586 04:52:06.406582 NOTICE: BL31: v1.3(release):4fc40b1
587 04:52:06.414583 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 04:52:06.415048 NOTICE: BL31: G12A normal boot!
589 04:52:06.429899 NOTICE: BL31: BL33 decompress pass
590 04:52:06.435515 ERROR: Error initializing runtime service opteed_fast
591 04:52:07.829047 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 04:52:07.829674 bl2_stage_init 0x01
593 04:52:07.830103 bl2_stage_init 0x81
594 04:52:07.834593 hw id: 0x0000 - pwm id 0x01
595 04:52:07.835049 bl2_stage_init 0xc1
596 04:52:07.839501 bl2_stage_init 0x02
597 04:52:07.839944
598 04:52:07.840427 L0:00000000
599 04:52:07.840840 L1:00000703
600 04:52:07.841241 L2:00008067
601 04:52:07.844991 L3:15000000
602 04:52:07.845438 S1:00000000
603 04:52:07.845846 B2:20282000
604 04:52:07.846247 B1:a0f83180
605 04:52:07.846645
606 04:52:07.847043 TE: 70178
607 04:52:07.847441
608 04:52:07.856236 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 04:52:07.856706
610 04:52:07.857123 Board ID = 1
611 04:52:07.857534 Set cpu clk to 24M
612 04:52:07.857934 Set clk81 to 24M
613 04:52:07.861844 Use GP1_pll as DSU clk.
614 04:52:07.862280 DSU clk: 1200 Mhz
615 04:52:07.862683 CPU clk: 1200 MHz
616 04:52:07.867433 Set clk81 to 166.6M
617 04:52:07.872985 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 04:52:07.873433 board id: 1
619 04:52:07.881056 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 04:52:07.891930 fw parse done
621 04:52:07.897935 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 04:52:07.940923 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 04:52:07.951932 PIEI prepare done
624 04:52:07.952425 fastboot data load
625 04:52:07.952842 fastboot data verify
626 04:52:07.957489 verify result: 266
627 04:52:07.963082 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 04:52:07.963518 LPDDR4 probe
629 04:52:07.963926 ddr clk to 1584MHz
630 04:52:07.971069 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 04:52:08.008972
632 04:52:08.009353 dmc_version 0001
633 04:52:08.015901 Check phy result
634 04:52:08.021884 INFO : End of CA training
635 04:52:08.022339 INFO : End of initialization
636 04:52:08.027479 INFO : Training has run successfully!
637 04:52:08.027927 Check phy result
638 04:52:08.033067 INFO : End of initialization
639 04:52:08.033496 INFO : End of read enable training
640 04:52:08.038662 INFO : End of fine write leveling
641 04:52:08.044380 INFO : End of Write leveling coarse delay
642 04:52:08.044831 INFO : Training has run successfully!
643 04:52:08.045237 Check phy result
644 04:52:08.049877 INFO : End of initialization
645 04:52:08.050313 INFO : End of read dq deskew training
646 04:52:08.055462 INFO : End of MPR read delay center optimization
647 04:52:08.061071 INFO : End of write delay center optimization
648 04:52:08.066690 INFO : End of read delay center optimization
649 04:52:08.067128 INFO : End of max read latency training
650 04:52:08.072368 INFO : Training has run successfully!
651 04:52:08.072801 1D training succeed
652 04:52:08.081475 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 04:52:08.129731 Check phy result
654 04:52:08.130166 INFO : End of initialization
655 04:52:08.157110 INFO : End of 2D read delay Voltage center optimization
656 04:52:08.181283 INFO : End of 2D read delay Voltage center optimization
657 04:52:08.237951 INFO : End of 2D write delay Voltage center optimization
658 04:52:08.292025 INFO : End of 2D write delay Voltage center optimization
659 04:52:08.297564 INFO : Training has run successfully!
660 04:52:08.297987
661 04:52:08.298394 channel==0
662 04:52:08.303156 RxClkDly_Margin_A0==78 ps 8
663 04:52:08.303582 TxDqDly_Margin_A0==98 ps 10
664 04:52:08.308757 RxClkDly_Margin_A1==78 ps 8
665 04:52:08.309187 TxDqDly_Margin_A1==98 ps 10
666 04:52:08.309595 TrainedVREFDQ_A0==74
667 04:52:08.314382 TrainedVREFDQ_A1==75
668 04:52:08.314809 VrefDac_Margin_A0==22
669 04:52:08.315211 DeviceVref_Margin_A0==40
670 04:52:08.319960 VrefDac_Margin_A1==23
671 04:52:08.320412 DeviceVref_Margin_A1==39
672 04:52:08.320816
673 04:52:08.321220
674 04:52:08.325552 channel==1
675 04:52:08.325978 RxClkDly_Margin_A0==88 ps 9
676 04:52:08.326381 TxDqDly_Margin_A0==98 ps 10
677 04:52:08.331137 RxClkDly_Margin_A1==78 ps 8
678 04:52:08.331565 TxDqDly_Margin_A1==78 ps 8
679 04:52:08.336764 TrainedVREFDQ_A0==78
680 04:52:08.337198 TrainedVREFDQ_A1==75
681 04:52:08.337602 VrefDac_Margin_A0==23
682 04:52:08.342385 DeviceVref_Margin_A0==36
683 04:52:08.342814 VrefDac_Margin_A1==22
684 04:52:08.347961 DeviceVref_Margin_A1==39
685 04:52:08.348411
686 04:52:08.348815 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 04:52:08.349217
688 04:52:08.381679 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 04:52:08.382150 2D training succeed
690 04:52:08.387240 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 04:52:08.392757 auto size-- 65535DDR cs0 size: 2048MB
692 04:52:08.393196 DDR cs1 size: 2048MB
693 04:52:08.398365 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 04:52:08.398801 cs0 DataBus test pass
695 04:52:08.403966 cs1 DataBus test pass
696 04:52:08.404442 cs0 AddrBus test pass
697 04:52:08.404852 cs1 AddrBus test pass
698 04:52:08.405252
699 04:52:08.409673 100bdlr_step_size ps== 478
700 04:52:08.410124 result report
701 04:52:08.415308 boot times 0Enable ddr reg access
702 04:52:08.420543 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 04:52:08.434281 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 04:52:09.094297 bl2z: ptr: 05129330, size: 00001e40
705 04:52:09.102320 0.0;M3 CHK:0;cm4_sp_mode 0
706 04:52:09.102788 MVN_1=0x00000000
707 04:52:09.103206 MVN_2=0x00000000
708 04:52:09.113804 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 04:52:09.114253 OPS=0x04
710 04:52:09.114668 ring efuse init
711 04:52:09.119506 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 04:52:09.119953 [0.017354 Inits done]
713 04:52:09.120412 secure task start!
714 04:52:09.126902 high task start!
715 04:52:09.127337 low task start!
716 04:52:09.127743 run into bl31
717 04:52:09.135546 NOTICE: BL31: v1.3(release):4fc40b1
718 04:52:09.143337 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 04:52:09.143779 NOTICE: BL31: G12A normal boot!
720 04:52:09.158861 NOTICE: BL31: BL33 decompress pass
721 04:52:09.164566 ERROR: Error initializing runtime service opteed_fast
722 04:52:09.960156
723 04:52:09.960758
724 04:52:09.965335 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 04:52:09.965784
726 04:52:09.968829 Model: Libre Computer AML-S905D3-CC Solitude
727 04:52:10.115808 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 04:52:10.131225 DRAM: 2 GiB (effective 3.8 GiB)
729 04:52:10.232195 Core: 406 devices, 33 uclasses, devicetree: separate
730 04:52:10.238081 WDT: Not starting watchdog@f0d0
731 04:52:10.263127 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 04:52:10.275378 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 04:52:10.280387 ** Bad device specification mmc 0 **
734 04:52:10.290430 Card did not respond to voltage select! : -110
735 04:52:10.298080 ** Bad device specification mmc 0 **
736 04:52:10.298523 Couldn't find partition mmc 0
737 04:52:10.306405 Card did not respond to voltage select! : -110
738 04:52:10.311930 ** Bad device specification mmc 0 **
739 04:52:10.312401 Couldn't find partition mmc 0
740 04:52:10.316995 Error: could not access storage.
741 04:52:10.613446 Net: eth0: ethernet@ff3f0000
742 04:52:10.613972 starting USB...
743 04:52:10.858093 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 04:52:10.858664 Starting the controller
745 04:52:10.865029 USB XHCI 1.10
746 04:52:12.419287 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 04:52:12.427343 scanning usb for storage devices... 0 Storage Device(s) found
749 04:52:12.478836 Hit any key to stop autoboot: 1
750 04:52:12.479608 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 04:52:12.480227 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 04:52:12.480716 Setting prompt string to ['=>']
753 04:52:12.481208 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 04:52:12.493445 0
755 04:52:12.494321 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 04:52:12.595551 => setenv autoload no
758 04:52:12.596253 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 04:52:12.601016 setenv autoload no
761 04:52:12.702444 => setenv initrd_high 0xffffffff
762 04:52:12.703061 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 04:52:12.707307 setenv initrd_high 0xffffffff
765 04:52:12.808721 => setenv fdt_high 0xffffffff
766 04:52:12.809343 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 04:52:12.813594 setenv fdt_high 0xffffffff
769 04:52:12.915002 => dhcp
770 04:52:12.915606 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 04:52:12.919737 dhcp
772 04:52:13.825734 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 04:52:13.826282 Speed: 1000, full duplex
774 04:52:13.826699 BOOTP broadcast 1
775 04:52:13.834005 DHCP client bound to address 192.168.6.21 (8 ms)
777 04:52:13.935374 => setenv serverip 192.168.6.2
778 04:52:13.935961 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 04:52:13.940487 setenv serverip 192.168.6.2
781 04:52:14.041843 => tftpboot 0x01080000 950913/tftp-deploy-mj1qv96g/kernel/uImage
782 04:52:14.042437 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 04:52:14.049011 tftpboot 0x01080000 950913/tftp-deploy-mj1qv96g/kernel/uImage
784 04:52:14.049477 Speed: 1000, full duplex
785 04:52:14.049890 Using ethernet@ff3f0000 device
786 04:52:14.054631 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 04:52:14.060111 Filename '950913/tftp-deploy-mj1qv96g/kernel/uImage'.
788 04:52:14.064078 Load address: 0x1080000
789 04:52:16.858631 Loading: *################################################## 43.6 MiB
790 04:52:16.859263 15.6 MiB/s
791 04:52:16.859706 done
792 04:52:16.862461 Bytes transferred = 45713984 (2b98a40 hex)
794 04:52:16.963962 => tftpboot 0x08000000 950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
795 04:52:16.964696 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
796 04:52:16.971655 tftpboot 0x08000000 950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot
797 04:52:16.972147 Speed: 1000, full duplex
798 04:52:16.972550 Using ethernet@ff3f0000 device
799 04:52:16.977328 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 04:52:16.986770 Filename '950913/tftp-deploy-mj1qv96g/ramdisk/ramdisk.cpio.gz.uboot'.
801 04:52:16.987261 Load address: 0x8000000
802 04:52:18.446315 Loading: *################################################# UDP wrong checksum 00000005 00008d04
803 04:52:23.448108 T UDP wrong checksum 00000005 00008d04
804 04:52:33.450096 T T UDP wrong checksum 00000005 00008d04
805 04:52:53.454181 T T T T UDP wrong checksum 00000005 00008d04
806 04:53:13.458768 T T T
807 04:53:13.459455 Retry count exceeded; starting again
809 04:53:13.460997 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
812 04:53:13.463052 end: 2.4 uboot-commands (duration 00:01:20) [common]
814 04:53:13.464655 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
816 04:53:13.465749 end: 2 uboot-action (duration 00:01:20) [common]
818 04:53:13.467405 Cleaning after the job
819 04:53:13.468019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/ramdisk
820 04:53:13.469393 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/kernel
821 04:53:13.507159 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/dtb
822 04:53:13.507943 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/nfsrootfs
823 04:53:13.831255 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950913/tftp-deploy-mj1qv96g/modules
824 04:53:13.853199 start: 4.1 power-off (timeout 00:00:30) [common]
825 04:53:13.853879 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
826 04:53:13.886541 >> OK - accepted request
827 04:53:13.888657 Returned 0 in 0 seconds
828 04:53:13.989393 end: 4.1 power-off (duration 00:00:00) [common]
830 04:53:13.990312 start: 4.2 read-feedback (timeout 00:10:00) [common]
831 04:53:13.990976 Listened to connection for namespace 'common' for up to 1s
832 04:53:14.991927 Finalising connection for namespace 'common'
833 04:53:14.992435 Disconnecting from shell: Finalise
834 04:53:14.992732 =>
835 04:53:15.093443 end: 4.2 read-feedback (duration 00:00:01) [common]
836 04:53:15.093856 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950913
837 04:53:17.616816 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950913
838 04:53:17.617434 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.