Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:56:11.253567 lava-dispatcher, installed at version: 2024.01
2 04:56:11.254364 start: 0 validate
3 04:56:11.254844 Start time: 2024-11-07 04:56:11.254813+00:00 (UTC)
4 04:56:11.255383 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:56:11.255930 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:56:11.295385 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:56:11.295931 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:56:11.328548 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:56:11.329175 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:56:11.359109 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:56:11.359604 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:56:11.392769 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:56:11.393272 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-235-gf366870b9966d%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:56:11.432986 validate duration: 0.18
16 04:56:11.433841 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:56:11.434172 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:56:11.434502 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:56:11.435086 Not decompressing ramdisk as can be used compressed.
20 04:56:11.435524 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:56:11.435810 saving as /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/ramdisk/initrd.cpio.gz
22 04:56:11.436115 total size: 5628140 (5 MB)
23 04:56:11.473208 progress 0 % (0 MB)
24 04:56:11.480662 progress 5 % (0 MB)
25 04:56:11.488437 progress 10 % (0 MB)
26 04:56:11.495296 progress 15 % (0 MB)
27 04:56:11.499591 progress 20 % (1 MB)
28 04:56:11.503210 progress 25 % (1 MB)
29 04:56:11.507224 progress 30 % (1 MB)
30 04:56:11.511233 progress 35 % (1 MB)
31 04:56:11.514818 progress 40 % (2 MB)
32 04:56:11.518785 progress 45 % (2 MB)
33 04:56:11.522369 progress 50 % (2 MB)
34 04:56:11.526390 progress 55 % (2 MB)
35 04:56:11.530374 progress 60 % (3 MB)
36 04:56:11.533904 progress 65 % (3 MB)
37 04:56:11.537959 progress 70 % (3 MB)
38 04:56:11.541559 progress 75 % (4 MB)
39 04:56:11.545553 progress 80 % (4 MB)
40 04:56:11.549166 progress 85 % (4 MB)
41 04:56:11.553061 progress 90 % (4 MB)
42 04:56:11.556960 progress 95 % (5 MB)
43 04:56:11.560191 progress 100 % (5 MB)
44 04:56:11.560854 5 MB downloaded in 0.12 s (43.03 MB/s)
45 04:56:11.561407 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:56:11.562326 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:56:11.562641 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:56:11.562931 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:56:11.563426 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/kernel/Image
51 04:56:11.563706 saving as /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/kernel/Image
52 04:56:11.563928 total size: 45713920 (43 MB)
53 04:56:11.564176 No compression specified
54 04:56:11.603646 progress 0 % (0 MB)
55 04:56:11.632905 progress 5 % (2 MB)
56 04:56:11.664126 progress 10 % (4 MB)
57 04:56:11.693489 progress 15 % (6 MB)
58 04:56:11.722820 progress 20 % (8 MB)
59 04:56:11.751828 progress 25 % (10 MB)
60 04:56:11.781083 progress 30 % (13 MB)
61 04:56:11.810407 progress 35 % (15 MB)
62 04:56:11.839605 progress 40 % (17 MB)
63 04:56:11.868619 progress 45 % (19 MB)
64 04:56:11.898258 progress 50 % (21 MB)
65 04:56:11.927546 progress 55 % (24 MB)
66 04:56:11.957042 progress 60 % (26 MB)
67 04:56:11.986166 progress 65 % (28 MB)
68 04:56:12.015705 progress 70 % (30 MB)
69 04:56:12.044944 progress 75 % (32 MB)
70 04:56:12.074348 progress 80 % (34 MB)
71 04:56:12.103435 progress 85 % (37 MB)
72 04:56:12.133042 progress 90 % (39 MB)
73 04:56:12.162478 progress 95 % (41 MB)
74 04:56:12.191022 progress 100 % (43 MB)
75 04:56:12.191540 43 MB downloaded in 0.63 s (69.46 MB/s)
76 04:56:12.192047 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:56:12.192878 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:56:12.193159 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:56:12.193430 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:56:12.193897 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:56:12.194170 saving as /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:56:12.194381 total size: 54703 (0 MB)
84 04:56:12.194592 No compression specified
85 04:56:12.234108 progress 59 % (0 MB)
86 04:56:12.234956 progress 100 % (0 MB)
87 04:56:12.235500 0 MB downloaded in 0.04 s (1.27 MB/s)
88 04:56:12.235959 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:56:12.236832 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:56:12.237103 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:56:12.237369 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:56:12.237823 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:56:12.238069 saving as /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/nfsrootfs/full.rootfs.tar
95 04:56:12.238276 total size: 474398908 (452 MB)
96 04:56:12.238487 Using unxz to decompress xz
97 04:56:12.276082 progress 0 % (0 MB)
98 04:56:13.374128 progress 5 % (22 MB)
99 04:56:14.841114 progress 10 % (45 MB)
100 04:56:15.297229 progress 15 % (67 MB)
101 04:56:16.155130 progress 20 % (90 MB)
102 04:56:16.695678 progress 25 % (113 MB)
103 04:56:17.056477 progress 30 % (135 MB)
104 04:56:17.663449 progress 35 % (158 MB)
105 04:56:18.601137 progress 40 % (181 MB)
106 04:56:19.476032 progress 45 % (203 MB)
107 04:56:20.236558 progress 50 % (226 MB)
108 04:56:21.037639 progress 55 % (248 MB)
109 04:56:22.257481 progress 60 % (271 MB)
110 04:56:23.760036 progress 65 % (294 MB)
111 04:56:25.421472 progress 70 % (316 MB)
112 04:56:28.487715 progress 75 % (339 MB)
113 04:56:30.900817 progress 80 % (361 MB)
114 04:56:33.796976 progress 85 % (384 MB)
115 04:56:36.961156 progress 90 % (407 MB)
116 04:56:40.154143 progress 95 % (429 MB)
117 04:56:43.341863 progress 100 % (452 MB)
118 04:56:43.355182 452 MB downloaded in 31.12 s (14.54 MB/s)
119 04:56:43.355902 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:56:43.357494 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:56:43.357784 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:56:43.358065 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:56:43.358641 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-235-gf366870b9966d/arm64/defconfig/gcc-12/modules.tar.xz
125 04:56:43.358922 saving as /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/modules/modules.tar
126 04:56:43.359130 total size: 11607584 (11 MB)
127 04:56:43.359348 Using unxz to decompress xz
128 04:56:43.406129 progress 0 % (0 MB)
129 04:56:43.473213 progress 5 % (0 MB)
130 04:56:43.548207 progress 10 % (1 MB)
131 04:56:43.643874 progress 15 % (1 MB)
132 04:56:43.734205 progress 20 % (2 MB)
133 04:56:43.814116 progress 25 % (2 MB)
134 04:56:43.889119 progress 30 % (3 MB)
135 04:56:43.962547 progress 35 % (3 MB)
136 04:56:44.040548 progress 40 % (4 MB)
137 04:56:44.116308 progress 45 % (5 MB)
138 04:56:44.202134 progress 50 % (5 MB)
139 04:56:44.278586 progress 55 % (6 MB)
140 04:56:44.363779 progress 60 % (6 MB)
141 04:56:44.445419 progress 65 % (7 MB)
142 04:56:44.521427 progress 70 % (7 MB)
143 04:56:44.603555 progress 75 % (8 MB)
144 04:56:44.686574 progress 80 % (8 MB)
145 04:56:44.766253 progress 85 % (9 MB)
146 04:56:44.844558 progress 90 % (9 MB)
147 04:56:44.923379 progress 95 % (10 MB)
148 04:56:45.001739 progress 100 % (11 MB)
149 04:56:45.012741 11 MB downloaded in 1.65 s (6.69 MB/s)
150 04:56:45.013325 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:56:45.014196 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:56:45.014470 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 04:56:45.014738 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 04:57:00.155923 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950965/extract-nfsrootfs-w7zvbd95
156 04:57:00.156525 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 04:57:00.156811 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:57:00.157437 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm
159 04:57:00.157881 makedir: /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin
160 04:57:00.158231 makedir: /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/tests
161 04:57:00.158544 makedir: /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/results
162 04:57:00.158870 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-add-keys
163 04:57:00.159394 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-add-sources
164 04:57:00.159887 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-background-process-start
165 04:57:00.160404 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-background-process-stop
166 04:57:00.160956 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-common-functions
167 04:57:00.161464 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-echo-ipv4
168 04:57:00.161956 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-install-packages
169 04:57:00.162451 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-installed-packages
170 04:57:00.162913 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-os-build
171 04:57:00.163376 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-probe-channel
172 04:57:00.163838 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-probe-ip
173 04:57:00.164348 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-target-ip
174 04:57:00.164817 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-target-mac
175 04:57:00.165373 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-target-storage
176 04:57:00.165880 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-case
177 04:57:00.166370 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-event
178 04:57:00.166834 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-feedback
179 04:57:00.167298 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-raise
180 04:57:00.167755 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-reference
181 04:57:00.168243 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-runner
182 04:57:00.168718 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-set
183 04:57:00.169176 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-test-shell
184 04:57:00.169675 Updating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-install-packages (oe)
185 04:57:00.170217 Updating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/bin/lava-installed-packages (oe)
186 04:57:00.170651 Creating /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/environment
187 04:57:00.171012 LAVA metadata
188 04:57:00.171264 - LAVA_JOB_ID=950965
189 04:57:00.171477 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:57:00.171829 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:57:00.172817 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:57:00.173125 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:57:00.173336 skipped lava-vland-overlay
194 04:57:00.173577 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:57:00.173832 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:57:00.174050 skipped lava-multinode-overlay
197 04:57:00.174292 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:57:00.174542 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:57:00.174798 Loading test definitions
200 04:57:00.175084 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:57:00.175305 Using /lava-950965 at stage 0
202 04:57:00.176468 uuid=950965_1.6.2.4.1 testdef=None
203 04:57:00.176772 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:57:00.177033 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:57:00.178770 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:57:00.179556 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:57:00.181717 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:57:00.182545 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:57:00.184611 runner path: /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 950965_1.6.2.4.1
212 04:57:00.185151 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:57:00.185902 Creating lava-test-runner.conf files
215 04:57:00.186103 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950965/lava-overlay-s4b6bcmm/lava-950965/0 for stage 0
216 04:57:00.186444 - 0_v4l2-decoder-conformance-vp9
217 04:57:00.186779 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:57:00.187048 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:57:00.208215 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:57:00.208618 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:57:00.208884 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:57:00.209149 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:57:00.209409 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:57:00.818344 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:57:00.818791 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 04:57:00.819038 extracting modules file /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950965/extract-nfsrootfs-w7zvbd95
227 04:57:02.177415 extracting modules file /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk
228 04:57:03.562848 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:57:03.563354 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 04:57:03.563632 [common] Applying overlay to NFS
231 04:57:03.563847 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950965/compress-overlay-qvt097ez/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950965/extract-nfsrootfs-w7zvbd95
232 04:57:03.594862 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:57:03.595329 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 04:57:03.595606 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 04:57:03.595837 Converting downloaded kernel to a uImage
236 04:57:03.596192 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/kernel/Image /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/kernel/uImage
237 04:57:04.076691 output: Image Name:
238 04:57:04.077120 output: Created: Thu Nov 7 04:57:03 2024
239 04:57:04.077334 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:57:04.077541 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:57:04.077744 output: Load Address: 01080000
242 04:57:04.077944 output: Entry Point: 01080000
243 04:57:04.078142 output:
244 04:57:04.078482 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:57:04.078750 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:57:04.079019 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:57:04.079274 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:57:04.079535 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:57:04.079790 Building ramdisk /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk
250 04:57:06.187661 >> 166792 blocks
251 04:57:13.917009 Adding RAMdisk u-boot header.
252 04:57:13.917451 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk.cpio.gz.uboot
253 04:57:14.153467 output: Image Name:
254 04:57:14.153879 output: Created: Thu Nov 7 04:57:13 2024
255 04:57:14.154094 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:57:14.154301 output: Data Size: 23432085 Bytes = 22882.90 KiB = 22.35 MiB
257 04:57:14.154503 output: Load Address: 00000000
258 04:57:14.154702 output: Entry Point: 00000000
259 04:57:14.154899 output:
260 04:57:14.155518 rename /var/lib/lava/dispatcher/tmp/950965/extract-overlay-ramdisk-8jntq167/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
261 04:57:14.155938 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:57:14.156535 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 04:57:14.157128 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 04:57:14.157634 No LXC device requested
265 04:57:14.158189 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:57:14.158755 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 04:57:14.159300 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:57:14.159753 Checking files for TFTP limit of 4294967296 bytes.
269 04:57:14.162724 end: 1 tftp-deploy (duration 00:01:03) [common]
270 04:57:14.163367 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:57:14.163942 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:57:14.164606 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:57:14.165168 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:57:14.165751 Using kernel file from prepare-kernel: 950965/tftp-deploy-b1ppph32/kernel/uImage
275 04:57:14.166449 substitutions:
276 04:57:14.166897 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:57:14.167340 - {DTB_ADDR}: 0x01070000
278 04:57:14.167783 - {DTB}: 950965/tftp-deploy-b1ppph32/dtb/meson-g12b-a311d-libretech-cc.dtb
279 04:57:14.168258 - {INITRD}: 950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
280 04:57:14.168698 - {KERNEL_ADDR}: 0x01080000
281 04:57:14.169132 - {KERNEL}: 950965/tftp-deploy-b1ppph32/kernel/uImage
282 04:57:14.169568 - {LAVA_MAC}: None
283 04:57:14.170044 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950965/extract-nfsrootfs-w7zvbd95
284 04:57:14.170482 - {NFS_SERVER_IP}: 192.168.6.2
285 04:57:14.170913 - {PRESEED_CONFIG}: None
286 04:57:14.171342 - {PRESEED_LOCAL}: None
287 04:57:14.171771 - {RAMDISK_ADDR}: 0x08000000
288 04:57:14.172230 - {RAMDISK}: 950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
289 04:57:14.172661 - {ROOT_PART}: None
290 04:57:14.173095 - {ROOT}: None
291 04:57:14.173523 - {SERVER_IP}: 192.168.6.2
292 04:57:14.173948 - {TEE_ADDR}: 0x83000000
293 04:57:14.174374 - {TEE}: None
294 04:57:14.174800 Parsed boot commands:
295 04:57:14.175217 - setenv autoload no
296 04:57:14.175644 - setenv initrd_high 0xffffffff
297 04:57:14.176097 - setenv fdt_high 0xffffffff
298 04:57:14.176532 - dhcp
299 04:57:14.176958 - setenv serverip 192.168.6.2
300 04:57:14.177385 - tftpboot 0x01080000 950965/tftp-deploy-b1ppph32/kernel/uImage
301 04:57:14.177812 - tftpboot 0x08000000 950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
302 04:57:14.178239 - tftpboot 0x01070000 950965/tftp-deploy-b1ppph32/dtb/meson-g12b-a311d-libretech-cc.dtb
303 04:57:14.178667 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950965/extract-nfsrootfs-w7zvbd95,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:57:14.179108 - bootm 0x01080000 0x08000000 0x01070000
305 04:57:14.179661 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:57:14.181322 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:57:14.181786 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 04:57:14.196691 Setting prompt string to ['lava-test: # ']
310 04:57:14.198324 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:57:14.198979 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:57:14.199571 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:57:14.200383 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:57:14.201650 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 04:57:14.238409 >> OK - accepted request
316 04:57:14.240811 Returned 0 in 0 seconds
317 04:57:14.342004 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:57:14.343769 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:57:14.344467 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:57:14.345038 Setting prompt string to ['Hit any key to stop autoboot']
322 04:57:14.345557 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:57:14.347277 Trying 192.168.56.21...
324 04:57:14.347797 Connected to conserv1.
325 04:57:14.348314 Escape character is '^]'.
326 04:57:14.348781
327 04:57:14.349253 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:57:14.349711
329 04:57:25.842698 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 04:57:25.843350 bl2_stage_init 0x01
331 04:57:25.843817 bl2_stage_init 0x81
332 04:57:25.848224 hw id: 0x0000 - pwm id 0x01
333 04:57:25.848732 bl2_stage_init 0xc1
334 04:57:25.849178 bl2_stage_init 0x02
335 04:57:25.849615
336 04:57:25.853830 L0:00000000
337 04:57:25.854318 L1:20000703
338 04:57:25.854759 L2:00008067
339 04:57:25.855189 L3:14000000
340 04:57:25.859438 B2:00402000
341 04:57:25.859918 B1:e0f83180
342 04:57:25.860409
343 04:57:25.860853 TE: 58124
344 04:57:25.861289
345 04:57:25.865182 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 04:57:25.865652
347 04:57:25.866092 Board ID = 1
348 04:57:25.870755 Set A53 clk to 24M
349 04:57:25.871225 Set A73 clk to 24M
350 04:57:25.871661 Set clk81 to 24M
351 04:57:25.876299 A53 clk: 1200 MHz
352 04:57:25.876766 A73 clk: 1200 MHz
353 04:57:25.877202 CLK81: 166.6M
354 04:57:25.877627 smccc: 00012a92
355 04:57:25.881873 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 04:57:25.887464 board id: 1
357 04:57:25.892399 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:57:25.904048 fw parse done
359 04:57:25.908960 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:57:25.951931 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:57:25.963602 PIEI prepare done
362 04:57:25.964095 fastboot data load
363 04:57:25.964540 fastboot data verify
364 04:57:25.969122 verify result: 266
365 04:57:25.974698 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 04:57:25.975164 LPDDR4 probe
367 04:57:25.975604 ddr clk to 1584MHz
368 04:57:25.981768 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:57:26.019069
370 04:57:26.019551 dmc_version 0001
371 04:57:26.025723 Check phy result
372 04:57:26.032507 INFO : End of CA training
373 04:57:26.032972 INFO : End of initialization
374 04:57:26.038098 INFO : Training has run successfully!
375 04:57:26.038562 Check phy result
376 04:57:26.043660 INFO : End of initialization
377 04:57:26.044156 INFO : End of read enable training
378 04:57:26.049261 INFO : End of fine write leveling
379 04:57:26.054932 INFO : End of Write leveling coarse delay
380 04:57:26.055412 INFO : Training has run successfully!
381 04:57:26.055854 Check phy result
382 04:57:26.060468 INFO : End of initialization
383 04:57:26.060942 INFO : End of read dq deskew training
384 04:57:26.066070 INFO : End of MPR read delay center optimization
385 04:57:26.071675 INFO : End of write delay center optimization
386 04:57:26.077289 INFO : End of read delay center optimization
387 04:57:26.077755 INFO : End of max read latency training
388 04:57:26.082964 INFO : Training has run successfully!
389 04:57:26.083452 1D training succeed
390 04:57:26.091154 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:57:26.138710 Check phy result
392 04:57:26.139210 INFO : End of initialization
393 04:57:26.161185 INFO : End of 2D read delay Voltage center optimization
394 04:57:26.182353 INFO : End of 2D read delay Voltage center optimization
395 04:57:26.233353 INFO : End of 2D write delay Voltage center optimization
396 04:57:26.283447 INFO : End of 2D write delay Voltage center optimization
397 04:57:26.288985 INFO : Training has run successfully!
398 04:57:26.289480
399 04:57:26.289929 channel==0
400 04:57:26.294584 RxClkDly_Margin_A0==88 ps 9
401 04:57:26.295047 TxDqDly_Margin_A0==98 ps 10
402 04:57:26.297863 RxClkDly_Margin_A1==88 ps 9
403 04:57:26.298373 TxDqDly_Margin_A1==98 ps 10
404 04:57:26.303410 TrainedVREFDQ_A0==74
405 04:57:26.303882 TrainedVREFDQ_A1==74
406 04:57:26.309067 VrefDac_Margin_A0==24
407 04:57:26.309535 DeviceVref_Margin_A0==40
408 04:57:26.309974 VrefDac_Margin_A1==25
409 04:57:26.314584 DeviceVref_Margin_A1==40
410 04:57:26.315047
411 04:57:26.315485
412 04:57:26.315924 channel==1
413 04:57:26.316398 RxClkDly_Margin_A0==98 ps 10
414 04:57:26.317944 TxDqDly_Margin_A0==98 ps 10
415 04:57:26.323509 RxClkDly_Margin_A1==98 ps 10
416 04:57:26.323973 TxDqDly_Margin_A1==88 ps 9
417 04:57:26.329107 TrainedVREFDQ_A0==77
418 04:57:26.329575 TrainedVREFDQ_A1==77
419 04:57:26.330018 VrefDac_Margin_A0==22
420 04:57:26.334708 DeviceVref_Margin_A0==37
421 04:57:26.335170 VrefDac_Margin_A1==22
422 04:57:26.335604 DeviceVref_Margin_A1==37
423 04:57:26.336065
424 04:57:26.340315 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:57:26.340783
426 04:57:26.373985 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 04:57:26.374573 2D training succeed
428 04:57:26.379609 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:57:26.385251 auto size-- 65535DDR cs0 size: 2048MB
430 04:57:26.385734 DDR cs1 size: 2048MB
431 04:57:26.390805 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:57:26.391277 cs0 DataBus test pass
433 04:57:26.391682 cs1 DataBus test pass
434 04:57:26.396411 cs0 AddrBus test pass
435 04:57:26.396880 cs1 AddrBus test pass
436 04:57:26.397283
437 04:57:26.402041 100bdlr_step_size ps== 420
438 04:57:26.402527 result report
439 04:57:26.402952 boot times 0Enable ddr reg access
440 04:57:26.412088 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:57:26.425489 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 04:57:26.997555 0.0;M3 CHK:0;cm4_sp_mode 0
443 04:57:26.998155 MVN_1=0x00000000
444 04:57:27.003178 MVN_2=0x00000000
445 04:57:27.008854 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 04:57:27.009377 OPS=0x10
447 04:57:27.009807 ring efuse init
448 04:57:27.010222 chipver efuse init
449 04:57:27.014429 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 04:57:27.020077 [0.018961 Inits done]
451 04:57:27.020601 secure task start!
452 04:57:27.021027 high task start!
453 04:57:27.024618 low task start!
454 04:57:27.025126 run into bl31
455 04:57:27.031308 NOTICE: BL31: v1.3(release):4fc40b1
456 04:57:27.039082 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 04:57:27.039586 NOTICE: BL31: G12A normal boot!
458 04:57:27.064428 NOTICE: BL31: BL33 decompress pass
459 04:57:27.070158 ERROR: Error initializing runtime service opteed_fast
460 04:57:28.303017
461 04:57:28.303630
462 04:57:28.311396 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 04:57:28.311922
464 04:57:28.312398 Model: Libre Computer AML-A311D-CC Alta
465 04:57:28.519844 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 04:57:28.543255 DRAM: 2 GiB (effective 3.8 GiB)
467 04:57:28.686265 Core: 408 devices, 31 uclasses, devicetree: separate
468 04:57:28.692123 WDT: Not starting watchdog@f0d0
469 04:57:28.724356 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 04:57:28.736775 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 04:57:28.741791 ** Bad device specification mmc 0 **
472 04:57:28.752165 Card did not respond to voltage select! : -110
473 04:57:28.759776 ** Bad device specification mmc 0 **
474 04:57:28.760312 Couldn't find partition mmc 0
475 04:57:28.768118 Card did not respond to voltage select! : -110
476 04:57:28.773627 ** Bad device specification mmc 0 **
477 04:57:28.774120 Couldn't find partition mmc 0
478 04:57:28.778693 Error: could not access storage.
479 04:57:30.043275 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 04:57:30.043885 bl2_stage_init 0x01
481 04:57:30.044378 bl2_stage_init 0x81
482 04:57:30.049008 hw id: 0x0000 - pwm id 0x01
483 04:57:30.049502 bl2_stage_init 0xc1
484 04:57:30.049923 bl2_stage_init 0x02
485 04:57:30.050332
486 04:57:30.054522 L0:00000000
487 04:57:30.055004 L1:20000703
488 04:57:30.055422 L2:00008067
489 04:57:30.055829 L3:14000000
490 04:57:30.060074 B2:00402000
491 04:57:30.060569 B1:e0f83180
492 04:57:30.060987
493 04:57:30.061396 TE: 58124
494 04:57:30.061802
495 04:57:30.065803 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 04:57:30.066293
497 04:57:30.066714 Board ID = 1
498 04:57:30.071316 Set A53 clk to 24M
499 04:57:30.071797 Set A73 clk to 24M
500 04:57:30.072249 Set clk81 to 24M
501 04:57:30.076927 A53 clk: 1200 MHz
502 04:57:30.077408 A73 clk: 1200 MHz
503 04:57:30.077829 CLK81: 166.6M
504 04:57:30.078241 smccc: 00012a91
505 04:57:30.082422 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 04:57:30.088035 board id: 1
507 04:57:30.094019 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 04:57:30.104621 fw parse done
509 04:57:30.110630 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 04:57:30.153133 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 04:57:30.164066 PIEI prepare done
512 04:57:30.164553 fastboot data load
513 04:57:30.164976 fastboot data verify
514 04:57:30.169725 verify result: 266
515 04:57:30.175250 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 04:57:30.175736 LPDDR4 probe
517 04:57:30.176203 ddr clk to 1584MHz
518 04:57:30.183206 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 04:57:30.219597
520 04:57:30.220140 dmc_version 0001
521 04:57:30.227190 Check phy result
522 04:57:30.233044 INFO : End of CA training
523 04:57:30.233526 INFO : End of initialization
524 04:57:30.238732 INFO : Training has run successfully!
525 04:57:30.239213 Check phy result
526 04:57:30.244253 INFO : End of initialization
527 04:57:30.244734 INFO : End of read enable training
528 04:57:30.249867 INFO : End of fine write leveling
529 04:57:30.255461 INFO : End of Write leveling coarse delay
530 04:57:30.255956 INFO : Training has run successfully!
531 04:57:30.256414 Check phy result
532 04:57:30.261065 INFO : End of initialization
533 04:57:30.261562 INFO : End of read dq deskew training
534 04:57:30.266752 INFO : End of MPR read delay center optimization
535 04:57:30.272262 INFO : End of write delay center optimization
536 04:57:30.277850 INFO : End of read delay center optimization
537 04:57:30.278331 INFO : End of max read latency training
538 04:57:30.283521 INFO : Training has run successfully!
539 04:57:30.284048 1D training succeed
540 04:57:30.293286 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 04:57:30.340198 Check phy result
542 04:57:30.340556 INFO : End of initialization
543 04:57:30.362781 INFO : End of 2D read delay Voltage center optimization
544 04:57:30.382962 INFO : End of 2D read delay Voltage center optimization
545 04:57:30.435060 INFO : End of 2D write delay Voltage center optimization
546 04:57:30.484490 INFO : End of 2D write delay Voltage center optimization
547 04:57:30.490055 INFO : Training has run successfully!
548 04:57:30.490353
549 04:57:30.490587 channel==0
550 04:57:30.495514 RxClkDly_Margin_A0==88 ps 9
551 04:57:30.495957 TxDqDly_Margin_A0==98 ps 10
552 04:57:30.501155 RxClkDly_Margin_A1==88 ps 9
553 04:57:30.501585 TxDqDly_Margin_A1==98 ps 10
554 04:57:30.501933 TrainedVREFDQ_A0==74
555 04:57:30.506795 TrainedVREFDQ_A1==74
556 04:57:30.507099 VrefDac_Margin_A0==25
557 04:57:30.507314 DeviceVref_Margin_A0==40
558 04:57:30.512429 VrefDac_Margin_A1==25
559 04:57:30.512889 DeviceVref_Margin_A1==40
560 04:57:30.513237
561 04:57:30.513570
562 04:57:30.518040 channel==1
563 04:57:30.518354 RxClkDly_Margin_A0==98 ps 10
564 04:57:30.518576 TxDqDly_Margin_A0==98 ps 10
565 04:57:30.523620 RxClkDly_Margin_A1==98 ps 10
566 04:57:30.524134 TxDqDly_Margin_A1==88 ps 9
567 04:57:30.529249 TrainedVREFDQ_A0==77
568 04:57:30.529720 TrainedVREFDQ_A1==77
569 04:57:30.530002 VrefDac_Margin_A0==22
570 04:57:30.534839 DeviceVref_Margin_A0==37
571 04:57:30.535193 VrefDac_Margin_A1==24
572 04:57:30.540462 DeviceVref_Margin_A1==37
573 04:57:30.540969
574 04:57:30.541342 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 04:57:30.545919
576 04:57:30.574065 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 04:57:30.574468 2D training succeed
578 04:57:30.579643 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 04:57:30.585098 auto size-- 65535DDR cs0 size: 2048MB
580 04:57:30.585648 DDR cs1 size: 2048MB
581 04:57:30.590707 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 04:57:30.591177 cs0 DataBus test pass
583 04:57:30.596319 cs1 DataBus test pass
584 04:57:30.596781 cs0 AddrBus test pass
585 04:57:30.597203 cs1 AddrBus test pass
586 04:57:30.597616
587 04:57:30.601883 100bdlr_step_size ps== 420
588 04:57:30.602356 result report
589 04:57:30.607516 boot times 0Enable ddr reg access
590 04:57:30.612957 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 04:57:30.626427 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 04:57:31.199580 0.0;M3 CHK:0;cm4_sp_mode 0
593 04:57:31.200228 MVN_1=0x00000000
594 04:57:31.205037 MVN_2=0x00000000
595 04:57:31.210822 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 04:57:31.211376 OPS=0x10
597 04:57:31.211852 ring efuse init
598 04:57:31.212299 chipver efuse init
599 04:57:31.216399 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 04:57:31.221944 [0.018961 Inits done]
601 04:57:31.222396 secure task start!
602 04:57:31.222796 high task start!
603 04:57:31.226525 low task start!
604 04:57:31.226969 run into bl31
605 04:57:31.233190 NOTICE: BL31: v1.3(release):4fc40b1
606 04:57:31.240995 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 04:57:31.241443 NOTICE: BL31: G12A normal boot!
608 04:57:31.266942 NOTICE: BL31: BL33 decompress pass
609 04:57:31.272612 ERROR: Error initializing runtime service opteed_fast
610 04:57:32.505626
611 04:57:32.506283
612 04:57:32.513882 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 04:57:32.514368
614 04:57:32.514802 Model: Libre Computer AML-A311D-CC Alta
615 04:57:32.722270 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 04:57:32.745659 DRAM: 2 GiB (effective 3.8 GiB)
617 04:57:32.888622 Core: 408 devices, 31 uclasses, devicetree: separate
618 04:57:32.894560 WDT: Not starting watchdog@f0d0
619 04:57:32.926853 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 04:57:32.939255 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 04:57:32.944232 ** Bad device specification mmc 0 **
622 04:57:32.954556 Card did not respond to voltage select! : -110
623 04:57:32.962211 ** Bad device specification mmc 0 **
624 04:57:32.962669 Couldn't find partition mmc 0
625 04:57:32.970549 Card did not respond to voltage select! : -110
626 04:57:32.976079 ** Bad device specification mmc 0 **
627 04:57:32.976530 Couldn't find partition mmc 0
628 04:57:32.981145 Error: could not access storage.
629 04:57:33.324670 Net: eth0: ethernet@ff3f0000
630 04:57:33.325188 starting USB...
631 04:57:33.576504 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 04:57:33.577119 Starting the controller
633 04:57:33.583433 USB XHCI 1.10
634 04:57:35.294798 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 04:57:35.295399 bl2_stage_init 0x81
636 04:57:35.300338 hw id: 0x0000 - pwm id 0x01
637 04:57:35.300797 bl2_stage_init 0xc1
638 04:57:35.301216 bl2_stage_init 0x02
639 04:57:35.301626
640 04:57:35.305926 L0:00000000
641 04:57:35.306373 L1:20000703
642 04:57:35.306786 L2:00008067
643 04:57:35.307192 L3:14000000
644 04:57:35.307594 B2:00402000
645 04:57:35.311516 B1:e0f83180
646 04:57:35.311972
647 04:57:35.312428 TE: 58150
648 04:57:35.312842
649 04:57:35.317250 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 04:57:35.317704
651 04:57:35.318124 Board ID = 1
652 04:57:35.324807 Set A53 clk to 24M
653 04:57:35.325254 Set A73 clk to 24M
654 04:57:35.325666 Set clk81 to 24M
655 04:57:35.328457 A53 clk: 1200 MHz
656 04:57:35.328899 A73 clk: 1200 MHz
657 04:57:35.329309 CLK81: 166.6M
658 04:57:35.329714 smccc: 00012aac
659 04:57:35.334040 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 04:57:35.339583 board id: 1
661 04:57:35.345348 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 04:57:35.356044 fw parse done
663 04:57:35.361956 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 04:57:35.404632 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 04:57:35.415501 PIEI prepare done
666 04:57:35.416034 fastboot data load
667 04:57:35.416480 fastboot data verify
668 04:57:35.421233 verify result: 266
669 04:57:35.426742 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 04:57:35.427198 LPDDR4 probe
671 04:57:35.427617 ddr clk to 1584MHz
672 04:57:35.434741 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 04:57:35.471956
674 04:57:35.472437 dmc_version 0001
675 04:57:35.478661 Check phy result
676 04:57:35.484556 INFO : End of CA training
677 04:57:35.485001 INFO : End of initialization
678 04:57:35.490122 INFO : Training has run successfully!
679 04:57:35.490571 Check phy result
680 04:57:35.495775 INFO : End of initialization
681 04:57:35.496256 INFO : End of read enable training
682 04:57:35.501372 INFO : End of fine write leveling
683 04:57:35.506972 INFO : End of Write leveling coarse delay
684 04:57:35.507421 INFO : Training has run successfully!
685 04:57:35.507834 Check phy result
686 04:57:35.512517 INFO : End of initialization
687 04:57:35.512970 INFO : End of read dq deskew training
688 04:57:35.518124 INFO : End of MPR read delay center optimization
689 04:57:35.523721 INFO : End of write delay center optimization
690 04:57:35.529321 INFO : End of read delay center optimization
691 04:57:35.529786 INFO : End of max read latency training
692 04:57:35.534929 INFO : Training has run successfully!
693 04:57:35.535389 1D training succeed
694 04:57:35.544154 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 04:57:35.591900 Check phy result
696 04:57:35.592423 INFO : End of initialization
697 04:57:35.614481 INFO : End of 2D read delay Voltage center optimization
698 04:57:35.634799 INFO : End of 2D read delay Voltage center optimization
699 04:57:35.686808 INFO : End of 2D write delay Voltage center optimization
700 04:57:35.736023 INFO : End of 2D write delay Voltage center optimization
701 04:57:35.741659 INFO : Training has run successfully!
702 04:57:35.742113
703 04:57:35.742530 channel==0
704 04:57:35.747201 RxClkDly_Margin_A0==88 ps 9
705 04:57:35.747645 TxDqDly_Margin_A0==98 ps 10
706 04:57:35.752791 RxClkDly_Margin_A1==88 ps 9
707 04:57:35.753237 TxDqDly_Margin_A1==98 ps 10
708 04:57:35.753650 TrainedVREFDQ_A0==74
709 04:57:35.758448 TrainedVREFDQ_A1==74
710 04:57:35.758895 VrefDac_Margin_A0==25
711 04:57:35.759306 DeviceVref_Margin_A0==40
712 04:57:35.764029 VrefDac_Margin_A1==25
713 04:57:35.764476 DeviceVref_Margin_A1==40
714 04:57:35.764889
715 04:57:35.765297
716 04:57:35.769668 channel==1
717 04:57:35.770116 RxClkDly_Margin_A0==98 ps 10
718 04:57:35.770524 TxDqDly_Margin_A0==88 ps 9
719 04:57:35.775184 RxClkDly_Margin_A1==98 ps 10
720 04:57:35.775625 TxDqDly_Margin_A1==88 ps 9
721 04:57:35.780814 TrainedVREFDQ_A0==76
722 04:57:35.781257 TrainedVREFDQ_A1==77
723 04:57:35.781671 VrefDac_Margin_A0==23
724 04:57:35.786511 DeviceVref_Margin_A0==38
725 04:57:35.786951 VrefDac_Margin_A1==22
726 04:57:35.791940 DeviceVref_Margin_A1==37
727 04:57:35.792405
728 04:57:35.792817 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 04:57:35.793219
730 04:57:35.825545 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 04:57:35.826012 2D training succeed
732 04:57:35.831136 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 04:57:35.836741 auto size-- 65535DDR cs0 size: 2048MB
734 04:57:35.837185 DDR cs1 size: 2048MB
735 04:57:35.842407 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 04:57:35.842851 cs0 DataBus test pass
737 04:57:35.847923 cs1 DataBus test pass
738 04:57:35.848403 cs0 AddrBus test pass
739 04:57:35.848810 cs1 AddrBus test pass
740 04:57:35.849210
741 04:57:35.853536 100bdlr_step_size ps== 420
742 04:57:35.853990 result report
743 04:57:35.859135 boot times 0Enable ddr reg access
744 04:57:35.864497 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 04:57:35.877993 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 04:57:36.451881 0.0;M3 CHK:0;cm4_sp_mode 0
747 04:57:36.452534 MVN_1=0x00000000
748 04:57:36.457186 MVN_2=0x00000000
749 04:57:36.463050 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 04:57:36.463559 OPS=0x10
751 04:57:36.463955 ring efuse init
752 04:57:36.464386 chipver efuse init
753 04:57:36.471513 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 04:57:36.471962 [0.018960 Inits done]
755 04:57:36.472394 secure task start!
756 04:57:36.478832 high task start!
757 04:57:36.479264 low task start!
758 04:57:36.479654 run into bl31
759 04:57:36.485369 NOTICE: BL31: v1.3(release):4fc40b1
760 04:57:36.493332 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 04:57:36.493766 NOTICE: BL31: G12A normal boot!
762 04:57:36.518611 NOTICE: BL31: BL33 decompress pass
763 04:57:36.524309 ERROR: Error initializing runtime service opteed_fast
764 04:57:37.757251
765 04:57:37.757874
766 04:57:37.765481 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 04:57:37.765938
768 04:57:37.766356 Model: Libre Computer AML-A311D-CC Alta
769 04:57:37.973905 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 04:57:37.997263 DRAM: 2 GiB (effective 3.8 GiB)
771 04:57:38.140259 Core: 408 devices, 31 uclasses, devicetree: separate
772 04:57:38.146239 WDT: Not starting watchdog@f0d0
773 04:57:38.178426 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 04:57:38.190986 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 04:57:38.195955 ** Bad device specification mmc 0 **
776 04:57:38.206230 Card did not respond to voltage select! : -110
777 04:57:38.213042 ** Bad device specification mmc 0 **
778 04:57:38.213489 Couldn't find partition mmc 0
779 04:57:38.222136 Card did not respond to voltage select! : -110
780 04:57:38.227715 ** Bad device specification mmc 0 **
781 04:57:38.228195 Couldn't find partition mmc 0
782 04:57:38.232818 Error: could not access storage.
783 04:57:38.576339 Net: eth0: ethernet@ff3f0000
784 04:57:38.576941 starting USB...
785 04:57:38.828072 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 04:57:38.828605 Starting the controller
787 04:57:38.835022 USB XHCI 1.10
788 04:57:40.993186 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 04:57:40.993776 bl2_stage_init 0x01
790 04:57:40.994205 bl2_stage_init 0x81
791 04:57:40.998721 hw id: 0x0000 - pwm id 0x01
792 04:57:40.999172 bl2_stage_init 0xc1
793 04:57:40.999586 bl2_stage_init 0x02
794 04:57:41.000037
795 04:57:41.004353 L0:00000000
796 04:57:41.004798 L1:20000703
797 04:57:41.005210 L2:00008067
798 04:57:41.005613 L3:14000000
799 04:57:41.010031 B2:00402000
800 04:57:41.010473 B1:e0f83180
801 04:57:41.010880
802 04:57:41.011285 TE: 58167
803 04:57:41.011688
804 04:57:41.015532 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 04:57:41.016007
806 04:57:41.016431 Board ID = 1
807 04:57:41.021160 Set A53 clk to 24M
808 04:57:41.021610 Set A73 clk to 24M
809 04:57:41.022022 Set clk81 to 24M
810 04:57:41.026723 A53 clk: 1200 MHz
811 04:57:41.027178 A73 clk: 1200 MHz
812 04:57:41.027590 CLK81: 166.6M
813 04:57:41.028055 smccc: 00012abd
814 04:57:41.032338 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 04:57:41.038103 board id: 1
816 04:57:41.042850 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 04:57:41.054576 fw parse done
818 04:57:41.059530 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 04:57:41.102194 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 04:57:41.114063 PIEI prepare done
821 04:57:41.114507 fastboot data load
822 04:57:41.114923 fastboot data verify
823 04:57:41.119635 verify result: 266
824 04:57:41.125227 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 04:57:41.125670 LPDDR4 probe
826 04:57:41.126076 ddr clk to 1584MHz
827 04:57:41.133247 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 04:57:41.169472
829 04:57:41.169916 dmc_version 0001
830 04:57:41.177259 Check phy result
831 04:57:41.183109 INFO : End of CA training
832 04:57:41.183544 INFO : End of initialization
833 04:57:41.188604 INFO : Training has run successfully!
834 04:57:41.189041 Check phy result
835 04:57:41.194200 INFO : End of initialization
836 04:57:41.194631 INFO : End of read enable training
837 04:57:41.199802 INFO : End of fine write leveling
838 04:57:41.205396 INFO : End of Write leveling coarse delay
839 04:57:41.205835 INFO : Training has run successfully!
840 04:57:41.206245 Check phy result
841 04:57:41.211066 INFO : End of initialization
842 04:57:41.211499 INFO : End of read dq deskew training
843 04:57:41.216632 INFO : End of MPR read delay center optimization
844 04:57:41.222182 INFO : End of write delay center optimization
845 04:57:41.227835 INFO : End of read delay center optimization
846 04:57:41.228307 INFO : End of max read latency training
847 04:57:41.233415 INFO : Training has run successfully!
848 04:57:41.233851 1D training succeed
849 04:57:41.242601 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 04:57:41.290205 Check phy result
851 04:57:41.290643 INFO : End of initialization
852 04:57:41.311933 INFO : End of 2D read delay Voltage center optimization
853 04:57:41.332432 INFO : End of 2D read delay Voltage center optimization
854 04:57:41.383486 INFO : End of 2D write delay Voltage center optimization
855 04:57:41.433764 INFO : End of 2D write delay Voltage center optimization
856 04:57:41.439242 INFO : Training has run successfully!
857 04:57:41.439719
858 04:57:41.440200 channel==0
859 04:57:41.444832 RxClkDly_Margin_A0==88 ps 9
860 04:57:41.445308 TxDqDly_Margin_A0==98 ps 10
861 04:57:41.450429 RxClkDly_Margin_A1==88 ps 9
862 04:57:41.450897 TxDqDly_Margin_A1==98 ps 10
863 04:57:41.451316 TrainedVREFDQ_A0==74
864 04:57:41.456119 TrainedVREFDQ_A1==74
865 04:57:41.456597 VrefDac_Margin_A0==25
866 04:57:41.457025 DeviceVref_Margin_A0==40
867 04:57:41.461674 VrefDac_Margin_A1==26
868 04:57:41.462164 DeviceVref_Margin_A1==40
869 04:57:41.462579
870 04:57:41.462991
871 04:57:41.467227 channel==1
872 04:57:41.467700 RxClkDly_Margin_A0==98 ps 10
873 04:57:41.468130 TxDqDly_Margin_A0==88 ps 9
874 04:57:41.472870 RxClkDly_Margin_A1==98 ps 10
875 04:57:41.473330 TxDqDly_Margin_A1==88 ps 9
876 04:57:41.478416 TrainedVREFDQ_A0==77
877 04:57:41.478875 TrainedVREFDQ_A1==77
878 04:57:41.479275 VrefDac_Margin_A0==22
879 04:57:41.484026 DeviceVref_Margin_A0==37
880 04:57:41.484490 VrefDac_Margin_A1==22
881 04:57:41.489636 DeviceVref_Margin_A1==37
882 04:57:41.490096
883 04:57:41.490490 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 04:57:41.490881
885 04:57:41.523212 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 04:57:41.523754 2D training succeed
887 04:57:41.528861 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 04:57:41.534547 auto size-- 65535DDR cs0 size: 2048MB
889 04:57:41.535019 DDR cs1 size: 2048MB
890 04:57:41.540035 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 04:57:41.540508 cs0 DataBus test pass
892 04:57:41.545662 cs1 DataBus test pass
893 04:57:41.546132 cs0 AddrBus test pass
894 04:57:41.546524 cs1 AddrBus test pass
895 04:57:41.546914
896 04:57:41.551237 100bdlr_step_size ps== 432
897 04:57:41.551714 result report
898 04:57:41.556809 boot times 0Enable ddr reg access
899 04:57:41.562193 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 04:57:41.575206 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 04:57:42.148662 0.0;M3 CHK:0;cm4_sp_mode 0
902 04:57:42.149230 MVN_1=0x00000000
903 04:57:42.154261 MVN_2=0x00000000
904 04:57:42.159973 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 04:57:42.160473 OPS=0x10
906 04:57:42.160891 ring efuse init
907 04:57:42.161296 chipver efuse init
908 04:57:42.168201 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 04:57:42.168680 [0.018961 Inits done]
910 04:57:42.174825 secure task start!
911 04:57:42.175285 high task start!
912 04:57:42.175695 low task start!
913 04:57:42.176130 run into bl31
914 04:57:42.182378 NOTICE: BL31: v1.3(release):4fc40b1
915 04:57:42.189398 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 04:57:42.189904 NOTICE: BL31: G12A normal boot!
917 04:57:42.216241 NOTICE: BL31: BL33 decompress pass
918 04:57:42.221758 ERROR: Error initializing runtime service opteed_fast
919 04:57:43.454556
920 04:57:43.455146
921 04:57:43.462958 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 04:57:43.463440
923 04:57:43.463863 Model: Libre Computer AML-A311D-CC Alta
924 04:57:43.671373 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 04:57:43.694758 DRAM: 2 GiB (effective 3.8 GiB)
926 04:57:43.837777 Core: 408 devices, 31 uclasses, devicetree: separate
927 04:57:43.843643 WDT: Not starting watchdog@f0d0
928 04:57:43.875871 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 04:57:43.888320 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 04:57:43.893317 ** Bad device specification mmc 0 **
931 04:57:43.903662 Card did not respond to voltage select! : -110
932 04:57:43.911314 ** Bad device specification mmc 0 **
933 04:57:43.911783 Couldn't find partition mmc 0
934 04:57:43.919660 Card did not respond to voltage select! : -110
935 04:57:43.925161 ** Bad device specification mmc 0 **
936 04:57:43.925631 Couldn't find partition mmc 0
937 04:57:43.930229 Error: could not access storage.
938 04:57:44.272696 Net: eth0: ethernet@ff3f0000
939 04:57:44.273279 starting USB...
940 04:57:44.524662 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 04:57:44.525200 Starting the controller
942 04:57:44.531582 USB XHCI 1.10
943 04:57:46.254712 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
944 04:57:46.255289 bl2_stage_init 0x81
945 04:57:46.260322 hw id: 0x0000 - pwm id 0x01
946 04:57:46.260826 bl2_stage_init 0xc1
947 04:57:46.261258 bl2_stage_init 0x02
948 04:57:46.261675
949 04:57:46.265908 L0:00000000
950 04:57:46.266383 L1:20000703
951 04:57:46.266799 L2:00008067
952 04:57:46.267207 L3:14000000
953 04:57:46.267613 B2:00402000
954 04:57:46.271489 B1:e0f83180
955 04:57:46.271954
956 04:57:46.272411 TE: 58150
957 04:57:46.272827
958 04:57:46.277107 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
959 04:57:46.277582
960 04:57:46.277999 Board ID = 1
961 04:57:46.282705 Set A53 clk to 24M
962 04:57:46.283188 Set A73 clk to 24M
963 04:57:46.283607 Set clk81 to 24M
964 04:57:46.288307 A53 clk: 1200 MHz
965 04:57:46.288774 A73 clk: 1200 MHz
966 04:57:46.289183 CLK81: 166.6M
967 04:57:46.289587 smccc: 00012aab
968 04:57:46.293897 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
969 04:57:46.299500 board id: 1
970 04:57:46.305265 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
971 04:57:46.315948 fw parse done
972 04:57:46.321964 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
973 04:57:46.364506 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
974 04:57:46.375439 PIEI prepare done
975 04:57:46.375910 fastboot data load
976 04:57:46.376377 fastboot data verify
977 04:57:46.381123 verify result: 266
978 04:57:46.387057 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
979 04:57:46.387541 LPDDR4 probe
980 04:57:46.387976 ddr clk to 1584MHz
981 04:57:46.393700 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
982 04:57:46.431007
983 04:57:46.431603 dmc_version 0001
984 04:57:46.437699 Check phy result
985 04:57:46.444543 INFO : End of CA training
986 04:57:46.445144 INFO : End of initialization
987 04:57:46.450066 INFO : Training has run successfully!
988 04:57:46.450507 Check phy result
989 04:57:46.455590 INFO : End of initialization
990 04:57:46.456162 INFO : End of read enable training
991 04:57:46.459128 INFO : End of fine write leveling
992 04:57:46.464304 INFO : End of Write leveling coarse delay
993 04:57:46.470024 INFO : Training has run successfully!
994 04:57:46.470452 Check phy result
995 04:57:46.470679 INFO : End of initialization
996 04:57:46.475588 INFO : End of read dq deskew training
997 04:57:46.479063 INFO : End of MPR read delay center optimization
998 04:57:46.484587 INFO : End of write delay center optimization
999 04:57:46.490192 INFO : End of read delay center optimization
1000 04:57:46.490580 INFO : End of max read latency training
1001 04:57:46.495775 INFO : Training has run successfully!
1002 04:57:46.496153 1D training succeed
1003 04:57:46.503160 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1004 04:57:46.551637 Check phy result
1005 04:57:46.552105 INFO : End of initialization
1006 04:57:46.573360 INFO : End of 2D read delay Voltage center optimization
1007 04:57:46.593552 INFO : End of 2D read delay Voltage center optimization
1008 04:57:46.645597 INFO : End of 2D write delay Voltage center optimization
1009 04:57:46.694978 INFO : End of 2D write delay Voltage center optimization
1010 04:57:46.700506 INFO : Training has run successfully!
1011 04:57:46.700898
1012 04:57:46.701123 channel==0
1013 04:57:46.706129 RxClkDly_Margin_A0==88 ps 9
1014 04:57:46.706655 TxDqDly_Margin_A0==98 ps 10
1015 04:57:46.711757 RxClkDly_Margin_A1==88 ps 9
1016 04:57:46.712372 TxDqDly_Margin_A1==98 ps 10
1017 04:57:46.712620 TrainedVREFDQ_A0==74
1018 04:57:46.717515 TrainedVREFDQ_A1==74
1019 04:57:46.718030 VrefDac_Margin_A0==25
1020 04:57:46.718865 DeviceVref_Margin_A0==40
1021 04:57:46.723378 VrefDac_Margin_A1==25
1022 04:57:46.724197 DeviceVref_Margin_A1==40
1023 04:57:46.724789
1024 04:57:46.725289
1025 04:57:46.728611 channel==1
1026 04:57:46.729167 RxClkDly_Margin_A0==98 ps 10
1027 04:57:46.729651 TxDqDly_Margin_A0==98 ps 10
1028 04:57:46.734199 RxClkDly_Margin_A1==98 ps 10
1029 04:57:46.734759 TxDqDly_Margin_A1==88 ps 9
1030 04:57:46.739934 TrainedVREFDQ_A0==77
1031 04:57:46.740612 TrainedVREFDQ_A1==77
1032 04:57:46.741125 VrefDac_Margin_A0==22
1033 04:57:46.745363 DeviceVref_Margin_A0==37
1034 04:57:46.745930 VrefDac_Margin_A1==24
1035 04:57:46.750968 DeviceVref_Margin_A1==37
1036 04:57:46.751524
1037 04:57:46.752048 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1038 04:57:46.756492
1039 04:57:46.784536 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
1040 04:57:46.784987 2D training succeed
1041 04:57:46.790188 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1042 04:57:46.795840 auto size-- 65535DDR cs0 size: 2048MB
1043 04:57:46.796499 DDR cs1 size: 2048MB
1044 04:57:46.801382 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1045 04:57:46.801947 cs0 DataBus test pass
1046 04:57:46.807147 cs1 DataBus test pass
1047 04:57:46.807854 cs0 AddrBus test pass
1048 04:57:46.808213 cs1 AddrBus test pass
1049 04:57:46.808447
1050 04:57:46.812623 100bdlr_step_size ps== 420
1051 04:57:46.813243 result report
1052 04:57:46.818181 boot times 0Enable ddr reg access
1053 04:57:46.823830 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1054 04:57:46.837013 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1055 04:57:47.517734 0.0;M3 CHK:0;cm4_sp_mode 0
1056 04:57:47.518144 MVN_1=0x00000000
1057 04:57:47.518433 MVN_2=0x00000000
1058 04:57:47.518702 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1059 04:57:47.518954 OPS=0x10
1060 04:57:47.519194 ring efuse init
1061 04:57:47.519431 chipver efuse init
1062 04:57:47.519664 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1063 04:57:47.519930 [0.018961 Inits done]
1064 04:57:47.520425 secure task start!
1065 04:57:47.520680 high task start!
1066 04:57:47.521374 low task start!
1067 04:57:47.521691 run into bl31
1068 04:57:47.521940 NOTICE: BL31: v1.3(release):4fc40b1
1069 04:57:47.522175 NOTICE: BL31: Built : 15:58:17, May 22 2019
1070 04:57:47.522413 NOTICE: BL31: G12A normal boot!
1071 04:57:47.522651 NOTICE: BL31: BL33 decompress pass
1072 04:57:47.522889 ERROR: Error initializing runtime service opteed_fast
1073 04:57:48.716108
1074 04:57:48.716700
1075 04:57:48.724452 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1076 04:57:48.724928
1077 04:57:48.725356 Model: Libre Computer AML-A311D-CC Alta
1078 04:57:48.932249 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1079 04:57:48.955360 DRAM: 2 GiB (effective 3.8 GiB)
1080 04:57:49.099395 Core: 408 devices, 31 uclasses, devicetree: separate
1081 04:57:49.104203 WDT: Not starting watchdog@f0d0
1082 04:57:49.137449 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1083 04:57:49.149919 Loading Environment from FAT... Card did not respond to voltage select! : -110
1084 04:57:49.153876 ** Bad device specification mmc 0 **
1085 04:57:49.165194 Card did not respond to voltage select! : -110
1086 04:57:49.171822 ** Bad device specification mmc 0 **
1087 04:57:49.172328 Couldn't find partition mmc 0
1088 04:57:49.181155 Card did not respond to voltage select! : -110
1089 04:57:49.186685 ** Bad device specification mmc 0 **
1090 04:57:49.187185 Couldn't find partition mmc 0
1091 04:57:49.190757 Error: could not access storage.
1092 04:57:49.535280 Net: eth0: ethernet@ff3f0000
1093 04:57:49.535882 starting USB...
1094 04:57:49.787094 Bus usb@ff500000: Register 3000140 NbrPorts 3
1095 04:57:49.787625 Starting the controller
1096 04:57:49.794006 USB XHCI 1.10
1097 04:57:51.351272 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1098 04:57:51.359607 scanning usb for storage devices... 0 Storage Device(s) found
1100 04:57:51.411293 Hit any key to stop autoboot: 1
1101 04:57:51.412164 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1102 04:57:51.412772 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1103 04:57:51.413261 Setting prompt string to ['=>']
1104 04:57:51.413761 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1105 04:57:51.426952 0
1106 04:57:51.427850 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1107 04:57:51.428395 Sending with 10 millisecond of delay
1109 04:57:52.563445 => setenv autoload no
1110 04:57:52.574045 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1111 04:57:52.576672 setenv autoload no
1112 04:57:52.577133 Sending with 10 millisecond of delay
1114 04:57:54.373191 => setenv initrd_high 0xffffffff
1115 04:57:54.383957 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1116 04:57:54.384817 setenv initrd_high 0xffffffff
1117 04:57:54.385527 Sending with 10 millisecond of delay
1119 04:57:56.001425 => setenv fdt_high 0xffffffff
1120 04:57:56.012195 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1121 04:57:56.012988 setenv fdt_high 0xffffffff
1122 04:57:56.013704 Sending with 10 millisecond of delay
1124 04:57:56.305449 => dhcp
1125 04:57:56.316143 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1126 04:57:56.316918 dhcp
1127 04:57:56.317351 Speed: 1000, full duplex
1128 04:57:56.317759 BOOTP broadcast 1
1129 04:57:56.324194 DHCP client bound to address 192.168.6.27 (9 ms)
1130 04:57:56.324928 Sending with 10 millisecond of delay
1132 04:57:58.001105 => setenv serverip 192.168.6.2
1133 04:57:58.011865 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1134 04:57:58.012778 setenv serverip 192.168.6.2
1135 04:57:58.013467 Sending with 10 millisecond of delay
1137 04:58:01.737663 => tftpboot 0x01080000 950965/tftp-deploy-b1ppph32/kernel/uImage
1138 04:58:01.748411 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1139 04:58:01.749206 tftpboot 0x01080000 950965/tftp-deploy-b1ppph32/kernel/uImage
1140 04:58:01.749664 Speed: 1000, full duplex
1141 04:58:01.750087 Using ethernet@ff3f0000 device
1142 04:58:01.750810 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1143 04:58:01.756269 Filename '950965/tftp-deploy-b1ppph32/kernel/uImage'.
1144 04:58:01.760103 Load address: 0x1080000
1145 04:58:04.576532 Loading: *################################################## 43.6 MiB
1146 04:58:04.577154 15.5 MiB/s
1147 04:58:04.577590 done
1148 04:58:04.580889 Bytes transferred = 45713984 (2b98a40 hex)
1149 04:58:04.581675 Sending with 10 millisecond of delay
1151 04:58:09.267094 => tftpboot 0x08000000 950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
1152 04:58:09.277878 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1153 04:58:09.278659 tftpboot 0x08000000 950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot
1154 04:58:09.279101 Speed: 1000, full duplex
1155 04:58:09.279517 Using ethernet@ff3f0000 device
1156 04:58:09.280529 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1157 04:58:09.292428 Filename '950965/tftp-deploy-b1ppph32/ramdisk/ramdisk.cpio.gz.uboot'.
1158 04:58:09.292879 Load address: 0x8000000
1159 04:58:16.107019 Loading: *########################T ######################### UDP wrong checksum 00000005 0000769c
1160 04:58:21.107964 T UDP wrong checksum 00000005 0000769c
1161 04:58:24.130375 UDP wrong checksum 000000ff 00007cf7
1162 04:58:24.137872 UDP wrong checksum 000000ff 00000aea
1163 04:58:31.111315 T T UDP wrong checksum 00000005 0000769c
1164 04:58:51.113147 T T T UDP wrong checksum 00000005 0000769c
1165 04:59:06.119337 T T T
1166 04:59:06.119971 Retry count exceeded; starting again
1168 04:59:06.121455 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1171 04:59:06.123366 end: 2.4 uboot-commands (duration 00:01:52) [common]
1173 04:59:06.124794 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1175 04:59:06.125865 end: 2 uboot-action (duration 00:01:52) [common]
1177 04:59:06.127362 Cleaning after the job
1178 04:59:06.127898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/ramdisk
1179 04:59:06.129219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/kernel
1180 04:59:06.173839 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/dtb
1181 04:59:06.174617 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/nfsrootfs
1182 04:59:06.462791 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950965/tftp-deploy-b1ppph32/modules
1183 04:59:06.481838 start: 4.1 power-off (timeout 00:00:30) [common]
1184 04:59:06.482469 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1185 04:59:06.514944 >> OK - accepted request
1186 04:59:06.516888 Returned 0 in 0 seconds
1187 04:59:06.617655 end: 4.1 power-off (duration 00:00:00) [common]
1189 04:59:06.618656 start: 4.2 read-feedback (timeout 00:10:00) [common]
1190 04:59:06.619323 Listened to connection for namespace 'common' for up to 1s
1191 04:59:07.620256 Finalising connection for namespace 'common'
1192 04:59:07.620740 Disconnecting from shell: Finalise
1193 04:59:07.621017 =>
1194 04:59:07.721646 end: 4.2 read-feedback (duration 00:00:01) [common]
1195 04:59:07.722013 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950965
1196 04:59:10.188039 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950965
1197 04:59:10.188661 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.