Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:59:46.820807 lava-dispatcher, installed at version: 2024.01
2 02:59:46.821591 start: 0 validate
3 02:59:46.822048 Start time: 2024-11-07 02:59:46.822019+00:00 (UTC)
4 02:59:46.822594 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:59:46.823161 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 02:59:46.860496 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:59:46.861055 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:59:46.891825 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:59:46.892512 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:59:47.938036 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:59:47.938505 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 02:59:47.978219 validate duration: 1.16
14 02:59:47.979116 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 02:59:47.979445 start: 1.1 download-retry (timeout 00:10:00) [common]
16 02:59:47.979761 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 02:59:47.980354 Not decompressing ramdisk as can be used compressed.
18 02:59:47.980801 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 02:59:47.981073 saving as /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/ramdisk/rootfs.cpio.gz
20 02:59:47.981341 total size: 8181887 (7 MB)
21 02:59:48.017969 progress 0 % (0 MB)
22 02:59:48.029308 progress 5 % (0 MB)
23 02:59:48.039481 progress 10 % (0 MB)
24 02:59:48.045758 progress 15 % (1 MB)
25 02:59:48.050960 progress 20 % (1 MB)
26 02:59:48.056513 progress 25 % (1 MB)
27 02:59:48.061751 progress 30 % (2 MB)
28 02:59:48.067328 progress 35 % (2 MB)
29 02:59:48.072528 progress 40 % (3 MB)
30 02:59:48.078139 progress 45 % (3 MB)
31 02:59:48.083295 progress 50 % (3 MB)
32 02:59:48.089007 progress 55 % (4 MB)
33 02:59:48.094147 progress 60 % (4 MB)
34 02:59:48.099646 progress 65 % (5 MB)
35 02:59:48.104772 progress 70 % (5 MB)
36 02:59:48.110272 progress 75 % (5 MB)
37 02:59:48.115378 progress 80 % (6 MB)
38 02:59:48.120789 progress 85 % (6 MB)
39 02:59:48.125625 progress 90 % (7 MB)
40 02:59:48.130752 progress 95 % (7 MB)
41 02:59:48.135487 progress 100 % (7 MB)
42 02:59:48.136160 7 MB downloaded in 0.15 s (50.41 MB/s)
43 02:59:48.136737 end: 1.1.1 http-download (duration 00:00:00) [common]
45 02:59:48.137658 end: 1.1 download-retry (duration 00:00:00) [common]
46 02:59:48.137973 start: 1.2 download-retry (timeout 00:10:00) [common]
47 02:59:48.138258 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 02:59:48.138752 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/kernel/Image
49 02:59:48.139026 saving as /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/kernel/Image
50 02:59:48.139249 total size: 45713920 (43 MB)
51 02:59:48.139468 No compression specified
52 02:59:48.172459 progress 0 % (0 MB)
53 02:59:48.200120 progress 5 % (2 MB)
54 02:59:48.226771 progress 10 % (4 MB)
55 02:59:48.253467 progress 15 % (6 MB)
56 02:59:48.279896 progress 20 % (8 MB)
57 02:59:48.306663 progress 25 % (10 MB)
58 02:59:48.333194 progress 30 % (13 MB)
59 02:59:48.360231 progress 35 % (15 MB)
60 02:59:48.387230 progress 40 % (17 MB)
61 02:59:48.413752 progress 45 % (19 MB)
62 02:59:48.440419 progress 50 % (21 MB)
63 02:59:48.468620 progress 55 % (24 MB)
64 02:59:48.495507 progress 60 % (26 MB)
65 02:59:48.522266 progress 65 % (28 MB)
66 02:59:48.549096 progress 70 % (30 MB)
67 02:59:48.575867 progress 75 % (32 MB)
68 02:59:48.602487 progress 80 % (34 MB)
69 02:59:48.628572 progress 85 % (37 MB)
70 02:59:48.655217 progress 90 % (39 MB)
71 02:59:48.681519 progress 95 % (41 MB)
72 02:59:48.707297 progress 100 % (43 MB)
73 02:59:48.707854 43 MB downloaded in 0.57 s (76.67 MB/s)
74 02:59:48.708389 end: 1.2.1 http-download (duration 00:00:01) [common]
76 02:59:48.709306 end: 1.2 download-retry (duration 00:00:01) [common]
77 02:59:48.709636 start: 1.3 download-retry (timeout 00:09:59) [common]
78 02:59:48.709959 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 02:59:48.710441 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 02:59:48.710717 saving as /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 02:59:48.710924 total size: 53209 (0 MB)
82 02:59:48.711136 No compression specified
83 02:59:48.749269 progress 61 % (0 MB)
84 02:59:48.750106 progress 100 % (0 MB)
85 02:59:48.750667 0 MB downloaded in 0.04 s (1.28 MB/s)
86 02:59:48.751129 end: 1.3.1 http-download (duration 00:00:00) [common]
88 02:59:48.751941 end: 1.3 download-retry (duration 00:00:00) [common]
89 02:59:48.752251 start: 1.4 download-retry (timeout 00:09:59) [common]
90 02:59:48.752518 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 02:59:48.752985 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/modules.tar.xz
92 02:59:48.753228 saving as /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/modules/modules.tar
93 02:59:48.753432 total size: 11607084 (11 MB)
94 02:59:48.753640 Using unxz to decompress xz
95 02:59:48.790083 progress 0 % (0 MB)
96 02:59:48.856238 progress 5 % (0 MB)
97 02:59:48.931953 progress 10 % (1 MB)
98 02:59:49.030402 progress 15 % (1 MB)
99 02:59:49.128026 progress 20 % (2 MB)
100 02:59:49.208563 progress 25 % (2 MB)
101 02:59:49.284295 progress 30 % (3 MB)
102 02:59:49.358934 progress 35 % (3 MB)
103 02:59:49.436405 progress 40 % (4 MB)
104 02:59:49.512721 progress 45 % (5 MB)
105 02:59:49.597043 progress 50 % (5 MB)
106 02:59:49.674389 progress 55 % (6 MB)
107 02:59:49.759846 progress 60 % (6 MB)
108 02:59:49.840414 progress 65 % (7 MB)
109 02:59:49.916981 progress 70 % (7 MB)
110 02:59:49.998791 progress 75 % (8 MB)
111 02:59:50.082632 progress 80 % (8 MB)
112 02:59:50.163638 progress 85 % (9 MB)
113 02:59:50.242557 progress 90 % (9 MB)
114 02:59:50.320388 progress 95 % (10 MB)
115 02:59:50.397938 progress 100 % (11 MB)
116 02:59:50.409036 11 MB downloaded in 1.66 s (6.69 MB/s)
117 02:59:50.409829 end: 1.4.1 http-download (duration 00:00:02) [common]
119 02:59:50.411149 end: 1.4 download-retry (duration 00:00:02) [common]
120 02:59:50.411634 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 02:59:50.412280 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 02:59:50.413546 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 02:59:50.414913 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 02:59:50.417305 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu
125 02:59:50.419228 makedir: /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin
126 02:59:50.420653 makedir: /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/tests
127 02:59:50.421464 makedir: /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/results
128 02:59:50.422149 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-add-keys
129 02:59:50.423176 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-add-sources
130 02:59:50.424270 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-background-process-start
131 02:59:50.425402 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-background-process-stop
132 02:59:50.426487 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-common-functions
133 02:59:50.427502 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-echo-ipv4
134 02:59:50.428556 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-install-packages
135 02:59:50.429560 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-installed-packages
136 02:59:50.430548 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-os-build
137 02:59:50.431529 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-probe-channel
138 02:59:50.432575 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-probe-ip
139 02:59:50.433576 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-target-ip
140 02:59:50.434577 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-target-mac
141 02:59:50.435928 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-target-storage
142 02:59:50.439487 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-case
143 02:59:50.440758 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-event
144 02:59:50.441880 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-feedback
145 02:59:50.442962 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-raise
146 02:59:50.444619 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-reference
147 02:59:50.445198 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-runner
148 02:59:50.445715 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-set
149 02:59:50.447272 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-test-shell
150 02:59:50.449881 Updating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-install-packages (oe)
151 02:59:50.451223 Updating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/bin/lava-installed-packages (oe)
152 02:59:50.452524 Creating /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/environment
153 02:59:50.454045 LAVA metadata
154 02:59:50.454567 - LAVA_JOB_ID=951331
155 02:59:50.454999 - LAVA_DISPATCHER_IP=192.168.6.2
156 02:59:50.455744 start: 1.5.2.1 ssh-authorize (timeout 00:09:58) [common]
157 02:59:50.457577 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 02:59:50.458169 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:58) [common]
159 02:59:50.458584 skipped lava-vland-overlay
160 02:59:50.459064 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 02:59:50.459564 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:58) [common]
162 02:59:50.460126 skipped lava-multinode-overlay
163 02:59:50.460695 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 02:59:50.461205 start: 1.5.2.4 test-definition (timeout 00:09:58) [common]
165 02:59:50.461745 Loading test definitions
166 02:59:50.462358 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:58) [common]
167 02:59:50.462809 Using /lava-951331 at stage 0
168 02:59:50.464752 uuid=951331_1.5.2.4.1 testdef=None
169 02:59:50.465161 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 02:59:50.465456 start: 1.5.2.4.2 test-overlay (timeout 00:09:58) [common]
171 02:59:50.467328 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 02:59:50.468183 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:58) [common]
174 02:59:50.470465 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 02:59:50.471308 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:58) [common]
177 02:59:50.473577 runner path: /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/0/tests/0_dmesg test_uuid 951331_1.5.2.4.1
178 02:59:50.474163 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 02:59:50.474947 Creating lava-test-runner.conf files
181 02:59:50.475150 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/951331/lava-overlay-_sum1hqu/lava-951331/0 for stage 0
182 02:59:50.475501 - 0_dmesg
183 02:59:50.475860 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 02:59:50.476198 start: 1.5.2.5 compress-overlay (timeout 00:09:58) [common]
185 02:59:50.501509 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 02:59:50.501947 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 02:59:50.502214 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 02:59:50.502482 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 02:59:50.502749 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 02:59:51.437944 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 02:59:51.438409 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
192 02:59:51.438674 extracting modules file /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk
193 02:59:52.770386 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 02:59:52.770871 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 02:59:52.771164 [common] Applying overlay /var/lib/lava/dispatcher/tmp/951331/compress-overlay-9_1dhqiv/overlay-1.5.2.5.tar.gz to ramdisk
196 02:59:52.771394 [common] Applying overlay /var/lib/lava/dispatcher/tmp/951331/compress-overlay-9_1dhqiv/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk
197 02:59:52.802212 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 02:59:52.802656 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 02:59:52.802924 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 02:59:52.803149 Converting downloaded kernel to a uImage
201 02:59:52.803455 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/kernel/Image /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/kernel/uImage
202 02:59:53.275654 output: Image Name:
203 02:59:53.276157 output: Created: Thu Nov 7 02:59:52 2024
204 02:59:53.276374 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 02:59:53.276576 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 02:59:53.276775 output: Load Address: 01080000
207 02:59:53.276969 output: Entry Point: 01080000
208 02:59:53.277162 output:
209 02:59:53.277499 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 02:59:53.277770 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 02:59:53.278044 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 02:59:53.278297 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 02:59:53.278557 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 02:59:53.278816 Building ramdisk /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk
215 02:59:55.780350 >> 181575 blocks
216 03:00:04.308339 Adding RAMdisk u-boot header.
217 03:00:04.308799 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk.cpio.gz.uboot
218 03:00:04.628779 output: Image Name:
219 03:00:04.629174 output: Created: Thu Nov 7 03:00:04 2024
220 03:00:04.629382 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 03:00:04.629584 output: Data Size: 26054063 Bytes = 25443.42 KiB = 24.85 MiB
222 03:00:04.629783 output: Load Address: 00000000
223 03:00:04.629981 output: Entry Point: 00000000
224 03:00:04.630176 output:
225 03:00:04.630747 rename /var/lib/lava/dispatcher/tmp/951331/extract-overlay-ramdisk-9vnfq4cf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
226 03:00:04.631154 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 03:00:04.631434 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 03:00:04.631735 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 03:00:04.632023 No LXC device requested
230 03:00:04.632533 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 03:00:04.633034 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 03:00:04.633517 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 03:00:04.633927 Checking files for TFTP limit of 4294967296 bytes.
234 03:00:04.636595 end: 1 tftp-deploy (duration 00:00:17) [common]
235 03:00:04.637161 start: 2 uboot-action (timeout 00:05:00) [common]
236 03:00:04.637680 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 03:00:04.638170 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 03:00:04.638663 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 03:00:04.639186 Using kernel file from prepare-kernel: 951331/tftp-deploy-uo17a9v8/kernel/uImage
240 03:00:04.639786 substitutions:
241 03:00:04.640222 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 03:00:04.640626 - {DTB_ADDR}: 0x01070000
243 03:00:04.641021 - {DTB}: 951331/tftp-deploy-uo17a9v8/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 03:00:04.641415 - {INITRD}: 951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
245 03:00:04.641807 - {KERNEL_ADDR}: 0x01080000
246 03:00:04.642194 - {KERNEL}: 951331/tftp-deploy-uo17a9v8/kernel/uImage
247 03:00:04.642583 - {LAVA_MAC}: None
248 03:00:04.643011 - {PRESEED_CONFIG}: None
249 03:00:04.643404 - {PRESEED_LOCAL}: None
250 03:00:04.643791 - {RAMDISK_ADDR}: 0x08000000
251 03:00:04.644207 - {RAMDISK}: 951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
252 03:00:04.644599 - {ROOT_PART}: None
253 03:00:04.644986 - {ROOT}: None
254 03:00:04.645372 - {SERVER_IP}: 192.168.6.2
255 03:00:04.645763 - {TEE_ADDR}: 0x83000000
256 03:00:04.646150 - {TEE}: None
257 03:00:04.646534 Parsed boot commands:
258 03:00:04.646908 - setenv autoload no
259 03:00:04.647291 - setenv initrd_high 0xffffffff
260 03:00:04.647673 - setenv fdt_high 0xffffffff
261 03:00:04.648085 - dhcp
262 03:00:04.648474 - setenv serverip 192.168.6.2
263 03:00:04.648861 - tftpboot 0x01080000 951331/tftp-deploy-uo17a9v8/kernel/uImage
264 03:00:04.649247 - tftpboot 0x08000000 951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
265 03:00:04.649633 - tftpboot 0x01070000 951331/tftp-deploy-uo17a9v8/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 03:00:04.650021 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 03:00:04.650415 - bootm 0x01080000 0x08000000 0x01070000
268 03:00:04.650904 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 03:00:04.652397 start: 2.3 connect-device (timeout 00:05:00) [common]
271 03:00:04.652833 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 03:00:04.667303 Setting prompt string to ['lava-test: # ']
273 03:00:04.668820 end: 2.3 connect-device (duration 00:00:00) [common]
274 03:00:04.669415 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 03:00:04.669976 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 03:00:04.670612 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 03:00:04.671462 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 03:00:04.705747 >> OK - accepted request
279 03:00:04.707542 Returned 0 in 0 seconds
280 03:00:04.808696 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 03:00:04.810280 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 03:00:04.810838 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 03:00:04.811349 Setting prompt string to ['Hit any key to stop autoboot']
285 03:00:04.811787 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 03:00:04.813405 Trying 192.168.56.21...
287 03:00:04.813870 Connected to conserv1.
288 03:00:04.814287 Escape character is '^]'.
289 03:00:04.814707
290 03:00:04.815128 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 03:00:04.815549
292 03:00:12.034362 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 03:00:12.034977 bl2_stage_init 0x01
294 03:00:12.035413 bl2_stage_init 0x81
295 03:00:12.039906 hw id: 0x0000 - pwm id 0x01
296 03:00:12.040442 bl2_stage_init 0xc1
297 03:00:12.045496 bl2_stage_init 0x02
298 03:00:12.045966
299 03:00:12.046368 L0:00000000
300 03:00:12.046772 L1:00000703
301 03:00:12.047162 L2:00008067
302 03:00:12.047548 L3:15000000
303 03:00:12.051069 S1:00000000
304 03:00:12.051517 B2:20282000
305 03:00:12.051910 B1:a0f83180
306 03:00:12.052340
307 03:00:12.052733 TE: 68539
308 03:00:12.053125
309 03:00:12.056724 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 03:00:12.057178
311 03:00:12.062251 Board ID = 1
312 03:00:12.062693 Set cpu clk to 24M
313 03:00:12.063087 Set clk81 to 24M
314 03:00:12.067859 Use GP1_pll as DSU clk.
315 03:00:12.068339 DSU clk: 1200 Mhz
316 03:00:12.068734 CPU clk: 1200 MHz
317 03:00:12.073490 Set clk81 to 166.6M
318 03:00:12.079063 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 03:00:12.079511 board id: 1
320 03:00:12.086246 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 03:00:12.097161 fw parse done
322 03:00:12.103140 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 03:00:12.146309 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 03:00:12.157550 PIEI prepare done
325 03:00:12.158132 fastboot data load
326 03:00:12.158567 fastboot data verify
327 03:00:12.163116 verify result: 266
328 03:00:12.168795 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 03:00:12.169374 LPDDR4 probe
330 03:00:12.169830 ddr clk to 1584MHz
331 03:00:12.176697 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 03:00:12.214456
333 03:00:12.215088 dmc_version 0001
334 03:00:12.221505 Check phy result
335 03:00:12.227467 INFO : End of CA training
336 03:00:12.228088 INFO : End of initialization
337 03:00:12.233056 INFO : Training has run successfully!
338 03:00:12.233583 Check phy result
339 03:00:12.238664 INFO : End of initialization
340 03:00:12.239208 INFO : End of read enable training
341 03:00:12.244318 INFO : End of fine write leveling
342 03:00:12.249938 INFO : End of Write leveling coarse delay
343 03:00:12.250494 INFO : Training has run successfully!
344 03:00:12.250907 Check phy result
345 03:00:12.255457 INFO : End of initialization
346 03:00:12.256033 INFO : End of read dq deskew training
347 03:00:12.261067 INFO : End of MPR read delay center optimization
348 03:00:12.266693 INFO : End of write delay center optimization
349 03:00:12.272300 INFO : End of read delay center optimization
350 03:00:12.272846 INFO : End of max read latency training
351 03:00:12.277915 INFO : Training has run successfully!
352 03:00:12.278477 1D training succeed
353 03:00:12.286965 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 03:00:12.335406 Check phy result
355 03:00:12.336072 INFO : End of initialization
356 03:00:12.362735 INFO : End of 2D read delay Voltage center optimization
357 03:00:12.387002 INFO : End of 2D read delay Voltage center optimization
358 03:00:12.443658 INFO : End of 2D write delay Voltage center optimization
359 03:00:12.497578 INFO : End of 2D write delay Voltage center optimization
360 03:00:12.503139 INFO : Training has run successfully!
361 03:00:12.503466
362 03:00:12.503694 channel==0
363 03:00:12.508743 RxClkDly_Margin_A0==78 ps 8
364 03:00:12.509102 TxDqDly_Margin_A0==88 ps 9
365 03:00:12.514264 RxClkDly_Margin_A1==78 ps 8
366 03:00:12.514595 TxDqDly_Margin_A1==88 ps 9
367 03:00:12.514823 TrainedVREFDQ_A0==74
368 03:00:12.519908 TrainedVREFDQ_A1==74
369 03:00:12.520248 VrefDac_Margin_A0==23
370 03:00:12.520473 DeviceVref_Margin_A0==40
371 03:00:12.525527 VrefDac_Margin_A1==23
372 03:00:12.525847 DeviceVref_Margin_A1==40
373 03:00:12.526070
374 03:00:12.526285
375 03:00:12.526498 channel==1
376 03:00:12.531083 RxClkDly_Margin_A0==78 ps 8
377 03:00:12.531389 TxDqDly_Margin_A0==98 ps 10
378 03:00:12.536759 RxClkDly_Margin_A1==78 ps 8
379 03:00:12.537095 TxDqDly_Margin_A1==88 ps 9
380 03:00:12.542338 TrainedVREFDQ_A0==78
381 03:00:12.542690 TrainedVREFDQ_A1==75
382 03:00:12.542918 VrefDac_Margin_A0==22
383 03:00:12.548038 DeviceVref_Margin_A0==36
384 03:00:12.548391 VrefDac_Margin_A1==22
385 03:00:12.548615 DeviceVref_Margin_A1==39
386 03:00:12.553486
387 03:00:12.553799 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 03:00:12.554021
389 03:00:12.587031 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000061
390 03:00:12.587764 2D training succeed
391 03:00:12.592668 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 03:00:12.598222 auto size-- 65535DDR cs0 size: 2048MB
393 03:00:12.598715 DDR cs1 size: 2048MB
394 03:00:12.603836 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 03:00:12.604374 cs0 DataBus test pass
396 03:00:12.609511 cs1 DataBus test pass
397 03:00:12.610006 cs0 AddrBus test pass
398 03:00:12.610445 cs1 AddrBus test pass
399 03:00:12.610880
400 03:00:12.615068 100bdlr_step_size ps== 471
401 03:00:12.615567 result report
402 03:00:12.620753 boot times 0Enable ddr reg access
403 03:00:12.625827 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 03:00:12.639643 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 03:00:13.300219 bl2z: ptr: 05129330, size: 00001e40
406 03:00:13.308917 0.0;M3 CHK:0;cm4_sp_mode 0
407 03:00:13.309459 MVN_1=0x00000000
408 03:00:13.309919 MVN_2=0x00000000
409 03:00:13.320316 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 03:00:13.320819 OPS=0x04
411 03:00:13.321278 ring efuse init
412 03:00:13.323284 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 03:00:13.328945 [0.017354 Inits done]
414 03:00:13.329447 secure task start!
415 03:00:13.329904 high task start!
416 03:00:13.330347 low task start!
417 03:00:13.333180 run into bl31
418 03:00:13.341876 NOTICE: BL31: v1.3(release):4fc40b1
419 03:00:13.349630 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 03:00:13.350154 NOTICE: BL31: G12A normal boot!
421 03:00:13.365301 NOTICE: BL31: BL33 decompress pass
422 03:00:13.370976 ERROR: Error initializing runtime service opteed_fast
423 03:00:16.088728 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 03:00:16.089178 bl2_stage_init 0x01
425 03:00:16.089430 bl2_stage_init 0x81
426 03:00:16.094360 hw id: 0x0000 - pwm id 0x01
427 03:00:16.094657 bl2_stage_init 0xc1
428 03:00:16.099800 bl2_stage_init 0x02
429 03:00:16.100154
430 03:00:16.100394 L0:00000000
431 03:00:16.100621 L1:00000703
432 03:00:16.100849 L2:00008067
433 03:00:16.101069 L3:15000000
434 03:00:16.105519 S1:00000000
435 03:00:16.105803 B2:20282000
436 03:00:16.106036 B1:a0f83180
437 03:00:16.106261
438 03:00:16.106482 TE: 72776
439 03:00:16.106708
440 03:00:16.111043 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 03:00:16.111321
442 03:00:16.116608 Board ID = 1
443 03:00:16.116892 Set cpu clk to 24M
444 03:00:16.117123 Set clk81 to 24M
445 03:00:16.122346 Use GP1_pll as DSU clk.
446 03:00:16.122636 DSU clk: 1200 Mhz
447 03:00:16.122867 CPU clk: 1200 MHz
448 03:00:16.127776 Set clk81 to 166.6M
449 03:00:16.133629 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 03:00:16.133924 board id: 1
451 03:00:16.140451 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 03:00:16.151107 fw parse done
453 03:00:16.157075 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 03:00:16.199741 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 03:00:16.210763 PIEI prepare done
456 03:00:16.211068 fastboot data load
457 03:00:16.211300 fastboot data verify
458 03:00:16.216318 verify result: 266
459 03:00:16.221858 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 03:00:16.222159 LPDDR4 probe
461 03:00:16.222394 ddr clk to 1584MHz
462 03:00:16.229821 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 03:00:16.267123
464 03:00:16.267495 dmc_version 0001
465 03:00:16.273786 Check phy result
466 03:00:16.279707 INFO : End of CA training
467 03:00:16.280041 INFO : End of initialization
468 03:00:16.285340 INFO : Training has run successfully!
469 03:00:16.285647 Check phy result
470 03:00:16.290907 INFO : End of initialization
471 03:00:16.291354 INFO : End of read enable training
472 03:00:16.294213 INFO : End of fine write leveling
473 03:00:16.299728 INFO : End of Write leveling coarse delay
474 03:00:16.305334 INFO : Training has run successfully!
475 03:00:16.305644 Check phy result
476 03:00:16.305878 INFO : End of initialization
477 03:00:16.310939 INFO : End of read dq deskew training
478 03:00:16.316547 INFO : End of MPR read delay center optimization
479 03:00:16.316975 INFO : End of write delay center optimization
480 03:00:16.322304 INFO : End of read delay center optimization
481 03:00:16.327755 INFO : End of max read latency training
482 03:00:16.328070 INFO : Training has run successfully!
483 03:00:16.333349 1D training succeed
484 03:00:16.339407 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 03:00:16.386890 Check phy result
486 03:00:16.387244 INFO : End of initialization
487 03:00:16.409303 INFO : End of 2D read delay Voltage center optimization
488 03:00:16.428551 INFO : End of 2D read delay Voltage center optimization
489 03:00:16.480284 INFO : End of 2D write delay Voltage center optimization
490 03:00:16.529504 INFO : End of 2D write delay Voltage center optimization
491 03:00:16.535025 INFO : Training has run successfully!
492 03:00:16.535380
493 03:00:16.535611 channel==0
494 03:00:16.540666 RxClkDly_Margin_A0==88 ps 9
495 03:00:16.541246 TxDqDly_Margin_A0==88 ps 9
496 03:00:16.546317 RxClkDly_Margin_A1==88 ps 9
497 03:00:16.546757 TxDqDly_Margin_A1==98 ps 10
498 03:00:16.547031 TrainedVREFDQ_A0==75
499 03:00:16.551937 TrainedVREFDQ_A1==75
500 03:00:16.552524 VrefDac_Margin_A0==23
501 03:00:16.552766 DeviceVref_Margin_A0==39
502 03:00:16.557478 VrefDac_Margin_A1==23
503 03:00:16.557897 DeviceVref_Margin_A1==39
504 03:00:16.558163
505 03:00:16.558405
506 03:00:16.558630 channel==1
507 03:00:16.563082 RxClkDly_Margin_A0==88 ps 9
508 03:00:16.563524 TxDqDly_Margin_A0==98 ps 10
509 03:00:16.568723 RxClkDly_Margin_A1==78 ps 8
510 03:00:16.569346 TxDqDly_Margin_A1==78 ps 8
511 03:00:16.574348 TrainedVREFDQ_A0==78
512 03:00:16.574797 TrainedVREFDQ_A1==75
513 03:00:16.575072 VrefDac_Margin_A0==22
514 03:00:16.579884 DeviceVref_Margin_A0==36
515 03:00:16.580482 VrefDac_Margin_A1==22
516 03:00:16.585502 DeviceVref_Margin_A1==39
517 03:00:16.585924
518 03:00:16.586180 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 03:00:16.586405
520 03:00:16.619127 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 03:00:16.619807 2D training succeed
522 03:00:16.624659 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 03:00:16.630270 auto size-- 65535DDR cs0 size: 2048MB
524 03:00:16.630779 DDR cs1 size: 2048MB
525 03:00:16.635862 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 03:00:16.636387 cs0 DataBus test pass
527 03:00:16.641474 cs1 DataBus test pass
528 03:00:16.641957 cs0 AddrBus test pass
529 03:00:16.642380 cs1 AddrBus test pass
530 03:00:16.642790
531 03:00:16.647060 100bdlr_step_size ps== 478
532 03:00:16.647543 result report
533 03:00:16.652677 boot times 0Enable ddr reg access
534 03:00:16.657812 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 03:00:16.671594 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 03:00:17.326784 bl2z: ptr: 05129330, size: 00001e40
537 03:00:17.332616 0.0;M3 CHK:0;cm4_sp_mode 0
538 03:00:17.333106 MVN_1=0x00000000
539 03:00:17.333516 MVN_2=0x00000000
540 03:00:17.344106 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 03:00:17.344587 OPS=0x04
542 03:00:17.345004 ring efuse init
543 03:00:17.349688 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 03:00:17.350156 [0.017310 Inits done]
545 03:00:17.350561 secure task start!
546 03:00:17.357803 high task start!
547 03:00:17.358260 low task start!
548 03:00:17.358667 run into bl31
549 03:00:17.366482 NOTICE: BL31: v1.3(release):4fc40b1
550 03:00:17.375355 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 03:00:17.383867 NOTICE: BL31: G12A normal boot!
552 03:00:17.390863 NOTICE: BL31: BL33 decompress pass
553 03:00:17.395474 ERROR: Error initializing runtime service opteed_fast
554 03:00:18.788131 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 03:00:18.788744 bl2_stage_init 0x01
556 03:00:18.789169 bl2_stage_init 0x81
557 03:00:18.793694 hw id: 0x0000 - pwm id 0x01
558 03:00:18.794144 bl2_stage_init 0xc1
559 03:00:18.797975 bl2_stage_init 0x02
560 03:00:18.798402
561 03:00:18.798809 L0:00000000
562 03:00:18.799207 L1:00000703
563 03:00:18.799602 L2:00008067
564 03:00:18.803636 L3:15000000
565 03:00:18.804121 S1:00000000
566 03:00:18.804534 B2:20282000
567 03:00:18.804932 B1:a0f83180
568 03:00:18.805322
569 03:00:18.805719 TE: 70914
570 03:00:18.809175
571 03:00:18.814762 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 03:00:18.815197
573 03:00:18.815602 Board ID = 1
574 03:00:18.816026 Set cpu clk to 24M
575 03:00:18.816430 Set clk81 to 24M
576 03:00:18.820407 Use GP1_pll as DSU clk.
577 03:00:18.820841 DSU clk: 1200 Mhz
578 03:00:18.821241 CPU clk: 1200 MHz
579 03:00:18.825979 Set clk81 to 166.6M
580 03:00:18.831629 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 03:00:18.832092 board id: 1
582 03:00:18.840108 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 03:00:18.850979 fw parse done
584 03:00:18.856946 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 03:00:18.900096 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 03:00:18.911255 PIEI prepare done
587 03:00:18.911680 fastboot data load
588 03:00:18.912134 fastboot data verify
589 03:00:18.916843 verify result: 266
590 03:00:18.922423 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 03:00:18.922854 LPDDR4 probe
592 03:00:18.923261 ddr clk to 1584MHz
593 03:00:18.930424 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 03:00:18.968140
595 03:00:18.968580 dmc_version 0001
596 03:00:18.975167 Check phy result
597 03:00:18.981150 INFO : End of CA training
598 03:00:18.981578 INFO : End of initialization
599 03:00:18.986767 INFO : Training has run successfully!
600 03:00:18.987202 Check phy result
601 03:00:18.992358 INFO : End of initialization
602 03:00:18.992782 INFO : End of read enable training
603 03:00:18.997984 INFO : End of fine write leveling
604 03:00:19.003616 INFO : End of Write leveling coarse delay
605 03:00:19.004132 INFO : Training has run successfully!
606 03:00:19.004550 Check phy result
607 03:00:19.009132 INFO : End of initialization
608 03:00:19.009562 INFO : End of read dq deskew training
609 03:00:19.014769 INFO : End of MPR read delay center optimization
610 03:00:19.020353 INFO : End of write delay center optimization
611 03:00:19.026069 INFO : End of read delay center optimization
612 03:00:19.026513 INFO : End of max read latency training
613 03:00:19.031570 INFO : Training has run successfully!
614 03:00:19.032040 1D training succeed
615 03:00:19.040784 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 03:00:19.089078 Check phy result
617 03:00:19.089534 INFO : End of initialization
618 03:00:19.116386 INFO : End of 2D read delay Voltage center optimization
619 03:00:19.140553 INFO : End of 2D read delay Voltage center optimization
620 03:00:19.196522 INFO : End of 2D write delay Voltage center optimization
621 03:00:19.251215 INFO : End of 2D write delay Voltage center optimization
622 03:00:19.256816 INFO : Training has run successfully!
623 03:00:19.257257
624 03:00:19.257670 channel==0
625 03:00:19.262397 RxClkDly_Margin_A0==78 ps 8
626 03:00:19.262827 TxDqDly_Margin_A0==98 ps 10
627 03:00:19.268038 RxClkDly_Margin_A1==69 ps 7
628 03:00:19.268471 TxDqDly_Margin_A1==98 ps 10
629 03:00:19.268877 TrainedVREFDQ_A0==76
630 03:00:19.273624 TrainedVREFDQ_A1==74
631 03:00:19.274057 VrefDac_Margin_A0==23
632 03:00:19.274458 DeviceVref_Margin_A0==38
633 03:00:19.279192 VrefDac_Margin_A1==22
634 03:00:19.279618 DeviceVref_Margin_A1==40
635 03:00:19.280045
636 03:00:19.280452
637 03:00:19.284791 channel==1
638 03:00:19.285216 RxClkDly_Margin_A0==88 ps 9
639 03:00:19.285623 TxDqDly_Margin_A0==98 ps 10
640 03:00:19.290381 RxClkDly_Margin_A1==88 ps 9
641 03:00:19.290809 TxDqDly_Margin_A1==88 ps 9
642 03:00:19.296012 TrainedVREFDQ_A0==78
643 03:00:19.296444 TrainedVREFDQ_A1==77
644 03:00:19.296847 VrefDac_Margin_A0==22
645 03:00:19.301632 DeviceVref_Margin_A0==36
646 03:00:19.302053 VrefDac_Margin_A1==22
647 03:00:19.307195 DeviceVref_Margin_A1==37
648 03:00:19.307618
649 03:00:19.308048 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 03:00:19.308449
651 03:00:19.340832 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
652 03:00:19.341293 2D training succeed
653 03:00:19.346416 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 03:00:19.352036 auto size-- 65535DDR cs0 size: 2048MB
655 03:00:19.352475 DDR cs1 size: 2048MB
656 03:00:19.357647 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 03:00:19.358079 cs0 DataBus test pass
658 03:00:19.363214 cs1 DataBus test pass
659 03:00:19.363644 cs0 AddrBus test pass
660 03:00:19.364079 cs1 AddrBus test pass
661 03:00:19.364478
662 03:00:19.368822 100bdlr_step_size ps== 471
663 03:00:19.369262 result report
664 03:00:19.374418 boot times 0Enable ddr reg access
665 03:00:19.379719 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 03:00:19.393538 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 03:00:20.053125 bl2z: ptr: 05129330, size: 00001e40
668 03:00:20.061873 0.0;M3 CHK:0;cm4_sp_mode 0
669 03:00:20.062365 MVN_1=0x00000000
670 03:00:20.062779 MVN_2=0x00000000
671 03:00:20.073199 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 03:00:20.073641 OPS=0x04
673 03:00:20.074051 ring efuse init
674 03:00:20.076157 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 03:00:20.081682 [0.017354 Inits done]
676 03:00:20.082113 secure task start!
677 03:00:20.082513 high task start!
678 03:00:20.082908 low task start!
679 03:00:20.085165 run into bl31
680 03:00:20.094799 NOTICE: BL31: v1.3(release):4fc40b1
681 03:00:20.101552 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 03:00:20.101985 NOTICE: BL31: G12A normal boot!
683 03:00:20.118267 NOTICE: BL31: BL33 decompress pass
684 03:00:20.122999 ERROR: Error initializing runtime service opteed_fast
685 03:00:20.919255
686 03:00:20.919796
687 03:00:20.924704 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 03:00:20.925145
689 03:00:20.928164 Model: Libre Computer AML-S905D3-CC Solitude
690 03:00:21.075247 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 03:00:21.090566 DRAM: 2 GiB (effective 3.8 GiB)
692 03:00:21.192034 Core: 406 devices, 33 uclasses, devicetree: separate
693 03:00:21.197765 WDT: Not starting watchdog@f0d0
694 03:00:21.222779 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 03:00:21.234881 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 03:00:21.239048 ** Bad device specification mmc 0 **
697 03:00:21.249928 Card did not respond to voltage select! : -110
698 03:00:21.257499 ** Bad device specification mmc 0 **
699 03:00:21.257916 Couldn't find partition mmc 0
700 03:00:21.265829 Card did not respond to voltage select! : -110
701 03:00:21.271331 ** Bad device specification mmc 0 **
702 03:00:21.271809 Couldn't find partition mmc 0
703 03:00:21.275594 Error: could not access storage.
704 03:00:21.573048 Net: eth0: ethernet@ff3f0000
705 03:00:21.573664 starting USB...
706 03:00:21.817590 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 03:00:21.818178 Starting the controller
708 03:00:21.824594 USB XHCI 1.10
709 03:00:23.378537 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 03:00:23.386927 scanning usb for storage devices... 0 Storage Device(s) found
712 03:00:23.438561 Hit any key to stop autoboot: 1
713 03:00:23.439640 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 03:00:23.440309 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 03:00:23.440811 Setting prompt string to ['=>']
716 03:00:23.441320 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 03:00:23.452962 0
718 03:00:23.453863 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 03:00:23.555107 => setenv autoload no
721 03:00:23.556143 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 03:00:23.561057 setenv autoload no
724 03:00:23.662580 => setenv initrd_high 0xffffffff
725 03:00:23.663475 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 03:00:23.667856 setenv initrd_high 0xffffffff
728 03:00:23.769503 => setenv fdt_high 0xffffffff
729 03:00:23.770369 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 03:00:23.774657 setenv fdt_high 0xffffffff
732 03:00:23.876091 => dhcp
733 03:00:23.876902 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 03:00:23.883408 dhcp
735 03:00:24.835718 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 03:00:24.836341 Speed: 1000, full duplex
737 03:00:24.836765 BOOTP broadcast 1
738 03:00:24.846762 DHCP client bound to address 192.168.6.21 (9 ms)
740 03:00:24.948160 => setenv serverip 192.168.6.2
741 03:00:24.949001 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 03:00:24.953366 setenv serverip 192.168.6.2
744 03:00:25.055621 => tftpboot 0x01080000 951331/tftp-deploy-uo17a9v8/kernel/uImage
745 03:00:25.056667 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 03:00:25.063039 tftpboot 0x01080000 951331/tftp-deploy-uo17a9v8/kernel/uImage
747 03:00:25.063500 Speed: 1000, full duplex
748 03:00:25.063913 Using ethernet@ff3f0000 device
749 03:00:25.068548 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 03:00:25.074041 Filename '951331/tftp-deploy-uo17a9v8/kernel/uImage'.
751 03:00:25.077886 Load address: 0x1080000
752 03:00:27.979243 Loading: *################################################## 43.6 MiB
753 03:00:27.979667 15 MiB/s
754 03:00:27.979907 done
755 03:00:27.983461 Bytes transferred = 45713984 (2b98a40 hex)
757 03:00:28.084551 => tftpboot 0x08000000 951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
758 03:00:28.085074 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
759 03:00:28.091613 tftpboot 0x08000000 951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot
760 03:00:28.091900 Speed: 1000, full duplex
761 03:00:28.092157 Using ethernet@ff3f0000 device
762 03:00:28.097122 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
763 03:00:28.106948 Filename '951331/tftp-deploy-uo17a9v8/ramdisk/ramdisk.cpio.gz.uboot'.
764 03:00:28.107515 Load address: 0x8000000
765 03:00:29.727907 Loading: *################################################# UDP wrong checksum 00000005 0000c0ff
766 03:00:31.975584 UDP wrong checksum 000000ff 00003ee7
767 03:00:31.987529 UDP wrong checksum 000000ff 0000d4d9
768 03:00:34.728987 T UDP wrong checksum 00000005 0000c0ff
769 03:00:44.731022 T T UDP wrong checksum 00000005 0000c0ff
770 03:00:46.645539 UDP wrong checksum 00000005 00007177
771 03:00:55.612460 T T UDP wrong checksum 000000ff 0000ff4d
772 03:00:55.621920 UDP wrong checksum 000000ff 00009340
773 03:01:04.735482 T T UDP wrong checksum 00000005 0000c0ff
774 03:01:09.642433 UDP wrong checksum 000000ff 00006b0b
775 03:01:09.653389 UDP wrong checksum 000000ff 0000f3fd
776 03:01:11.141840 T UDP wrong checksum 000000ff 00009ea3
777 03:01:11.192901 UDP wrong checksum 000000ff 00003196
778 03:01:24.740111 T T
779 03:01:24.740804 Retry count exceeded; starting again
781 03:01:24.742380 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
784 03:01:24.744520 end: 2.4 uboot-commands (duration 00:01:20) [common]
786 03:01:24.746040 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
788 03:01:24.747222 end: 2 uboot-action (duration 00:01:20) [common]
790 03:01:24.748930 Cleaning after the job
791 03:01:24.749522 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/ramdisk
792 03:01:24.750906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/kernel
793 03:01:24.797069 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/dtb
794 03:01:24.797987 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951331/tftp-deploy-uo17a9v8/modules
795 03:01:24.818647 start: 4.1 power-off (timeout 00:00:30) [common]
796 03:01:24.819353 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
797 03:01:24.854431 >> OK - accepted request
798 03:01:24.856491 Returned 0 in 0 seconds
799 03:01:24.957386 end: 4.1 power-off (duration 00:00:00) [common]
801 03:01:24.958427 start: 4.2 read-feedback (timeout 00:10:00) [common]
802 03:01:24.959118 Listened to connection for namespace 'common' for up to 1s
803 03:01:25.960130 Finalising connection for namespace 'common'
804 03:01:25.960874 Disconnecting from shell: Finalise
805 03:01:25.961397 =>
806 03:01:26.062464 end: 4.2 read-feedback (duration 00:00:01) [common]
807 03:01:26.063154 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/951331
808 03:01:26.360788 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/951331
809 03:01:26.361417 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.