Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:59:31.461254 lava-dispatcher, installed at version: 2024.01
2 04:59:31.462302 start: 0 validate
3 04:59:31.462850 Start time: 2024-11-07 04:59:31.462820+00:00 (UTC)
4 04:59:31.463582 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:59:31.464352 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:59:31.506302 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:59:31.506883 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:59:31.542600 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:59:31.543812 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:59:31.578120 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:59:31.578779 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:59:31.613639 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:59:31.614149 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:59:31.654170 validate duration: 0.19
16 04:59:31.654982 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:59:31.655292 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:59:31.655596 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:59:31.656169 Not decompressing ramdisk as can be used compressed.
20 04:59:31.656555 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 04:59:31.656826 saving as /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/ramdisk/initrd.cpio.gz
22 04:59:31.657084 total size: 5628169 (5 MB)
23 04:59:31.696225 progress 0 % (0 MB)
24 04:59:31.700539 progress 5 % (0 MB)
25 04:59:31.704830 progress 10 % (0 MB)
26 04:59:31.708633 progress 15 % (0 MB)
27 04:59:31.712806 progress 20 % (1 MB)
28 04:59:31.716599 progress 25 % (1 MB)
29 04:59:31.720757 progress 30 % (1 MB)
30 04:59:31.724942 progress 35 % (1 MB)
31 04:59:31.728714 progress 40 % (2 MB)
32 04:59:31.732924 progress 45 % (2 MB)
33 04:59:31.736687 progress 50 % (2 MB)
34 04:59:31.740830 progress 55 % (2 MB)
35 04:59:31.745011 progress 60 % (3 MB)
36 04:59:31.748758 progress 65 % (3 MB)
37 04:59:31.752979 progress 70 % (3 MB)
38 04:59:31.756722 progress 75 % (4 MB)
39 04:59:31.760863 progress 80 % (4 MB)
40 04:59:31.764589 progress 85 % (4 MB)
41 04:59:31.768767 progress 90 % (4 MB)
42 04:59:31.772547 progress 95 % (5 MB)
43 04:59:31.775961 progress 100 % (5 MB)
44 04:59:31.776705 5 MB downloaded in 0.12 s (44.88 MB/s)
45 04:59:31.777304 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:59:31.778359 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:59:31.778741 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:59:31.779088 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:59:31.779737 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/kernel/Image
51 04:59:31.780085 saving as /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/kernel/Image
52 04:59:31.780350 total size: 45713920 (43 MB)
53 04:59:31.780610 No compression specified
54 04:59:31.816722 progress 0 % (0 MB)
55 04:59:31.845524 progress 5 % (2 MB)
56 04:59:31.874411 progress 10 % (4 MB)
57 04:59:31.903537 progress 15 % (6 MB)
58 04:59:31.932633 progress 20 % (8 MB)
59 04:59:31.960887 progress 25 % (10 MB)
60 04:59:31.989375 progress 30 % (13 MB)
61 04:59:32.017962 progress 35 % (15 MB)
62 04:59:32.047044 progress 40 % (17 MB)
63 04:59:32.075193 progress 45 % (19 MB)
64 04:59:32.103787 progress 50 % (21 MB)
65 04:59:32.132373 progress 55 % (24 MB)
66 04:59:32.161369 progress 60 % (26 MB)
67 04:59:32.189521 progress 65 % (28 MB)
68 04:59:32.218010 progress 70 % (30 MB)
69 04:59:32.247179 progress 75 % (32 MB)
70 04:59:32.275753 progress 80 % (34 MB)
71 04:59:32.303851 progress 85 % (37 MB)
72 04:59:32.332448 progress 90 % (39 MB)
73 04:59:32.361311 progress 95 % (41 MB)
74 04:59:32.390109 progress 100 % (43 MB)
75 04:59:32.390660 43 MB downloaded in 0.61 s (71.43 MB/s)
76 04:59:32.391144 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:59:32.391964 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:59:32.392271 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:59:32.392540 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:59:32.393007 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:59:32.393282 saving as /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:59:32.393496 total size: 54703 (0 MB)
84 04:59:32.393704 No compression specified
85 04:59:32.438972 progress 59 % (0 MB)
86 04:59:32.439853 progress 100 % (0 MB)
87 04:59:32.440434 0 MB downloaded in 0.05 s (1.11 MB/s)
88 04:59:32.440906 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:59:32.441725 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:59:32.441989 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:59:32.442251 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:59:32.442757 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 04:59:32.443013 saving as /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/nfsrootfs/full.rootfs.tar
95 04:59:32.443221 total size: 120894716 (115 MB)
96 04:59:32.443433 Using unxz to decompress xz
97 04:59:32.485459 progress 0 % (0 MB)
98 04:59:33.275476 progress 5 % (5 MB)
99 04:59:34.112378 progress 10 % (11 MB)
100 04:59:34.905255 progress 15 % (17 MB)
101 04:59:35.648936 progress 20 % (23 MB)
102 04:59:36.241915 progress 25 % (28 MB)
103 04:59:37.064291 progress 30 % (34 MB)
104 04:59:37.848231 progress 35 % (40 MB)
105 04:59:38.210863 progress 40 % (46 MB)
106 04:59:38.584467 progress 45 % (51 MB)
107 04:59:39.302250 progress 50 % (57 MB)
108 04:59:40.183629 progress 55 % (63 MB)
109 04:59:40.963702 progress 60 % (69 MB)
110 04:59:41.720339 progress 65 % (74 MB)
111 04:59:42.494949 progress 70 % (80 MB)
112 04:59:43.328871 progress 75 % (86 MB)
113 04:59:44.117222 progress 80 % (92 MB)
114 04:59:44.881122 progress 85 % (98 MB)
115 04:59:45.734859 progress 90 % (103 MB)
116 04:59:46.509035 progress 95 % (109 MB)
117 04:59:47.333878 progress 100 % (115 MB)
118 04:59:47.346246 115 MB downloaded in 14.90 s (7.74 MB/s)
119 04:59:47.347189 end: 1.4.1 http-download (duration 00:00:15) [common]
121 04:59:47.348997 end: 1.4 download-retry (duration 00:00:15) [common]
122 04:59:47.349566 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:59:47.350124 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:59:47.350954 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/modules.tar.xz
125 04:59:47.351224 saving as /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/modules/modules.tar
126 04:59:47.351432 total size: 11607084 (11 MB)
127 04:59:47.351645 Using unxz to decompress xz
128 04:59:47.391427 progress 0 % (0 MB)
129 04:59:47.457914 progress 5 % (0 MB)
130 04:59:47.531337 progress 10 % (1 MB)
131 04:59:47.629010 progress 15 % (1 MB)
132 04:59:47.719357 progress 20 % (2 MB)
133 04:59:47.803347 progress 25 % (2 MB)
134 04:59:47.878084 progress 30 % (3 MB)
135 04:59:47.951002 progress 35 % (3 MB)
136 04:59:48.027375 progress 40 % (4 MB)
137 04:59:48.102899 progress 45 % (5 MB)
138 04:59:48.186180 progress 50 % (5 MB)
139 04:59:48.262231 progress 55 % (6 MB)
140 04:59:48.346153 progress 60 % (6 MB)
141 04:59:48.426468 progress 65 % (7 MB)
142 04:59:48.504639 progress 70 % (7 MB)
143 04:59:48.586174 progress 75 % (8 MB)
144 04:59:48.674124 progress 80 % (8 MB)
145 04:59:48.753470 progress 85 % (9 MB)
146 04:59:48.831008 progress 90 % (9 MB)
147 04:59:48.907719 progress 95 % (10 MB)
148 04:59:48.984006 progress 100 % (11 MB)
149 04:59:48.994901 11 MB downloaded in 1.64 s (6.74 MB/s)
150 04:59:48.995483 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:59:48.996683 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:59:48.997216 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 04:59:48.997739 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 05:00:06.042488 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/951297/extract-nfsrootfs-wtaum2u_
156 05:00:06.043120 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 05:00:06.043417 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 05:00:06.044204 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe
159 05:00:06.044693 makedir: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin
160 05:00:06.045038 makedir: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/tests
161 05:00:06.045357 makedir: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/results
162 05:00:06.045697 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-add-keys
163 05:00:06.046235 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-add-sources
164 05:00:06.046753 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-background-process-start
165 05:00:06.047293 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-background-process-stop
166 05:00:06.047848 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-common-functions
167 05:00:06.048386 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-echo-ipv4
168 05:00:06.048870 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-install-packages
169 05:00:06.049346 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-installed-packages
170 05:00:06.049814 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-os-build
171 05:00:06.050282 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-probe-channel
172 05:00:06.050756 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-probe-ip
173 05:00:06.051254 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-target-ip
174 05:00:06.051742 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-target-mac
175 05:00:06.052256 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-target-storage
176 05:00:06.052758 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-case
177 05:00:06.053240 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-event
178 05:00:06.053718 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-feedback
179 05:00:06.054194 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-raise
180 05:00:06.054669 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-reference
181 05:00:06.055141 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-runner
182 05:00:06.055643 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-set
183 05:00:06.056144 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-test-shell
184 05:00:06.056640 Updating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-add-keys (debian)
185 05:00:06.057173 Updating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-add-sources (debian)
186 05:00:06.057693 Updating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-install-packages (debian)
187 05:00:06.058194 Updating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-installed-packages (debian)
188 05:00:06.058691 Updating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/bin/lava-os-build (debian)
189 05:00:06.059125 Creating /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/environment
190 05:00:06.059501 LAVA metadata
191 05:00:06.059762 - LAVA_JOB_ID=951297
192 05:00:06.059993 - LAVA_DISPATCHER_IP=192.168.6.2
193 05:00:06.060373 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 05:00:06.061337 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 05:00:06.061651 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 05:00:06.061861 skipped lava-vland-overlay
197 05:00:06.062104 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 05:00:06.062360 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 05:00:06.062579 skipped lava-multinode-overlay
200 05:00:06.062822 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 05:00:06.063075 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 05:00:06.063322 Loading test definitions
203 05:00:06.063599 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 05:00:06.063819 Using /lava-951297 at stage 0
205 05:00:06.064960 uuid=951297_1.6.2.4.1 testdef=None
206 05:00:06.065268 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 05:00:06.065531 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 05:00:06.067095 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 05:00:06.067886 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 05:00:06.069926 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 05:00:06.070759 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 05:00:06.072633 runner path: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/0/tests/0_timesync-off test_uuid 951297_1.6.2.4.1
215 05:00:06.073190 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 05:00:06.074004 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 05:00:06.074237 Using /lava-951297 at stage 0
219 05:00:06.074592 Fetching tests from https://github.com/kernelci/test-definitions.git
220 05:00:06.074885 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/0/tests/1_kselftest-rtc'
221 05:00:09.496595 Running '/usr/bin/git checkout kernelci.org
222 05:00:09.895265 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 05:00:09.897599 uuid=951297_1.6.2.4.5 testdef=None
224 05:00:09.898270 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 05:00:09.899887 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 05:00:09.905930 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 05:00:09.907680 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 05:00:09.915579 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 05:00:09.917483 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 05:00:09.925223 runner path: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/0/tests/1_kselftest-rtc test_uuid 951297_1.6.2.4.5
234 05:00:09.925800 BOARD='meson-g12b-a311d-libretech-cc'
235 05:00:09.926251 BRANCH='broonie-sound'
236 05:00:09.926687 SKIPFILE='/dev/null'
237 05:00:09.927123 SKIP_INSTALL='True'
238 05:00:09.927556 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 05:00:09.928026 TST_CASENAME=''
240 05:00:09.928469 TST_CMDFILES='rtc'
241 05:00:09.929540 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 05:00:09.931238 Creating lava-test-runner.conf files
244 05:00:09.931685 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/951297/lava-overlay-go7w4jhe/lava-951297/0 for stage 0
245 05:00:09.932425 - 0_timesync-off
246 05:00:09.932930 - 1_kselftest-rtc
247 05:00:09.933608 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 05:00:09.934197 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 05:00:33.192065 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 05:00:33.192518 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 05:00:33.192785 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 05:00:33.193059 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 05:00:33.193329 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 05:00:33.815148 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 05:00:33.815618 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 05:00:33.815872 extracting modules file /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/951297/extract-nfsrootfs-wtaum2u_
257 05:00:35.190243 extracting modules file /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk
258 05:00:36.736387 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 05:00:36.736856 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 05:00:36.737135 [common] Applying overlay to NFS
261 05:00:36.737353 [common] Applying overlay /var/lib/lava/dispatcher/tmp/951297/compress-overlay-do0n4if6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/951297/extract-nfsrootfs-wtaum2u_
262 05:00:39.667689 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 05:00:39.668193 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 05:00:39.668502 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 05:00:39.668767 Converting downloaded kernel to a uImage
266 05:00:39.669098 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/kernel/Image /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/kernel/uImage
267 05:00:40.223885 output: Image Name:
268 05:00:40.224341 output: Created: Thu Nov 7 05:00:39 2024
269 05:00:40.224572 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 05:00:40.224793 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 05:00:40.225003 output: Load Address: 01080000
272 05:00:40.225211 output: Entry Point: 01080000
273 05:00:40.225415 output:
274 05:00:40.225754 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 05:00:40.226038 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 05:00:40.226321 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 05:00:40.226588 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 05:00:40.226859 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 05:00:40.227128 Building ramdisk /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk
280 05:00:42.471193 >> 166792 blocks
281 05:00:50.331823 Adding RAMdisk u-boot header.
282 05:00:50.332558 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk.cpio.gz.uboot
283 05:00:50.571040 output: Image Name:
284 05:00:50.571469 output: Created: Thu Nov 7 05:00:50 2024
285 05:00:50.571901 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 05:00:50.572372 output: Data Size: 23432079 Bytes = 22882.89 KiB = 22.35 MiB
287 05:00:50.572789 output: Load Address: 00000000
288 05:00:50.573197 output: Entry Point: 00000000
289 05:00:50.573604 output:
290 05:00:50.574630 rename /var/lib/lava/dispatcher/tmp/951297/extract-overlay-ramdisk-ffmhh2m3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
291 05:00:50.575364 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 05:00:50.575922 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 05:00:50.576512 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 05:00:50.576981 No LXC device requested
295 05:00:50.577496 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 05:00:50.578016 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 05:00:50.578521 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 05:00:50.578939 Checking files for TFTP limit of 4294967296 bytes.
299 05:00:50.581627 end: 1 tftp-deploy (duration 00:01:19) [common]
300 05:00:50.582206 start: 2 uboot-action (timeout 00:05:00) [common]
301 05:00:50.582743 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 05:00:50.583251 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 05:00:50.583764 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 05:00:50.584335 Using kernel file from prepare-kernel: 951297/tftp-deploy-yakuv5lo/kernel/uImage
305 05:00:50.584978 substitutions:
306 05:00:50.585396 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 05:00:50.585811 - {DTB_ADDR}: 0x01070000
308 05:00:50.586218 - {DTB}: 951297/tftp-deploy-yakuv5lo/dtb/meson-g12b-a311d-libretech-cc.dtb
309 05:00:50.586627 - {INITRD}: 951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
310 05:00:50.587033 - {KERNEL_ADDR}: 0x01080000
311 05:00:50.587433 - {KERNEL}: 951297/tftp-deploy-yakuv5lo/kernel/uImage
312 05:00:50.587833 - {LAVA_MAC}: None
313 05:00:50.588317 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/951297/extract-nfsrootfs-wtaum2u_
314 05:00:50.588732 - {NFS_SERVER_IP}: 192.168.6.2
315 05:00:50.589133 - {PRESEED_CONFIG}: None
316 05:00:50.589533 - {PRESEED_LOCAL}: None
317 05:00:50.589931 - {RAMDISK_ADDR}: 0x08000000
318 05:00:50.590325 - {RAMDISK}: 951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
319 05:00:50.590718 - {ROOT_PART}: None
320 05:00:50.591113 - {ROOT}: None
321 05:00:50.591506 - {SERVER_IP}: 192.168.6.2
322 05:00:50.591895 - {TEE_ADDR}: 0x83000000
323 05:00:50.592324 - {TEE}: None
324 05:00:50.592723 Parsed boot commands:
325 05:00:50.593105 - setenv autoload no
326 05:00:50.593497 - setenv initrd_high 0xffffffff
327 05:00:50.593886 - setenv fdt_high 0xffffffff
328 05:00:50.594275 - dhcp
329 05:00:50.594663 - setenv serverip 192.168.6.2
330 05:00:50.595054 - tftpboot 0x01080000 951297/tftp-deploy-yakuv5lo/kernel/uImage
331 05:00:50.595450 - tftpboot 0x08000000 951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
332 05:00:50.595843 - tftpboot 0x01070000 951297/tftp-deploy-yakuv5lo/dtb/meson-g12b-a311d-libretech-cc.dtb
333 05:00:50.596275 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/951297/extract-nfsrootfs-wtaum2u_,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 05:00:50.596688 - bootm 0x01080000 0x08000000 0x01070000
335 05:00:50.597201 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 05:00:50.598697 start: 2.3 connect-device (timeout 00:05:00) [common]
338 05:00:50.599123 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 05:00:50.614016 Setting prompt string to ['lava-test: # ']
340 05:00:50.615535 end: 2.3 connect-device (duration 00:00:00) [common]
341 05:00:50.616196 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 05:00:50.616769 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 05:00:50.617339 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 05:00:50.618489 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 05:00:50.652856 >> OK - accepted request
346 05:00:50.654962 Returned 0 in 0 seconds
347 05:00:50.756082 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 05:00:50.757677 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 05:00:50.758241 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 05:00:50.758759 Setting prompt string to ['Hit any key to stop autoboot']
352 05:00:50.759215 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 05:00:50.760842 Trying 192.168.56.21...
354 05:00:50.761339 Connected to conserv1.
355 05:00:50.761755 Escape character is '^]'.
356 05:00:50.762174
357 05:00:50.762593 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 05:00:50.763026
359 05:01:02.003865 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 05:01:02.004531 bl2_stage_init 0x01
361 05:01:02.004976 bl2_stage_init 0x81
362 05:01:02.009363 hw id: 0x0000 - pwm id 0x01
363 05:01:02.009859 bl2_stage_init 0xc1
364 05:01:02.010286 bl2_stage_init 0x02
365 05:01:02.010692
366 05:01:02.014964 L0:00000000
367 05:01:02.015432 L1:20000703
368 05:01:02.015846 L2:00008067
369 05:01:02.016287 L3:14000000
370 05:01:02.020485 B2:00402000
371 05:01:02.020919 B1:e0f83180
372 05:01:02.021321
373 05:01:02.021711 TE: 58159
374 05:01:02.022100
375 05:01:02.026094 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 05:01:02.026518
377 05:01:02.026909 Board ID = 1
378 05:01:02.031699 Set A53 clk to 24M
379 05:01:02.032154 Set A73 clk to 24M
380 05:01:02.032546 Set clk81 to 24M
381 05:01:02.037340 A53 clk: 1200 MHz
382 05:01:02.037775 A73 clk: 1200 MHz
383 05:01:02.038163 CLK81: 166.6M
384 05:01:02.038548 smccc: 00012ab5
385 05:01:02.042934 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 05:01:02.048517 board id: 1
387 05:01:02.054404 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 05:01:02.065024 fw parse done
389 05:01:02.070995 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 05:01:02.113670 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 05:01:02.124573 PIEI prepare done
392 05:01:02.125019 fastboot data load
393 05:01:02.125415 fastboot data verify
394 05:01:02.130181 verify result: 266
395 05:01:02.135759 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 05:01:02.136251 LPDDR4 probe
397 05:01:02.136671 ddr clk to 1584MHz
398 05:01:02.143734 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 05:01:02.181183
400 05:01:02.181690 dmc_version 0001
401 05:01:02.187757 Check phy result
402 05:01:02.193629 INFO : End of CA training
403 05:01:02.194083 INFO : End of initialization
404 05:01:02.199183 INFO : Training has run successfully!
405 05:01:02.199717 Check phy result
406 05:01:02.204867 INFO : End of initialization
407 05:01:02.205419 INFO : End of read enable training
408 05:01:02.210418 INFO : End of fine write leveling
409 05:01:02.216100 INFO : End of Write leveling coarse delay
410 05:01:02.216560 INFO : Training has run successfully!
411 05:01:02.216975 Check phy result
412 05:01:02.221616 INFO : End of initialization
413 05:01:02.222083 INFO : End of read dq deskew training
414 05:01:02.227207 INFO : End of MPR read delay center optimization
415 05:01:02.232813 INFO : End of write delay center optimization
416 05:01:02.238396 INFO : End of read delay center optimization
417 05:01:02.238845 INFO : End of max read latency training
418 05:01:02.244088 INFO : Training has run successfully!
419 05:01:02.244553 1D training succeed
420 05:01:02.253165 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 05:01:02.300797 Check phy result
422 05:01:02.301365 INFO : End of initialization
423 05:01:02.322442 INFO : End of 2D read delay Voltage center optimization
424 05:01:02.342664 INFO : End of 2D read delay Voltage center optimization
425 05:01:02.394823 INFO : End of 2D write delay Voltage center optimization
426 05:01:02.444330 INFO : End of 2D write delay Voltage center optimization
427 05:01:02.449753 INFO : Training has run successfully!
428 05:01:02.450206
429 05:01:02.450626 channel==0
430 05:01:02.455341 RxClkDly_Margin_A0==88 ps 9
431 05:01:02.455783 TxDqDly_Margin_A0==98 ps 10
432 05:01:02.458604 RxClkDly_Margin_A1==88 ps 9
433 05:01:02.459034 TxDqDly_Margin_A1==98 ps 10
434 05:01:02.464153 TrainedVREFDQ_A0==74
435 05:01:02.464596 TrainedVREFDQ_A1==74
436 05:01:02.469737 VrefDac_Margin_A0==25
437 05:01:02.470172 DeviceVref_Margin_A0==40
438 05:01:02.470579 VrefDac_Margin_A1==25
439 05:01:02.475281 DeviceVref_Margin_A1==40
440 05:01:02.475712
441 05:01:02.476163
442 05:01:02.476573 channel==1
443 05:01:02.476968 RxClkDly_Margin_A0==98 ps 10
444 05:01:02.480912 TxDqDly_Margin_A0==98 ps 10
445 05:01:02.481340 RxClkDly_Margin_A1==88 ps 9
446 05:01:02.486534 TxDqDly_Margin_A1==88 ps 9
447 05:01:02.486982 TrainedVREFDQ_A0==77
448 05:01:02.487390 TrainedVREFDQ_A1==77
449 05:01:02.492214 VrefDac_Margin_A0==22
450 05:01:02.492642 DeviceVref_Margin_A0==37
451 05:01:02.497730 VrefDac_Margin_A1==24
452 05:01:02.498037 DeviceVref_Margin_A1==37
453 05:01:02.498263
454 05:01:02.503221 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 05:01:02.503679
456 05:01:02.531214 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 05:01:02.536802 2D training succeed
458 05:01:02.542416 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 05:01:02.542751 auto size-- 65535DDR cs0 size: 2048MB
460 05:01:02.548017 DDR cs1 size: 2048MB
461 05:01:02.548468 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 05:01:02.553616 cs0 DataBus test pass
463 05:01:02.553923 cs1 DataBus test pass
464 05:01:02.554144 cs0 AddrBus test pass
465 05:01:02.559193 cs1 AddrBus test pass
466 05:01:02.559616
467 05:01:02.559969 100bdlr_step_size ps== 420
468 05:01:02.560356 result report
469 05:01:02.564789 boot times 0Enable ddr reg access
470 05:01:02.572515 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 05:01:02.586009 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 05:01:03.159891 0.0;M3 CHK:0;cm4_sp_mode 0
473 05:01:03.160550 MVN_1=0x00000000
474 05:01:03.165217 MVN_2=0x00000000
475 05:01:03.171093 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 05:01:03.171568 OPS=0x10
477 05:01:03.172013 ring efuse init
478 05:01:03.172433 chipver efuse init
479 05:01:03.179281 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 05:01:03.179749 [0.018960 Inits done]
481 05:01:03.180200 secure task start!
482 05:01:03.185788 high task start!
483 05:01:03.186249 low task start!
484 05:01:03.186659 run into bl31
485 05:01:03.193412 NOTICE: BL31: v1.3(release):4fc40b1
486 05:01:03.200257 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 05:01:03.200694 NOTICE: BL31: G12A normal boot!
488 05:01:03.226641 NOTICE: BL31: BL33 decompress pass
489 05:01:03.231342 ERROR: Error initializing runtime service opteed_fast
490 05:01:04.465250
491 05:01:04.465868
492 05:01:04.473550 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 05:01:04.474008
494 05:01:04.474426 Model: Libre Computer AML-A311D-CC Alta
495 05:01:04.682168 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 05:01:04.705374 DRAM: 2 GiB (effective 3.8 GiB)
497 05:01:04.848561 Core: 408 devices, 31 uclasses, devicetree: separate
498 05:01:04.854555 WDT: Not starting watchdog@f0d0
499 05:01:04.886638 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 05:01:04.899224 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 05:01:04.904226 ** Bad device specification mmc 0 **
502 05:01:04.914299 Card did not respond to voltage select! : -110
503 05:01:04.921955 ** Bad device specification mmc 0 **
504 05:01:04.922646 Couldn't find partition mmc 0
505 05:01:04.930423 Card did not respond to voltage select! : -110
506 05:01:04.935810 ** Bad device specification mmc 0 **
507 05:01:04.936394 Couldn't find partition mmc 0
508 05:01:04.940882 Error: could not access storage.
509 05:01:06.204053 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 05:01:06.204812 bl2_stage_init 0x01
511 05:01:06.205382 bl2_stage_init 0x81
512 05:01:06.209604 hw id: 0x0000 - pwm id 0x01
513 05:01:06.210122 bl2_stage_init 0xc1
514 05:01:06.210690 bl2_stage_init 0x02
515 05:01:06.211154
516 05:01:06.215248 L0:00000000
517 05:01:06.215755 L1:20000703
518 05:01:06.216250 L2:00008067
519 05:01:06.216701 L3:14000000
520 05:01:06.220791 B2:00402000
521 05:01:06.221331 B1:e0f83180
522 05:01:06.221789
523 05:01:06.222320 TE: 58159
524 05:01:06.222850
525 05:01:06.226568 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 05:01:06.227132
527 05:01:06.227618 Board ID = 1
528 05:01:06.232067 Set A53 clk to 24M
529 05:01:06.232589 Set A73 clk to 24M
530 05:01:06.233051 Set clk81 to 24M
531 05:01:06.237623 A53 clk: 1200 MHz
532 05:01:06.238124 A73 clk: 1200 MHz
533 05:01:06.238577 CLK81: 166.6M
534 05:01:06.239024 smccc: 00012ab4
535 05:01:06.243207 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 05:01:06.248786 board id: 1
537 05:01:06.254722 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 05:01:06.265333 fw parse done
539 05:01:06.271276 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 05:01:06.312963 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 05:01:06.324875 PIEI prepare done
542 05:01:06.325395 fastboot data load
543 05:01:06.325864 fastboot data verify
544 05:01:06.330683 verify result: 266
545 05:01:06.336122 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 05:01:06.336635 LPDDR4 probe
547 05:01:06.337087 ddr clk to 1584MHz
548 05:01:06.344193 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 05:01:06.381384
550 05:01:06.381941 dmc_version 0001
551 05:01:06.388070 Check phy result
552 05:01:06.393888 INFO : End of CA training
553 05:01:06.394394 INFO : End of initialization
554 05:01:06.399658 INFO : Training has run successfully!
555 05:01:06.400199 Check phy result
556 05:01:06.405089 INFO : End of initialization
557 05:01:06.405602 INFO : End of read enable training
558 05:01:06.410735 INFO : End of fine write leveling
559 05:01:06.416382 INFO : End of Write leveling coarse delay
560 05:01:06.417038 INFO : Training has run successfully!
561 05:01:06.417575 Check phy result
562 05:01:06.421981 INFO : End of initialization
563 05:01:06.422511 INFO : End of read dq deskew training
564 05:01:06.427653 INFO : End of MPR read delay center optimization
565 05:01:06.433077 INFO : End of write delay center optimization
566 05:01:06.438705 INFO : End of read delay center optimization
567 05:01:06.439210 INFO : End of max read latency training
568 05:01:06.444304 INFO : Training has run successfully!
569 05:01:06.444820 1D training succeed
570 05:01:06.453434 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 05:01:06.501131 Check phy result
572 05:01:06.501713 INFO : End of initialization
573 05:01:06.523774 INFO : End of 2D read delay Voltage center optimization
574 05:01:06.543977 INFO : End of 2D read delay Voltage center optimization
575 05:01:06.595967 INFO : End of 2D write delay Voltage center optimization
576 05:01:06.645331 INFO : End of 2D write delay Voltage center optimization
577 05:01:06.650895 INFO : Training has run successfully!
578 05:01:06.651476
579 05:01:06.652119 channel==0
580 05:01:06.656476 RxClkDly_Margin_A0==88 ps 9
581 05:01:06.656987 TxDqDly_Margin_A0==98 ps 10
582 05:01:06.659709 RxClkDly_Margin_A1==88 ps 9
583 05:01:06.660237 TxDqDly_Margin_A1==98 ps 10
584 05:01:06.665300 TrainedVREFDQ_A0==74
585 05:01:06.665806 TrainedVREFDQ_A1==74
586 05:01:06.670884 VrefDac_Margin_A0==24
587 05:01:06.671460 DeviceVref_Margin_A0==40
588 05:01:06.671924 VrefDac_Margin_A1==25
589 05:01:06.676495 DeviceVref_Margin_A1==40
590 05:01:06.677001
591 05:01:06.677462
592 05:01:06.677983 channel==1
593 05:01:06.678463 RxClkDly_Margin_A0==98 ps 10
594 05:01:06.682095 TxDqDly_Margin_A0==88 ps 9
595 05:01:06.682606 RxClkDly_Margin_A1==88 ps 9
596 05:01:06.687736 TxDqDly_Margin_A1==108 ps 11
597 05:01:06.688391 TrainedVREFDQ_A0==77
598 05:01:06.688927 TrainedVREFDQ_A1==78
599 05:01:06.693294 VrefDac_Margin_A0==22
600 05:01:06.693797 DeviceVref_Margin_A0==37
601 05:01:06.698898 VrefDac_Margin_A1==24
602 05:01:06.699397 DeviceVref_Margin_A1==36
603 05:01:06.699854
604 05:01:06.704490 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 05:01:06.705004
606 05:01:06.732509 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 05:01:06.738129 2D training succeed
608 05:01:06.743698 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 05:01:06.744306 auto size-- 65535DDR cs0 size: 2048MB
610 05:01:06.749312 DDR cs1 size: 2048MB
611 05:01:06.749836 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 05:01:06.754906 cs0 DataBus test pass
613 05:01:06.755409 cs1 DataBus test pass
614 05:01:06.755970 cs0 AddrBus test pass
615 05:01:06.760489 cs1 AddrBus test pass
616 05:01:06.761067
617 05:01:06.761605 100bdlr_step_size ps== 420
618 05:01:06.762134 result report
619 05:01:06.766125 boot times 0Enable ddr reg access
620 05:01:06.773884 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 05:01:06.786436 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 05:01:07.360996 0.0;M3 CHK:0;cm4_sp_mode 0
623 05:01:07.361730 MVN_1=0x00000000
624 05:01:07.366526 MVN_2=0x00000000
625 05:01:07.372331 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 05:01:07.372859 OPS=0x10
627 05:01:07.373327 ring efuse init
628 05:01:07.373907 chipver efuse init
629 05:01:07.377841 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 05:01:07.383458 [0.018961 Inits done]
631 05:01:07.383959 secure task start!
632 05:01:07.384521 high task start!
633 05:01:07.388077 low task start!
634 05:01:07.388567 run into bl31
635 05:01:07.394672 NOTICE: BL31: v1.3(release):4fc40b1
636 05:01:07.402469 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 05:01:07.402972 NOTICE: BL31: G12A normal boot!
638 05:01:07.427871 NOTICE: BL31: BL33 decompress pass
639 05:01:07.432634 ERROR: Error initializing runtime service opteed_fast
640 05:01:08.666418
641 05:01:08.666847
642 05:01:08.674780 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 05:01:08.675154
644 05:01:08.675385 Model: Libre Computer AML-A311D-CC Alta
645 05:01:08.883344 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 05:01:08.906791 DRAM: 2 GiB (effective 3.8 GiB)
647 05:01:09.049743 Core: 408 devices, 31 uclasses, devicetree: separate
648 05:01:09.056050 WDT: Not starting watchdog@f0d0
649 05:01:09.087803 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 05:01:09.100326 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 05:01:09.104742 ** Bad device specification mmc 0 **
652 05:01:09.115593 Card did not respond to voltage select! : -110
653 05:01:09.122454 ** Bad device specification mmc 0 **
654 05:01:09.122759 Couldn't find partition mmc 0
655 05:01:09.131606 Card did not respond to voltage select! : -110
656 05:01:09.137243 ** Bad device specification mmc 0 **
657 05:01:09.137823 Couldn't find partition mmc 0
658 05:01:09.141317 Error: could not access storage.
659 05:01:09.482487 Net: eth0: ethernet@ff3f0000
660 05:01:09.486236 starting USB...
661 05:01:09.738212 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 05:01:09.738642 Starting the controller
663 05:01:09.744619 USB XHCI 1.10
664 05:01:11.456032 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 05:01:11.456462 bl2_stage_init 0x01
666 05:01:11.456683 bl2_stage_init 0x81
667 05:01:11.461477 hw id: 0x0000 - pwm id 0x01
668 05:01:11.461766 bl2_stage_init 0xc1
669 05:01:11.461978 bl2_stage_init 0x02
670 05:01:11.462184
671 05:01:11.467180 L0:00000000
672 05:01:11.467458 L1:20000703
673 05:01:11.467671 L2:00008067
674 05:01:11.467875 L3:14000000
675 05:01:11.472671 B2:00402000
676 05:01:11.472943 B1:e0f83180
677 05:01:11.473152
678 05:01:11.473359 TE: 58159
679 05:01:11.473562
680 05:01:11.478178 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 05:01:11.478465
682 05:01:11.478677 Board ID = 1
683 05:01:11.483851 Set A53 clk to 24M
684 05:01:11.484148 Set A73 clk to 24M
685 05:01:11.484357 Set clk81 to 24M
686 05:01:11.489476 A53 clk: 1200 MHz
687 05:01:11.489770 A73 clk: 1200 MHz
688 05:01:11.489983 CLK81: 166.6M
689 05:01:11.490187 smccc: 00012ab5
690 05:01:11.495045 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 05:01:11.500590 board id: 1
692 05:01:11.506572 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 05:01:11.517306 fw parse done
694 05:01:11.523414 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 05:01:11.565911 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 05:01:11.576822 PIEI prepare done
697 05:01:11.577393 fastboot data load
698 05:01:11.577848 fastboot data verify
699 05:01:11.582392 verify result: 266
700 05:01:11.588092 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 05:01:11.588621 LPDDR4 probe
702 05:01:11.589066 ddr clk to 1584MHz
703 05:01:11.596039 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 05:01:11.633259
705 05:01:11.633920 dmc_version 0001
706 05:01:11.639918 Check phy result
707 05:01:11.645741 INFO : End of CA training
708 05:01:11.646283 INFO : End of initialization
709 05:01:11.651409 INFO : Training has run successfully!
710 05:01:11.651970 Check phy result
711 05:01:11.656997 INFO : End of initialization
712 05:01:11.657550 INFO : End of read enable training
713 05:01:11.662562 INFO : End of fine write leveling
714 05:01:11.668203 INFO : End of Write leveling coarse delay
715 05:01:11.668747 INFO : Training has run successfully!
716 05:01:11.669193 Check phy result
717 05:01:11.673751 INFO : End of initialization
718 05:01:11.674289 INFO : End of read dq deskew training
719 05:01:11.679301 INFO : End of MPR read delay center optimization
720 05:01:11.685033 INFO : End of write delay center optimization
721 05:01:11.690616 INFO : End of read delay center optimization
722 05:01:11.691212 INFO : End of max read latency training
723 05:01:11.696184 INFO : Training has run successfully!
724 05:01:11.696734 1D training succeed
725 05:01:11.705335 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 05:01:11.753004 Check phy result
727 05:01:11.753673 INFO : End of initialization
728 05:01:11.775599 INFO : End of 2D read delay Voltage center optimization
729 05:01:11.795848 INFO : End of 2D read delay Voltage center optimization
730 05:01:11.847898 INFO : End of 2D write delay Voltage center optimization
731 05:01:11.897283 INFO : End of 2D write delay Voltage center optimization
732 05:01:11.902916 INFO : Training has run successfully!
733 05:01:11.903418
734 05:01:11.903821 channel==0
735 05:01:11.908407 RxClkDly_Margin_A0==88 ps 9
736 05:01:11.908962 TxDqDly_Margin_A0==98 ps 10
737 05:01:11.914133 RxClkDly_Margin_A1==88 ps 9
738 05:01:11.914655 TxDqDly_Margin_A1==98 ps 10
739 05:01:11.915098 TrainedVREFDQ_A0==74
740 05:01:11.919549 TrainedVREFDQ_A1==74
741 05:01:11.919885 VrefDac_Margin_A0==24
742 05:01:11.920166 DeviceVref_Margin_A0==40
743 05:01:11.925001 VrefDac_Margin_A1==25
744 05:01:11.925324 DeviceVref_Margin_A1==40
745 05:01:11.925558
746 05:01:11.925778
747 05:01:11.930708 channel==1
748 05:01:11.931035 RxClkDly_Margin_A0==98 ps 10
749 05:01:11.931255 TxDqDly_Margin_A0==98 ps 10
750 05:01:11.936245 RxClkDly_Margin_A1==88 ps 9
751 05:01:11.936559 TxDqDly_Margin_A1==88 ps 9
752 05:01:11.941993 TrainedVREFDQ_A0==77
753 05:01:11.942316 TrainedVREFDQ_A1==77
754 05:01:11.942542 VrefDac_Margin_A0==22
755 05:01:11.947505 DeviceVref_Margin_A0==37
756 05:01:11.947822 VrefDac_Margin_A1==24
757 05:01:11.953020 DeviceVref_Margin_A1==37
758 05:01:11.953327
759 05:01:11.953564 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 05:01:11.953776
761 05:01:11.986566 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 05:01:11.986954 2D training succeed
763 05:01:11.992207 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 05:01:11.997758 auto size-- 65535DDR cs0 size: 2048MB
765 05:01:11.998079 DDR cs1 size: 2048MB
766 05:01:12.003339 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 05:01:12.003655 cs0 DataBus test pass
768 05:01:12.009208 cs1 DataBus test pass
769 05:01:12.009541 cs0 AddrBus test pass
770 05:01:12.009758 cs1 AddrBus test pass
771 05:01:12.009993
772 05:01:12.014640 100bdlr_step_size ps== 420
773 05:01:12.015015 result report
774 05:01:12.020191 boot times 0Enable ddr reg access
775 05:01:12.025526 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 05:01:12.039005 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 05:01:12.612818 0.0;M3 CHK:0;cm4_sp_mode 0
778 05:01:12.613517 MVN_1=0x00000000
779 05:01:12.618385 MVN_2=0x00000000
780 05:01:12.624160 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 05:01:12.624697 OPS=0x10
782 05:01:12.625151 ring efuse init
783 05:01:12.625591 chipver efuse init
784 05:01:12.629654 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 05:01:12.635369 [0.018960 Inits done]
786 05:01:12.635894 secure task start!
787 05:01:12.636399 high task start!
788 05:01:12.638911 low task start!
789 05:01:12.639437 run into bl31
790 05:01:12.646514 NOTICE: BL31: v1.3(release):4fc40b1
791 05:01:12.654329 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 05:01:12.654866 NOTICE: BL31: G12A normal boot!
793 05:01:12.679679 NOTICE: BL31: BL33 decompress pass
794 05:01:12.685471 ERROR: Error initializing runtime service opteed_fast
795 05:01:13.918209
796 05:01:13.918891
797 05:01:13.926640 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 05:01:13.927184
799 05:01:13.927653 Model: Libre Computer AML-A311D-CC Alta
800 05:01:14.135057 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 05:01:14.158470 DRAM: 2 GiB (effective 3.8 GiB)
802 05:01:14.301438 Core: 408 devices, 31 uclasses, devicetree: separate
803 05:01:14.307274 WDT: Not starting watchdog@f0d0
804 05:01:14.339665 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 05:01:14.351955 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 05:01:14.356996 ** Bad device specification mmc 0 **
807 05:01:14.367360 Card did not respond to voltage select! : -110
808 05:01:14.375002 ** Bad device specification mmc 0 **
809 05:01:14.375614 Couldn't find partition mmc 0
810 05:01:14.383395 Card did not respond to voltage select! : -110
811 05:01:14.388760 ** Bad device specification mmc 0 **
812 05:01:14.389329 Couldn't find partition mmc 0
813 05:01:14.393817 Error: could not access storage.
814 05:01:14.737291 Net: eth0: ethernet@ff3f0000
815 05:01:14.737945 starting USB...
816 05:01:14.989158 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 05:01:14.989818 Starting the controller
818 05:01:14.996130 USB XHCI 1.10
819 05:01:17.154371 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 05:01:17.155058 bl2_stage_init 0x01
821 05:01:17.155531 bl2_stage_init 0x81
822 05:01:17.159819 hw id: 0x0000 - pwm id 0x01
823 05:01:17.160419 bl2_stage_init 0xc1
824 05:01:17.160891 bl2_stage_init 0x02
825 05:01:17.161349
826 05:01:17.165415 L0:00000000
827 05:01:17.165949 L1:20000703
828 05:01:17.166409 L2:00008067
829 05:01:17.166862 L3:14000000
830 05:01:17.168533 B2:00402000
831 05:01:17.169100 B1:e0f83180
832 05:01:17.169570
833 05:01:17.170032 TE: 58159
834 05:01:17.170488
835 05:01:17.179437 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 05:01:17.179762
837 05:01:17.180324 Board ID = 1
838 05:01:17.180804 Set A53 clk to 24M
839 05:01:17.181259 Set A73 clk to 24M
840 05:01:17.185029 Set clk81 to 24M
841 05:01:17.185534 A53 clk: 1200 MHz
842 05:01:17.185984 A73 clk: 1200 MHz
843 05:01:17.190762 CLK81: 166.6M
844 05:01:17.191272 smccc: 00012ab5
845 05:01:17.196279 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 05:01:17.196811 board id: 1
847 05:01:17.205002 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 05:01:17.215473 fw parse done
849 05:01:17.221407 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 05:01:17.264176 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 05:01:17.275073 PIEI prepare done
852 05:01:17.275703 fastboot data load
853 05:01:17.276222 fastboot data verify
854 05:01:17.280752 verify result: 266
855 05:01:17.286249 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 05:01:17.286665 LPDDR4 probe
857 05:01:17.286960 ddr clk to 1584MHz
858 05:01:17.294201 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 05:01:17.331542
860 05:01:17.332181 dmc_version 0001
861 05:01:17.338104 Check phy result
862 05:01:17.344164 INFO : End of CA training
863 05:01:17.344828 INFO : End of initialization
864 05:01:17.349875 INFO : Training has run successfully!
865 05:01:17.350485 Check phy result
866 05:01:17.355259 INFO : End of initialization
867 05:01:17.355688 INFO : End of read enable training
868 05:01:17.358507 INFO : End of fine write leveling
869 05:01:17.364246 INFO : End of Write leveling coarse delay
870 05:01:17.369668 INFO : Training has run successfully!
871 05:01:17.370218 Check phy result
872 05:01:17.370651 INFO : End of initialization
873 05:01:17.375390 INFO : End of read dq deskew training
874 05:01:17.380934 INFO : End of MPR read delay center optimization
875 05:01:17.381464 INFO : End of write delay center optimization
876 05:01:17.386544 INFO : End of read delay center optimization
877 05:01:17.392063 INFO : End of max read latency training
878 05:01:17.392463 INFO : Training has run successfully!
879 05:01:17.397650 1D training succeed
880 05:01:17.403687 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 05:01:17.451254 Check phy result
882 05:01:17.451673 INFO : End of initialization
883 05:01:17.472999 INFO : End of 2D read delay Voltage center optimization
884 05:01:17.493205 INFO : End of 2D read delay Voltage center optimization
885 05:01:17.545271 INFO : End of 2D write delay Voltage center optimization
886 05:01:17.594605 INFO : End of 2D write delay Voltage center optimization
887 05:01:17.600176 INFO : Training has run successfully!
888 05:01:17.600460
889 05:01:17.600691 channel==0
890 05:01:17.605797 RxClkDly_Margin_A0==88 ps 9
891 05:01:17.606061 TxDqDly_Margin_A0==98 ps 10
892 05:01:17.609123 RxClkDly_Margin_A1==88 ps 9
893 05:01:17.609589 TxDqDly_Margin_A1==98 ps 10
894 05:01:17.614655 TrainedVREFDQ_A0==74
895 05:01:17.615117 TrainedVREFDQ_A1==74
896 05:01:17.615559 VrefDac_Margin_A0==25
897 05:01:17.620299 DeviceVref_Margin_A0==40
898 05:01:17.620821 VrefDac_Margin_A1==25
899 05:01:17.625822 DeviceVref_Margin_A1==40
900 05:01:17.626146
901 05:01:17.626351
902 05:01:17.626549 channel==1
903 05:01:17.626896 RxClkDly_Margin_A0==98 ps 10
904 05:01:17.629392 TxDqDly_Margin_A0==88 ps 9
905 05:01:17.634880 RxClkDly_Margin_A1==98 ps 10
906 05:01:17.635329 TxDqDly_Margin_A1==88 ps 9
907 05:01:17.635724 TrainedVREFDQ_A0==77
908 05:01:17.640470 TrainedVREFDQ_A1==77
909 05:01:17.640912 VrefDac_Margin_A0==22
910 05:01:17.646137 DeviceVref_Margin_A0==37
911 05:01:17.646601 VrefDac_Margin_A1==22
912 05:01:17.646991 DeviceVref_Margin_A1==37
913 05:01:17.647376
914 05:01:17.651675 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 05:01:17.652138
916 05:01:17.685251 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 05:01:17.685839 2D training succeed
918 05:01:17.690815 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 05:01:17.696450 auto size-- 65535DDR cs0 size: 2048MB
920 05:01:17.696900 DDR cs1 size: 2048MB
921 05:01:17.702016 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 05:01:17.702463 cs0 DataBus test pass
923 05:01:17.702851 cs1 DataBus test pass
924 05:01:17.707623 cs0 AddrBus test pass
925 05:01:17.708099 cs1 AddrBus test pass
926 05:01:17.708495
927 05:01:17.713230 100bdlr_step_size ps== 420
928 05:01:17.713681 result report
929 05:01:17.714072 boot times 0Enable ddr reg access
930 05:01:17.723103 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 05:01:17.736536 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 05:01:18.310385 0.0;M3 CHK:0;cm4_sp_mode 0
933 05:01:18.310834 MVN_1=0x00000000
934 05:01:18.315712 MVN_2=0x00000000
935 05:01:18.321478 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 05:01:18.322034 OPS=0x10
937 05:01:18.322472 ring efuse init
938 05:01:18.322893 chipver efuse init
939 05:01:18.327049 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 05:01:18.332653 [0.018961 Inits done]
941 05:01:18.333118 secure task start!
942 05:01:18.333543 high task start!
943 05:01:18.337230 low task start!
944 05:01:18.337698 run into bl31
945 05:01:18.343886 NOTICE: BL31: v1.3(release):4fc40b1
946 05:01:18.351705 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 05:01:18.352210 NOTICE: BL31: G12A normal boot!
948 05:01:18.377282 NOTICE: BL31: BL33 decompress pass
949 05:01:18.382931 ERROR: Error initializing runtime service opteed_fast
950 05:01:19.615725
951 05:01:19.616194
952 05:01:19.624291 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 05:01:19.624757
954 05:01:19.625119 Model: Libre Computer AML-A311D-CC Alta
955 05:01:19.832454 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 05:01:19.855828 DRAM: 2 GiB (effective 3.8 GiB)
957 05:01:19.999057 Core: 408 devices, 31 uclasses, devicetree: separate
958 05:01:20.004728 WDT: Not starting watchdog@f0d0
959 05:01:20.037198 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 05:01:20.049494 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 05:01:20.054562 ** Bad device specification mmc 0 **
962 05:01:20.064773 Card did not respond to voltage select! : -110
963 05:01:20.072574 ** Bad device specification mmc 0 **
964 05:01:20.073146 Couldn't find partition mmc 0
965 05:01:20.080919 Card did not respond to voltage select! : -110
966 05:01:20.086434 ** Bad device specification mmc 0 **
967 05:01:20.086980 Couldn't find partition mmc 0
968 05:01:20.091433 Error: could not access storage.
969 05:01:20.433913 Net: eth0: ethernet@ff3f0000
970 05:01:20.434572 starting USB...
971 05:01:20.685728 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 05:01:20.686349 Starting the controller
973 05:01:20.692722 USB XHCI 1.10
974 05:01:22.246791 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 05:01:22.254866 scanning usb for storage devices... 0 Storage Device(s) found
977 05:01:22.305930 Hit any key to stop autoboot: 1
978 05:01:22.306972 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 05:01:22.307359 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 05:01:22.307633 Setting prompt string to ['=>']
981 05:01:22.307889 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 05:01:22.312364 0
983 05:01:22.313011 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 05:01:22.313315 Sending with 10 millisecond of delay
986 05:01:23.449089 => setenv autoload no
987 05:01:23.460020 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 05:01:23.465547 setenv autoload no
989 05:01:23.466338 Sending with 10 millisecond of delay
991 05:01:25.263911 => setenv initrd_high 0xffffffff
992 05:01:25.274807 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 05:01:25.275805 setenv initrd_high 0xffffffff
994 05:01:25.276622 Sending with 10 millisecond of delay
996 05:01:26.893259 => setenv fdt_high 0xffffffff
997 05:01:26.904116 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 05:01:26.905037 setenv fdt_high 0xffffffff
999 05:01:26.905802 Sending with 10 millisecond of delay
1001 05:01:27.197728 => dhcp
1002 05:01:27.208510 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 05:01:27.209478 dhcp
1004 05:01:27.209731 Speed: 1000, full duplex
1005 05:01:27.209945 BOOTP broadcast 1
1006 05:01:27.217230 DHCP client bound to address 192.168.6.27 (8 ms)
1007 05:01:27.218040 Sending with 10 millisecond of delay
1009 05:01:28.895157 => setenv serverip 192.168.6.2
1010 05:01:28.906160 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1011 05:01:28.906759 setenv serverip 192.168.6.2
1012 05:01:28.907201 Sending with 10 millisecond of delay
1014 05:01:32.631521 => tftpboot 0x01080000 951297/tftp-deploy-yakuv5lo/kernel/uImage
1015 05:01:32.642224 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 05:01:32.642846 tftpboot 0x01080000 951297/tftp-deploy-yakuv5lo/kernel/uImage
1017 05:01:32.643082 Speed: 1000, full duplex
1018 05:01:32.643289 Using ethernet@ff3f0000 device
1019 05:01:32.644979 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 05:01:32.650398 Filename '951297/tftp-deploy-yakuv5lo/kernel/uImage'.
1021 05:01:32.654456 Load address: 0x1080000
1022 05:01:35.549798 Loading: *################################################## 43.6 MiB
1023 05:01:35.550492 15 MiB/s
1024 05:01:35.550974 done
1025 05:01:35.554091 Bytes transferred = 45713984 (2b98a40 hex)
1026 05:01:35.554959 Sending with 10 millisecond of delay
1028 05:01:40.242712 => tftpboot 0x08000000 951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
1029 05:01:40.253573 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 05:01:40.254498 tftpboot 0x08000000 951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot
1031 05:01:40.254987 Speed: 1000, full duplex
1032 05:01:40.255446 Using ethernet@ff3f0000 device
1033 05:01:40.256711 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 05:01:40.265019 Filename '951297/tftp-deploy-yakuv5lo/ramdisk/ramdisk.cpio.gz.uboot'.
1035 05:01:40.265508 Load address: 0x8000000
1036 05:01:46.867654 Loading: *#######################T ########################## UDP wrong checksum 00000005 00009c17
1037 05:01:51.868620 T UDP wrong checksum 00000005 00009c17
1038 05:02:01.871783 T T UDP wrong checksum 00000005 00009c17
1039 05:02:21.875689 T T T T UDP wrong checksum 00000005 00009c17
1040 05:02:36.879825 T T
1041 05:02:36.880271 Retry count exceeded; starting again
1043 05:02:36.881183 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1046 05:02:36.882193 end: 2.4 uboot-commands (duration 00:01:46) [common]
1048 05:02:36.883728 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 05:02:36.884527 end: 2 uboot-action (duration 00:01:46) [common]
1052 05:02:36.885666 Cleaning after the job
1053 05:02:36.886219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/ramdisk
1054 05:02:36.887433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/kernel
1055 05:02:36.918516 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/dtb
1056 05:02:36.919824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/nfsrootfs
1057 05:02:37.038137 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951297/tftp-deploy-yakuv5lo/modules
1058 05:02:37.054854 start: 4.1 power-off (timeout 00:00:30) [common]
1059 05:02:37.055520 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 05:02:37.091428 >> OK - accepted request
1061 05:02:37.093286 Returned 0 in 0 seconds
1062 05:02:37.194052 end: 4.1 power-off (duration 00:00:00) [common]
1064 05:02:37.195032 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 05:02:37.195707 Listened to connection for namespace 'common' for up to 1s
1066 05:02:38.196690 Finalising connection for namespace 'common'
1067 05:02:38.197196 Disconnecting from shell: Finalise
1068 05:02:38.197497 =>
1069 05:02:38.298208 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 05:02:38.298663 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/951297
1071 05:02:41.281808 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/951297
1072 05:02:41.282425 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.