Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:06:11.632449 lava-dispatcher, installed at version: 2024.01
2 05:06:11.633364 start: 0 validate
3 05:06:11.633884 Start time: 2024-11-07 05:06:11.633853+00:00 (UTC)
4 05:06:11.634477 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:06:11.635062 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:06:11.679125 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:06:11.679791 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:06:11.711073 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:06:11.711733 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 05:06:11.740922 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:06:11.741709 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:06:11.773065 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:06:11.773566 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-238-g2fd094b86c8ae%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:06:11.809537 validate duration: 0.18
16 05:06:11.810400 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:06:11.810744 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:06:11.811070 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:06:11.811643 Not decompressing ramdisk as can be used compressed.
20 05:06:11.812116 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 05:06:11.812404 saving as /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/ramdisk/initrd.cpio.gz
22 05:06:11.812682 total size: 5628140 (5 MB)
23 05:06:11.846624 progress 0 % (0 MB)
24 05:06:11.850801 progress 5 % (0 MB)
25 05:06:11.858212 progress 10 % (0 MB)
26 05:06:11.865084 progress 15 % (0 MB)
27 05:06:11.872384 progress 20 % (1 MB)
28 05:06:11.875921 progress 25 % (1 MB)
29 05:06:11.879914 progress 30 % (1 MB)
30 05:06:11.883851 progress 35 % (1 MB)
31 05:06:11.887383 progress 40 % (2 MB)
32 05:06:11.891272 progress 45 % (2 MB)
33 05:06:11.894827 progress 50 % (2 MB)
34 05:06:11.898760 progress 55 % (2 MB)
35 05:06:11.902667 progress 60 % (3 MB)
36 05:06:11.906199 progress 65 % (3 MB)
37 05:06:11.910203 progress 70 % (3 MB)
38 05:06:11.913756 progress 75 % (4 MB)
39 05:06:11.917663 progress 80 % (4 MB)
40 05:06:11.921298 progress 85 % (4 MB)
41 05:06:11.925289 progress 90 % (4 MB)
42 05:06:11.929152 progress 95 % (5 MB)
43 05:06:11.932417 progress 100 % (5 MB)
44 05:06:11.933104 5 MB downloaded in 0.12 s (44.58 MB/s)
45 05:06:11.933680 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:06:11.934605 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:06:11.934921 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:06:11.935206 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:06:11.935720 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/kernel/Image
51 05:06:11.936021 saving as /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/kernel/Image
52 05:06:11.936253 total size: 45713920 (43 MB)
53 05:06:11.936476 No compression specified
54 05:06:11.971706 progress 0 % (0 MB)
55 05:06:12.000794 progress 5 % (2 MB)
56 05:06:12.030380 progress 10 % (4 MB)
57 05:06:12.059701 progress 15 % (6 MB)
58 05:06:12.089297 progress 20 % (8 MB)
59 05:06:12.118053 progress 25 % (10 MB)
60 05:06:12.147302 progress 30 % (13 MB)
61 05:06:12.176588 progress 35 % (15 MB)
62 05:06:12.205635 progress 40 % (17 MB)
63 05:06:12.234609 progress 45 % (19 MB)
64 05:06:12.263507 progress 50 % (21 MB)
65 05:06:12.294841 progress 55 % (24 MB)
66 05:06:12.327849 progress 60 % (26 MB)
67 05:06:12.356468 progress 65 % (28 MB)
68 05:06:12.386368 progress 70 % (30 MB)
69 05:06:12.415528 progress 75 % (32 MB)
70 05:06:12.445404 progress 80 % (34 MB)
71 05:06:12.474473 progress 85 % (37 MB)
72 05:06:12.504418 progress 90 % (39 MB)
73 05:06:12.537004 progress 95 % (41 MB)
74 05:06:12.565770 progress 100 % (43 MB)
75 05:06:12.566339 43 MB downloaded in 0.63 s (69.19 MB/s)
76 05:06:12.566825 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:06:12.567642 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:06:12.567917 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:06:12.568226 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:06:12.568720 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 05:06:12.569005 saving as /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/dtb/meson-g12b-a311d-libretech-cc.dtb
83 05:06:12.569215 total size: 54703 (0 MB)
84 05:06:12.569424 No compression specified
85 05:06:12.606144 progress 59 % (0 MB)
86 05:06:12.607005 progress 100 % (0 MB)
87 05:06:12.607557 0 MB downloaded in 0.04 s (1.36 MB/s)
88 05:06:12.608054 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:06:12.608888 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:06:12.609149 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:06:12.609412 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:06:12.609898 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 05:06:12.610160 saving as /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/nfsrootfs/full.rootfs.tar
95 05:06:12.610367 total size: 474398908 (452 MB)
96 05:06:12.610576 Using unxz to decompress xz
97 05:06:12.644804 progress 0 % (0 MB)
98 05:06:13.744151 progress 5 % (22 MB)
99 05:06:15.178607 progress 10 % (45 MB)
100 05:06:15.609722 progress 15 % (67 MB)
101 05:06:16.436461 progress 20 % (90 MB)
102 05:06:16.971456 progress 25 % (113 MB)
103 05:06:17.327127 progress 30 % (135 MB)
104 05:06:17.929519 progress 35 % (158 MB)
105 05:06:18.839859 progress 40 % (181 MB)
106 05:06:19.689147 progress 45 % (203 MB)
107 05:06:20.410576 progress 50 % (226 MB)
108 05:06:21.180017 progress 55 % (248 MB)
109 05:06:22.393161 progress 60 % (271 MB)
110 05:06:23.797843 progress 65 % (294 MB)
111 05:06:25.380546 progress 70 % (316 MB)
112 05:06:28.527719 progress 75 % (339 MB)
113 05:06:30.991880 progress 80 % (361 MB)
114 05:06:33.870947 progress 85 % (384 MB)
115 05:06:37.069539 progress 90 % (407 MB)
116 05:06:40.253203 progress 95 % (429 MB)
117 05:06:43.444733 progress 100 % (452 MB)
118 05:06:43.458627 452 MB downloaded in 30.85 s (14.67 MB/s)
119 05:06:43.459209 end: 1.4.1 http-download (duration 00:00:31) [common]
121 05:06:43.460148 end: 1.4 download-retry (duration 00:00:31) [common]
122 05:06:43.460684 start: 1.5 download-retry (timeout 00:09:28) [common]
123 05:06:43.461208 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 05:06:43.462107 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-238-g2fd094b86c8ae/arm64/defconfig/gcc-12/modules.tar.xz
125 05:06:43.462577 saving as /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/modules/modules.tar
126 05:06:43.462978 total size: 11607084 (11 MB)
127 05:06:43.463390 Using unxz to decompress xz
128 05:06:43.508071 progress 0 % (0 MB)
129 05:06:43.576157 progress 5 % (0 MB)
130 05:06:43.651830 progress 10 % (1 MB)
131 05:06:43.752744 progress 15 % (1 MB)
132 05:06:43.845386 progress 20 % (2 MB)
133 05:06:43.925748 progress 25 % (2 MB)
134 05:06:44.001407 progress 30 % (3 MB)
135 05:06:44.075833 progress 35 % (3 MB)
136 05:06:44.153156 progress 40 % (4 MB)
137 05:06:44.229763 progress 45 % (5 MB)
138 05:06:44.314398 progress 50 % (5 MB)
139 05:06:44.394011 progress 55 % (6 MB)
140 05:06:44.479882 progress 60 % (6 MB)
141 05:06:44.560851 progress 65 % (7 MB)
142 05:06:44.636867 progress 70 % (7 MB)
143 05:06:44.718152 progress 75 % (8 MB)
144 05:06:44.801004 progress 80 % (8 MB)
145 05:06:44.880510 progress 85 % (9 MB)
146 05:06:44.958464 progress 90 % (9 MB)
147 05:06:45.035760 progress 95 % (10 MB)
148 05:06:45.112469 progress 100 % (11 MB)
149 05:06:45.124348 11 MB downloaded in 1.66 s (6.66 MB/s)
150 05:06:45.124960 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:06:45.125835 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:06:45.126111 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 05:06:45.126379 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 05:07:00.446867 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/951315/extract-nfsrootfs-zaukj8m3
156 05:07:00.447473 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 05:07:00.447760 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 05:07:00.448586 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj
159 05:07:00.449061 makedir: /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin
160 05:07:00.449416 makedir: /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/tests
161 05:07:00.449734 makedir: /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/results
162 05:07:00.450068 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-add-keys
163 05:07:00.450591 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-add-sources
164 05:07:00.451093 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-background-process-start
165 05:07:00.451583 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-background-process-stop
166 05:07:00.452132 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-common-functions
167 05:07:00.452630 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-echo-ipv4
168 05:07:00.453130 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-install-packages
169 05:07:00.453655 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-installed-packages
170 05:07:00.454128 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-os-build
171 05:07:00.454667 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-probe-channel
172 05:07:00.455149 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-probe-ip
173 05:07:00.455609 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-target-ip
174 05:07:00.456104 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-target-mac
175 05:07:00.456581 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-target-storage
176 05:07:00.457078 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-case
177 05:07:00.457575 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-event
178 05:07:00.458040 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-feedback
179 05:07:00.458517 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-raise
180 05:07:00.458985 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-reference
181 05:07:00.459478 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-runner
182 05:07:00.459960 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-set
183 05:07:00.460481 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-test-shell
184 05:07:00.460985 Updating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-install-packages (oe)
185 05:07:00.461532 Updating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/bin/lava-installed-packages (oe)
186 05:07:00.461968 Creating /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/environment
187 05:07:00.462332 LAVA metadata
188 05:07:00.462586 - LAVA_JOB_ID=951315
189 05:07:00.462799 - LAVA_DISPATCHER_IP=192.168.6.2
190 05:07:00.463151 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 05:07:00.464114 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 05:07:00.464423 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 05:07:00.464630 skipped lava-vland-overlay
194 05:07:00.464867 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 05:07:00.465118 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 05:07:00.465333 skipped lava-multinode-overlay
197 05:07:00.465570 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 05:07:00.465901 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 05:07:00.466152 Loading test definitions
200 05:07:00.466427 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 05:07:00.466646 Using /lava-951315 at stage 0
202 05:07:00.467780 uuid=951315_1.6.2.4.1 testdef=None
203 05:07:00.468102 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 05:07:00.468369 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 05:07:00.470125 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 05:07:00.470909 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 05:07:00.473035 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 05:07:00.473859 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 05:07:00.475882 runner path: /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 951315_1.6.2.4.1
212 05:07:00.476464 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 05:07:00.477221 Creating lava-test-runner.conf files
215 05:07:00.477422 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/951315/lava-overlay-ezdag3mj/lava-951315/0 for stage 0
216 05:07:00.477754 - 0_v4l2-decoder-conformance-h265
217 05:07:00.478092 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 05:07:00.478363 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 05:07:00.499553 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 05:07:00.499916 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 05:07:00.500202 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 05:07:00.500465 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 05:07:00.500726 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 05:07:01.111297 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 05:07:01.111737 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 05:07:01.112014 extracting modules file /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/951315/extract-nfsrootfs-zaukj8m3
227 05:07:02.463163 extracting modules file /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk
228 05:07:03.894073 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 05:07:03.894548 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 05:07:03.894823 [common] Applying overlay to NFS
231 05:07:03.895037 [common] Applying overlay /var/lib/lava/dispatcher/tmp/951315/compress-overlay-26wdyg7g/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/951315/extract-nfsrootfs-zaukj8m3
232 05:07:03.924594 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 05:07:03.924974 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 05:07:03.925243 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 05:07:03.925649 Converting downloaded kernel to a uImage
236 05:07:03.925967 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/kernel/Image /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/kernel/uImage
237 05:07:04.414373 output: Image Name:
238 05:07:04.414783 output: Created: Thu Nov 7 05:07:03 2024
239 05:07:04.414991 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 05:07:04.415194 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 05:07:04.415395 output: Load Address: 01080000
242 05:07:04.415592 output: Entry Point: 01080000
243 05:07:04.415789 output:
244 05:07:04.416184 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 05:07:04.416472 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 05:07:04.416743 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 05:07:04.416997 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 05:07:04.417252 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 05:07:04.417518 Building ramdisk /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk
250 05:07:06.569772 >> 166792 blocks
251 05:07:14.368917 Adding RAMdisk u-boot header.
252 05:07:14.369596 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk.cpio.gz.uboot
253 05:07:14.657810 output: Image Name:
254 05:07:14.658230 output: Created: Thu Nov 7 05:07:14 2024
255 05:07:14.658443 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 05:07:14.658649 output: Data Size: 23432189 Bytes = 22883.00 KiB = 22.35 MiB
257 05:07:14.658851 output: Load Address: 00000000
258 05:07:14.659048 output: Entry Point: 00000000
259 05:07:14.659244 output:
260 05:07:14.659910 rename /var/lib/lava/dispatcher/tmp/951315/extract-overlay-ramdisk-3ivbi0hb/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
261 05:07:14.660609 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 05:07:14.661151 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 05:07:14.661707 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 05:07:14.662158 No LXC device requested
265 05:07:14.662651 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 05:07:14.663149 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 05:07:14.663634 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 05:07:14.664072 Checking files for TFTP limit of 4294967296 bytes.
269 05:07:14.666717 end: 1 tftp-deploy (duration 00:01:03) [common]
270 05:07:14.667279 start: 2 uboot-action (timeout 00:05:00) [common]
271 05:07:14.667796 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 05:07:14.668328 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 05:07:14.668826 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 05:07:14.669364 Using kernel file from prepare-kernel: 951315/tftp-deploy-guncsc79/kernel/uImage
275 05:07:14.669982 substitutions:
276 05:07:14.670385 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 05:07:14.670782 - {DTB_ADDR}: 0x01070000
278 05:07:14.671174 - {DTB}: 951315/tftp-deploy-guncsc79/dtb/meson-g12b-a311d-libretech-cc.dtb
279 05:07:14.671569 - {INITRD}: 951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
280 05:07:14.671959 - {KERNEL_ADDR}: 0x01080000
281 05:07:14.672376 - {KERNEL}: 951315/tftp-deploy-guncsc79/kernel/uImage
282 05:07:14.672764 - {LAVA_MAC}: None
283 05:07:14.673183 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/951315/extract-nfsrootfs-zaukj8m3
284 05:07:14.673573 - {NFS_SERVER_IP}: 192.168.6.2
285 05:07:14.673957 - {PRESEED_CONFIG}: None
286 05:07:14.674338 - {PRESEED_LOCAL}: None
287 05:07:14.674719 - {RAMDISK_ADDR}: 0x08000000
288 05:07:14.675099 - {RAMDISK}: 951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
289 05:07:14.675486 - {ROOT_PART}: None
290 05:07:14.675872 - {ROOT}: None
291 05:07:14.676282 - {SERVER_IP}: 192.168.6.2
292 05:07:14.676666 - {TEE_ADDR}: 0x83000000
293 05:07:14.677046 - {TEE}: None
294 05:07:14.677429 Parsed boot commands:
295 05:07:14.677804 - setenv autoload no
296 05:07:14.678185 - setenv initrd_high 0xffffffff
297 05:07:14.678566 - setenv fdt_high 0xffffffff
298 05:07:14.678944 - dhcp
299 05:07:14.679323 - setenv serverip 192.168.6.2
300 05:07:14.679700 - tftpboot 0x01080000 951315/tftp-deploy-guncsc79/kernel/uImage
301 05:07:14.680110 - tftpboot 0x08000000 951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
302 05:07:14.680497 - tftpboot 0x01070000 951315/tftp-deploy-guncsc79/dtb/meson-g12b-a311d-libretech-cc.dtb
303 05:07:14.680879 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/951315/extract-nfsrootfs-zaukj8m3,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 05:07:14.681271 - bootm 0x01080000 0x08000000 0x01070000
305 05:07:14.681757 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 05:07:14.683216 start: 2.3 connect-device (timeout 00:05:00) [common]
308 05:07:14.683627 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 05:07:14.698270 Setting prompt string to ['lava-test: # ']
310 05:07:14.699745 end: 2.3 connect-device (duration 00:00:00) [common]
311 05:07:14.700375 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 05:07:14.700916 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 05:07:14.701446 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 05:07:14.702541 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 05:07:14.739543 >> OK - accepted request
316 05:07:14.741672 Returned 0 in 0 seconds
317 05:07:14.842756 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 05:07:14.844374 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 05:07:14.844946 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 05:07:14.845459 Setting prompt string to ['Hit any key to stop autoboot']
322 05:07:14.845916 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 05:07:14.847439 Trying 192.168.56.21...
324 05:07:14.847900 Connected to conserv1.
325 05:07:14.848346 Escape character is '^]'.
326 05:07:14.848761
327 05:07:14.849179 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 05:07:14.849580
329 05:07:25.967192 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 05:07:25.967824 bl2_stage_init 0x01
331 05:07:25.968283 bl2_stage_init 0x81
332 05:07:25.972696 hw id: 0x0000 - pwm id 0x01
333 05:07:25.973159 bl2_stage_init 0xc1
334 05:07:25.973553 bl2_stage_init 0x02
335 05:07:25.973939
336 05:07:25.978219 L0:00000000
337 05:07:25.978663 L1:20000703
338 05:07:25.979053 L2:00008067
339 05:07:25.979434 L3:14000000
340 05:07:25.983820 B2:00402000
341 05:07:25.984288 B1:e0f83180
342 05:07:25.984688
343 05:07:25.985075 TE: 58124
344 05:07:25.985459
345 05:07:25.989367 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 05:07:25.989798
347 05:07:25.990188 Board ID = 1
348 05:07:25.995005 Set A53 clk to 24M
349 05:07:25.995424 Set A73 clk to 24M
350 05:07:25.995809 Set clk81 to 24M
351 05:07:26.000648 A53 clk: 1200 MHz
352 05:07:26.001064 A73 clk: 1200 MHz
353 05:07:26.001448 CLK81: 166.6M
354 05:07:26.001824 smccc: 00012a91
355 05:07:26.006200 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 05:07:26.011704 board id: 1
357 05:07:26.017729 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 05:07:26.028384 fw parse done
359 05:07:26.034334 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 05:07:26.076923 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 05:07:26.087759 PIEI prepare done
362 05:07:26.088214 fastboot data load
363 05:07:26.088607 fastboot data verify
364 05:07:26.093404 verify result: 266
365 05:07:26.099020 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 05:07:26.099437 LPDDR4 probe
367 05:07:26.099828 ddr clk to 1584MHz
368 05:07:26.107004 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 05:07:26.144267
370 05:07:26.144680 dmc_version 0001
371 05:07:26.150930 Check phy result
372 05:07:26.156761 INFO : End of CA training
373 05:07:26.157169 INFO : End of initialization
374 05:07:26.162395 INFO : Training has run successfully!
375 05:07:26.162802 Check phy result
376 05:07:26.167962 INFO : End of initialization
377 05:07:26.168402 INFO : End of read enable training
378 05:07:26.173645 INFO : End of fine write leveling
379 05:07:26.179197 INFO : End of Write leveling coarse delay
380 05:07:26.179603 INFO : Training has run successfully!
381 05:07:26.180013 Check phy result
382 05:07:26.184770 INFO : End of initialization
383 05:07:26.185179 INFO : End of read dq deskew training
384 05:07:26.190380 INFO : End of MPR read delay center optimization
385 05:07:26.195951 INFO : End of write delay center optimization
386 05:07:26.201644 INFO : End of read delay center optimization
387 05:07:26.202056 INFO : End of max read latency training
388 05:07:26.207163 INFO : Training has run successfully!
389 05:07:26.207573 1D training succeed
390 05:07:26.216468 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 05:07:26.263923 Check phy result
392 05:07:26.264379 INFO : End of initialization
393 05:07:26.285794 INFO : End of 2D read delay Voltage center optimization
394 05:07:26.305994 INFO : End of 2D read delay Voltage center optimization
395 05:07:26.357992 INFO : End of 2D write delay Voltage center optimization
396 05:07:26.407460 INFO : End of 2D write delay Voltage center optimization
397 05:07:26.413067 INFO : Training has run successfully!
398 05:07:26.413495
399 05:07:26.413891 channel==0
400 05:07:26.418544 RxClkDly_Margin_A0==88 ps 9
401 05:07:26.418964 TxDqDly_Margin_A0==98 ps 10
402 05:07:26.421971 RxClkDly_Margin_A1==88 ps 9
403 05:07:26.422380 TxDqDly_Margin_A1==98 ps 10
404 05:07:26.427539 TrainedVREFDQ_A0==74
405 05:07:26.427953 TrainedVREFDQ_A1==74
406 05:07:26.428389 VrefDac_Margin_A0==25
407 05:07:26.433150 DeviceVref_Margin_A0==40
408 05:07:26.433563 VrefDac_Margin_A1==25
409 05:07:26.438828 DeviceVref_Margin_A1==40
410 05:07:26.439236
411 05:07:26.439623
412 05:07:26.440038 channel==1
413 05:07:26.440424 RxClkDly_Margin_A0==98 ps 10
414 05:07:26.444318 TxDqDly_Margin_A0==88 ps 9
415 05:07:26.444733 RxClkDly_Margin_A1==88 ps 9
416 05:07:26.449924 TxDqDly_Margin_A1==88 ps 9
417 05:07:26.450349 TrainedVREFDQ_A0==77
418 05:07:26.450744 TrainedVREFDQ_A1==77
419 05:07:26.455533 VrefDac_Margin_A0==22
420 05:07:26.455951 DeviceVref_Margin_A0==37
421 05:07:26.461147 VrefDac_Margin_A1==24
422 05:07:26.461558 DeviceVref_Margin_A1==37
423 05:07:26.461944
424 05:07:26.466831 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 05:07:26.467236
426 05:07:26.494836 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 05:07:26.500371 2D training succeed
428 05:07:26.505787 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 05:07:26.506218 auto size-- 65535DDR cs0 size: 2048MB
430 05:07:26.511342 DDR cs1 size: 2048MB
431 05:07:26.511767 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 05:07:26.516934 cs0 DataBus test pass
433 05:07:26.517364 cs1 DataBus test pass
434 05:07:26.517764 cs0 AddrBus test pass
435 05:07:26.522799 cs1 AddrBus test pass
436 05:07:26.523372
437 05:07:26.523781 100bdlr_step_size ps== 420
438 05:07:26.524241 result report
439 05:07:26.528186 boot times 0Enable ddr reg access
440 05:07:26.535745 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 05:07:26.549193 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 05:07:27.123095 0.0;M3 CHK:0;cm4_sp_mode 0
443 05:07:27.123677 MVN_1=0x00000000
444 05:07:27.128524 MVN_2=0x00000000
445 05:07:27.134173 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 05:07:27.134600 OPS=0x10
447 05:07:27.134998 ring efuse init
448 05:07:27.135387 chipver efuse init
449 05:07:27.142474 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 05:07:27.142907 [0.018961 Inits done]
451 05:07:27.143296 secure task start!
452 05:07:27.149949 high task start!
453 05:07:27.150362 low task start!
454 05:07:27.150755 run into bl31
455 05:07:27.156703 NOTICE: BL31: v1.3(release):4fc40b1
456 05:07:27.164423 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 05:07:27.164855 NOTICE: BL31: G12A normal boot!
458 05:07:27.189794 NOTICE: BL31: BL33 decompress pass
459 05:07:27.195551 ERROR: Error initializing runtime service opteed_fast
460 05:07:28.428467
461 05:07:28.429089
462 05:07:28.436745 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 05:07:28.437176
464 05:07:28.437570 Model: Libre Computer AML-A311D-CC Alta
465 05:07:28.645235 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 05:07:28.668515 DRAM: 2 GiB (effective 3.8 GiB)
467 05:07:28.811475 Core: 408 devices, 31 uclasses, devicetree: separate
468 05:07:28.817362 WDT: Not starting watchdog@f0d0
469 05:07:28.849598 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 05:07:28.862088 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 05:07:28.867077 ** Bad device specification mmc 0 **
472 05:07:28.877386 Card did not respond to voltage select! : -110
473 05:07:28.885087 ** Bad device specification mmc 0 **
474 05:07:28.885502 Couldn't find partition mmc 0
475 05:07:28.893373 Card did not respond to voltage select! : -110
476 05:07:28.898972 ** Bad device specification mmc 0 **
477 05:07:28.899387 Couldn't find partition mmc 0
478 05:07:28.904050 Error: could not access storage.
479 05:07:30.166624 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 05:07:30.167249 bl2_stage_init 0x01
481 05:07:30.167684 bl2_stage_init 0x81
482 05:07:30.172182 hw id: 0x0000 - pwm id 0x01
483 05:07:30.172660 bl2_stage_init 0xc1
484 05:07:30.173076 bl2_stage_init 0x02
485 05:07:30.173478
486 05:07:30.177806 L0:00000000
487 05:07:30.178272 L1:20000703
488 05:07:30.178683 L2:00008067
489 05:07:30.179156 L3:14000000
490 05:07:30.183521 B2:00402000
491 05:07:30.184084 B1:e0f83180
492 05:07:30.184500
493 05:07:30.185006 TE: 58124
494 05:07:30.185450
495 05:07:30.188985 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 05:07:30.189321
497 05:07:30.189541 Board ID = 1
498 05:07:30.194489 Set A53 clk to 24M
499 05:07:30.195012 Set A73 clk to 24M
500 05:07:30.195444 Set clk81 to 24M
501 05:07:30.200197 A53 clk: 1200 MHz
502 05:07:30.200557 A73 clk: 1200 MHz
503 05:07:30.200772 CLK81: 166.6M
504 05:07:30.200984 smccc: 00012a92
505 05:07:30.205614 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 05:07:30.211361 board id: 1
507 05:07:30.217215 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 05:07:30.227857 fw parse done
509 05:07:30.233733 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 05:07:30.276382 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 05:07:30.287223 PIEI prepare done
512 05:07:30.287731 fastboot data load
513 05:07:30.288202 fastboot data verify
514 05:07:30.292932 verify result: 266
515 05:07:30.298510 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 05:07:30.298986 LPDDR4 probe
517 05:07:30.299402 ddr clk to 1584MHz
518 05:07:30.306488 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 05:07:30.343860
520 05:07:30.344393 dmc_version 0001
521 05:07:30.350393 Check phy result
522 05:07:30.356277 INFO : End of CA training
523 05:07:30.356752 INFO : End of initialization
524 05:07:30.361975 INFO : Training has run successfully!
525 05:07:30.362451 Check phy result
526 05:07:30.367488 INFO : End of initialization
527 05:07:30.367999 INFO : End of read enable training
528 05:07:30.373174 INFO : End of fine write leveling
529 05:07:30.378675 INFO : End of Write leveling coarse delay
530 05:07:30.379172 INFO : Training has run successfully!
531 05:07:30.379590 Check phy result
532 05:07:30.384353 INFO : End of initialization
533 05:07:30.384854 INFO : End of read dq deskew training
534 05:07:30.389944 INFO : End of MPR read delay center optimization
535 05:07:30.395515 INFO : End of write delay center optimization
536 05:07:30.401198 INFO : End of read delay center optimization
537 05:07:30.401676 INFO : End of max read latency training
538 05:07:30.406703 INFO : Training has run successfully!
539 05:07:30.407164 1D training succeed
540 05:07:30.416104 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 05:07:30.463671 Check phy result
542 05:07:30.464231 INFO : End of initialization
543 05:07:30.485346 INFO : End of 2D read delay Voltage center optimization
544 05:07:30.505424 INFO : End of 2D read delay Voltage center optimization
545 05:07:30.557503 INFO : End of 2D write delay Voltage center optimization
546 05:07:30.606844 INFO : End of 2D write delay Voltage center optimization
547 05:07:30.612418 INFO : Training has run successfully!
548 05:07:30.612843
549 05:07:30.613247 channel==0
550 05:07:30.618005 RxClkDly_Margin_A0==88 ps 9
551 05:07:30.618449 TxDqDly_Margin_A0==98 ps 10
552 05:07:30.623594 RxClkDly_Margin_A1==88 ps 9
553 05:07:30.624077 TxDqDly_Margin_A1==98 ps 10
554 05:07:30.624492 TrainedVREFDQ_A0==74
555 05:07:30.629204 TrainedVREFDQ_A1==74
556 05:07:30.629627 VrefDac_Margin_A0==25
557 05:07:30.630024 DeviceVref_Margin_A0==40
558 05:07:30.634795 VrefDac_Margin_A1==25
559 05:07:30.635211 DeviceVref_Margin_A1==40
560 05:07:30.635603
561 05:07:30.636032
562 05:07:30.640398 channel==1
563 05:07:30.640821 RxClkDly_Margin_A0==98 ps 10
564 05:07:30.641217 TxDqDly_Margin_A0==98 ps 10
565 05:07:30.645980 RxClkDly_Margin_A1==88 ps 9
566 05:07:30.646409 TxDqDly_Margin_A1==88 ps 9
567 05:07:30.651612 TrainedVREFDQ_A0==77
568 05:07:30.652074 TrainedVREFDQ_A1==77
569 05:07:30.652480 VrefDac_Margin_A0==22
570 05:07:30.657209 DeviceVref_Margin_A0==37
571 05:07:30.657634 VrefDac_Margin_A1==24
572 05:07:30.662799 DeviceVref_Margin_A1==37
573 05:07:30.663237
574 05:07:30.663637 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 05:07:30.664059
576 05:07:30.696410 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 05:07:30.696864 2D training succeed
578 05:07:30.702005 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 05:07:30.707610 auto size-- 65535DDR cs0 size: 2048MB
580 05:07:30.708061 DDR cs1 size: 2048MB
581 05:07:30.713214 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 05:07:30.713637 cs0 DataBus test pass
583 05:07:30.718801 cs1 DataBus test pass
584 05:07:30.719226 cs0 AddrBus test pass
585 05:07:30.719626 cs1 AddrBus test pass
586 05:07:30.720050
587 05:07:30.724391 100bdlr_step_size ps== 420
588 05:07:30.724830 result report
589 05:07:30.729999 boot times 0Enable ddr reg access
590 05:07:30.735355 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 05:07:30.748811 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 05:07:31.322492 0.0;M3 CHK:0;cm4_sp_mode 0
593 05:07:31.323030 MVN_1=0x00000000
594 05:07:31.328063 MVN_2=0x00000000
595 05:07:31.333744 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 05:07:31.334215 OPS=0x10
597 05:07:31.334655 ring efuse init
598 05:07:31.335042 chipver efuse init
599 05:07:31.339301 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 05:07:31.344908 [0.018961 Inits done]
601 05:07:31.345327 secure task start!
602 05:07:31.345709 high task start!
603 05:07:31.349481 low task start!
604 05:07:31.349897 run into bl31
605 05:07:31.356223 NOTICE: BL31: v1.3(release):4fc40b1
606 05:07:31.363938 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 05:07:31.364378 NOTICE: BL31: G12A normal boot!
608 05:07:31.389339 NOTICE: BL31: BL33 decompress pass
609 05:07:31.394953 ERROR: Error initializing runtime service opteed_fast
610 05:07:32.628227
611 05:07:32.628857
612 05:07:32.636396 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 05:07:32.636832
614 05:07:32.637243 Model: Libre Computer AML-A311D-CC Alta
615 05:07:32.844833 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 05:07:32.868197 DRAM: 2 GiB (effective 3.8 GiB)
617 05:07:33.011166 Core: 408 devices, 31 uclasses, devicetree: separate
618 05:07:33.017115 WDT: Not starting watchdog@f0d0
619 05:07:33.049429 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 05:07:33.061916 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 05:07:33.066772 ** Bad device specification mmc 0 **
622 05:07:33.077068 Card did not respond to voltage select! : -110
623 05:07:33.084753 ** Bad device specification mmc 0 **
624 05:07:33.085180 Couldn't find partition mmc 0
625 05:07:33.093175 Card did not respond to voltage select! : -110
626 05:07:33.098730 ** Bad device specification mmc 0 **
627 05:07:33.099155 Couldn't find partition mmc 0
628 05:07:33.103750 Error: could not access storage.
629 05:07:33.446162 Net: eth0: ethernet@ff3f0000
630 05:07:33.446663 starting USB...
631 05:07:33.698065 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 05:07:33.698591 Starting the controller
633 05:07:33.704968 USB XHCI 1.10
634 05:07:35.418235 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 05:07:35.418838 bl2_stage_init 0x01
636 05:07:35.419260 bl2_stage_init 0x81
637 05:07:35.423790 hw id: 0x0000 - pwm id 0x01
638 05:07:35.424273 bl2_stage_init 0xc1
639 05:07:35.424682 bl2_stage_init 0x02
640 05:07:35.425079
641 05:07:35.429509 L0:00000000
642 05:07:35.429936 L1:20000703
643 05:07:35.430333 L2:00008067
644 05:07:35.430731 L3:14000000
645 05:07:35.434942 B2:00402000
646 05:07:35.435363 B1:e0f83180
647 05:07:35.435762
648 05:07:35.436199 TE: 58159
649 05:07:35.436598
650 05:07:35.440633 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 05:07:35.441069
652 05:07:35.441475 Board ID = 1
653 05:07:35.446182 Set A53 clk to 24M
654 05:07:35.446609 Set A73 clk to 24M
655 05:07:35.447007 Set clk81 to 24M
656 05:07:35.451691 A53 clk: 1200 MHz
657 05:07:35.452135 A73 clk: 1200 MHz
658 05:07:35.452533 CLK81: 166.6M
659 05:07:35.452927 smccc: 00012ab5
660 05:07:35.457285 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 05:07:35.462932 board id: 1
662 05:07:35.468982 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 05:07:35.479377 fw parse done
664 05:07:35.485357 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 05:07:35.528659 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 05:07:35.538958 PIEI prepare done
667 05:07:35.539416 fastboot data load
668 05:07:35.539826 fastboot data verify
669 05:07:35.544571 verify result: 266
670 05:07:35.550168 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 05:07:35.550604 LPDDR4 probe
672 05:07:35.551016 ddr clk to 1584MHz
673 05:07:35.558147 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 05:07:35.595436
675 05:07:35.595884 dmc_version 0001
676 05:07:35.602080 Check phy result
677 05:07:35.607975 INFO : End of CA training
678 05:07:35.608429 INFO : End of initialization
679 05:07:35.613625 INFO : Training has run successfully!
680 05:07:35.614050 Check phy result
681 05:07:35.619173 INFO : End of initialization
682 05:07:35.619595 INFO : End of read enable training
683 05:07:35.622467 INFO : End of fine write leveling
684 05:07:35.628017 INFO : End of Write leveling coarse delay
685 05:07:35.633641 INFO : Training has run successfully!
686 05:07:35.634068 Check phy result
687 05:07:35.634470 INFO : End of initialization
688 05:07:35.639226 INFO : End of read dq deskew training
689 05:07:35.644790 INFO : End of MPR read delay center optimization
690 05:07:35.645209 INFO : End of write delay center optimization
691 05:07:35.650448 INFO : End of read delay center optimization
692 05:07:35.655971 INFO : End of max read latency training
693 05:07:35.656428 INFO : Training has run successfully!
694 05:07:35.661598 1D training succeed
695 05:07:35.667611 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 05:07:35.715132 Check phy result
697 05:07:35.715558 INFO : End of initialization
698 05:07:35.736712 INFO : End of 2D read delay Voltage center optimization
699 05:07:35.756861 INFO : End of 2D read delay Voltage center optimization
700 05:07:35.808813 INFO : End of 2D write delay Voltage center optimization
701 05:07:35.858235 INFO : End of 2D write delay Voltage center optimization
702 05:07:35.863760 INFO : Training has run successfully!
703 05:07:35.864466
704 05:07:35.864973 channel==0
705 05:07:35.869548 RxClkDly_Margin_A0==88 ps 9
706 05:07:35.870196 TxDqDly_Margin_A0==98 ps 10
707 05:07:35.872719 RxClkDly_Margin_A1==88 ps 9
708 05:07:35.873356 TxDqDly_Margin_A1==98 ps 10
709 05:07:35.878243 TrainedVREFDQ_A0==74
710 05:07:35.878616 TrainedVREFDQ_A1==75
711 05:07:35.883671 VrefDac_Margin_A0==25
712 05:07:35.884049 DeviceVref_Margin_A0==40
713 05:07:35.884287 VrefDac_Margin_A1==25
714 05:07:35.889070 DeviceVref_Margin_A1==39
715 05:07:35.889342
716 05:07:35.889564
717 05:07:35.889777 channel==1
718 05:07:35.889982 RxClkDly_Margin_A0==98 ps 10
719 05:07:35.894723 TxDqDly_Margin_A0==88 ps 9
720 05:07:35.895002 RxClkDly_Margin_A1==98 ps 10
721 05:07:35.900381 TxDqDly_Margin_A1==98 ps 10
722 05:07:35.900658 TrainedVREFDQ_A0==74
723 05:07:35.900873 TrainedVREFDQ_A1==77
724 05:07:35.905935 VrefDac_Margin_A0==22
725 05:07:35.906197 DeviceVref_Margin_A0==40
726 05:07:35.911471 VrefDac_Margin_A1==22
727 05:07:35.911739 DeviceVref_Margin_A1==37
728 05:07:35.911974
729 05:07:35.917175 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 05:07:35.917584
731 05:07:35.945172 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 05:07:35.950724 2D training succeed
733 05:07:35.956333 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 05:07:35.956843 auto size-- 65535DDR cs0 size: 2048MB
735 05:07:35.961971 DDR cs1 size: 2048MB
736 05:07:35.962455 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 05:07:35.967526 cs0 DataBus test pass
738 05:07:35.968054 cs1 DataBus test pass
739 05:07:35.968520 cs0 AddrBus test pass
740 05:07:35.973141 cs1 AddrBus test pass
741 05:07:35.973628
742 05:07:35.974089 100bdlr_step_size ps== 420
743 05:07:35.974551 result report
744 05:07:35.978784 boot times 0Enable ddr reg access
745 05:07:35.986566 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 05:07:36.000082 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 05:07:36.572475 0.0;M3 CHK:0;cm4_sp_mode 0
748 05:07:36.573145 MVN_1=0x00000000
749 05:07:36.577688 MVN_2=0x00000000
750 05:07:36.583544 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 05:07:36.584159 OPS=0x10
752 05:07:36.584606 ring efuse init
753 05:07:36.585035 chipver efuse init
754 05:07:36.589005 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 05:07:36.594526 [0.018961 Inits done]
756 05:07:36.595002 secure task start!
757 05:07:36.595431 high task start!
758 05:07:36.599332 low task start!
759 05:07:36.599798 run into bl31
760 05:07:36.605988 NOTICE: BL31: v1.3(release):4fc40b1
761 05:07:36.613761 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 05:07:36.614234 NOTICE: BL31: G12A normal boot!
763 05:07:36.639156 NOTICE: BL31: BL33 decompress pass
764 05:07:36.644891 ERROR: Error initializing runtime service opteed_fast
765 05:07:37.877813
766 05:07:37.878467
767 05:07:37.886147 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 05:07:37.886645
769 05:07:37.887103 Model: Libre Computer AML-A311D-CC Alta
770 05:07:38.094571 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 05:07:38.117931 DRAM: 2 GiB (effective 3.8 GiB)
772 05:07:38.260771 Core: 408 devices, 31 uclasses, devicetree: separate
773 05:07:38.266769 WDT: Not starting watchdog@f0d0
774 05:07:38.298981 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 05:07:38.311460 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 05:07:38.316482 ** Bad device specification mmc 0 **
777 05:07:38.326758 Card did not respond to voltage select! : -110
778 05:07:38.334483 ** Bad device specification mmc 0 **
779 05:07:38.334963 Couldn't find partition mmc 0
780 05:07:38.342671 Card did not respond to voltage select! : -110
781 05:07:38.348356 ** Bad device specification mmc 0 **
782 05:07:38.348836 Couldn't find partition mmc 0
783 05:07:38.353503 Error: could not access storage.
784 05:07:38.695901 Net: eth0: ethernet@ff3f0000
785 05:07:38.696571 starting USB...
786 05:07:38.947556 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 05:07:38.948098 Starting the controller
788 05:07:38.954709 USB XHCI 1.10
789 05:07:41.116889 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 05:07:41.117554 bl2_stage_init 0x01
791 05:07:41.118029 bl2_stage_init 0x81
792 05:07:41.122533 hw id: 0x0000 - pwm id 0x01
793 05:07:41.123048 bl2_stage_init 0xc1
794 05:07:41.123513 bl2_stage_init 0x02
795 05:07:41.123966
796 05:07:41.128141 L0:00000000
797 05:07:41.128782 L1:20000703
798 05:07:41.129263 L2:00008067
799 05:07:41.129731 L3:14000000
800 05:07:41.131084 B2:00402000
801 05:07:41.131642 B1:e0f83180
802 05:07:41.132151
803 05:07:41.132621 TE: 58159
804 05:07:41.133079
805 05:07:41.142088 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 05:07:41.142658
807 05:07:41.143128 Board ID = 1
808 05:07:41.143629 Set A53 clk to 24M
809 05:07:41.144154 Set A73 clk to 24M
810 05:07:41.147673 Set clk81 to 24M
811 05:07:41.148252 A53 clk: 1200 MHz
812 05:07:41.148720 A73 clk: 1200 MHz
813 05:07:41.153358 CLK81: 166.6M
814 05:07:41.153904 smccc: 00012ab4
815 05:07:41.158958 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 05:07:41.159517 board id: 1
817 05:07:41.164582 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 05:07:41.178120 fw parse done
819 05:07:41.184093 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 05:07:41.226813 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 05:07:41.237636 PIEI prepare done
822 05:07:41.238164 fastboot data load
823 05:07:41.238630 fastboot data verify
824 05:07:41.243232 verify result: 266
825 05:07:41.248851 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 05:07:41.249381 LPDDR4 probe
827 05:07:41.249843 ddr clk to 1584MHz
828 05:07:41.256898 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 05:07:41.294116
830 05:07:41.294652 dmc_version 0001
831 05:07:41.300950 Check phy result
832 05:07:41.306630 INFO : End of CA training
833 05:07:41.307153 INFO : End of initialization
834 05:07:41.312301 INFO : Training has run successfully!
835 05:07:41.312832 Check phy result
836 05:07:41.317904 INFO : End of initialization
837 05:07:41.318426 INFO : End of read enable training
838 05:07:41.321169 INFO : End of fine write leveling
839 05:07:41.326705 INFO : End of Write leveling coarse delay
840 05:07:41.332328 INFO : Training has run successfully!
841 05:07:41.332862 Check phy result
842 05:07:41.333321 INFO : End of initialization
843 05:07:41.337881 INFO : End of read dq deskew training
844 05:07:41.341371 INFO : End of MPR read delay center optimization
845 05:07:41.346955 INFO : End of write delay center optimization
846 05:07:41.352556 INFO : End of read delay center optimization
847 05:07:41.353086 INFO : End of max read latency training
848 05:07:41.358119 INFO : Training has run successfully!
849 05:07:41.358647 1D training succeed
850 05:07:41.366275 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 05:07:41.413838 Check phy result
852 05:07:41.414413 INFO : End of initialization
853 05:07:41.435493 INFO : End of 2D read delay Voltage center optimization
854 05:07:41.455603 INFO : End of 2D read delay Voltage center optimization
855 05:07:41.507507 INFO : End of 2D write delay Voltage center optimization
856 05:07:41.556818 INFO : End of 2D write delay Voltage center optimization
857 05:07:41.562345 INFO : Training has run successfully!
858 05:07:41.562882
859 05:07:41.563348 channel==0
860 05:07:41.567959 RxClkDly_Margin_A0==88 ps 9
861 05:07:41.568544 TxDqDly_Margin_A0==98 ps 10
862 05:07:41.571210 RxClkDly_Margin_A1==88 ps 9
863 05:07:41.571733 TxDqDly_Margin_A1==98 ps 10
864 05:07:41.576705 TrainedVREFDQ_A0==74
865 05:07:41.577249 TrainedVREFDQ_A1==74
866 05:07:41.582419 VrefDac_Margin_A0==25
867 05:07:41.582968 DeviceVref_Margin_A0==40
868 05:07:41.583432 VrefDac_Margin_A1==25
869 05:07:41.587914 DeviceVref_Margin_A1==40
870 05:07:41.588487
871 05:07:41.588923
872 05:07:41.589349 channel==1
873 05:07:41.589766 RxClkDly_Margin_A0==98 ps 10
874 05:07:41.591377 TxDqDly_Margin_A0==88 ps 9
875 05:07:41.596886 RxClkDly_Margin_A1==88 ps 9
876 05:07:41.597399 TxDqDly_Margin_A1==88 ps 9
877 05:07:41.597836 TrainedVREFDQ_A0==77
878 05:07:41.602556 TrainedVREFDQ_A1==77
879 05:07:41.603074 VrefDac_Margin_A0==22
880 05:07:41.608182 DeviceVref_Margin_A0==37
881 05:07:41.608690 VrefDac_Margin_A1==24
882 05:07:41.609120 DeviceVref_Margin_A1==37
883 05:07:41.609544
884 05:07:41.613686 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 05:07:41.614193
886 05:07:41.647277 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
887 05:07:41.647835 2D training succeed
888 05:07:41.652921 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 05:07:41.658499 auto size-- 65535DDR cs0 size: 2048MB
890 05:07:41.659010 DDR cs1 size: 2048MB
891 05:07:41.664115 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 05:07:41.664631 cs0 DataBus test pass
893 05:07:41.665066 cs1 DataBus test pass
894 05:07:41.669697 cs0 AddrBus test pass
895 05:07:41.670205 cs1 AddrBus test pass
896 05:07:41.670634
897 05:07:41.675281 100bdlr_step_size ps== 432
898 05:07:41.675801 result report
899 05:07:41.676269 boot times 0Enable ddr reg access
900 05:07:41.685063 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 05:07:41.698550 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 05:07:42.270650 0.0;M3 CHK:0;cm4_sp_mode 0
903 05:07:42.271275 MVN_1=0x00000000
904 05:07:42.276234 MVN_2=0x00000000
905 05:07:42.282038 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 05:07:42.282567 OPS=0x10
907 05:07:42.283028 ring efuse init
908 05:07:42.283475 chipver efuse init
909 05:07:42.287491 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 05:07:42.293272 [0.018960 Inits done]
911 05:07:42.293797 secure task start!
912 05:07:42.294250 high task start!
913 05:07:42.297712 low task start!
914 05:07:42.298231 run into bl31
915 05:07:42.304325 NOTICE: BL31: v1.3(release):4fc40b1
916 05:07:42.312214 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 05:07:42.312748 NOTICE: BL31: G12A normal boot!
918 05:07:42.337611 NOTICE: BL31: BL33 decompress pass
919 05:07:42.343327 ERROR: Error initializing runtime service opteed_fast
920 05:07:43.576249
921 05:07:43.576898
922 05:07:43.584619 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 05:07:43.585149
924 05:07:43.585613 Model: Libre Computer AML-A311D-CC Alta
925 05:07:43.792953 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 05:07:43.816383 DRAM: 2 GiB (effective 3.8 GiB)
927 05:07:43.959320 Core: 408 devices, 31 uclasses, devicetree: separate
928 05:07:43.965247 WDT: Not starting watchdog@f0d0
929 05:07:43.997420 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 05:07:44.009921 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 05:07:44.014941 ** Bad device specification mmc 0 **
932 05:07:44.025293 Card did not respond to voltage select! : -110
933 05:07:44.032953 ** Bad device specification mmc 0 **
934 05:07:44.033482 Couldn't find partition mmc 0
935 05:07:44.041330 Card did not respond to voltage select! : -110
936 05:07:44.046747 ** Bad device specification mmc 0 **
937 05:07:44.047276 Couldn't find partition mmc 0
938 05:07:44.051799 Error: could not access storage.
939 05:07:44.394433 Net: eth0: ethernet@ff3f0000
940 05:07:44.395001 starting USB...
941 05:07:44.646063 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 05:07:44.646668 Starting the controller
943 05:07:44.653111 USB XHCI 1.10
944 05:07:46.516922 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
945 05:07:46.517581 bl2_stage_init 0x01
946 05:07:46.518048 bl2_stage_init 0x81
947 05:07:46.522725 hw id: 0x0000 - pwm id 0x01
948 05:07:46.523256 bl2_stage_init 0xc1
949 05:07:46.523714 bl2_stage_init 0x02
950 05:07:46.524229
951 05:07:46.528099 L0:00000000
952 05:07:46.528622 L1:20000703
953 05:07:46.529076 L2:00008067
954 05:07:46.529521 L3:14000000
955 05:07:46.531009 B2:00402000
956 05:07:46.531531 B1:e0f83180
957 05:07:46.532011
958 05:07:46.532474 TE: 58159
959 05:07:46.532925
960 05:07:46.542177 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
961 05:07:46.542743
962 05:07:46.543205 Board ID = 1
963 05:07:46.543656 Set A53 clk to 24M
964 05:07:46.544155 Set A73 clk to 24M
965 05:07:46.547838 Set clk81 to 24M
966 05:07:46.548405 A53 clk: 1200 MHz
967 05:07:46.548863 A73 clk: 1200 MHz
968 05:07:46.553429 CLK81: 166.6M
969 05:07:46.553954 smccc: 00012ab5
970 05:07:46.559045 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
971 05:07:46.559572 board id: 1
972 05:07:46.567846 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
973 05:07:46.578153 fw parse done
974 05:07:46.584237 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
975 05:07:46.626735 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
976 05:07:46.637632 PIEI prepare done
977 05:07:46.638134 fastboot data load
978 05:07:46.638569 fastboot data verify
979 05:07:46.643280 verify result: 266
980 05:07:46.648817 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
981 05:07:46.649322 LPDDR4 probe
982 05:07:46.649751 ddr clk to 1584MHz
983 05:07:46.656827 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
984 05:07:46.694075
985 05:07:46.694576 dmc_version 0001
986 05:07:46.700794 Check phy result
987 05:07:46.706656 INFO : End of CA training
988 05:07:46.707154 INFO : End of initialization
989 05:07:46.712344 INFO : Training has run successfully!
990 05:07:46.712869 Check phy result
991 05:07:46.717912 INFO : End of initialization
992 05:07:46.718428 INFO : End of read enable training
993 05:07:46.721153 INFO : End of fine write leveling
994 05:07:46.726713 INFO : End of Write leveling coarse delay
995 05:07:46.732394 INFO : Training has run successfully!
996 05:07:46.732904 Check phy result
997 05:07:46.733354 INFO : End of initialization
998 05:07:46.737905 INFO : End of read dq deskew training
999 05:07:46.743591 INFO : End of MPR read delay center optimization
1000 05:07:46.744142 INFO : End of write delay center optimization
1001 05:07:46.749102 INFO : End of read delay center optimization
1002 05:07:46.754749 INFO : End of max read latency training
1003 05:07:46.755260 INFO : Training has run successfully!
1004 05:07:46.760382 1D training succeed
1005 05:07:46.766287 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1006 05:07:46.813783 Check phy result
1007 05:07:46.814291 INFO : End of initialization
1008 05:07:46.835503 INFO : End of 2D read delay Voltage center optimization
1009 05:07:46.855748 INFO : End of 2D read delay Voltage center optimization
1010 05:07:46.907933 INFO : End of 2D write delay Voltage center optimization
1011 05:07:46.957243 INFO : End of 2D write delay Voltage center optimization
1012 05:07:46.962761 INFO : Training has run successfully!
1013 05:07:46.963271
1014 05:07:46.963729 channel==0
1015 05:07:46.968451 RxClkDly_Margin_A0==88 ps 9
1016 05:07:46.968964 TxDqDly_Margin_A0==98 ps 10
1017 05:07:46.974056 RxClkDly_Margin_A1==88 ps 9
1018 05:07:46.974564 TxDqDly_Margin_A1==98 ps 10
1019 05:07:46.975020 TrainedVREFDQ_A0==74
1020 05:07:46.979755 TrainedVREFDQ_A1==74
1021 05:07:46.980325 VrefDac_Margin_A0==25
1022 05:07:46.980782 DeviceVref_Margin_A0==40
1023 05:07:46.985234 VrefDac_Margin_A1==25
1024 05:07:46.985743 DeviceVref_Margin_A1==40
1025 05:07:46.986190
1026 05:07:46.986633
1027 05:07:46.990833 channel==1
1028 05:07:46.991338 RxClkDly_Margin_A0==98 ps 10
1029 05:07:46.991787 TxDqDly_Margin_A0==98 ps 10
1030 05:07:46.996401 RxClkDly_Margin_A1==88 ps 9
1031 05:07:46.996913 TxDqDly_Margin_A1==88 ps 9
1032 05:07:47.002006 TrainedVREFDQ_A0==77
1033 05:07:47.002533 TrainedVREFDQ_A1==77
1034 05:07:47.002992 VrefDac_Margin_A0==22
1035 05:07:47.007618 DeviceVref_Margin_A0==37
1036 05:07:47.008161 VrefDac_Margin_A1==24
1037 05:07:47.013151 DeviceVref_Margin_A1==37
1038 05:07:47.013654
1039 05:07:47.014101 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1040 05:07:47.014539
1041 05:07:47.046699 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
1042 05:07:47.047285 2D training succeed
1043 05:07:47.052407 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1044 05:07:47.057941 auto size-- 65535DDR cs0 size: 2048MB
1045 05:07:47.058456 DDR cs1 size: 2048MB
1046 05:07:47.063598 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1047 05:07:47.064152 cs0 DataBus test pass
1048 05:07:47.069153 cs1 DataBus test pass
1049 05:07:47.069669 cs0 AddrBus test pass
1050 05:07:47.070120 cs1 AddrBus test pass
1051 05:07:47.070567
1052 05:07:47.074782 100bdlr_step_size ps== 420
1053 05:07:47.075310 result report
1054 05:07:47.080373 boot times 0Enable ddr reg access
1055 05:07:47.085711 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1056 05:07:47.099177 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1057 05:07:47.672829 0.0;M3 CHK:0;cm4_sp_mode 0
1058 05:07:47.673470 MVN_1=0x00000000
1059 05:07:47.678424 MVN_2=0x00000000
1060 05:07:47.684138 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1061 05:07:47.684657 OPS=0x10
1062 05:07:47.685117 ring efuse init
1063 05:07:47.685558 chipver efuse init
1064 05:07:47.689688 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1065 05:07:47.695268 [0.018961 Inits done]
1066 05:07:47.695776 secure task start!
1067 05:07:47.696288 high task start!
1068 05:07:47.699867 low task start!
1069 05:07:47.700404 run into bl31
1070 05:07:47.706643 NOTICE: BL31: v1.3(release):4fc40b1
1071 05:07:47.714353 NOTICE: BL31: Built : 15:58:17, May 22 2019
1072 05:07:47.714868 NOTICE: BL31: G12A normal boot!
1073 05:07:47.739639 NOTICE: BL31: BL33 decompress pass
1074 05:07:47.745348 ERROR: Error initializing runtime service opteed_fast
1075 05:07:48.978232
1076 05:07:48.978876
1077 05:07:48.986666 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1078 05:07:48.987184
1079 05:07:48.987641 Model: Libre Computer AML-A311D-CC Alta
1080 05:07:49.195084 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1081 05:07:49.218423 DRAM: 2 GiB (effective 3.8 GiB)
1082 05:07:49.361379 Core: 408 devices, 31 uclasses, devicetree: separate
1083 05:07:49.367284 WDT: Not starting watchdog@f0d0
1084 05:07:49.399534 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1085 05:07:49.412010 Loading Environment from FAT... Card did not respond to voltage select! : -110
1086 05:07:49.417036 ** Bad device specification mmc 0 **
1087 05:07:49.427309 Card did not respond to voltage select! : -110
1088 05:07:49.434997 ** Bad device specification mmc 0 **
1089 05:07:49.435507 Couldn't find partition mmc 0
1090 05:07:49.443306 Card did not respond to voltage select! : -110
1091 05:07:49.448868 ** Bad device specification mmc 0 **
1092 05:07:49.449386 Couldn't find partition mmc 0
1093 05:07:49.453949 Error: could not access storage.
1094 05:07:49.797345 Net: eth0: ethernet@ff3f0000
1095 05:07:49.797932 starting USB...
1096 05:07:50.049193 Bus usb@ff500000: Register 3000140 NbrPorts 3
1097 05:07:50.049769 Starting the controller
1098 05:07:50.056210 USB XHCI 1.10
1099 05:07:51.610164 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1100 05:07:51.618483 scanning usb for storage devices... 0 Storage Device(s) found
1102 05:07:51.670190 Hit any key to stop autoboot: 1
1103 05:07:51.671045 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1104 05:07:51.671732 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1105 05:07:51.672307 Setting prompt string to ['=>']
1106 05:07:51.672832 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1107 05:07:51.685870 0
1108 05:07:51.686786 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1109 05:07:51.687311 Sending with 10 millisecond of delay
1111 05:07:52.822189 => setenv autoload no
1112 05:07:52.833044 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1113 05:07:52.838448 setenv autoload no
1114 05:07:52.839229 Sending with 10 millisecond of delay
1116 05:07:54.636216 => setenv initrd_high 0xffffffff
1117 05:07:54.647056 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1118 05:07:54.647974 setenv initrd_high 0xffffffff
1119 05:07:54.648793 Sending with 10 millisecond of delay
1121 05:07:56.265075 => setenv fdt_high 0xffffffff
1122 05:07:56.275908 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1123 05:07:56.276833 setenv fdt_high 0xffffffff
1124 05:07:56.277593 Sending with 10 millisecond of delay
1126 05:07:56.569484 => dhcp
1127 05:07:56.580290 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1128 05:07:56.581180 dhcp
1129 05:07:56.581654 Speed: 1000, full duplex
1130 05:07:56.582104 BOOTP broadcast 1
1131 05:07:56.593191 DHCP client bound to address 192.168.6.27 (13 ms)
1132 05:07:56.593983 Sending with 10 millisecond of delay
1134 05:07:58.270464 => setenv serverip 192.168.6.2
1135 05:07:58.281304 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1136 05:07:58.282227 setenv serverip 192.168.6.2
1137 05:07:58.282960 Sending with 10 millisecond of delay
1139 05:08:02.006181 => tftpboot 0x01080000 951315/tftp-deploy-guncsc79/kernel/uImage
1140 05:08:02.017034 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:13)
1141 05:08:02.017929 tftpboot 0x01080000 951315/tftp-deploy-guncsc79/kernel/uImage
1142 05:08:02.018435 Speed: 1000, full duplex
1143 05:08:02.018890 Using ethernet@ff3f0000 device
1144 05:08:02.019967 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1145 05:08:02.025425 Filename '951315/tftp-deploy-guncsc79/kernel/uImage'.
1146 05:08:02.029340 Load address: 0x1080000
1147 05:08:06.525376 Loading: *################################################## 43.6 MiB
1148 05:08:06.526034 9.7 MiB/s
1149 05:08:06.526509 done
1150 05:08:06.529940 Bytes transferred = 45713984 (2b98a40 hex)
1151 05:08:06.530813 Sending with 10 millisecond of delay
1153 05:08:11.217463 => tftpboot 0x08000000 951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
1154 05:08:11.228232 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:03)
1155 05:08:11.228783 tftpboot 0x08000000 951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot
1156 05:08:11.229035 Speed: 1000, full duplex
1157 05:08:11.229254 Using ethernet@ff3f0000 device
1158 05:08:11.231084 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1159 05:08:11.239408 Filename '951315/tftp-deploy-guncsc79/ramdisk/ramdisk.cpio.gz.uboot'.
1160 05:08:11.239856 Load address: 0x8000000
1161 05:08:12.806251 Loading: *################################################# UDP wrong checksum 00000005 0000dbcf
1162 05:08:17.807229 T UDP wrong checksum 00000005 0000dbcf
1163 05:08:27.810254 T T UDP wrong checksum 00000005 0000dbcf
1164 05:08:47.814263 T T T T UDP wrong checksum 00000005 0000dbcf
1165 05:09:07.819192 T T T
1166 05:09:07.819632 Retry count exceeded; starting again
1168 05:09:07.820951 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1171 05:09:07.822726 end: 2.4 uboot-commands (duration 00:01:53) [common]
1173 05:09:07.824101 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1175 05:09:07.825136 end: 2 uboot-action (duration 00:01:53) [common]
1177 05:09:07.826636 Cleaning after the job
1178 05:09:07.827178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/ramdisk
1179 05:09:07.828681 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/kernel
1180 05:09:07.875534 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/dtb
1181 05:09:07.876984 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/nfsrootfs
1182 05:09:08.221057 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/951315/tftp-deploy-guncsc79/modules
1183 05:09:08.243637 start: 4.1 power-off (timeout 00:00:30) [common]
1184 05:09:08.244356 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1185 05:09:08.278727 >> OK - accepted request
1186 05:09:08.279936 Returned 0 in 0 seconds
1187 05:09:08.380683 end: 4.1 power-off (duration 00:00:00) [common]
1189 05:09:08.381658 start: 4.2 read-feedback (timeout 00:10:00) [common]
1190 05:09:08.382309 Listened to connection for namespace 'common' for up to 1s
1191 05:09:09.382344 Finalising connection for namespace 'common'
1192 05:09:09.382852 Disconnecting from shell: Finalise
1193 05:09:09.383146 =>
1194 05:09:09.484058 end: 4.2 read-feedback (duration 00:00:01) [common]
1195 05:09:09.484752 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/951315
1196 05:09:12.038834 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/951315
1197 05:09:12.039451 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.