Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:04:04.248237 lava-dispatcher, installed at version: 2024.01
2 19:04:04.249084 start: 0 validate
3 19:04:04.249575 Start time: 2024-11-07 19:04:04.249543+00:00 (UTC)
4 19:04:04.250145 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:04:04.250690 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 19:04:04.292581 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:04:04.293143 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:04:04.319769 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:04:04.320408 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 19:04:04.354044 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:04:04.354509 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 19:04:04.387510 validate duration: 0.14
14 19:04:04.388392 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 19:04:04.388724 start: 1.1 download-retry (timeout 00:10:00) [common]
16 19:04:04.389035 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 19:04:04.389859 Not decompressing ramdisk as can be used compressed.
18 19:04:04.390632 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 19:04:04.390935 saving as /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/ramdisk/rootfs.cpio.gz
20 19:04:04.391213 total size: 47897469 (45 MB)
21 19:04:04.431446 progress 0 % (0 MB)
22 19:04:04.461347 progress 5 % (2 MB)
23 19:04:04.490507 progress 10 % (4 MB)
24 19:04:04.519518 progress 15 % (6 MB)
25 19:04:04.548864 progress 20 % (9 MB)
26 19:04:04.578107 progress 25 % (11 MB)
27 19:04:04.606995 progress 30 % (13 MB)
28 19:04:04.635928 progress 35 % (16 MB)
29 19:04:04.664653 progress 40 % (18 MB)
30 19:04:04.693561 progress 45 % (20 MB)
31 19:04:04.722378 progress 50 % (22 MB)
32 19:04:04.751419 progress 55 % (25 MB)
33 19:04:04.780715 progress 60 % (27 MB)
34 19:04:04.809524 progress 65 % (29 MB)
35 19:04:04.838441 progress 70 % (32 MB)
36 19:04:04.867163 progress 75 % (34 MB)
37 19:04:04.895957 progress 80 % (36 MB)
38 19:04:04.924867 progress 85 % (38 MB)
39 19:04:04.954229 progress 90 % (41 MB)
40 19:04:04.983048 progress 95 % (43 MB)
41 19:04:05.011417 progress 100 % (45 MB)
42 19:04:05.012158 45 MB downloaded in 0.62 s (73.57 MB/s)
43 19:04:05.012735 end: 1.1.1 http-download (duration 00:00:01) [common]
45 19:04:05.013649 end: 1.1 download-retry (duration 00:00:01) [common]
46 19:04:05.013960 start: 1.2 download-retry (timeout 00:09:59) [common]
47 19:04:05.014242 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 19:04:05.014736 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kernel/Image
49 19:04:05.015014 saving as /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/kernel/Image
50 19:04:05.015235 total size: 45713920 (43 MB)
51 19:04:05.015453 No compression specified
52 19:04:05.061473 progress 0 % (0 MB)
53 19:04:05.090949 progress 5 % (2 MB)
54 19:04:05.120293 progress 10 % (4 MB)
55 19:04:05.148671 progress 15 % (6 MB)
56 19:04:05.176950 progress 20 % (8 MB)
57 19:04:05.205002 progress 25 % (10 MB)
58 19:04:05.233380 progress 30 % (13 MB)
59 19:04:05.262434 progress 35 % (15 MB)
60 19:04:05.290681 progress 40 % (17 MB)
61 19:04:05.318762 progress 45 % (19 MB)
62 19:04:05.347186 progress 50 % (21 MB)
63 19:04:05.375463 progress 55 % (24 MB)
64 19:04:05.403675 progress 60 % (26 MB)
65 19:04:05.432498 progress 65 % (28 MB)
66 19:04:05.460909 progress 70 % (30 MB)
67 19:04:05.489000 progress 75 % (32 MB)
68 19:04:05.517179 progress 80 % (34 MB)
69 19:04:05.545400 progress 85 % (37 MB)
70 19:04:05.573662 progress 90 % (39 MB)
71 19:04:05.601842 progress 95 % (41 MB)
72 19:04:05.629396 progress 100 % (43 MB)
73 19:04:05.629936 43 MB downloaded in 0.61 s (70.92 MB/s)
74 19:04:05.630441 end: 1.2.1 http-download (duration 00:00:01) [common]
76 19:04:05.631315 end: 1.2 download-retry (duration 00:00:01) [common]
77 19:04:05.631616 start: 1.3 download-retry (timeout 00:09:59) [common]
78 19:04:05.631896 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 19:04:05.632405 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 19:04:05.632665 saving as /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 19:04:05.632883 total size: 53209 (0 MB)
82 19:04:05.633101 No compression specified
83 19:04:05.671319 progress 61 % (0 MB)
84 19:04:05.672451 progress 100 % (0 MB)
85 19:04:05.673033 0 MB downloaded in 0.04 s (1.26 MB/s)
86 19:04:05.673512 end: 1.3.1 http-download (duration 00:00:00) [common]
88 19:04:05.674346 end: 1.3 download-retry (duration 00:00:00) [common]
89 19:04:05.674618 start: 1.4 download-retry (timeout 00:09:59) [common]
90 19:04:05.674889 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 19:04:05.675379 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/modules.tar.xz
92 19:04:05.675631 saving as /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/modules/modules.tar
93 19:04:05.675847 total size: 11601668 (11 MB)
94 19:04:05.676090 Using unxz to decompress xz
95 19:04:05.716697 progress 0 % (0 MB)
96 19:04:05.782391 progress 5 % (0 MB)
97 19:04:05.856452 progress 10 % (1 MB)
98 19:04:05.952557 progress 15 % (1 MB)
99 19:04:06.044052 progress 20 % (2 MB)
100 19:04:06.124129 progress 25 % (2 MB)
101 19:04:06.199517 progress 30 % (3 MB)
102 19:04:06.273724 progress 35 % (3 MB)
103 19:04:06.350609 progress 40 % (4 MB)
104 19:04:06.428260 progress 45 % (5 MB)
105 19:04:06.513211 progress 50 % (5 MB)
106 19:04:06.591889 progress 55 % (6 MB)
107 19:04:06.677018 progress 60 % (6 MB)
108 19:04:06.757868 progress 65 % (7 MB)
109 19:04:06.834764 progress 70 % (7 MB)
110 19:04:06.916924 progress 75 % (8 MB)
111 19:04:07.000222 progress 80 % (8 MB)
112 19:04:07.076617 progress 85 % (9 MB)
113 19:04:07.159783 progress 90 % (9 MB)
114 19:04:07.236832 progress 95 % (10 MB)
115 19:04:07.313678 progress 100 % (11 MB)
116 19:04:07.323851 11 MB downloaded in 1.65 s (6.71 MB/s)
117 19:04:07.324792 end: 1.4.1 http-download (duration 00:00:02) [common]
119 19:04:07.326576 end: 1.4 download-retry (duration 00:00:02) [common]
120 19:04:07.327150 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 19:04:07.327718 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 19:04:07.328310 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 19:04:07.328867 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 19:04:07.329914 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd
125 19:04:07.330850 makedir: /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin
126 19:04:07.331548 makedir: /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/tests
127 19:04:07.332269 makedir: /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/results
128 19:04:07.332940 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-add-keys
129 19:04:07.333979 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-add-sources
130 19:04:07.334997 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-background-process-start
131 19:04:07.336052 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-background-process-stop
132 19:04:07.337255 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-common-functions
133 19:04:07.338276 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-echo-ipv4
134 19:04:07.339262 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-install-packages
135 19:04:07.340274 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-installed-packages
136 19:04:07.341256 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-os-build
137 19:04:07.342231 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-probe-channel
138 19:04:07.343202 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-probe-ip
139 19:04:07.344281 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-target-ip
140 19:04:07.345303 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-target-mac
141 19:04:07.346273 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-target-storage
142 19:04:07.347262 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-case
143 19:04:07.348284 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-event
144 19:04:07.349266 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-feedback
145 19:04:07.350238 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-raise
146 19:04:07.351198 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-reference
147 19:04:07.352204 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-runner
148 19:04:07.353197 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-set
149 19:04:07.354164 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-test-shell
150 19:04:07.355142 Updating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-install-packages (oe)
151 19:04:07.356234 Updating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/bin/lava-installed-packages (oe)
152 19:04:07.357150 Creating /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/environment
153 19:04:07.357919 LAVA metadata
154 19:04:07.358451 - LAVA_JOB_ID=953548
155 19:04:07.358924 - LAVA_DISPATCHER_IP=192.168.6.2
156 19:04:07.359627 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 19:04:07.361589 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 19:04:07.362242 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 19:04:07.362703 skipped lava-vland-overlay
160 19:04:07.363241 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 19:04:07.363799 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 19:04:07.364303 skipped lava-multinode-overlay
163 19:04:07.364798 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 19:04:07.365303 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 19:04:07.365779 Loading test definitions
166 19:04:07.366320 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 19:04:07.366756 Using /lava-953548 at stage 0
168 19:04:07.368541 uuid=953548_1.5.2.4.1 testdef=None
169 19:04:07.368872 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 19:04:07.369144 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 19:04:07.370942 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 19:04:07.371769 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 19:04:07.373964 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 19:04:07.374848 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 19:04:07.377009 runner path: /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/0/tests/0_igt-gpu-panfrost test_uuid 953548_1.5.2.4.1
178 19:04:07.377606 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 19:04:07.378443 Creating lava-test-runner.conf files
181 19:04:07.378653 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953548/lava-overlay-kmoo91gd/lava-953548/0 for stage 0
182 19:04:07.378999 - 0_igt-gpu-panfrost
183 19:04:07.379358 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 19:04:07.379644 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 19:04:07.403030 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 19:04:07.403445 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 19:04:07.403710 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 19:04:07.404004 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 19:04:07.404284 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 19:04:14.316678 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 19:04:14.317160 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 19:04:14.317408 extracting modules file /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk
193 19:04:15.941601 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 19:04:15.942083 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 19:04:15.942364 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953548/compress-overlay-ag2lhg3m/overlay-1.5.2.5.tar.gz to ramdisk
196 19:04:15.942578 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953548/compress-overlay-ag2lhg3m/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk
197 19:04:15.972975 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 19:04:15.973388 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 19:04:15.973659 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 19:04:15.973890 Converting downloaded kernel to a uImage
201 19:04:15.974194 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/kernel/Image /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/kernel/uImage
202 19:04:16.436668 output: Image Name:
203 19:04:16.437085 output: Created: Thu Nov 7 19:04:15 2024
204 19:04:16.437295 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 19:04:16.437502 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 19:04:16.437708 output: Load Address: 01080000
207 19:04:16.437909 output: Entry Point: 01080000
208 19:04:16.438110 output:
209 19:04:16.438442 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 19:04:16.438708 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 19:04:16.438978 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 19:04:16.439231 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 19:04:16.439488 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 19:04:16.439742 Building ramdisk /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk
215 19:04:22.943472 >> 502380 blocks
216 19:04:43.809248 Adding RAMdisk u-boot header.
217 19:04:43.809735 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk.cpio.gz.uboot
218 19:04:44.521049 output: Image Name:
219 19:04:44.521478 output: Created: Thu Nov 7 19:04:43 2024
220 19:04:44.521690 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 19:04:44.521895 output: Data Size: 65710365 Bytes = 64170.28 KiB = 62.67 MiB
222 19:04:44.522097 output: Load Address: 00000000
223 19:04:44.522297 output: Entry Point: 00000000
224 19:04:44.522494 output:
225 19:04:44.523115 rename /var/lib/lava/dispatcher/tmp/953548/extract-overlay-ramdisk-yurkzi2d/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
226 19:04:44.523534 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 19:04:44.523817 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 19:04:44.524261 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 19:04:44.524771 No LXC device requested
230 19:04:44.525320 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 19:04:44.525879 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 19:04:44.526421 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 19:04:44.526870 Checking files for TFTP limit of 4294967296 bytes.
234 19:04:44.529809 end: 1 tftp-deploy (duration 00:00:40) [common]
235 19:04:44.530447 start: 2 uboot-action (timeout 00:05:00) [common]
236 19:04:44.531015 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 19:04:44.531561 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 19:04:44.532142 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 19:04:44.532724 Using kernel file from prepare-kernel: 953548/tftp-deploy-oxzy4_3y/kernel/uImage
240 19:04:44.533407 substitutions:
241 19:04:44.533857 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 19:04:44.534301 - {DTB_ADDR}: 0x01070000
243 19:04:44.534738 - {DTB}: 953548/tftp-deploy-oxzy4_3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 19:04:44.535179 - {INITRD}: 953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
245 19:04:44.535615 - {KERNEL_ADDR}: 0x01080000
246 19:04:44.536076 - {KERNEL}: 953548/tftp-deploy-oxzy4_3y/kernel/uImage
247 19:04:44.536516 - {LAVA_MAC}: None
248 19:04:44.536994 - {PRESEED_CONFIG}: None
249 19:04:44.537433 - {PRESEED_LOCAL}: None
250 19:04:44.537865 - {RAMDISK_ADDR}: 0x08000000
251 19:04:44.538295 - {RAMDISK}: 953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
252 19:04:44.538731 - {ROOT_PART}: None
253 19:04:44.539161 - {ROOT}: None
254 19:04:44.539594 - {SERVER_IP}: 192.168.6.2
255 19:04:44.540100 - {TEE_ADDR}: 0x83000000
256 19:04:44.540550 - {TEE}: None
257 19:04:44.540984 Parsed boot commands:
258 19:04:44.541407 - setenv autoload no
259 19:04:44.541837 - setenv initrd_high 0xffffffff
260 19:04:44.542268 - setenv fdt_high 0xffffffff
261 19:04:44.542694 - dhcp
262 19:04:44.543123 - setenv serverip 192.168.6.2
263 19:04:44.543552 - tftpboot 0x01080000 953548/tftp-deploy-oxzy4_3y/kernel/uImage
264 19:04:44.544008 - tftpboot 0x08000000 953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
265 19:04:44.544448 - tftpboot 0x01070000 953548/tftp-deploy-oxzy4_3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 19:04:44.544878 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 19:04:44.545313 - bootm 0x01080000 0x08000000 0x01070000
268 19:04:44.545873 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 19:04:44.547510 start: 2.3 connect-device (timeout 00:05:00) [common]
271 19:04:44.548023 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 19:04:44.564042 Setting prompt string to ['lava-test: # ']
273 19:04:44.565675 end: 2.3 connect-device (duration 00:00:00) [common]
274 19:04:44.566318 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 19:04:44.566907 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 19:04:44.567469 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 19:04:44.568733 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 19:04:44.605497 >> OK - accepted request
279 19:04:44.607746 Returned 0 in 0 seconds
280 19:04:44.709020 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 19:04:44.710808 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 19:04:44.711428 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 19:04:44.712029 Setting prompt string to ['Hit any key to stop autoboot']
285 19:04:44.712544 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 19:04:44.714313 Trying 192.168.56.21...
287 19:04:44.714860 Connected to conserv1.
288 19:04:44.715326 Escape character is '^]'.
289 19:04:44.715785
290 19:04:44.716301 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 19:04:44.716781
292 19:04:52.309642 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 19:04:52.310069 bl2_stage_init 0x01
294 19:04:52.310309 bl2_stage_init 0x81
295 19:04:52.315255 hw id: 0x0000 - pwm id 0x01
296 19:04:52.315528 bl2_stage_init 0xc1
297 19:04:52.320775 bl2_stage_init 0x02
298 19:04:52.321042
299 19:04:52.321260 L0:00000000
300 19:04:52.321468 L1:00000703
301 19:04:52.321673 L2:00008067
302 19:04:52.321878 L3:15000000
303 19:04:52.326374 S1:00000000
304 19:04:52.326629 B2:20282000
305 19:04:52.326842 B1:a0f83180
306 19:04:52.327047
307 19:04:52.327253 TE: 66994
308 19:04:52.327460
309 19:04:52.331965 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 19:04:52.332239
311 19:04:52.337473 Board ID = 1
312 19:04:52.337722 Set cpu clk to 24M
313 19:04:52.337934 Set clk81 to 24M
314 19:04:52.343266 Use GP1_pll as DSU clk.
315 19:04:52.343517 DSU clk: 1200 Mhz
316 19:04:52.343730 CPU clk: 1200 MHz
317 19:04:52.348768 Set clk81 to 166.6M
318 19:04:52.354363 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 19:04:52.354615 board id: 1
320 19:04:52.361498 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 19:04:52.372139 fw parse done
322 19:04:52.378199 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 19:04:52.420679 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 19:04:52.431584 PIEI prepare done
325 19:04:52.431855 fastboot data load
326 19:04:52.432108 fastboot data verify
327 19:04:52.437386 verify result: 266
328 19:04:52.442850 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 19:04:52.443103 LPDDR4 probe
330 19:04:52.443316 ddr clk to 1584MHz
331 19:04:52.450834 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 19:04:52.488195
333 19:04:52.488561 dmc_version 0001
334 19:04:52.494748 Check phy result
335 19:04:52.500721 INFO : End of CA training
336 19:04:52.500996 INFO : End of initialization
337 19:04:52.506354 INFO : Training has run successfully!
338 19:04:52.506617 Check phy result
339 19:04:52.511964 INFO : End of initialization
340 19:04:52.512435 INFO : End of read enable training
341 19:04:52.517595 INFO : End of fine write leveling
342 19:04:52.523193 INFO : End of Write leveling coarse delay
343 19:04:52.523658 INFO : Training has run successfully!
344 19:04:52.524162 Check phy result
345 19:04:52.528712 INFO : End of initialization
346 19:04:52.529200 INFO : End of read dq deskew training
347 19:04:52.534499 INFO : End of MPR read delay center optimization
348 19:04:52.539969 INFO : End of write delay center optimization
349 19:04:52.545662 INFO : End of read delay center optimization
350 19:04:52.546164 INFO : End of max read latency training
351 19:04:52.551300 INFO : Training has run successfully!
352 19:04:52.551780 1D training succeed
353 19:04:52.560325 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 19:04:52.607882 Check phy result
355 19:04:52.608404 INFO : End of initialization
356 19:04:52.630344 INFO : End of 2D read delay Voltage center optimization
357 19:04:52.649506 INFO : End of 2D read delay Voltage center optimization
358 19:04:52.701424 INFO : End of 2D write delay Voltage center optimization
359 19:04:52.750525 INFO : End of 2D write delay Voltage center optimization
360 19:04:52.756073 INFO : Training has run successfully!
361 19:04:52.756567
362 19:04:52.757008 channel==0
363 19:04:52.761633 RxClkDly_Margin_A0==69 ps 7
364 19:04:52.762107 TxDqDly_Margin_A0==88 ps 9
365 19:04:52.767254 RxClkDly_Margin_A1==69 ps 7
366 19:04:52.767735 TxDqDly_Margin_A1==98 ps 10
367 19:04:52.768214 TrainedVREFDQ_A0==74
368 19:04:52.772801 TrainedVREFDQ_A1==74
369 19:04:52.773274 VrefDac_Margin_A0==23
370 19:04:52.773707 DeviceVref_Margin_A0==40
371 19:04:52.778408 VrefDac_Margin_A1==23
372 19:04:52.778880 DeviceVref_Margin_A1==40
373 19:04:52.779311
374 19:04:52.779745
375 19:04:52.780220 channel==1
376 19:04:52.784025 RxClkDly_Margin_A0==78 ps 8
377 19:04:52.784495 TxDqDly_Margin_A0==98 ps 10
378 19:04:52.789613 RxClkDly_Margin_A1==78 ps 8
379 19:04:52.790110 TxDqDly_Margin_A1==88 ps 9
380 19:04:52.795297 TrainedVREFDQ_A0==78
381 19:04:52.795778 TrainedVREFDQ_A1==75
382 19:04:52.796254 VrefDac_Margin_A0==22
383 19:04:52.800784 DeviceVref_Margin_A0==36
384 19:04:52.801249 VrefDac_Margin_A1==22
385 19:04:52.806432 DeviceVref_Margin_A1==39
386 19:04:52.806908
387 19:04:52.807343 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 19:04:52.807777
389 19:04:52.840053 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 19:04:52.840639 2D training succeed
391 19:04:52.845599 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 19:04:52.851312 auto size-- 65535DDR cs0 size: 2048MB
393 19:04:52.851772 DDR cs1 size: 2048MB
394 19:04:52.856896 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 19:04:52.857358 cs0 DataBus test pass
396 19:04:52.862486 cs1 DataBus test pass
397 19:04:52.862946 cs0 AddrBus test pass
398 19:04:52.863378 cs1 AddrBus test pass
399 19:04:52.863808
400 19:04:52.868040 100bdlr_step_size ps== 478
401 19:04:52.868513 result report
402 19:04:52.873586 boot times 0Enable ddr reg access
403 19:04:52.878810 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 19:04:52.892595 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 19:04:53.547780 bl2z: ptr: 05129330, size: 00001e40
406 19:04:53.554750 0.0;M3 CHK:0;cm4_sp_mode 0
407 19:04:53.555542 MVN_1=0x00000000
408 19:04:53.556155 MVN_2=0x00000000
409 19:04:53.566200 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 19:04:53.566983 OPS=0x04
411 19:04:53.567525 ring efuse init
412 19:04:53.571741 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 19:04:53.572470 [0.017310 Inits done]
414 19:04:53.573006 secure task start!
415 19:04:53.579818 high task start!
416 19:04:53.580490 low task start!
417 19:04:53.581020 run into bl31
418 19:04:53.588430 NOTICE: BL31: v1.3(release):4fc40b1
419 19:04:53.596250 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 19:04:53.596923 NOTICE: BL31: G12A normal boot!
421 19:04:53.611759 NOTICE: BL31: BL33 decompress pass
422 19:04:53.617461 ERROR: Error initializing runtime service opteed_fast
423 19:04:54.865144 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 19:04:54.865547 bl2_stage_init 0x01
425 19:04:54.865780 bl2_stage_init 0x81
426 19:04:54.870630 hw id: 0x0000 - pwm id 0x01
427 19:04:54.870928 bl2_stage_init 0xc1
428 19:04:54.875592 bl2_stage_init 0x02
429 19:04:54.875884
430 19:04:54.876158 L0:00000000
431 19:04:54.876389 L1:00000703
432 19:04:54.876606 L2:00008067
433 19:04:54.881179 L3:15000000
434 19:04:54.881471 S1:00000000
435 19:04:54.881690 B2:20282000
436 19:04:54.881900 B1:a0f83180
437 19:04:54.882109
438 19:04:54.882316 TE: 71014
439 19:04:54.882523
440 19:04:54.892503 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 19:04:54.892910
442 19:04:54.893192 Board ID = 1
443 19:04:54.893494 Set cpu clk to 24M
444 19:04:54.893769 Set clk81 to 24M
445 19:04:54.897976 Use GP1_pll as DSU clk.
446 19:04:54.898347 DSU clk: 1200 Mhz
447 19:04:54.898642 CPU clk: 1200 MHz
448 19:04:54.903623 Set clk81 to 166.6M
449 19:04:54.909181 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 19:04:54.909577 board id: 1
451 19:04:54.917101 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 19:04:54.927763 fw parse done
453 19:04:54.933705 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 19:04:54.976441 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 19:04:54.987381 PIEI prepare done
456 19:04:54.987862 fastboot data load
457 19:04:54.988244 fastboot data verify
458 19:04:54.992975 verify result: 266
459 19:04:54.998630 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 19:04:54.999106 LPDDR4 probe
461 19:04:54.999433 ddr clk to 1584MHz
462 19:04:56.363372 Load ddrfw from SPI, src: 0 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
463 19:04:56.364273 bl2_stage_init 0x01
464 19:04:56.364856 bl2_stage_init 0x81
465 19:04:56.368821 hw id: 0x0000 - pwm id 0x01
466 19:04:56.369503 bl2_stage_init 0xc1
467 19:04:56.378229 bl2_stage_init 0x02
468 19:04:56.378770
469 19:04:56.379541 L0:00000000
470 19:04:56.379903 L1:00000703
471 19:04:56.380291 L2:00008067
472 19:04:56.380843 L3:15000000
473 19:04:56.381599 S1:00000000
474 19:04:56.382247 B2:20282000
475 19:04:56.382853 B1:a0f83180
476 19:04:56.383387
477 19:04:56.383924 TE: 70694
478 19:04:56.384398
479 19:04:56.385802 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
480 19:04:56.386397
481 19:04:56.391145 Board ID = 1
482 19:04:56.391650 Set cpu clk to 24M
483 19:04:56.391921 Set clk81 to 24M
484 19:04:56.396770 Use GP1_pll as DSU clk.
485 19:04:56.397188 DSU clk: 1200 Mhz
486 19:04:56.397503 CPU clk: 1200 MHz
487 19:04:56.403232 Set clk81 to 166.6M
488 19:04:56.408068 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
489 19:04:56.408580 board id: 1
490 19:04:56.415398 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
491 19:04:56.426122 fw parse done
492 19:04:56.432164 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
493 19:04:56.475051 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
494 19:04:56.486200 PIEI prepare done
495 19:04:56.486537 fastboot data load
496 19:04:56.486748 fastboot data verify
497 19:04:56.491744 verify result: 266
498 19:04:56.497340 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
499 19:04:56.497678 LPDDR4 probe
500 19:04:56.497896 ddr clk to 1584MHz
501 19:04:56.505545 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
502 19:04:56.543151
503 19:04:56.543594 dmc_version 0001
504 19:04:56.550144 Check phy result
505 19:04:56.556183 INFO : End of CA training
506 19:04:56.556507 INFO : End of initialization
507 19:04:56.561819 INFO : Training has run successfully!
508 19:04:56.562133 Check phy result
509 19:04:56.567396 INFO : End of initialization
510 19:04:56.567808 INFO : End of read enable training
511 19:04:56.571085 INFO : End of fine write leveling
512 19:04:56.576225 INFO : End of Write leveling coarse delay
513 19:04:56.581828 INFO : Training has run successfully!
514 19:04:56.582145 Check phy result
515 19:04:56.582362 INFO : End of initialization
516 19:04:56.587364 INFO : End of read dq deskew training
517 19:04:56.592953 INFO : End of MPR read delay center optimization
518 19:04:56.593224 INFO : End of write delay center optimization
519 19:04:56.598580 INFO : End of read delay center optimization
520 19:04:56.604213 INFO : End of max read latency training
521 19:04:56.604535 INFO : Training has run successfully!
522 19:04:56.609836 1D training succeed
523 19:04:56.616278 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
524 19:04:56.664236 Check phy result
525 19:04:56.664647 INFO : End of initialization
526 19:04:56.691502 INFO : End of 2D read delay Voltage center optimization
527 19:04:56.715613 INFO : End of 2D read delay Voltage center optimization
528 19:04:56.772321 INFO : End of 2D write delay Voltage center optimization
529 19:04:56.826324 INFO : End of 2D write delay Voltage center optimization
530 19:04:56.831835 INFO : Training has run successfully!
531 19:04:56.832238
532 19:04:56.832482 channel==0
533 19:04:56.837613 RxClkDly_Margin_A0==78 ps 8
534 19:04:56.838057 TxDqDly_Margin_A0==98 ps 10
535 19:04:56.843052 RxClkDly_Margin_A1==88 ps 9
536 19:04:56.843734 TxDqDly_Margin_A1==98 ps 10
537 19:04:56.844327 TrainedVREFDQ_A0==74
538 19:04:56.848658 TrainedVREFDQ_A1==75
539 19:04:56.849424 VrefDac_Margin_A0==24
540 19:04:56.849964 DeviceVref_Margin_A0==40
541 19:04:56.854273 VrefDac_Margin_A1==23
542 19:04:56.854934 DeviceVref_Margin_A1==39
543 19:04:56.855456
544 19:04:56.855973
545 19:04:56.859816 channel==1
546 19:04:56.860484 RxClkDly_Margin_A0==78 ps 8
547 19:04:56.861003 TxDqDly_Margin_A0==88 ps 9
548 19:04:56.865418 RxClkDly_Margin_A1==78 ps 8
549 19:04:56.866089 TxDqDly_Margin_A1==78 ps 8
550 19:04:56.871034 TrainedVREFDQ_A0==75
551 19:04:56.871702 TrainedVREFDQ_A1==75
552 19:04:56.872296 VrefDac_Margin_A0==22
553 19:04:56.876640 DeviceVref_Margin_A0==38
554 19:04:56.877333 VrefDac_Margin_A1==22
555 19:04:56.882229 DeviceVref_Margin_A1==39
556 19:04:56.882896
557 19:04:56.883426 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
558 19:04:56.883934
559 19:04:56.915785 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000063
560 19:04:56.916241 2D training succeed
561 19:04:56.921366 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
562 19:04:56.926977 auto size-- 65535DDR cs0 size: 2048MB
563 19:04:56.927317 DDR cs1 size: 2048MB
564 19:04:56.932556 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
565 19:04:56.932890 cs0 DataBus test pass
566 19:04:56.938177 cs1 DataBus test pass
567 19:04:56.938544 cs0 AddrBus test pass
568 19:04:56.938776 cs1 AddrBus test pass
569 19:04:56.938991
570 19:04:56.943835 100bdlr_step_size ps== 471
571 19:04:56.944275 result report
572 19:04:56.949371 boot times 0Enable ddr reg access
573 19:04:56.954536 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
574 19:04:56.968383 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
575 19:04:57.628344 bl2z: ptr: 05129330, size: 00001e40
576 19:04:57.637141 0.0;M3 CHK:0;cm4_sp_mode 0
577 19:04:57.637652 MVN_1=0x00000000
578 19:04:57.637934 MVN_2=0x00000000
579 19:04:57.649772 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
580 19:04:57.650312 OPS=0x04
581 19:04:57.650588 ring efuse init
582 19:04:57.654305 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
583 19:04:57.654749 [0.017354 Inits done]
584 19:04:57.654981 secure task start!
585 19:04:57.662320 high task start!
586 19:04:57.662789 low task start!
587 19:04:57.663061 run into bl31
588 19:04:57.670986 NOTICE: BL31: v1.3(release):4fc40b1
589 19:04:57.681240 NOTICE: BL31: Built : 15:57:33, May 22 2019
590 19:04:57.681675 NOTICE: BL31: G12A normal boot!
591 19:04:57.694040 NOTICE: BL31: BL33 decompress pass
592 19:04:57.702919 ERROR: Error initializing runtime service opteed_fast
593 19:04:58.913548 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
594 19:04:58.914066 bl2_stage_init 0x01
595 19:04:58.914368 bl2_stage_init 0x81
596 19:04:58.919048 hw id: 0x0000 - pwm id 0x01
597 19:04:58.919624 bl2_stage_init 0xc1
598 19:04:58.924669 bl2_stage_init 0x02
599 19:04:58.925366
600 19:04:58.925858 L0:00000000
601 19:04:58.926422 L1:00000703
602 19:04:58.926879 L2:00008067
603 19:04:58.927322 L3:15000000
604 19:04:58.930315 S1:00000000
605 19:04:58.930821 B2:20282000
606 19:04:58.931266 B1:a0f83180
607 19:04:58.931706
608 19:04:58.932183 TE: 70584
609 19:04:58.932628
610 19:04:58.935794 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
611 19:04:58.936338
612 19:04:58.941450 Board ID = 1
613 19:04:58.941945 Set cpu clk to 24M
614 19:04:58.942385 Set clk81 to 24M
615 19:04:58.947053 Use GP1_pll as DSU clk.
616 19:04:58.947542 DSU clk: 1200 Mhz
617 19:04:58.948006 CPU clk: 1200 MHz
618 19:04:58.952702 Set clk81 to 166.6M
619 19:04:58.958229 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
620 19:04:58.958722 board id: 1
621 19:04:58.965508 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
622 19:04:58.976265 fw parse done
623 19:04:58.982216 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
624 19:04:59.024660 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
625 19:04:59.035678 PIEI prepare done
626 19:04:59.036238 fastboot data load
627 19:04:59.036689 fastboot data verify
628 19:04:59.041282 verify result: 266
629 19:04:59.046812 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
630 19:04:59.047300 LPDDR4 probe
631 19:04:59.047733 ddr clk to 1584MHz
632 19:04:59.054768 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
633 19:04:59.092174
634 19:04:59.092719 dmc_version 0001
635 19:04:59.098810 Check phy result
636 19:04:59.104703 INFO : End of CA training
637 19:04:59.105195 INFO : End of initialization
638 19:04:59.110330 INFO : Training has run successfully!
639 19:04:59.110825 Check phy result
640 19:04:59.115907 INFO : End of initialization
641 19:04:59.116455 INFO : End of read enable training
642 19:04:59.121511 INFO : End of fine write leveling
643 19:04:59.127086 INFO : End of Write leveling coarse delay
644 19:04:59.127643 INFO : Training has run successfully!
645 19:04:59.128160 Check phy result
646 19:04:59.132661 INFO : End of initialization
647 19:04:59.133175 INFO : End of read dq deskew training
648 19:04:59.138259 INFO : End of MPR read delay center optimization
649 19:04:59.143867 INFO : End of write delay center optimization
650 19:04:59.149453 INFO : End of read delay center optimization
651 19:04:59.149957 INFO : End of max read latency training
652 19:04:59.155081 INFO : Training has run successfully!
653 19:04:59.155587 1D training succeed
654 19:04:59.164320 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
655 19:04:59.211885 Check phy result
656 19:04:59.212427 INFO : End of initialization
657 19:04:59.234266 INFO : End of 2D read delay Voltage center optimization
658 19:04:59.253416 INFO : End of 2D read delay Voltage center optimization
659 19:04:59.305287 INFO : End of 2D write delay Voltage center optimization
660 19:04:59.354630 INFO : End of 2D write delay Voltage center optimization
661 19:04:59.360124 INFO : Training has run successfully!
662 19:04:59.360648
663 19:04:59.361121 channel==0
664 19:04:59.365614 RxClkDly_Margin_A0==88 ps 9
665 19:04:59.366109 TxDqDly_Margin_A0==88 ps 9
666 19:04:59.371244 RxClkDly_Margin_A1==88 ps 9
667 19:04:59.371738 TxDqDly_Margin_A1==98 ps 10
668 19:04:59.372254 TrainedVREFDQ_A0==74
669 19:04:59.376814 TrainedVREFDQ_A1==75
670 19:04:59.377366 VrefDac_Margin_A0==24
671 19:04:59.377834 DeviceVref_Margin_A0==40
672 19:04:59.382578 VrefDac_Margin_A1==23
673 19:04:59.383221 DeviceVref_Margin_A1==39
674 19:04:59.383709
675 19:04:59.384221
676 19:04:59.384682 channel==1
677 19:04:59.388089 RxClkDly_Margin_A0==78 ps 8
678 19:04:59.388618 TxDqDly_Margin_A0==98 ps 10
679 19:04:59.393697 RxClkDly_Margin_A1==88 ps 9
680 19:04:59.394222 TxDqDly_Margin_A1==88 ps 9
681 19:04:59.400418 TrainedVREFDQ_A0==78
682 19:04:59.400965 TrainedVREFDQ_A1==75
683 19:04:59.401430 VrefDac_Margin_A0==22
684 19:04:59.404749 DeviceVref_Margin_A0==36
685 19:04:59.405265 VrefDac_Margin_A1==21
686 19:04:59.410435 DeviceVref_Margin_A1==39
687 19:04:59.410946
688 19:04:59.411408 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
689 19:04:59.411857
690 19:04:59.444080 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000016 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
691 19:04:59.444688 2D training succeed
692 19:04:59.449645 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
693 19:04:59.455190 auto size-- 65535DDR cs0 size: 2048MB
694 19:04:59.455692 DDR cs1 size: 2048MB
695 19:04:59.460710 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
696 19:04:59.461228 cs0 DataBus test pass
697 19:04:59.466324 cs1 DataBus test pass
698 19:04:59.466828 cs0 AddrBus test pass
699 19:04:59.467284 cs1 AddrBus test pass
700 19:04:59.467729
701 19:04:59.471891 100bdlr_step_size ps== 478
702 19:04:59.472448 result report
703 19:04:59.477478 boot times 0Enable ddr reg access
704 19:04:59.482674 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
705 19:04:59.496504 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
706 19:05:00.150538 bl2z: ptr: 05129330, size: 00001e40
707 19:05:00.157610 0.0;M3 CHK:0;cm4_sp_mode 0
708 19:05:00.158212 MVN_1=0x00000000
709 19:05:00.158653 MVN_2=0x00000000
710 19:05:00.169136 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
711 19:05:00.169745 OPS=0x04
712 19:05:00.170233 ring efuse init
713 19:05:00.174679 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
714 19:05:00.175181 [0.017319 Inits done]
715 19:05:00.175614 secure task start!
716 19:05:00.182665 high task start!
717 19:05:00.183145 low task start!
718 19:05:00.183577 run into bl31
719 19:05:00.191271 NOTICE: BL31: v1.3(release):4fc40b1
720 19:05:00.199061 NOTICE: BL31: Built : 15:57:33, May 22 2019
721 19:05:00.199546 NOTICE: BL31: G12A normal boot!
722 19:05:00.214544 NOTICE: BL31: BL33 decompress pass
723 19:05:00.220295 ERROR: Error initializing runtime service opteed_fast
724 19:05:01.014565
725 19:05:01.015247
726 19:05:01.019816 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
727 19:05:01.020381
728 19:05:01.023382 Model: Libre Computer AML-S905D3-CC Solitude
729 19:05:01.170346 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
730 19:05:01.185554 DRAM: 2 GiB (effective 3.8 GiB)
731 19:05:01.286472 Core: 406 devices, 33 uclasses, devicetree: separate
732 19:05:01.292432 WDT: Not starting watchdog@f0d0
733 19:05:01.317398 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
734 19:05:01.329679 Loading Environment from FAT... Card did not respond to voltage select! : -110
735 19:05:01.334639 ** Bad device specification mmc 0 **
736 19:05:01.344709 Card did not respond to voltage select! : -110
737 19:05:01.352433 ** Bad device specification mmc 0 **
738 19:05:01.352940 Couldn't find partition mmc 0
739 19:05:01.360684 Card did not respond to voltage select! : -110
740 19:05:01.366267 ** Bad device specification mmc 0 **
741 19:05:01.366779 Couldn't find partition mmc 0
742 19:05:01.371303 Error: could not access storage.
743 19:05:01.667713 Net: eth0: ethernet@ff3f0000
744 19:05:01.668457 starting USB...
745 19:05:01.912289 Bus usb@ff500000: Register 3000140 NbrPorts 3
746 19:05:01.912905 Starting the controller
747 19:05:01.919306 USB XHCI 1.10
748 19:05:03.475217 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
749 19:05:03.483501 scanning usb for storage devices... 0 Storage Device(s) found
751 19:05:03.535299 Hit any key to stop autoboot: 1
752 19:05:03.536379 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
753 19:05:03.536917 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
754 19:05:03.537209 Setting prompt string to ['=>']
755 19:05:03.537487 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
756 19:05:03.549548 0
757 19:05:03.550634 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
759 19:05:03.652083 => setenv autoload no
760 19:05:03.653012 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
761 19:05:03.657196 setenv autoload no
763 19:05:03.758779 => setenv initrd_high 0xffffffff
764 19:05:03.759334 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
765 19:05:03.763592 setenv initrd_high 0xffffffff
767 19:05:03.864595 => setenv fdt_high 0xffffffff
768 19:05:03.865299 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
769 19:05:03.869508 setenv fdt_high 0xffffffff
771 19:05:03.970633 => dhcp
772 19:05:03.971177 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
773 19:05:03.975192 dhcp
774 19:05:04.981396 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
775 19:05:04.982072 Speed: 1000, full duplex
776 19:05:04.982546 BOOTP broadcast 1
777 19:05:04.994274 DHCP client bound to address 192.168.6.21 (12 ms)
779 19:05:05.095791 => setenv serverip 192.168.6.2
780 19:05:05.096567 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
781 19:05:05.102174 setenv serverip 192.168.6.2
783 19:05:05.203688 => tftpboot 0x01080000 953548/tftp-deploy-oxzy4_3y/kernel/uImage
784 19:05:05.204415 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
785 19:05:05.211284 tftpboot 0x01080000 953548/tftp-deploy-oxzy4_3y/kernel/uImage
786 19:05:05.211859 Speed: 1000, full duplex
787 19:05:05.212553 Using ethernet@ff3f0000 device
788 19:05:05.216562 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
789 19:05:05.222143 Filename '953548/tftp-deploy-oxzy4_3y/kernel/uImage'.
790 19:05:05.226114 Load address: 0x1080000
791 19:05:08.016386 Loading: *################################################## 43.6 MiB
792 19:05:08.017036 15.6 MiB/s
793 19:05:08.017457 done
794 19:05:08.020659 Bytes transferred = 45713984 (2b98a40 hex)
796 19:05:08.122116 => tftpboot 0x08000000 953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
797 19:05:08.122816 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
798 19:05:08.129482 tftpboot 0x08000000 953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot
799 19:05:08.129943 Speed: 1000, full duplex
800 19:05:08.130346 Using ethernet@ff3f0000 device
801 19:05:08.135031 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
802 19:05:08.144875 Filename '953548/tftp-deploy-oxzy4_3y/ramdisk/ramdisk.cpio.gz.uboot'.
803 19:05:08.145333 Load address: 0x8000000
804 19:05:12.163664 Loading: *################################################# UDP wrong checksum 0000000f 0000f85d
805 19:05:17.168118 T UDP wrong checksum 0000000f 0000f85d
806 19:05:27.166834 T T UDP wrong checksum 0000000f 0000f85d
807 19:05:47.170934 T T T T UDP wrong checksum 0000000f 0000f85d
808 19:06:07.175536 T T T
809 19:06:07.176185 Retry count exceeded; starting again
811 19:06:07.177593 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
814 19:06:07.179407 end: 2.4 uboot-commands (duration 00:01:23) [common]
816 19:06:07.180869 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
818 19:06:07.181892 end: 2 uboot-action (duration 00:01:23) [common]
820 19:06:07.183383 Cleaning after the job
821 19:06:07.183975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/ramdisk
822 19:06:07.185282 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/kernel
823 19:06:07.194289 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/dtb
824 19:06:07.195725 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953548/tftp-deploy-oxzy4_3y/modules
825 19:06:07.201983 start: 4.1 power-off (timeout 00:00:30) [common]
826 19:06:07.202960 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
827 19:06:07.238010 >> OK - accepted request
828 19:06:07.240182 Returned 0 in 0 seconds
829 19:06:07.341314 end: 4.1 power-off (duration 00:00:00) [common]
831 19:06:07.342988 start: 4.2 read-feedback (timeout 00:10:00) [common]
832 19:06:07.344138 Listened to connection for namespace 'common' for up to 1s
833 19:06:08.344885 Finalising connection for namespace 'common'
834 19:06:08.345605 Disconnecting from shell: Finalise
835 19:06:08.346125 =>
836 19:06:08.447149 end: 4.2 read-feedback (duration 00:00:01) [common]
837 19:06:08.447849 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953548
838 19:06:09.154108 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953548
839 19:06:09.154864 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.