Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:05:44.427778 lava-dispatcher, installed at version: 2024.01
2 19:05:44.428613 start: 0 validate
3 19:05:44.429092 Start time: 2024-11-07 19:05:44.429062+00:00 (UTC)
4 19:05:44.429632 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:05:44.430176 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:05:44.470246 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:05:44.470773 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:05:44.520213 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:05:44.520833 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:05:44.555138 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:05:44.555643 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:05:44.586116 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:05:44.586605 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:05:44.628334 validate duration: 0.20
16 19:05:44.629788 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:05:44.630366 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:05:44.630936 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:05:44.631844 Not decompressing ramdisk as can be used compressed.
20 19:05:44.632655 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 19:05:44.633153 saving as /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/ramdisk/initrd.cpio.gz
22 19:05:44.633635 total size: 5628169 (5 MB)
23 19:05:44.682604 progress 0 % (0 MB)
24 19:05:44.690441 progress 5 % (0 MB)
25 19:05:44.698622 progress 10 % (0 MB)
26 19:05:44.706031 progress 15 % (0 MB)
27 19:05:44.713984 progress 20 % (1 MB)
28 19:05:44.718756 progress 25 % (1 MB)
29 19:05:44.722946 progress 30 % (1 MB)
30 19:05:44.726981 progress 35 % (1 MB)
31 19:05:44.730691 progress 40 % (2 MB)
32 19:05:44.734729 progress 45 % (2 MB)
33 19:05:44.738407 progress 50 % (2 MB)
34 19:05:44.742609 progress 55 % (2 MB)
35 19:05:44.746831 progress 60 % (3 MB)
36 19:05:44.750636 progress 65 % (3 MB)
37 19:05:44.754971 progress 70 % (3 MB)
38 19:05:44.758734 progress 75 % (4 MB)
39 19:05:44.762927 progress 80 % (4 MB)
40 19:05:44.766584 progress 85 % (4 MB)
41 19:05:44.770644 progress 90 % (4 MB)
42 19:05:44.774745 progress 95 % (5 MB)
43 19:05:44.778227 progress 100 % (5 MB)
44 19:05:44.778899 5 MB downloaded in 0.15 s (36.95 MB/s)
45 19:05:44.779444 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:05:44.780370 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:05:44.780668 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:05:44.780939 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:05:44.781425 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kernel/Image
51 19:05:44.781693 saving as /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/kernel/Image
52 19:05:44.781906 total size: 45713920 (43 MB)
53 19:05:44.782118 No compression specified
54 19:05:44.828603 progress 0 % (0 MB)
55 19:05:44.857420 progress 5 % (2 MB)
56 19:05:44.885472 progress 10 % (4 MB)
57 19:05:44.913355 progress 15 % (6 MB)
58 19:05:44.941498 progress 20 % (8 MB)
59 19:05:44.969097 progress 25 % (10 MB)
60 19:05:44.997173 progress 30 % (13 MB)
61 19:05:45.025265 progress 35 % (15 MB)
62 19:05:45.053710 progress 40 % (17 MB)
63 19:05:45.081585 progress 45 % (19 MB)
64 19:05:45.109763 progress 50 % (21 MB)
65 19:05:45.137956 progress 55 % (24 MB)
66 19:05:45.166097 progress 60 % (26 MB)
67 19:05:45.193756 progress 65 % (28 MB)
68 19:05:45.222188 progress 70 % (30 MB)
69 19:05:45.250251 progress 75 % (32 MB)
70 19:05:45.278433 progress 80 % (34 MB)
71 19:05:45.306164 progress 85 % (37 MB)
72 19:05:45.334474 progress 90 % (39 MB)
73 19:05:45.362572 progress 95 % (41 MB)
74 19:05:45.390099 progress 100 % (43 MB)
75 19:05:45.390626 43 MB downloaded in 0.61 s (71.62 MB/s)
76 19:05:45.391097 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:05:45.391906 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:05:45.392212 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:05:45.392479 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:05:45.392956 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:05:45.393225 saving as /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:05:45.393435 total size: 54703 (0 MB)
84 19:05:45.393644 No compression specified
85 19:05:45.431883 progress 59 % (0 MB)
86 19:05:45.432778 progress 100 % (0 MB)
87 19:05:45.433359 0 MB downloaded in 0.04 s (1.31 MB/s)
88 19:05:45.433851 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:05:45.434706 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:05:45.434989 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:05:45.435270 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:05:45.435758 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 19:05:45.436045 saving as /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/nfsrootfs/full.rootfs.tar
95 19:05:45.436269 total size: 120894716 (115 MB)
96 19:05:45.436492 Using unxz to decompress xz
97 19:05:45.478353 progress 0 % (0 MB)
98 19:05:46.284213 progress 5 % (5 MB)
99 19:05:47.129146 progress 10 % (11 MB)
100 19:05:47.929015 progress 15 % (17 MB)
101 19:05:48.668270 progress 20 % (23 MB)
102 19:05:49.260665 progress 25 % (28 MB)
103 19:05:50.087619 progress 30 % (34 MB)
104 19:05:50.879847 progress 35 % (40 MB)
105 19:05:51.226356 progress 40 % (46 MB)
106 19:05:51.607423 progress 45 % (51 MB)
107 19:05:52.342750 progress 50 % (57 MB)
108 19:05:53.238564 progress 55 % (63 MB)
109 19:05:54.031864 progress 60 % (69 MB)
110 19:05:54.794510 progress 65 % (74 MB)
111 19:05:55.579680 progress 70 % (80 MB)
112 19:05:56.403052 progress 75 % (86 MB)
113 19:05:57.187289 progress 80 % (92 MB)
114 19:05:57.951798 progress 85 % (98 MB)
115 19:05:58.810029 progress 90 % (103 MB)
116 19:05:59.592995 progress 95 % (109 MB)
117 19:06:00.437823 progress 100 % (115 MB)
118 19:06:00.451335 115 MB downloaded in 15.02 s (7.68 MB/s)
119 19:06:00.451910 end: 1.4.1 http-download (duration 00:00:15) [common]
121 19:06:00.453731 end: 1.4 download-retry (duration 00:00:15) [common]
122 19:06:00.454304 start: 1.5 download-retry (timeout 00:09:44) [common]
123 19:06:00.454871 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 19:06:00.455762 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/modules.tar.xz
125 19:06:00.456322 saving as /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/modules/modules.tar
126 19:06:00.456776 total size: 11601668 (11 MB)
127 19:06:00.457234 Using unxz to decompress xz
128 19:06:00.501372 progress 0 % (0 MB)
129 19:06:00.570984 progress 5 % (0 MB)
130 19:06:00.651737 progress 10 % (1 MB)
131 19:06:00.753437 progress 15 % (1 MB)
132 19:06:00.848738 progress 20 % (2 MB)
133 19:06:00.928913 progress 25 % (2 MB)
134 19:06:01.004071 progress 30 % (3 MB)
135 19:06:01.078041 progress 35 % (3 MB)
136 19:06:01.154431 progress 40 % (4 MB)
137 19:06:01.230144 progress 45 % (5 MB)
138 19:06:01.313606 progress 50 % (5 MB)
139 19:06:01.390211 progress 55 % (6 MB)
140 19:06:01.476881 progress 60 % (6 MB)
141 19:06:01.558634 progress 65 % (7 MB)
142 19:06:01.635773 progress 70 % (7 MB)
143 19:06:01.718543 progress 75 % (8 MB)
144 19:06:01.802003 progress 80 % (8 MB)
145 19:06:01.878740 progress 85 % (9 MB)
146 19:06:01.961719 progress 90 % (9 MB)
147 19:06:02.039568 progress 95 % (10 MB)
148 19:06:02.118852 progress 100 % (11 MB)
149 19:06:02.130092 11 MB downloaded in 1.67 s (6.61 MB/s)
150 19:06:02.130678 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:06:02.131552 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:06:02.131825 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 19:06:02.132241 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 19:06:18.779638 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953569/extract-nfsrootfs-c_zeh7g2
156 19:06:18.780292 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 19:06:18.780586 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 19:06:18.781284 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf
159 19:06:18.781732 makedir: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin
160 19:06:18.782060 makedir: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/tests
161 19:06:18.782378 makedir: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/results
162 19:06:18.782710 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-add-keys
163 19:06:18.783240 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-add-sources
164 19:06:18.783790 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-background-process-start
165 19:06:18.784393 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-background-process-stop
166 19:06:18.784931 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-common-functions
167 19:06:18.785422 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-echo-ipv4
168 19:06:18.785907 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-install-packages
169 19:06:18.786379 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-installed-packages
170 19:06:18.786847 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-os-build
171 19:06:18.787317 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-probe-channel
172 19:06:18.787822 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-probe-ip
173 19:06:18.788370 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-target-ip
174 19:06:18.788851 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-target-mac
175 19:06:18.789324 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-target-storage
176 19:06:18.789804 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-case
177 19:06:18.790286 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-event
178 19:06:18.790754 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-feedback
179 19:06:18.791287 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-raise
180 19:06:18.791806 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-reference
181 19:06:18.792339 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-runner
182 19:06:18.792825 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-set
183 19:06:18.793294 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-test-shell
184 19:06:18.793777 Updating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-add-keys (debian)
185 19:06:18.794305 Updating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-add-sources (debian)
186 19:06:18.794806 Updating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-install-packages (debian)
187 19:06:18.795295 Updating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-installed-packages (debian)
188 19:06:18.795783 Updating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/bin/lava-os-build (debian)
189 19:06:18.796252 Creating /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/environment
190 19:06:18.796622 LAVA metadata
191 19:06:18.796881 - LAVA_JOB_ID=953569
192 19:06:18.797097 - LAVA_DISPATCHER_IP=192.168.6.2
193 19:06:18.797453 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 19:06:18.798396 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 19:06:18.798709 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 19:06:18.798917 skipped lava-vland-overlay
197 19:06:18.799153 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 19:06:18.799404 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 19:06:18.799620 skipped lava-multinode-overlay
200 19:06:18.799861 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 19:06:18.800139 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 19:06:18.800387 Loading test definitions
203 19:06:18.800660 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 19:06:18.800881 Using /lava-953569 at stage 0
205 19:06:18.801955 uuid=953569_1.6.2.4.1 testdef=None
206 19:06:18.802258 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 19:06:18.802520 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 19:06:18.804062 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 19:06:18.804850 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 19:06:18.806749 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 19:06:18.807565 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 19:06:18.809395 runner path: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/0/tests/0_timesync-off test_uuid 953569_1.6.2.4.1
215 19:06:18.809930 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 19:06:18.810731 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 19:06:18.810954 Using /lava-953569 at stage 0
219 19:06:18.811296 Fetching tests from https://github.com/kernelci/test-definitions.git
220 19:06:18.811583 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/0/tests/1_kselftest-alsa'
221 19:06:22.355725 Running '/usr/bin/git checkout kernelci.org
222 19:06:22.637699 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 19:06:22.639163 uuid=953569_1.6.2.4.5 testdef=None
224 19:06:22.639500 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 19:06:22.640288 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 19:06:22.643108 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 19:06:22.643921 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 19:06:22.647611 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 19:06:22.648485 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 19:06:22.652093 runner path: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/0/tests/1_kselftest-alsa test_uuid 953569_1.6.2.4.5
234 19:06:22.652383 BOARD='meson-g12b-a311d-libretech-cc'
235 19:06:22.652589 BRANCH='broonie-sound'
236 19:06:22.652786 SKIPFILE='/dev/null'
237 19:06:22.652984 SKIP_INSTALL='True'
238 19:06:22.653178 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 19:06:22.653377 TST_CASENAME=''
240 19:06:22.653570 TST_CMDFILES='alsa'
241 19:06:22.654113 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 19:06:22.654892 Creating lava-test-runner.conf files
244 19:06:22.655097 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953569/lava-overlay-_v0rdhaf/lava-953569/0 for stage 0
245 19:06:22.655439 - 0_timesync-off
246 19:06:22.655674 - 1_kselftest-alsa
247 19:06:22.656010 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 19:06:22.656295 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 19:06:46.080733 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 19:06:46.081174 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 19:06:46.081440 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 19:06:46.081716 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 19:06:46.081984 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 19:06:46.693965 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 19:06:46.694450 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 19:06:46.694705 extracting modules file /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953569/extract-nfsrootfs-c_zeh7g2
257 19:06:48.201140 extracting modules file /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk
258 19:06:49.603017 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 19:06:49.603507 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 19:06:49.603790 [common] Applying overlay to NFS
261 19:06:49.604043 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953569/compress-overlay-k2szlv40/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953569/extract-nfsrootfs-c_zeh7g2
262 19:06:52.333522 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 19:06:52.334012 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 19:06:52.334290 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 19:06:52.334523 Converting downloaded kernel to a uImage
266 19:06:52.334834 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/kernel/Image /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/kernel/uImage
267 19:06:52.886315 output: Image Name:
268 19:06:52.886812 output: Created: Thu Nov 7 19:06:52 2024
269 19:06:52.887069 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 19:06:52.887321 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 19:06:52.887569 output: Load Address: 01080000
272 19:06:52.887815 output: Entry Point: 01080000
273 19:06:52.888105 output:
274 19:06:52.888519 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 19:06:52.888855 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 19:06:52.889185 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 19:06:52.889493 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 19:06:52.889811 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 19:06:52.890118 Building ramdisk /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk
280 19:06:55.152095 >> 166792 blocks
281 19:07:02.924851 Adding RAMdisk u-boot header.
282 19:07:02.925524 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk.cpio.gz.uboot
283 19:07:03.176545 output: Image Name:
284 19:07:03.177165 output: Created: Thu Nov 7 19:07:02 2024
285 19:07:03.177579 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 19:07:03.177982 output: Data Size: 23432601 Bytes = 22883.40 KiB = 22.35 MiB
287 19:07:03.178385 output: Load Address: 00000000
288 19:07:03.178780 output: Entry Point: 00000000
289 19:07:03.179179 output:
290 19:07:03.180229 rename /var/lib/lava/dispatcher/tmp/953569/extract-overlay-ramdisk-9h0qppc1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
291 19:07:03.180950 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 19:07:03.181490 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 19:07:03.182048 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 19:07:03.182489 No LXC device requested
295 19:07:03.182982 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 19:07:03.183483 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 19:07:03.183973 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 19:07:03.184417 Checking files for TFTP limit of 4294967296 bytes.
299 19:07:03.187068 end: 1 tftp-deploy (duration 00:01:19) [common]
300 19:07:03.187638 start: 2 uboot-action (timeout 00:05:00) [common]
301 19:07:03.188195 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 19:07:03.188695 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 19:07:03.189197 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 19:07:03.189721 Using kernel file from prepare-kernel: 953569/tftp-deploy-krpw3ihz/kernel/uImage
305 19:07:03.190349 substitutions:
306 19:07:03.190755 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 19:07:03.191160 - {DTB_ADDR}: 0x01070000
308 19:07:03.191561 - {DTB}: 953569/tftp-deploy-krpw3ihz/dtb/meson-g12b-a311d-libretech-cc.dtb
309 19:07:03.191968 - {INITRD}: 953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
310 19:07:03.192405 - {KERNEL_ADDR}: 0x01080000
311 19:07:03.192801 - {KERNEL}: 953569/tftp-deploy-krpw3ihz/kernel/uImage
312 19:07:03.193197 - {LAVA_MAC}: None
313 19:07:03.193629 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953569/extract-nfsrootfs-c_zeh7g2
314 19:07:03.194028 - {NFS_SERVER_IP}: 192.168.6.2
315 19:07:03.194422 - {PRESEED_CONFIG}: None
316 19:07:03.194813 - {PRESEED_LOCAL}: None
317 19:07:03.195204 - {RAMDISK_ADDR}: 0x08000000
318 19:07:03.195592 - {RAMDISK}: 953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
319 19:07:03.196006 - {ROOT_PART}: None
320 19:07:03.196403 - {ROOT}: None
321 19:07:03.196795 - {SERVER_IP}: 192.168.6.2
322 19:07:03.197182 - {TEE_ADDR}: 0x83000000
323 19:07:03.197571 - {TEE}: None
324 19:07:03.197959 Parsed boot commands:
325 19:07:03.198336 - setenv autoload no
326 19:07:03.198723 - setenv initrd_high 0xffffffff
327 19:07:03.199107 - setenv fdt_high 0xffffffff
328 19:07:03.199489 - dhcp
329 19:07:03.199871 - setenv serverip 192.168.6.2
330 19:07:03.200288 - tftpboot 0x01080000 953569/tftp-deploy-krpw3ihz/kernel/uImage
331 19:07:03.200679 - tftpboot 0x08000000 953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
332 19:07:03.201070 - tftpboot 0x01070000 953569/tftp-deploy-krpw3ihz/dtb/meson-g12b-a311d-libretech-cc.dtb
333 19:07:03.201457 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953569/extract-nfsrootfs-c_zeh7g2,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 19:07:03.201856 - bootm 0x01080000 0x08000000 0x01070000
335 19:07:03.202350 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 19:07:03.203824 start: 2.3 connect-device (timeout 00:05:00) [common]
338 19:07:03.204269 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 19:07:03.219743 Setting prompt string to ['lava-test: # ']
340 19:07:03.221289 end: 2.3 connect-device (duration 00:00:00) [common]
341 19:07:03.221900 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 19:07:03.222470 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 19:07:03.223003 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 19:07:03.224354 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 19:07:03.262086 >> OK - accepted request
346 19:07:03.264251 Returned 0 in 0 seconds
347 19:07:03.365392 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 19:07:03.367030 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 19:07:03.367573 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 19:07:03.368120 Setting prompt string to ['Hit any key to stop autoboot']
352 19:07:03.368584 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 19:07:03.370172 Trying 192.168.56.21...
354 19:07:03.370649 Connected to conserv1.
355 19:07:03.371057 Escape character is '^]'.
356 19:07:03.371471
357 19:07:03.371883 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 19:07:03.372346
359 19:07:15.068242 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 19:07:15.068693 bl2_stage_init 0x01
361 19:07:15.068930 bl2_stage_init 0x81
362 19:07:15.073725 hw id: 0x0000 - pwm id 0x01
363 19:07:15.074315 bl2_stage_init 0xc1
364 19:07:15.074791 bl2_stage_init 0x02
365 19:07:15.075249
366 19:07:15.079225 L0:00000000
367 19:07:15.079751 L1:20000703
368 19:07:15.080249 L2:00008067
369 19:07:15.080707 L3:14000000
370 19:07:15.082144 B2:00402000
371 19:07:15.082631 B1:e0f83180
372 19:07:15.083071
373 19:07:15.083507 TE: 58124
374 19:07:15.083942
375 19:07:15.093466 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 19:07:15.094026
377 19:07:15.094517 Board ID = 1
378 19:07:15.094992 Set A53 clk to 24M
379 19:07:15.095435 Set A73 clk to 24M
380 19:07:15.098889 Set clk81 to 24M
381 19:07:15.099369 A53 clk: 1200 MHz
382 19:07:15.099804 A73 clk: 1200 MHz
383 19:07:15.102376 CLK81: 166.6M
384 19:07:15.102855 smccc: 00012a92
385 19:07:15.107913 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 19:07:15.113554 board id: 1
387 19:07:15.118624 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 19:07:15.129325 fw parse done
389 19:07:15.135275 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 19:07:15.177987 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 19:07:15.189061 PIEI prepare done
392 19:07:15.189571 fastboot data load
393 19:07:15.190013 fastboot data verify
394 19:07:15.194413 verify result: 266
395 19:07:15.200037 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 19:07:15.200555 LPDDR4 probe
397 19:07:15.201022 ddr clk to 1584MHz
398 19:07:15.208101 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 19:07:15.245310
400 19:07:15.245913 dmc_version 0001
401 19:07:15.252117 Check phy result
402 19:07:15.257836 INFO : End of CA training
403 19:07:15.258340 INFO : End of initialization
404 19:07:15.263409 INFO : Training has run successfully!
405 19:07:15.263905 Check phy result
406 19:07:15.268968 INFO : End of initialization
407 19:07:15.269465 INFO : End of read enable training
408 19:07:15.272256 INFO : End of fine write leveling
409 19:07:15.277986 INFO : End of Write leveling coarse delay
410 19:07:15.283458 INFO : Training has run successfully!
411 19:07:15.283959 Check phy result
412 19:07:15.284470 INFO : End of initialization
413 19:07:15.289083 INFO : End of read dq deskew training
414 19:07:15.294703 INFO : End of MPR read delay center optimization
415 19:07:15.295235 INFO : End of write delay center optimization
416 19:07:15.300324 INFO : End of read delay center optimization
417 19:07:15.305990 INFO : End of max read latency training
418 19:07:15.306482 INFO : Training has run successfully!
419 19:07:15.311480 1D training succeed
420 19:07:15.317445 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 19:07:15.365163 Check phy result
422 19:07:15.365670 INFO : End of initialization
423 19:07:15.386847 INFO : End of 2D read delay Voltage center optimization
424 19:07:15.407208 INFO : End of 2D read delay Voltage center optimization
425 19:07:15.459245 INFO : End of 2D write delay Voltage center optimization
426 19:07:15.508431 INFO : End of 2D write delay Voltage center optimization
427 19:07:15.514057 INFO : Training has run successfully!
428 19:07:15.514552
429 19:07:15.515013 channel==0
430 19:07:15.519571 RxClkDly_Margin_A0==88 ps 9
431 19:07:15.520092 TxDqDly_Margin_A0==98 ps 10
432 19:07:15.525212 RxClkDly_Margin_A1==88 ps 9
433 19:07:15.525705 TxDqDly_Margin_A1==88 ps 9
434 19:07:15.526158 TrainedVREFDQ_A0==74
435 19:07:15.530869 TrainedVREFDQ_A1==74
436 19:07:15.531363 VrefDac_Margin_A0==25
437 19:07:15.531813 DeviceVref_Margin_A0==40
438 19:07:15.536381 VrefDac_Margin_A1==25
439 19:07:15.536875 DeviceVref_Margin_A1==40
440 19:07:15.537365
441 19:07:15.537842
442 19:07:15.538294 channel==1
443 19:07:15.542052 RxClkDly_Margin_A0==98 ps 10
444 19:07:15.542543 TxDqDly_Margin_A0==88 ps 9
445 19:07:15.547510 RxClkDly_Margin_A1==88 ps 9
446 19:07:15.548030 TxDqDly_Margin_A1==88 ps 9
447 19:07:15.553230 TrainedVREFDQ_A0==76
448 19:07:15.553789 TrainedVREFDQ_A1==77
449 19:07:15.554252 VrefDac_Margin_A0==22
450 19:07:15.558857 DeviceVref_Margin_A0==38
451 19:07:15.559351 VrefDac_Margin_A1==24
452 19:07:15.564408 DeviceVref_Margin_A1==37
453 19:07:15.564897
454 19:07:15.565353 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 19:07:15.565801
456 19:07:15.598109 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 19:07:15.598721 2D training succeed
458 19:07:15.603606 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 19:07:15.609106 auto size-- 65535DDR cs0 size: 2048MB
460 19:07:15.609594 DDR cs1 size: 2048MB
461 19:07:15.614719 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 19:07:15.615196 cs0 DataBus test pass
463 19:07:15.620337 cs1 DataBus test pass
464 19:07:15.620825 cs0 AddrBus test pass
465 19:07:15.621280 cs1 AddrBus test pass
466 19:07:15.621723
467 19:07:15.626044 100bdlr_step_size ps== 420
468 19:07:15.626547 result report
469 19:07:15.631665 boot times 0Enable ddr reg access
470 19:07:15.636689 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 19:07:15.650161 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 19:07:16.224016 0.0;M3 CHK:0;cm4_sp_mode 0
473 19:07:16.224692 MVN_1=0x00000000
474 19:07:16.229297 MVN_2=0x00000000
475 19:07:16.235068 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 19:07:16.235563 OPS=0x10
477 19:07:16.236046 ring efuse init
478 19:07:16.236499 chipver efuse init
479 19:07:16.243295 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 19:07:16.243790 [0.018961 Inits done]
481 19:07:16.250873 secure task start!
482 19:07:16.251360 high task start!
483 19:07:16.251811 low task start!
484 19:07:16.252294 run into bl31
485 19:07:16.257517 NOTICE: BL31: v1.3(release):4fc40b1
486 19:07:16.265353 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 19:07:16.265837 NOTICE: BL31: G12A normal boot!
488 19:07:16.290825 NOTICE: BL31: BL33 decompress pass
489 19:07:16.296360 ERROR: Error initializing runtime service opteed_fast
490 19:07:17.529433
491 19:07:17.530107
492 19:07:17.537620 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 19:07:17.538207
494 19:07:17.538679 Model: Libre Computer AML-A311D-CC Alta
495 19:07:17.746078 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 19:07:17.769401 DRAM: 2 GiB (effective 3.8 GiB)
497 19:07:17.912486 Core: 408 devices, 31 uclasses, devicetree: separate
498 19:07:17.918412 WDT: Not starting watchdog@f0d0
499 19:07:17.950568 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 19:07:17.963052 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 19:07:17.967124 ** Bad device specification mmc 0 **
502 19:07:17.978317 Card did not respond to voltage select! : -110
503 19:07:17.985971 ** Bad device specification mmc 0 **
504 19:07:17.986476 Couldn't find partition mmc 0
505 19:07:17.994332 Card did not respond to voltage select! : -110
506 19:07:17.999813 ** Bad device specification mmc 0 **
507 19:07:18.000370 Couldn't find partition mmc 0
508 19:07:18.004075 Error: could not access storage.
509 19:07:19.268306 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 19:07:19.268997 bl2_stage_init 0x01
511 19:07:19.269483 bl2_stage_init 0x81
512 19:07:19.273817 hw id: 0x0000 - pwm id 0x01
513 19:07:19.274404 bl2_stage_init 0xc1
514 19:07:19.274898 bl2_stage_init 0x02
515 19:07:19.275369
516 19:07:19.279414 L0:00000000
517 19:07:19.279903 L1:20000703
518 19:07:19.280393 L2:00008067
519 19:07:19.280823 L3:14000000
520 19:07:19.284985 B2:00402000
521 19:07:19.285471 B1:e0f83180
522 19:07:19.285921
523 19:07:19.286369 TE: 58124
524 19:07:19.286813
525 19:07:19.290642 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 19:07:19.291176
527 19:07:19.291605 Board ID = 1
528 19:07:19.296281 Set A53 clk to 24M
529 19:07:19.296577 Set A73 clk to 24M
530 19:07:19.296805 Set clk81 to 24M
531 19:07:19.301901 A53 clk: 1200 MHz
532 19:07:19.302408 A73 clk: 1200 MHz
533 19:07:19.302838 CLK81: 166.6M
534 19:07:19.303251 smccc: 00012a92
535 19:07:19.307518 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 19:07:19.313016 board id: 1
537 19:07:19.318956 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 19:07:19.329629 fw parse done
539 19:07:19.335577 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 19:07:19.378408 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 19:07:19.389065 PIEI prepare done
542 19:07:19.389676 fastboot data load
543 19:07:19.389967 fastboot data verify
544 19:07:19.395048 verify result: 266
545 19:07:19.400359 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 19:07:19.400777 LPDDR4 probe
547 19:07:19.401034 ddr clk to 1584MHz
548 19:07:19.407549 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 19:07:19.445832
550 19:07:19.446486 dmc_version 0001
551 19:07:19.452312 Check phy result
552 19:07:19.458211 INFO : End of CA training
553 19:07:19.458828 INFO : End of initialization
554 19:07:19.463703 INFO : Training has run successfully!
555 19:07:19.464359 Check phy result
556 19:07:19.469262 INFO : End of initialization
557 19:07:19.469805 INFO : End of read enable training
558 19:07:19.474877 INFO : End of fine write leveling
559 19:07:19.480592 INFO : End of Write leveling coarse delay
560 19:07:19.481085 INFO : Training has run successfully!
561 19:07:19.481491 Check phy result
562 19:07:19.486102 INFO : End of initialization
563 19:07:19.486568 INFO : End of read dq deskew training
564 19:07:19.491629 INFO : End of MPR read delay center optimization
565 19:07:19.497242 INFO : End of write delay center optimization
566 19:07:19.502867 INFO : End of read delay center optimization
567 19:07:19.503329 INFO : End of max read latency training
568 19:07:19.508533 INFO : Training has run successfully!
569 19:07:19.508981 1D training succeed
570 19:07:19.517686 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 19:07:19.564677 Check phy result
572 19:07:19.565311 INFO : End of initialization
573 19:07:19.587056 INFO : End of 2D read delay Voltage center optimization
574 19:07:19.607376 INFO : End of 2D read delay Voltage center optimization
575 19:07:19.659488 INFO : End of 2D write delay Voltage center optimization
576 19:07:19.708709 INFO : End of 2D write delay Voltage center optimization
577 19:07:19.714253 INFO : Training has run successfully!
578 19:07:19.714608
579 19:07:19.714874 channel==0
580 19:07:19.719757 RxClkDly_Margin_A0==88 ps 9
581 19:07:19.720135 TxDqDly_Margin_A0==98 ps 10
582 19:07:19.725363 RxClkDly_Margin_A1==88 ps 9
583 19:07:19.725742 TxDqDly_Margin_A1==88 ps 9
584 19:07:19.725970 TrainedVREFDQ_A0==74
585 19:07:19.730995 TrainedVREFDQ_A1==74
586 19:07:19.731344 VrefDac_Margin_A0==25
587 19:07:19.731578 DeviceVref_Margin_A0==40
588 19:07:19.736571 VrefDac_Margin_A1==25
589 19:07:19.736917 DeviceVref_Margin_A1==40
590 19:07:19.737139
591 19:07:19.737353
592 19:07:19.737565 channel==1
593 19:07:19.742653 RxClkDly_Margin_A0==98 ps 10
594 19:07:19.743060 TxDqDly_Margin_A0==98 ps 10
595 19:07:19.747765 RxClkDly_Margin_A1==88 ps 9
596 19:07:19.748168 TxDqDly_Margin_A1==88 ps 9
597 19:07:19.753361 TrainedVREFDQ_A0==77
598 19:07:19.753732 TrainedVREFDQ_A1==77
599 19:07:19.753956 VrefDac_Margin_A0==22
600 19:07:19.759115 DeviceVref_Margin_A0==37
601 19:07:19.759459 VrefDac_Margin_A1==24
602 19:07:19.764570 DeviceVref_Margin_A1==37
603 19:07:19.764896
604 19:07:19.765118 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 19:07:19.765329
606 19:07:19.798205 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 19:07:19.798615 2D training succeed
608 19:07:19.803721 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 19:07:19.809319 auto size-- 65535DDR cs0 size: 2048MB
610 19:07:19.809608 DDR cs1 size: 2048MB
611 19:07:19.814922 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 19:07:19.815210 cs0 DataBus test pass
613 19:07:19.820561 cs1 DataBus test pass
614 19:07:19.820892 cs0 AddrBus test pass
615 19:07:19.821109 cs1 AddrBus test pass
616 19:07:19.821313
617 19:07:19.826159 100bdlr_step_size ps== 420
618 19:07:19.826485 result report
619 19:07:19.831732 boot times 0Enable ddr reg access
620 19:07:19.836992 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 19:07:19.850605 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 19:07:20.424163 0.0;M3 CHK:0;cm4_sp_mode 0
623 19:07:20.424604 MVN_1=0x00000000
624 19:07:20.429613 MVN_2=0x00000000
625 19:07:20.435350 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 19:07:20.435624 OPS=0x10
627 19:07:20.435832 ring efuse init
628 19:07:20.436092 chipver efuse init
629 19:07:20.440961 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 19:07:20.446517 [0.018961 Inits done]
631 19:07:20.446764 secure task start!
632 19:07:20.446964 high task start!
633 19:07:20.451083 low task start!
634 19:07:20.451323 run into bl31
635 19:07:20.457833 NOTICE: BL31: v1.3(release):4fc40b1
636 19:07:20.465635 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 19:07:20.465898 NOTICE: BL31: G12A normal boot!
638 19:07:20.490987 NOTICE: BL31: BL33 decompress pass
639 19:07:20.496249 ERROR: Error initializing runtime service opteed_fast
640 19:07:21.729883
641 19:07:21.730314
642 19:07:21.738207 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 19:07:21.738693
644 19:07:21.739052 Model: Libre Computer AML-A311D-CC Alta
645 19:07:21.946662 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 19:07:21.970096 DRAM: 2 GiB (effective 3.8 GiB)
647 19:07:22.113082 Core: 408 devices, 31 uclasses, devicetree: separate
648 19:07:22.118803 WDT: Not starting watchdog@f0d0
649 19:07:22.151073 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 19:07:22.163524 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 19:07:22.168543 ** Bad device specification mmc 0 **
652 19:07:22.178897 Card did not respond to voltage select! : -110
653 19:07:22.186537 ** Bad device specification mmc 0 **
654 19:07:22.186859 Couldn't find partition mmc 0
655 19:07:22.194968 Card did not respond to voltage select! : -110
656 19:07:22.200292 ** Bad device specification mmc 0 **
657 19:07:22.200746 Couldn't find partition mmc 0
658 19:07:22.205456 Error: could not access storage.
659 19:07:22.548040 Net: eth0: ethernet@ff3f0000
660 19:07:22.548494 starting USB...
661 19:07:22.799706 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 19:07:22.800310 Starting the controller
663 19:07:22.806733 USB XHCI 1.10
664 19:07:24.518451 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 19:07:24.518905 bl2_stage_init 0x01
666 19:07:24.519134 bl2_stage_init 0x81
667 19:07:24.524027 hw id: 0x0000 - pwm id 0x01
668 19:07:24.524448 bl2_stage_init 0xc1
669 19:07:24.524787 bl2_stage_init 0x02
670 19:07:24.525096
671 19:07:24.529608 L0:00000000
672 19:07:24.529981 L1:20000703
673 19:07:24.530229 L2:00008067
674 19:07:24.530436 L3:14000000
675 19:07:24.535294 B2:00402000
676 19:07:24.535709 B1:e0f83180
677 19:07:24.536074
678 19:07:24.536404 TE: 58167
679 19:07:24.536713
680 19:07:24.540781 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 19:07:24.541083
682 19:07:24.541297 Board ID = 1
683 19:07:24.546345 Set A53 clk to 24M
684 19:07:24.546753 Set A73 clk to 24M
685 19:07:24.547084 Set clk81 to 24M
686 19:07:24.551953 A53 clk: 1200 MHz
687 19:07:24.552368 A73 clk: 1200 MHz
688 19:07:24.552710 CLK81: 166.6M
689 19:07:24.552974 smccc: 00012abd
690 19:07:24.557570 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 19:07:24.563172 board id: 1
692 19:07:24.569198 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 19:07:24.579788 fw parse done
694 19:07:24.585660 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 19:07:24.628316 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 19:07:24.639286 PIEI prepare done
697 19:07:24.639573 fastboot data load
698 19:07:24.639792 fastboot data verify
699 19:07:24.644894 verify result: 266
700 19:07:24.650398 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 19:07:24.650675 LPDDR4 probe
702 19:07:24.650889 ddr clk to 1584MHz
703 19:07:24.658353 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 19:07:24.695654
705 19:07:24.695951 dmc_version 0001
706 19:07:24.702344 Check phy result
707 19:07:24.708283 INFO : End of CA training
708 19:07:24.708535 INFO : End of initialization
709 19:07:24.713739 INFO : Training has run successfully!
710 19:07:24.713986 Check phy result
711 19:07:24.719358 INFO : End of initialization
712 19:07:24.719630 INFO : End of read enable training
713 19:07:24.722651 INFO : End of fine write leveling
714 19:07:24.728282 INFO : End of Write leveling coarse delay
715 19:07:24.733901 INFO : Training has run successfully!
716 19:07:24.734173 Check phy result
717 19:07:24.734381 INFO : End of initialization
718 19:07:24.739488 INFO : End of read dq deskew training
719 19:07:24.745045 INFO : End of MPR read delay center optimization
720 19:07:24.745406 INFO : End of write delay center optimization
721 19:07:24.750661 INFO : End of read delay center optimization
722 19:07:24.756276 INFO : End of max read latency training
723 19:07:24.756536 INFO : Training has run successfully!
724 19:07:24.761852 1D training succeed
725 19:07:24.767752 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 19:07:24.815350 Check phy result
727 19:07:24.815656 INFO : End of initialization
728 19:07:24.837947 INFO : End of 2D read delay Voltage center optimization
729 19:07:24.858211 INFO : End of 2D read delay Voltage center optimization
730 19:07:24.910196 INFO : End of 2D write delay Voltage center optimization
731 19:07:24.959577 INFO : End of 2D write delay Voltage center optimization
732 19:07:24.965143 INFO : Training has run successfully!
733 19:07:24.965649
734 19:07:24.966120 channel==0
735 19:07:24.970759 RxClkDly_Margin_A0==88 ps 9
736 19:07:24.971251 TxDqDly_Margin_A0==98 ps 10
737 19:07:24.974169 RxClkDly_Margin_A1==88 ps 9
738 19:07:24.974666 TxDqDly_Margin_A1==88 ps 9
739 19:07:24.979827 TrainedVREFDQ_A0==74
740 19:07:24.980355 TrainedVREFDQ_A1==74
741 19:07:24.980815 VrefDac_Margin_A0==25
742 19:07:24.985369 DeviceVref_Margin_A0==40
743 19:07:24.985872 VrefDac_Margin_A1==24
744 19:07:24.991070 DeviceVref_Margin_A1==40
745 19:07:24.991586
746 19:07:24.992080
747 19:07:24.992543 channel==1
748 19:07:24.992991 RxClkDly_Margin_A0==98 ps 10
749 19:07:24.996673 TxDqDly_Margin_A0==88 ps 9
750 19:07:24.997177 RxClkDly_Margin_A1==98 ps 10
751 19:07:25.002193 TxDqDly_Margin_A1==88 ps 9
752 19:07:25.002692 TrainedVREFDQ_A0==77
753 19:07:25.003153 TrainedVREFDQ_A1==77
754 19:07:25.007827 VrefDac_Margin_A0==22
755 19:07:25.008354 DeviceVref_Margin_A0==37
756 19:07:25.013400 VrefDac_Margin_A1==22
757 19:07:25.013903 DeviceVref_Margin_A1==37
758 19:07:25.014354
759 19:07:25.019008 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 19:07:25.019504
761 19:07:25.047070 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 19:07:25.052525 2D training succeed
763 19:07:25.058089 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 19:07:25.058611 auto size-- 65535DDR cs0 size: 2048MB
765 19:07:25.063674 DDR cs1 size: 2048MB
766 19:07:25.064224 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 19:07:25.069308 cs0 DataBus test pass
768 19:07:25.069869 cs1 DataBus test pass
769 19:07:25.070335 cs0 AddrBus test pass
770 19:07:25.074879 cs1 AddrBus test pass
771 19:07:25.075424
772 19:07:25.075891 100bdlr_step_size ps== 420
773 19:07:25.076403 result report
774 19:07:25.080462 boot times 0Enable ddr reg access
775 19:07:25.087932 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 19:07:25.101417 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 19:07:25.675115 0.0;M3 CHK:0;cm4_sp_mode 0
778 19:07:25.675730 MVN_1=0x00000000
779 19:07:25.680592 MVN_2=0x00000000
780 19:07:25.686358 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 19:07:25.686930 OPS=0x10
782 19:07:25.687371 ring efuse init
783 19:07:25.687803 chipver efuse init
784 19:07:25.691932 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 19:07:25.697535 [0.018961 Inits done]
786 19:07:25.698009 secure task start!
787 19:07:25.698444 high task start!
788 19:07:25.702181 low task start!
789 19:07:25.702651 run into bl31
790 19:07:25.708736 NOTICE: BL31: v1.3(release):4fc40b1
791 19:07:25.716549 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 19:07:25.717030 NOTICE: BL31: G12A normal boot!
793 19:07:25.741901 NOTICE: BL31: BL33 decompress pass
794 19:07:25.747603 ERROR: Error initializing runtime service opteed_fast
795 19:07:26.980537
796 19:07:26.981188
797 19:07:26.988877 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 19:07:26.989383
799 19:07:26.989844 Model: Libre Computer AML-A311D-CC Alta
800 19:07:27.197315 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 19:07:27.220656 DRAM: 2 GiB (effective 3.8 GiB)
802 19:07:27.363678 Core: 408 devices, 31 uclasses, devicetree: separate
803 19:07:27.369608 WDT: Not starting watchdog@f0d0
804 19:07:27.401813 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 19:07:27.414296 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 19:07:27.419273 ** Bad device specification mmc 0 **
807 19:07:27.429597 Card did not respond to voltage select! : -110
808 19:07:27.437254 ** Bad device specification mmc 0 **
809 19:07:27.437762 Couldn't find partition mmc 0
810 19:07:27.445641 Card did not respond to voltage select! : -110
811 19:07:27.451105 ** Bad device specification mmc 0 **
812 19:07:27.451597 Couldn't find partition mmc 0
813 19:07:27.456176 Error: could not access storage.
814 19:07:27.798702 Net: eth0: ethernet@ff3f0000
815 19:07:27.799303 starting USB...
816 19:07:28.050464 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 19:07:28.051021 Starting the controller
818 19:07:28.057456 USB XHCI 1.10
819 19:07:30.218703 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 19:07:30.219336 bl2_stage_init 0x01
821 19:07:30.219801 bl2_stage_init 0x81
822 19:07:30.224086 hw id: 0x0000 - pwm id 0x01
823 19:07:30.224581 bl2_stage_init 0xc1
824 19:07:30.225035 bl2_stage_init 0x02
825 19:07:30.225478
826 19:07:30.229769 L0:00000000
827 19:07:30.230251 L1:20000703
828 19:07:30.230701 L2:00008067
829 19:07:30.231142 L3:14000000
830 19:07:30.235322 B2:00402000
831 19:07:30.235802 B1:e0f83180
832 19:07:30.236285
833 19:07:30.236735 TE: 58124
834 19:07:30.237187
835 19:07:30.240936 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 19:07:30.241425
837 19:07:30.241875 Board ID = 1
838 19:07:30.246531 Set A53 clk to 24M
839 19:07:30.247010 Set A73 clk to 24M
840 19:07:30.247456 Set clk81 to 24M
841 19:07:30.252085 A53 clk: 1200 MHz
842 19:07:30.252565 A73 clk: 1200 MHz
843 19:07:30.253013 CLK81: 166.6M
844 19:07:30.253453 smccc: 00012a92
845 19:07:30.257759 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 19:07:30.263323 board id: 1
847 19:07:30.269330 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 19:07:30.279760 fw parse done
849 19:07:30.285812 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 19:07:30.328367 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 19:07:30.339243 PIEI prepare done
852 19:07:30.339727 fastboot data load
853 19:07:30.340222 fastboot data verify
854 19:07:30.344933 verify result: 266
855 19:07:30.350503 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 19:07:30.350984 LPDDR4 probe
857 19:07:30.351437 ddr clk to 1584MHz
858 19:07:30.358517 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 19:07:30.395119
860 19:07:30.395681 dmc_version 0001
861 19:07:30.402486 Check phy result
862 19:07:30.408378 INFO : End of CA training
863 19:07:30.408867 INFO : End of initialization
864 19:07:30.413923 INFO : Training has run successfully!
865 19:07:30.414417 Check phy result
866 19:07:30.419468 INFO : End of initialization
867 19:07:30.419955 INFO : End of read enable training
868 19:07:30.425108 INFO : End of fine write leveling
869 19:07:30.430743 INFO : End of Write leveling coarse delay
870 19:07:30.431218 INFO : Training has run successfully!
871 19:07:30.431671 Check phy result
872 19:07:30.436352 INFO : End of initialization
873 19:07:30.436833 INFO : End of read dq deskew training
874 19:07:30.441894 INFO : End of MPR read delay center optimization
875 19:07:30.447570 INFO : End of write delay center optimization
876 19:07:30.453079 INFO : End of read delay center optimization
877 19:07:30.453560 INFO : End of max read latency training
878 19:07:30.458746 INFO : Training has run successfully!
879 19:07:30.459224 1D training succeed
880 19:07:30.467940 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 19:07:30.515366 Check phy result
882 19:07:30.515891 INFO : End of initialization
883 19:07:30.537237 INFO : End of 2D read delay Voltage center optimization
884 19:07:30.557466 INFO : End of 2D read delay Voltage center optimization
885 19:07:30.609563 INFO : End of 2D write delay Voltage center optimization
886 19:07:30.658935 INFO : End of 2D write delay Voltage center optimization
887 19:07:30.664505 INFO : Training has run successfully!
888 19:07:30.664987
889 19:07:30.665443 channel==0
890 19:07:30.670187 RxClkDly_Margin_A0==88 ps 9
891 19:07:30.670668 TxDqDly_Margin_A0==98 ps 10
892 19:07:30.675664 RxClkDly_Margin_A1==88 ps 9
893 19:07:30.676191 TxDqDly_Margin_A1==88 ps 9
894 19:07:30.676669 TrainedVREFDQ_A0==74
895 19:07:30.681284 TrainedVREFDQ_A1==74
896 19:07:30.681821 VrefDac_Margin_A0==25
897 19:07:30.682281 DeviceVref_Margin_A0==40
898 19:07:30.686916 VrefDac_Margin_A1==25
899 19:07:30.687441 DeviceVref_Margin_A1==40
900 19:07:30.687874
901 19:07:30.688351
902 19:07:30.688780 channel==1
903 19:07:30.692410 RxClkDly_Margin_A0==98 ps 10
904 19:07:30.692885 TxDqDly_Margin_A0==88 ps 9
905 19:07:30.698177 RxClkDly_Margin_A1==98 ps 10
906 19:07:30.698641 TxDqDly_Margin_A1==88 ps 9
907 19:07:30.703685 TrainedVREFDQ_A0==75
908 19:07:30.704208 TrainedVREFDQ_A1==77
909 19:07:30.704644 VrefDac_Margin_A0==22
910 19:07:30.709242 DeviceVref_Margin_A0==39
911 19:07:30.709702 VrefDac_Margin_A1==22
912 19:07:30.714848 DeviceVref_Margin_A1==37
913 19:07:30.715307
914 19:07:30.715740 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 19:07:30.716205
916 19:07:30.748375 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000018 dram_vref_reg_value 0x 00000060
917 19:07:30.748871 2D training succeed
918 19:07:30.754132 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 19:07:30.759598 auto size-- 65535DDR cs0 size: 2048MB
920 19:07:30.760087 DDR cs1 size: 2048MB
921 19:07:30.765232 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 19:07:30.765695 cs0 DataBus test pass
923 19:07:30.770849 cs1 DataBus test pass
924 19:07:30.771314 cs0 AddrBus test pass
925 19:07:30.771743 cs1 AddrBus test pass
926 19:07:30.772201
927 19:07:30.776394 100bdlr_step_size ps== 420
928 19:07:30.776872 result report
929 19:07:30.782113 boot times 0Enable ddr reg access
930 19:07:30.787302 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 19:07:30.800761 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 19:07:31.374437 0.0;M3 CHK:0;cm4_sp_mode 0
933 19:07:31.375068 MVN_1=0x00000000
934 19:07:31.379907 MVN_2=0x00000000
935 19:07:31.385665 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 19:07:31.386168 OPS=0x10
937 19:07:31.386623 ring efuse init
938 19:07:31.387066 chipver efuse init
939 19:07:31.391213 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 19:07:31.396846 [0.018961 Inits done]
941 19:07:31.397336 secure task start!
942 19:07:31.397787 high task start!
943 19:07:31.401492 low task start!
944 19:07:31.401974 run into bl31
945 19:07:31.408109 NOTICE: BL31: v1.3(release):4fc40b1
946 19:07:31.415928 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 19:07:31.416474 NOTICE: BL31: G12A normal boot!
948 19:07:31.441253 NOTICE: BL31: BL33 decompress pass
949 19:07:31.447025 ERROR: Error initializing runtime service opteed_fast
950 19:07:32.679890
951 19:07:32.680559
952 19:07:32.687424 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 19:07:32.687922
954 19:07:32.688424 Model: Libre Computer AML-A311D-CC Alta
955 19:07:32.896607 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 19:07:32.920044 DRAM: 2 GiB (effective 3.8 GiB)
957 19:07:33.063152 Core: 408 devices, 31 uclasses, devicetree: separate
958 19:07:33.068931 WDT: Not starting watchdog@f0d0
959 19:07:33.101170 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 19:07:33.113680 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 19:07:33.118617 ** Bad device specification mmc 0 **
962 19:07:33.128963 Card did not respond to voltage select! : -110
963 19:07:33.136608 ** Bad device specification mmc 0 **
964 19:07:33.137091 Couldn't find partition mmc 0
965 19:07:33.144965 Card did not respond to voltage select! : -110
966 19:07:33.150464 ** Bad device specification mmc 0 **
967 19:07:33.150948 Couldn't find partition mmc 0
968 19:07:33.154625 Error: could not access storage.
969 19:07:33.497996 Net: eth0: ethernet@ff3f0000
970 19:07:33.498615 starting USB...
971 19:07:33.749792 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 19:07:33.750357 Starting the controller
973 19:07:33.756774 USB XHCI 1.10
974 19:07:35.618330 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 19:07:35.619000 bl2_stage_init 0x01
976 19:07:35.619469 bl2_stage_init 0x81
977 19:07:35.623883 hw id: 0x0000 - pwm id 0x01
978 19:07:35.624406 bl2_stage_init 0xc1
979 19:07:35.624857 bl2_stage_init 0x02
980 19:07:35.625298
981 19:07:35.629458 L0:00000000
982 19:07:35.629930 L1:20000703
983 19:07:35.630381 L2:00008067
984 19:07:35.630819 L3:14000000
985 19:07:35.635050 B2:00402000
986 19:07:35.635530 B1:e0f83180
987 19:07:35.636011
988 19:07:35.636469 TE: 58124
989 19:07:35.636914
990 19:07:35.640670 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 19:07:35.641154
992 19:07:35.641603 Board ID = 1
993 19:07:35.646249 Set A53 clk to 24M
994 19:07:35.646722 Set A73 clk to 24M
995 19:07:35.647164 Set clk81 to 24M
996 19:07:35.651838 A53 clk: 1200 MHz
997 19:07:35.652350 A73 clk: 1200 MHz
998 19:07:35.652796 CLK81: 166.6M
999 19:07:35.653235 smccc: 00012a92
1000 19:07:35.657451 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 19:07:35.663061 board id: 1
1002 19:07:35.668924 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 19:07:35.679682 fw parse done
1004 19:07:35.685609 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 19:07:35.728217 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 19:07:35.739084 PIEI prepare done
1007 19:07:35.739556 fastboot data load
1008 19:07:35.740020 fastboot data verify
1009 19:07:35.744759 verify result: 266
1010 19:07:35.750377 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 19:07:35.750836 LPDDR4 probe
1012 19:07:35.751267 ddr clk to 1584MHz
1013 19:07:35.758331 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 19:07:35.795579
1015 19:07:35.796088 dmc_version 0001
1016 19:07:35.802273 Check phy result
1017 19:07:35.808178 INFO : End of CA training
1018 19:07:35.808634 INFO : End of initialization
1019 19:07:35.813751 INFO : Training has run successfully!
1020 19:07:35.814225 Check phy result
1021 19:07:35.819334 INFO : End of initialization
1022 19:07:35.819843 INFO : End of read enable training
1023 19:07:35.825023 INFO : End of fine write leveling
1024 19:07:35.830640 INFO : End of Write leveling coarse delay
1025 19:07:35.831134 INFO : Training has run successfully!
1026 19:07:35.831584 Check phy result
1027 19:07:35.836279 INFO : End of initialization
1028 19:07:35.836759 INFO : End of read dq deskew training
1029 19:07:35.841895 INFO : End of MPR read delay center optimization
1030 19:07:35.847511 INFO : End of write delay center optimization
1031 19:07:35.853098 INFO : End of read delay center optimization
1032 19:07:35.853576 INFO : End of max read latency training
1033 19:07:35.858715 INFO : Training has run successfully!
1034 19:07:35.859188 1D training succeed
1035 19:07:35.868038 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 19:07:35.915565 Check phy result
1037 19:07:35.916090 INFO : End of initialization
1038 19:07:35.937956 INFO : End of 2D read delay Voltage center optimization
1039 19:07:35.958231 INFO : End of 2D read delay Voltage center optimization
1040 19:07:36.010383 INFO : End of 2D write delay Voltage center optimization
1041 19:07:36.059726 INFO : End of 2D write delay Voltage center optimization
1042 19:07:36.065300 INFO : Training has run successfully!
1043 19:07:36.065794
1044 19:07:36.066248 channel==0
1045 19:07:36.071116 RxClkDly_Margin_A0==88 ps 9
1046 19:07:36.071596 TxDqDly_Margin_A0==98 ps 10
1047 19:07:36.074255 RxClkDly_Margin_A1==88 ps 9
1048 19:07:36.074737 TxDqDly_Margin_A1==98 ps 10
1049 19:07:36.080493 TrainedVREFDQ_A0==74
1050 19:07:36.080964 TrainedVREFDQ_A1==74
1051 19:07:36.081415 VrefDac_Margin_A0==25
1052 19:07:36.085415 DeviceVref_Margin_A0==40
1053 19:07:36.085887 VrefDac_Margin_A1==26
1054 19:07:36.091008 DeviceVref_Margin_A1==40
1055 19:07:36.091482
1056 19:07:36.091928
1057 19:07:36.092412 channel==1
1058 19:07:36.092852 RxClkDly_Margin_A0==98 ps 10
1059 19:07:36.094459 TxDqDly_Margin_A0==88 ps 9
1060 19:07:36.100037 RxClkDly_Margin_A1==98 ps 10
1061 19:07:36.100509 TxDqDly_Margin_A1==88 ps 9
1062 19:07:36.100952 TrainedVREFDQ_A0==77
1063 19:07:36.105623 TrainedVREFDQ_A1==77
1064 19:07:36.106095 VrefDac_Margin_A0==22
1065 19:07:36.111164 DeviceVref_Margin_A0==37
1066 19:07:36.111627 VrefDac_Margin_A1==22
1067 19:07:36.112096 DeviceVref_Margin_A1==37
1068 19:07:36.112536
1069 19:07:36.116868 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 19:07:36.117340
1071 19:07:36.150422 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1072 19:07:36.150963 2D training succeed
1073 19:07:36.156040 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 19:07:36.161553 auto size-- 65535DDR cs0 size: 2048MB
1075 19:07:36.162024 DDR cs1 size: 2048MB
1076 19:07:36.167088 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 19:07:36.167557 cs0 DataBus test pass
1078 19:07:36.168038 cs1 DataBus test pass
1079 19:07:36.172791 cs0 AddrBus test pass
1080 19:07:36.173260 cs1 AddrBus test pass
1081 19:07:36.173706
1082 19:07:36.178284 100bdlr_step_size ps== 420
1083 19:07:36.178805 result report
1084 19:07:36.179257 boot times 0Enable ddr reg access
1085 19:07:36.188075 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 19:07:36.201642 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 19:07:36.775253 0.0;M3 CHK:0;cm4_sp_mode 0
1088 19:07:36.775936 MVN_1=0x00000000
1089 19:07:36.780660 MVN_2=0x00000000
1090 19:07:36.786457 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 19:07:36.786938 OPS=0x10
1092 19:07:36.787389 ring efuse init
1093 19:07:36.787835 chipver efuse init
1094 19:07:36.794648 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 19:07:36.795141 [0.018961 Inits done]
1096 19:07:36.802227 secure task start!
1097 19:07:36.802704 high task start!
1098 19:07:36.803148 low task start!
1099 19:07:36.803593 run into bl31
1100 19:07:36.808863 NOTICE: BL31: v1.3(release):4fc40b1
1101 19:07:36.816704 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 19:07:36.817186 NOTICE: BL31: G12A normal boot!
1103 19:07:36.842476 NOTICE: BL31: BL33 decompress pass
1104 19:07:36.848252 ERROR: Error initializing runtime service opteed_fast
1105 19:07:38.081216
1106 19:07:38.081866
1107 19:07:38.089456 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 19:07:38.089958
1109 19:07:38.090418 Model: Libre Computer AML-A311D-CC Alta
1110 19:07:38.297885 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 19:07:38.321244 DRAM: 2 GiB (effective 3.8 GiB)
1112 19:07:38.464318 Core: 408 devices, 31 uclasses, devicetree: separate
1113 19:07:38.470172 WDT: Not starting watchdog@f0d0
1114 19:07:38.502462 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 19:07:38.514862 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 19:07:38.519780 ** Bad device specification mmc 0 **
1117 19:07:38.530139 Card did not respond to voltage select! : -110
1118 19:07:38.537789 ** Bad device specification mmc 0 **
1119 19:07:38.538336 Couldn't find partition mmc 0
1120 19:07:38.546139 Card did not respond to voltage select! : -110
1121 19:07:38.551648 ** Bad device specification mmc 0 **
1122 19:07:38.552233 Couldn't find partition mmc 0
1123 19:07:38.556695 Error: could not access storage.
1124 19:07:38.900301 Net: eth0: ethernet@ff3f0000
1125 19:07:38.900916 starting USB...
1126 19:07:39.152148 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 19:07:39.152774 Starting the controller
1128 19:07:39.158979 USB XHCI 1.10
1129 19:07:40.713054 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 19:07:40.721300 scanning usb for storage devices... 0 Storage Device(s) found
1132 19:07:40.772981 Hit any key to stop autoboot: 1
1133 19:07:40.773817 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1134 19:07:40.774430 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1135 19:07:40.774933 Setting prompt string to ['=>']
1136 19:07:40.775443 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1137 19:07:40.788731 0
1138 19:07:40.789660 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 19:07:40.790190 Sending with 10 millisecond of delay
1141 19:07:41.924805 => setenv autoload no
1142 19:07:41.935545 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1143 19:07:41.938152 setenv autoload no
1144 19:07:41.938665 Sending with 10 millisecond of delay
1146 19:07:43.734814 => setenv initrd_high 0xffffffff
1147 19:07:43.745523 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1148 19:07:43.746036 setenv initrd_high 0xffffffff
1149 19:07:43.746500 Sending with 10 millisecond of delay
1151 19:07:45.365333 => setenv fdt_high 0xffffffff
1152 19:07:45.375913 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 19:07:45.376552 setenv fdt_high 0xffffffff
1154 19:07:45.377027 Sending with 10 millisecond of delay
1156 19:07:45.668536 => dhcp
1157 19:07:45.679133 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1158 19:07:45.679763 dhcp
1159 19:07:45.680066 Speed: 1000, full duplex
1160 19:07:45.680300 BOOTP broadcast 1
1161 19:07:45.687493 DHCP client bound to address 192.168.6.27 (8 ms)
1162 19:07:45.688047 Sending with 10 millisecond of delay
1164 19:07:47.365862 => setenv serverip 192.168.6.2
1165 19:07:47.376782 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1166 19:07:47.377479 setenv serverip 192.168.6.2
1167 19:07:47.377970 Sending with 10 millisecond of delay
1169 19:07:51.100266 => tftpboot 0x01080000 953569/tftp-deploy-krpw3ihz/kernel/uImage
1170 19:07:51.110874 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 19:07:51.111423 tftpboot 0x01080000 953569/tftp-deploy-krpw3ihz/kernel/uImage
1172 19:07:51.111662 Speed: 1000, full duplex
1173 19:07:51.111872 Using ethernet@ff3f0000 device
1174 19:07:51.113811 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 19:07:51.119025 Filename '953569/tftp-deploy-krpw3ihz/kernel/uImage'.
1176 19:07:51.123058 Load address: 0x1080000
1177 19:07:54.122268 Loading: *################################################## 43.6 MiB
1178 19:07:54.122705 14.5 MiB/s
1179 19:07:54.122924 done
1180 19:07:54.126508 Bytes transferred = 45713984 (2b98a40 hex)
1181 19:07:54.127045 Sending with 10 millisecond of delay
1183 19:07:58.814132 => tftpboot 0x08000000 953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
1184 19:07:58.824936 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1185 19:07:58.825775 tftpboot 0x08000000 953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot
1186 19:07:58.826232 Speed: 1000, full duplex
1187 19:07:58.826652 Using ethernet@ff3f0000 device
1188 19:07:58.827567 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 19:07:58.836130 Filename '953569/tftp-deploy-krpw3ihz/ramdisk/ramdisk.cpio.gz.uboot'.
1190 19:07:58.836644 Load address: 0x8000000
1191 19:08:05.319432 Loading: *###############T ################################## UDP wrong checksum 00000005 00002bb2
1192 19:08:10.319874 T UDP wrong checksum 00000005 00002bb2
1193 19:08:20.322938 T T UDP wrong checksum 00000005 00002bb2
1194 19:08:40.324494 T T T UDP wrong checksum 00000005 00002bb2
1195 19:08:55.331293 T T T
1196 19:08:55.332051 Retry count exceeded; starting again
1198 19:08:55.333635 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1201 19:08:55.335709 end: 2.4 uboot-commands (duration 00:01:52) [common]
1203 19:08:55.337303 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1205 19:08:55.338444 end: 2 uboot-action (duration 00:01:52) [common]
1207 19:08:55.340123 Cleaning after the job
1208 19:08:55.340735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/ramdisk
1209 19:08:55.342862 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/kernel
1210 19:08:55.374550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/dtb
1211 19:08:55.375491 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/nfsrootfs
1212 19:08:55.408204 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953569/tftp-deploy-krpw3ihz/modules
1213 19:08:55.417718 start: 4.1 power-off (timeout 00:00:30) [common]
1214 19:08:55.418451 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1215 19:08:55.453934 >> OK - accepted request
1216 19:08:55.455973 Returned 0 in 0 seconds
1217 19:08:55.556950 end: 4.1 power-off (duration 00:00:00) [common]
1219 19:08:55.558035 start: 4.2 read-feedback (timeout 00:10:00) [common]
1220 19:08:55.558751 Listened to connection for namespace 'common' for up to 1s
1221 19:08:56.558989 Finalising connection for namespace 'common'
1222 19:08:56.559503 Disconnecting from shell: Finalise
1223 19:08:56.559767 =>
1224 19:08:56.660604 end: 4.2 read-feedback (duration 00:00:01) [common]
1225 19:08:56.661311 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953569
1226 19:08:59.464685 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953569
1227 19:08:59.465294 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.