Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 18:13:02.223928 lava-dispatcher, installed at version: 2024.01
2 18:13:02.224833 start: 0 validate
3 18:13:02.225345 Start time: 2024-11-07 18:13:02.225312+00:00 (UTC)
4 18:13:02.225916 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 18:13:02.226490 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 18:13:02.271479 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 18:13:02.272156 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 18:13:02.302593 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 18:13:02.303258 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 18:13:02.336670 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 18:13:02.337197 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 18:13:02.368225 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 18:13:02.368764 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 18:13:02.410908 validate duration: 0.19
16 18:13:02.411812 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 18:13:02.412181 start: 1.1 download-retry (timeout 00:10:00) [common]
18 18:13:02.412498 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 18:13:02.413114 Not decompressing ramdisk as can be used compressed.
20 18:13:02.413545 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 18:13:02.413832 saving as /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/ramdisk/initrd.cpio.gz
22 18:13:02.414100 total size: 5628169 (5 MB)
23 18:13:02.448296 progress 0 % (0 MB)
24 18:13:02.452622 progress 5 % (0 MB)
25 18:13:02.456948 progress 10 % (0 MB)
26 18:13:02.460663 progress 15 % (0 MB)
27 18:13:02.464676 progress 20 % (1 MB)
28 18:13:02.468377 progress 25 % (1 MB)
29 18:13:02.472580 progress 30 % (1 MB)
30 18:13:02.476626 progress 35 % (1 MB)
31 18:13:02.480263 progress 40 % (2 MB)
32 18:13:02.484262 progress 45 % (2 MB)
33 18:13:02.487873 progress 50 % (2 MB)
34 18:13:02.492029 progress 55 % (2 MB)
35 18:13:02.496125 progress 60 % (3 MB)
36 18:13:02.500348 progress 65 % (3 MB)
37 18:13:02.504890 progress 70 % (3 MB)
38 18:13:02.508959 progress 75 % (4 MB)
39 18:13:02.513336 progress 80 % (4 MB)
40 18:13:02.517079 progress 85 % (4 MB)
41 18:13:02.521189 progress 90 % (4 MB)
42 18:13:02.525198 progress 95 % (5 MB)
43 18:13:02.528874 progress 100 % (5 MB)
44 18:13:02.529664 5 MB downloaded in 0.12 s (46.46 MB/s)
45 18:13:02.530268 end: 1.1.1 http-download (duration 00:00:00) [common]
47 18:13:02.531327 end: 1.1 download-retry (duration 00:00:00) [common]
48 18:13:02.531684 start: 1.2 download-retry (timeout 00:10:00) [common]
49 18:13:02.532028 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 18:13:02.532587 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kernel/Image
51 18:13:02.532912 saving as /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/kernel/Image
52 18:13:02.533154 total size: 45713920 (43 MB)
53 18:13:02.533393 No compression specified
54 18:13:02.578441 progress 0 % (0 MB)
55 18:13:02.612655 progress 5 % (2 MB)
56 18:13:02.647628 progress 10 % (4 MB)
57 18:13:02.681278 progress 15 % (6 MB)
58 18:13:02.715728 progress 20 % (8 MB)
59 18:13:02.749374 progress 25 % (10 MB)
60 18:13:02.785414 progress 30 % (13 MB)
61 18:13:02.819895 progress 35 % (15 MB)
62 18:13:02.854732 progress 40 % (17 MB)
63 18:13:02.887556 progress 45 % (19 MB)
64 18:13:02.920650 progress 50 % (21 MB)
65 18:13:02.954475 progress 55 % (24 MB)
66 18:13:02.987664 progress 60 % (26 MB)
67 18:13:03.020768 progress 65 % (28 MB)
68 18:13:03.053972 progress 70 % (30 MB)
69 18:13:03.087490 progress 75 % (32 MB)
70 18:13:03.120830 progress 80 % (34 MB)
71 18:13:03.153705 progress 85 % (37 MB)
72 18:13:03.187168 progress 90 % (39 MB)
73 18:13:03.220540 progress 95 % (41 MB)
74 18:13:03.252908 progress 100 % (43 MB)
75 18:13:03.253608 43 MB downloaded in 0.72 s (60.51 MB/s)
76 18:13:03.254195 end: 1.2.1 http-download (duration 00:00:01) [common]
78 18:13:03.255220 end: 1.2 download-retry (duration 00:00:01) [common]
79 18:13:03.255557 start: 1.3 download-retry (timeout 00:09:59) [common]
80 18:13:03.255879 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 18:13:03.256491 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 18:13:03.256839 saving as /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/dtb/meson-g12b-a311d-libretech-cc.dtb
83 18:13:03.257092 total size: 54703 (0 MB)
84 18:13:03.257346 No compression specified
85 18:13:03.294677 progress 59 % (0 MB)
86 18:13:03.295684 progress 100 % (0 MB)
87 18:13:03.296360 0 MB downloaded in 0.04 s (1.33 MB/s)
88 18:13:03.296933 end: 1.3.1 http-download (duration 00:00:00) [common]
90 18:13:03.297917 end: 1.3 download-retry (duration 00:00:00) [common]
91 18:13:03.298229 start: 1.4 download-retry (timeout 00:09:59) [common]
92 18:13:03.298548 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 18:13:03.299086 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 18:13:03.299375 saving as /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/nfsrootfs/full.rootfs.tar
95 18:13:03.299622 total size: 120894716 (115 MB)
96 18:13:03.299875 Using unxz to decompress xz
97 18:13:03.332647 progress 0 % (0 MB)
98 18:13:04.159136 progress 5 % (5 MB)
99 18:13:05.010459 progress 10 % (11 MB)
100 18:13:05.839867 progress 15 % (17 MB)
101 18:13:06.611217 progress 20 % (23 MB)
102 18:13:07.213072 progress 25 % (28 MB)
103 18:13:08.039647 progress 30 % (34 MB)
104 18:13:08.833959 progress 35 % (40 MB)
105 18:13:09.178231 progress 40 % (46 MB)
106 18:13:09.560837 progress 45 % (51 MB)
107 18:13:10.293932 progress 50 % (57 MB)
108 18:13:11.187567 progress 55 % (63 MB)
109 18:13:11.980952 progress 60 % (69 MB)
110 18:13:12.739572 progress 65 % (74 MB)
111 18:13:13.520012 progress 70 % (80 MB)
112 18:13:14.346827 progress 75 % (86 MB)
113 18:13:15.137148 progress 80 % (92 MB)
114 18:13:16.045770 progress 85 % (98 MB)
115 18:13:17.165114 progress 90 % (103 MB)
116 18:13:18.185746 progress 95 % (109 MB)
117 18:13:19.018720 progress 100 % (115 MB)
118 18:13:19.032242 115 MB downloaded in 15.73 s (7.33 MB/s)
119 18:13:19.032888 end: 1.4.1 http-download (duration 00:00:16) [common]
121 18:13:19.033802 end: 1.4 download-retry (duration 00:00:16) [common]
122 18:13:19.034106 start: 1.5 download-retry (timeout 00:09:43) [common]
123 18:13:19.034399 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 18:13:19.034905 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/modules.tar.xz
125 18:13:19.035182 saving as /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/modules/modules.tar
126 18:13:19.035414 total size: 11601668 (11 MB)
127 18:13:19.035648 Using unxz to decompress xz
128 18:13:19.079318 progress 0 % (0 MB)
129 18:13:19.148974 progress 5 % (0 MB)
130 18:13:19.224717 progress 10 % (1 MB)
131 18:13:19.321718 progress 15 % (1 MB)
132 18:13:19.413663 progress 20 % (2 MB)
133 18:13:19.493994 progress 25 % (2 MB)
134 18:13:19.569978 progress 30 % (3 MB)
135 18:13:19.643929 progress 35 % (3 MB)
136 18:13:19.720686 progress 40 % (4 MB)
137 18:13:19.797338 progress 45 % (5 MB)
138 18:13:19.881324 progress 50 % (5 MB)
139 18:13:19.958543 progress 55 % (6 MB)
140 18:13:20.043365 progress 60 % (6 MB)
141 18:13:20.124334 progress 65 % (7 MB)
142 18:13:20.200866 progress 70 % (7 MB)
143 18:13:20.283122 progress 75 % (8 MB)
144 18:13:20.367280 progress 80 % (8 MB)
145 18:13:20.444660 progress 85 % (9 MB)
146 18:13:20.527541 progress 90 % (9 MB)
147 18:13:20.606952 progress 95 % (10 MB)
148 18:13:20.683771 progress 100 % (11 MB)
149 18:13:20.696448 11 MB downloaded in 1.66 s (6.66 MB/s)
150 18:13:20.697045 end: 1.5.1 http-download (duration 00:00:02) [common]
152 18:13:20.698061 end: 1.5 download-retry (duration 00:00:02) [common]
153 18:13:20.698670 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 18:13:20.699273 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 18:13:37.978332 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953492/extract-nfsrootfs-ufa9jxvh
156 18:13:37.978937 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 18:13:37.979226 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 18:13:37.980019 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h
159 18:13:37.980489 makedir: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin
160 18:13:37.980815 makedir: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/tests
161 18:13:37.981141 makedir: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/results
162 18:13:37.981518 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-add-keys
163 18:13:37.982088 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-add-sources
164 18:13:37.982685 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-background-process-start
165 18:13:37.983202 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-background-process-stop
166 18:13:37.983711 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-common-functions
167 18:13:37.984234 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-echo-ipv4
168 18:13:37.984721 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-install-packages
169 18:13:37.985192 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-installed-packages
170 18:13:37.985688 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-os-build
171 18:13:37.986186 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-probe-channel
172 18:13:37.986663 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-probe-ip
173 18:13:37.987132 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-target-ip
174 18:13:37.987600 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-target-mac
175 18:13:37.988094 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-target-storage
176 18:13:37.988588 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-case
177 18:13:37.989063 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-event
178 18:13:37.989633 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-feedback
179 18:13:37.990155 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-raise
180 18:13:37.990631 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-reference
181 18:13:37.991100 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-runner
182 18:13:37.991583 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-set
183 18:13:37.992082 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-test-shell
184 18:13:37.992576 Updating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-add-keys (debian)
185 18:13:37.993100 Updating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-add-sources (debian)
186 18:13:37.993614 Updating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-install-packages (debian)
187 18:13:37.994105 Updating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-installed-packages (debian)
188 18:13:37.994586 Updating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/bin/lava-os-build (debian)
189 18:13:37.995008 Creating /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/environment
190 18:13:37.995366 LAVA metadata
191 18:13:37.995624 - LAVA_JOB_ID=953492
192 18:13:37.995836 - LAVA_DISPATCHER_IP=192.168.6.2
193 18:13:37.996223 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 18:13:37.997199 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 18:13:37.997527 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 18:13:37.997733 skipped lava-vland-overlay
197 18:13:37.997973 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 18:13:37.998225 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 18:13:37.998444 skipped lava-multinode-overlay
200 18:13:37.998684 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 18:13:37.998932 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 18:13:37.999179 Loading test definitions
203 18:13:37.999454 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 18:13:37.999671 Using /lava-953492 at stage 0
205 18:13:38.000829 uuid=953492_1.6.2.4.1 testdef=None
206 18:13:38.001152 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 18:13:38.001416 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 18:13:38.002979 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 18:13:38.003760 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 18:13:38.005762 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 18:13:38.006590 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 18:13:38.008481 runner path: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/0/tests/0_timesync-off test_uuid 953492_1.6.2.4.1
215 18:13:38.009050 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 18:13:38.009857 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 18:13:38.010096 Using /lava-953492 at stage 0
219 18:13:38.010449 Fetching tests from https://github.com/kernelci/test-definitions.git
220 18:13:38.010732 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/0/tests/1_kselftest-dt'
221 18:13:41.422979 Running '/usr/bin/git checkout kernelci.org
222 18:13:41.838109 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 18:13:41.839569 uuid=953492_1.6.2.4.5 testdef=None
224 18:13:41.839924 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 18:13:41.841351 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 18:13:41.846882 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 18:13:41.848516 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 18:13:41.855788 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 18:13:41.857492 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 18:13:41.864575 runner path: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/0/tests/1_kselftest-dt test_uuid 953492_1.6.2.4.5
234 18:13:41.865122 BOARD='meson-g12b-a311d-libretech-cc'
235 18:13:41.865528 BRANCH='broonie-sound'
236 18:13:41.865920 SKIPFILE='/dev/null'
237 18:13:41.866310 SKIP_INSTALL='True'
238 18:13:41.866698 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 18:13:41.867097 TST_CASENAME=''
240 18:13:41.867487 TST_CMDFILES='dt'
241 18:13:41.868518 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 18:13:41.870055 Creating lava-test-runner.conf files
244 18:13:41.870458 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953492/lava-overlay-2hamid2h/lava-953492/0 for stage 0
245 18:13:41.871099 - 0_timesync-off
246 18:13:41.871554 - 1_kselftest-dt
247 18:13:41.872222 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 18:13:41.872791 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 18:14:05.423439 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 18:14:05.423891 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 18:14:05.424192 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 18:14:05.424469 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 18:14:05.424739 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 18:14:06.058676 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 18:14:06.059174 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 18:14:06.059434 extracting modules file /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953492/extract-nfsrootfs-ufa9jxvh
257 18:14:07.465405 extracting modules file /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk
258 18:14:08.874812 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 18:14:08.875340 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 18:14:08.875617 [common] Applying overlay to NFS
261 18:14:08.875879 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953492/compress-overlay-rkeyax9x/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953492/extract-nfsrootfs-ufa9jxvh
262 18:14:11.634504 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 18:14:11.634972 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 18:14:11.635244 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 18:14:11.635472 Converting downloaded kernel to a uImage
266 18:14:11.635781 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/kernel/Image /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/kernel/uImage
267 18:14:12.152982 output: Image Name:
268 18:14:12.153487 output: Created: Thu Nov 7 18:14:11 2024
269 18:14:12.153745 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 18:14:12.153995 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 18:14:12.154242 output: Load Address: 01080000
272 18:14:12.154487 output: Entry Point: 01080000
273 18:14:12.154729 output:
274 18:14:12.155130 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 18:14:12.155451 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 18:14:12.155779 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 18:14:12.156139 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 18:14:12.156467 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 18:14:12.156770 Building ramdisk /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk
280 18:14:14.328561 >> 166792 blocks
281 18:14:22.110734 Adding RAMdisk u-boot header.
282 18:14:22.111449 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk.cpio.gz.uboot
283 18:14:22.409555 output: Image Name:
284 18:14:22.409982 output: Created: Thu Nov 7 18:14:22 2024
285 18:14:22.410195 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 18:14:22.410401 output: Data Size: 23433077 Bytes = 22883.86 KiB = 22.35 MiB
287 18:14:22.410604 output: Load Address: 00000000
288 18:14:22.410804 output: Entry Point: 00000000
289 18:14:22.411006 output:
290 18:14:22.411652 rename /var/lib/lava/dispatcher/tmp/953492/extract-overlay-ramdisk-0zr8tz3y/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
291 18:14:22.412169 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 18:14:22.412728 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 18:14:22.413276 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 18:14:22.413774 No LXC device requested
295 18:14:22.414321 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 18:14:22.414881 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 18:14:22.415435 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 18:14:22.415891 Checking files for TFTP limit of 4294967296 bytes.
299 18:14:22.418730 end: 1 tftp-deploy (duration 00:01:20) [common]
300 18:14:22.419327 start: 2 uboot-action (timeout 00:05:00) [common]
301 18:14:22.419842 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 18:14:22.420380 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 18:14:22.420879 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 18:14:22.421399 Using kernel file from prepare-kernel: 953492/tftp-deploy-rdljfbzn/kernel/uImage
305 18:14:22.422023 substitutions:
306 18:14:22.422423 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 18:14:22.422822 - {DTB_ADDR}: 0x01070000
308 18:14:22.423219 - {DTB}: 953492/tftp-deploy-rdljfbzn/dtb/meson-g12b-a311d-libretech-cc.dtb
309 18:14:22.423612 - {INITRD}: 953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
310 18:14:22.424033 - {KERNEL_ADDR}: 0x01080000
311 18:14:22.424430 - {KERNEL}: 953492/tftp-deploy-rdljfbzn/kernel/uImage
312 18:14:22.424820 - {LAVA_MAC}: None
313 18:14:22.425245 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953492/extract-nfsrootfs-ufa9jxvh
314 18:14:22.425638 - {NFS_SERVER_IP}: 192.168.6.2
315 18:14:22.426021 - {PRESEED_CONFIG}: None
316 18:14:22.426404 - {PRESEED_LOCAL}: None
317 18:14:22.426788 - {RAMDISK_ADDR}: 0x08000000
318 18:14:22.427169 - {RAMDISK}: 953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
319 18:14:22.427553 - {ROOT_PART}: None
320 18:14:22.427934 - {ROOT}: None
321 18:14:22.428346 - {SERVER_IP}: 192.168.6.2
322 18:14:22.428730 - {TEE_ADDR}: 0x83000000
323 18:14:22.429113 - {TEE}: None
324 18:14:22.429494 Parsed boot commands:
325 18:14:22.429868 - setenv autoload no
326 18:14:22.430246 - setenv initrd_high 0xffffffff
327 18:14:22.430626 - setenv fdt_high 0xffffffff
328 18:14:22.431005 - dhcp
329 18:14:22.431382 - setenv serverip 192.168.6.2
330 18:14:22.431764 - tftpboot 0x01080000 953492/tftp-deploy-rdljfbzn/kernel/uImage
331 18:14:22.432177 - tftpboot 0x08000000 953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
332 18:14:22.432564 - tftpboot 0x01070000 953492/tftp-deploy-rdljfbzn/dtb/meson-g12b-a311d-libretech-cc.dtb
333 18:14:22.432943 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953492/extract-nfsrootfs-ufa9jxvh,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 18:14:22.433342 - bootm 0x01080000 0x08000000 0x01070000
335 18:14:22.433833 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 18:14:22.435282 start: 2.3 connect-device (timeout 00:05:00) [common]
338 18:14:22.435693 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 18:14:22.450856 Setting prompt string to ['lava-test: # ']
340 18:14:22.452422 end: 2.3 connect-device (duration 00:00:00) [common]
341 18:14:22.453036 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 18:14:22.453580 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 18:14:22.454105 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 18:14:22.455228 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 18:14:22.493758 >> OK - accepted request
346 18:14:22.495873 Returned 0 in 0 seconds
347 18:14:22.597040 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 18:14:22.598676 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 18:14:22.599209 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 18:14:22.599701 Setting prompt string to ['Hit any key to stop autoboot']
352 18:14:22.600192 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 18:14:22.601740 Trying 192.168.56.21...
354 18:14:22.602222 Connected to conserv1.
355 18:14:22.602624 Escape character is '^]'.
356 18:14:22.603034
357 18:14:22.603446 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 18:14:22.603862
359 18:14:34.208231 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 18:14:34.208847 bl2_stage_init 0x01
361 18:14:34.209258 bl2_stage_init 0x81
362 18:14:34.213783 hw id: 0x0000 - pwm id 0x01
363 18:14:34.214226 bl2_stage_init 0xc1
364 18:14:34.214649 bl2_stage_init 0x02
365 18:14:34.215059
366 18:14:34.219347 L0:00000000
367 18:14:34.219799 L1:20000703
368 18:14:34.220261 L2:00008067
369 18:14:34.220666 L3:14000000
370 18:14:34.224965 B2:00402000
371 18:14:34.225409 B1:e0f83180
372 18:14:34.225816
373 18:14:34.226210 TE: 58159
374 18:14:34.226602
375 18:14:34.230599 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 18:14:34.231031
377 18:14:34.231423 Board ID = 1
378 18:14:34.236164 Set A53 clk to 24M
379 18:14:34.236590 Set A73 clk to 24M
380 18:14:34.236976 Set clk81 to 24M
381 18:14:34.241768 A53 clk: 1200 MHz
382 18:14:34.242181 A73 clk: 1200 MHz
383 18:14:34.242568 CLK81: 166.6M
384 18:14:34.242950 smccc: 00012ab4
385 18:14:34.247360 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 18:14:34.252881 board id: 1
387 18:14:34.258900 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 18:14:34.269474 fw parse done
389 18:14:34.275419 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 18:14:34.317956 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 18:14:34.328846 PIEI prepare done
392 18:14:34.329283 fastboot data load
393 18:14:34.329675 fastboot data verify
394 18:14:34.334500 verify result: 266
395 18:14:34.340250 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 18:14:34.340728 LPDDR4 probe
397 18:14:34.341127 ddr clk to 1584MHz
398 18:14:34.348092 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 18:14:34.385401
400 18:14:34.385880 dmc_version 0001
401 18:14:34.392078 Check phy result
402 18:14:34.397968 INFO : End of CA training
403 18:14:34.398396 INFO : End of initialization
404 18:14:34.403514 INFO : Training has run successfully!
405 18:14:34.403937 Check phy result
406 18:14:34.409090 INFO : End of initialization
407 18:14:34.409518 INFO : End of read enable training
408 18:14:34.414855 INFO : End of fine write leveling
409 18:14:34.420430 INFO : End of Write leveling coarse delay
410 18:14:34.420933 INFO : Training has run successfully!
411 18:14:34.421346 Check phy result
412 18:14:34.426030 INFO : End of initialization
413 18:14:34.426519 INFO : End of read dq deskew training
414 18:14:34.431596 INFO : End of MPR read delay center optimization
415 18:14:34.437200 INFO : End of write delay center optimization
416 18:14:34.442831 INFO : End of read delay center optimization
417 18:14:34.443455 INFO : End of max read latency training
418 18:14:34.448391 INFO : Training has run successfully!
419 18:14:34.448888 1D training succeed
420 18:14:34.457538 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 18:14:34.505232 Check phy result
422 18:14:34.505831 INFO : End of initialization
423 18:14:34.526992 INFO : End of 2D read delay Voltage center optimization
424 18:14:34.547163 INFO : End of 2D read delay Voltage center optimization
425 18:14:34.599191 INFO : End of 2D write delay Voltage center optimization
426 18:14:34.648529 INFO : End of 2D write delay Voltage center optimization
427 18:14:34.654120 INFO : Training has run successfully!
428 18:14:34.654639
429 18:14:34.655046 channel==0
430 18:14:34.659680 RxClkDly_Margin_A0==88 ps 9
431 18:14:34.660207 TxDqDly_Margin_A0==98 ps 10
432 18:14:34.663015 RxClkDly_Margin_A1==88 ps 9
433 18:14:34.663503 TxDqDly_Margin_A1==88 ps 9
434 18:14:34.668590 TrainedVREFDQ_A0==74
435 18:14:34.669073 TrainedVREFDQ_A1==74
436 18:14:34.669475 VrefDac_Margin_A0==25
437 18:14:34.674210 DeviceVref_Margin_A0==40
438 18:14:34.674695 VrefDac_Margin_A1==25
439 18:14:34.679862 DeviceVref_Margin_A1==40
440 18:14:34.680377
441 18:14:34.680781
442 18:14:34.681178 channel==1
443 18:14:34.681571 RxClkDly_Margin_A0==98 ps 10
444 18:14:34.685432 TxDqDly_Margin_A0==88 ps 9
445 18:14:34.685926 RxClkDly_Margin_A1==88 ps 9
446 18:14:34.691004 TxDqDly_Margin_A1==88 ps 9
447 18:14:34.691492 TrainedVREFDQ_A0==76
448 18:14:34.691896 TrainedVREFDQ_A1==77
449 18:14:34.696613 VrefDac_Margin_A0==22
450 18:14:34.697111 DeviceVref_Margin_A0==38
451 18:14:34.702205 VrefDac_Margin_A1==24
452 18:14:34.702707 DeviceVref_Margin_A1==37
453 18:14:34.703107
454 18:14:34.707827 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 18:14:34.708385
456 18:14:34.735738 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 18:14:34.741408 2D training succeed
458 18:14:34.747058 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 18:14:34.747567 auto size-- 65535DDR cs0 size: 2048MB
460 18:14:34.752706 DDR cs1 size: 2048MB
461 18:14:34.753203 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 18:14:34.758264 cs0 DataBus test pass
463 18:14:34.758751 cs1 DataBus test pass
464 18:14:34.759147 cs0 AddrBus test pass
465 18:14:34.765003 cs1 AddrBus test pass
466 18:14:34.765497
467 18:14:34.765897 100bdlr_step_size ps== 420
468 18:14:34.766298 result report
469 18:14:34.770580 boot times 0Enable ddr reg access
470 18:14:34.776932 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 18:14:34.790337 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 18:14:35.364099 0.0;M3 CHK:0;cm4_sp_mode 0
473 18:14:35.364743 MVN_1=0x00000000
474 18:14:35.369458 MVN_2=0x00000000
475 18:14:35.375288 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 18:14:35.375793 OPS=0x10
477 18:14:35.376240 ring efuse init
478 18:14:35.376636 chipver efuse init
479 18:14:35.380887 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 18:14:35.386430 [0.018961 Inits done]
481 18:14:35.386901 secure task start!
482 18:14:35.387295 high task start!
483 18:14:35.391085 low task start!
484 18:14:35.391563 run into bl31
485 18:14:35.397666 NOTICE: BL31: v1.3(release):4fc40b1
486 18:14:35.405478 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 18:14:35.405962 NOTICE: BL31: G12A normal boot!
488 18:14:35.430913 NOTICE: BL31: BL33 decompress pass
489 18:14:35.436523 ERROR: Error initializing runtime service opteed_fast
490 18:14:36.669459
491 18:14:36.670071
492 18:14:36.677811 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 18:14:36.678302
494 18:14:36.678729 Model: Libre Computer AML-A311D-CC Alta
495 18:14:36.886325 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 18:14:36.909595 DRAM: 2 GiB (effective 3.8 GiB)
497 18:14:37.052654 Core: 408 devices, 31 uclasses, devicetree: separate
498 18:14:37.058492 WDT: Not starting watchdog@f0d0
499 18:14:37.090764 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 18:14:37.103238 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 18:14:37.108199 ** Bad device specification mmc 0 **
502 18:14:37.118510 Card did not respond to voltage select! : -110
503 18:14:37.126218 ** Bad device specification mmc 0 **
504 18:14:37.126694 Couldn't find partition mmc 0
505 18:14:37.134512 Card did not respond to voltage select! : -110
506 18:14:37.140052 ** Bad device specification mmc 0 **
507 18:14:37.140532 Couldn't find partition mmc 0
508 18:14:37.145102 Error: could not access storage.
509 18:14:38.408635 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 18:14:38.409291 bl2_stage_init 0x01
511 18:14:38.409738 bl2_stage_init 0x81
512 18:14:38.414158 hw id: 0x0000 - pwm id 0x01
513 18:14:38.414672 bl2_stage_init 0xc1
514 18:14:38.415094 bl2_stage_init 0x02
515 18:14:38.415506
516 18:14:38.419720 L0:00000000
517 18:14:38.420254 L1:20000703
518 18:14:38.420675 L2:00008067
519 18:14:38.421082 L3:14000000
520 18:14:38.425365 B2:00402000
521 18:14:38.425865 B1:e0f83180
522 18:14:38.426281
523 18:14:38.426688 TE: 58167
524 18:14:38.427092
525 18:14:38.430873 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 18:14:38.431345
527 18:14:38.431762 Board ID = 1
528 18:14:38.436512 Set A53 clk to 24M
529 18:14:38.436994 Set A73 clk to 24M
530 18:14:38.437414 Set clk81 to 24M
531 18:14:38.442082 A53 clk: 1200 MHz
532 18:14:38.442544 A73 clk: 1200 MHz
533 18:14:38.442955 CLK81: 166.6M
534 18:14:38.443354 smccc: 00012abd
535 18:14:38.447661 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 18:14:38.453317 board id: 1
537 18:14:38.459153 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 18:14:38.469802 fw parse done
539 18:14:38.475771 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 18:14:38.518467 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 18:14:38.529301 PIEI prepare done
542 18:14:38.529638 fastboot data load
543 18:14:38.529870 fastboot data verify
544 18:14:38.534934 verify result: 266
545 18:14:38.540548 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 18:14:38.541008 LPDDR4 probe
547 18:14:38.541371 ddr clk to 1584MHz
548 18:14:38.548586 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 18:14:38.585810
550 18:14:38.586192 dmc_version 0001
551 18:14:38.592430 Check phy result
552 18:14:38.598292 INFO : End of CA training
553 18:14:38.598561 INFO : End of initialization
554 18:14:38.603895 INFO : Training has run successfully!
555 18:14:38.604410 Check phy result
556 18:14:38.609614 INFO : End of initialization
557 18:14:38.610086 INFO : End of read enable training
558 18:14:38.615161 INFO : End of fine write leveling
559 18:14:38.620759 INFO : End of Write leveling coarse delay
560 18:14:38.621224 INFO : Training has run successfully!
561 18:14:38.621639 Check phy result
562 18:14:38.626436 INFO : End of initialization
563 18:14:38.626907 INFO : End of read dq deskew training
564 18:14:38.632010 INFO : End of MPR read delay center optimization
565 18:14:38.637609 INFO : End of write delay center optimization
566 18:14:38.643167 INFO : End of read delay center optimization
567 18:14:38.643634 INFO : End of max read latency training
568 18:14:38.648770 INFO : Training has run successfully!
569 18:14:38.649235 1D training succeed
570 18:14:38.657905 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 18:14:38.705535 Check phy result
572 18:14:38.706011 INFO : End of initialization
573 18:14:38.727263 INFO : End of 2D read delay Voltage center optimization
574 18:14:38.747527 INFO : End of 2D read delay Voltage center optimization
575 18:14:38.799579 INFO : End of 2D write delay Voltage center optimization
576 18:14:38.848858 INFO : End of 2D write delay Voltage center optimization
577 18:14:38.854467 INFO : Training has run successfully!
578 18:14:38.854935
579 18:14:38.855349 channel==0
580 18:14:38.860095 RxClkDly_Margin_A0==88 ps 9
581 18:14:38.860565 TxDqDly_Margin_A0==98 ps 10
582 18:14:38.865658 RxClkDly_Margin_A1==88 ps 9
583 18:14:38.866131 TxDqDly_Margin_A1==98 ps 10
584 18:14:38.866544 TrainedVREFDQ_A0==74
585 18:14:38.871255 TrainedVREFDQ_A1==75
586 18:14:38.871725 VrefDac_Margin_A0==25
587 18:14:38.872174 DeviceVref_Margin_A0==40
588 18:14:38.876857 VrefDac_Margin_A1==25
589 18:14:38.877319 DeviceVref_Margin_A1==39
590 18:14:38.877725
591 18:14:38.878132
592 18:14:38.882457 channel==1
593 18:14:38.882922 RxClkDly_Margin_A0==98 ps 10
594 18:14:38.883334 TxDqDly_Margin_A0==88 ps 9
595 18:14:38.888079 RxClkDly_Margin_A1==98 ps 10
596 18:14:38.888547 TxDqDly_Margin_A1==88 ps 9
597 18:14:38.893640 TrainedVREFDQ_A0==77
598 18:14:38.894107 TrainedVREFDQ_A1==77
599 18:14:38.894520 VrefDac_Margin_A0==22
600 18:14:38.899257 DeviceVref_Margin_A0==37
601 18:14:38.899713 VrefDac_Margin_A1==22
602 18:14:38.904836 DeviceVref_Margin_A1==37
603 18:14:38.905294
604 18:14:38.905705 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 18:14:38.906112
606 18:14:38.938409 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 18:14:38.938941 2D training succeed
608 18:14:38.944079 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 18:14:38.949641 auto size-- 65535DDR cs0 size: 2048MB
610 18:14:38.950108 DDR cs1 size: 2048MB
611 18:14:38.955235 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 18:14:38.955709 cs0 DataBus test pass
613 18:14:38.962063 cs1 DataBus test pass
614 18:14:38.962590 cs0 AddrBus test pass
615 18:14:38.963018 cs1 AddrBus test pass
616 18:14:38.963438
617 18:14:38.966542 100bdlr_step_size ps== 420
618 18:14:38.967033 result report
619 18:14:38.972199 boot times 0Enable ddr reg access
620 18:14:38.979730 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 18:14:38.990891 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 18:14:39.564759 0.0;M3 CHK:0;cm4_sp_mode 0
623 18:14:39.565431 MVN_1=0x00000000
624 18:14:39.570212 MVN_2=0x00000000
625 18:14:39.575846 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 18:14:39.576430 OPS=0x10
627 18:14:39.576901 ring efuse init
628 18:14:39.577318 chipver efuse init
629 18:14:39.581435 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 18:14:39.586957 [0.018961 Inits done]
631 18:14:39.587397 secure task start!
632 18:14:39.587789 high task start!
633 18:14:39.590608 low task start!
634 18:14:39.591040 run into bl31
635 18:14:39.598288 NOTICE: BL31: v1.3(release):4fc40b1
636 18:14:39.606242 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 18:14:39.606682 NOTICE: BL31: G12A normal boot!
638 18:14:39.632107 NOTICE: BL31: BL33 decompress pass
639 18:14:39.637851 ERROR: Error initializing runtime service opteed_fast
640 18:14:40.870698
641 18:14:40.871143
642 18:14:40.878974 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 18:14:40.879302
644 18:14:40.879542 Model: Libre Computer AML-A311D-CC Alta
645 18:14:41.087688 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 18:14:41.110909 DRAM: 2 GiB (effective 3.8 GiB)
647 18:14:41.254000 Core: 408 devices, 31 uclasses, devicetree: separate
648 18:14:41.259767 WDT: Not starting watchdog@f0d0
649 18:14:41.292043 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 18:14:41.304535 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 18:14:41.309406 ** Bad device specification mmc 0 **
652 18:14:41.319789 Card did not respond to voltage select! : -110
653 18:14:41.327461 ** Bad device specification mmc 0 **
654 18:14:41.327783 Couldn't find partition mmc 0
655 18:14:41.335741 Card did not respond to voltage select! : -110
656 18:14:41.341258 ** Bad device specification mmc 0 **
657 18:14:41.341598 Couldn't find partition mmc 0
658 18:14:41.346496 Error: could not access storage.
659 18:14:41.688954 Net: eth0: ethernet@ff3f0000
660 18:14:41.689595 starting USB...
661 18:14:41.940750 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 18:14:41.941406 Starting the controller
663 18:14:41.947789 USB XHCI 1.10
664 18:14:43.658812 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 18:14:43.659468 bl2_stage_init 0x01
666 18:14:43.659906 bl2_stage_init 0x81
667 18:14:43.664438 hw id: 0x0000 - pwm id 0x01
668 18:14:43.664919 bl2_stage_init 0xc1
669 18:14:43.665341 bl2_stage_init 0x02
670 18:14:43.665752
671 18:14:43.670110 L0:00000000
672 18:14:43.670575 L1:20000703
673 18:14:43.670988 L2:00008067
674 18:14:43.671388 L3:14000000
675 18:14:43.675650 B2:00402000
676 18:14:43.676141 B1:e0f83180
677 18:14:43.676555
678 18:14:43.676962 TE: 58167
679 18:14:43.677366
680 18:14:43.681198 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 18:14:43.681688
682 18:14:43.682120 Board ID = 1
683 18:14:43.686779 Set A53 clk to 24M
684 18:14:43.687248 Set A73 clk to 24M
685 18:14:43.687660 Set clk81 to 24M
686 18:14:43.692410 A53 clk: 1200 MHz
687 18:14:43.692877 A73 clk: 1200 MHz
688 18:14:43.693289 CLK81: 166.6M
689 18:14:43.693698 smccc: 00012abe
690 18:14:43.698054 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 18:14:43.703665 board id: 1
692 18:14:43.709523 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 18:14:43.720244 fw parse done
694 18:14:43.726124 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 18:14:43.768690 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 18:14:43.779597 PIEI prepare done
697 18:14:43.780104 fastboot data load
698 18:14:43.780528 fastboot data verify
699 18:14:43.785309 verify result: 266
700 18:14:43.790801 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 18:14:43.791269 LPDDR4 probe
702 18:14:43.791682 ddr clk to 1584MHz
703 18:14:43.798786 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 18:14:43.836086
705 18:14:43.836590 dmc_version 0001
706 18:14:43.842723 Check phy result
707 18:14:43.848572 INFO : End of CA training
708 18:14:43.849036 INFO : End of initialization
709 18:14:43.854185 INFO : Training has run successfully!
710 18:14:43.854667 Check phy result
711 18:14:43.859825 INFO : End of initialization
712 18:14:43.860337 INFO : End of read enable training
713 18:14:43.863070 INFO : End of fine write leveling
714 18:14:43.868705 INFO : End of Write leveling coarse delay
715 18:14:43.874379 INFO : Training has run successfully!
716 18:14:43.874842 Check phy result
717 18:14:43.875257 INFO : End of initialization
718 18:14:43.879869 INFO : End of read dq deskew training
719 18:14:43.885496 INFO : End of MPR read delay center optimization
720 18:14:43.885967 INFO : End of write delay center optimization
721 18:14:43.891069 INFO : End of read delay center optimization
722 18:14:43.896674 INFO : End of max read latency training
723 18:14:43.897158 INFO : Training has run successfully!
724 18:14:43.902393 1D training succeed
725 18:14:43.908277 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 18:14:43.955836 Check phy result
727 18:14:43.956360 INFO : End of initialization
728 18:14:43.977610 INFO : End of 2D read delay Voltage center optimization
729 18:14:43.997704 INFO : End of 2D read delay Voltage center optimization
730 18:14:44.049849 INFO : End of 2D write delay Voltage center optimization
731 18:14:44.099250 INFO : End of 2D write delay Voltage center optimization
732 18:14:44.104849 INFO : Training has run successfully!
733 18:14:44.105323
734 18:14:44.105737 channel==0
735 18:14:44.110490 RxClkDly_Margin_A0==88 ps 9
736 18:14:44.110949 TxDqDly_Margin_A0==98 ps 10
737 18:14:44.113818 RxClkDly_Margin_A1==88 ps 9
738 18:14:44.114277 TxDqDly_Margin_A1==98 ps 10
739 18:14:44.119461 TrainedVREFDQ_A0==74
740 18:14:44.119926 TrainedVREFDQ_A1==74
741 18:14:44.120375 VrefDac_Margin_A0==25
742 18:14:44.124972 DeviceVref_Margin_A0==40
743 18:14:44.125435 VrefDac_Margin_A1==25
744 18:14:44.130578 DeviceVref_Margin_A1==40
745 18:14:44.131041
746 18:14:44.131455
747 18:14:44.131858 channel==1
748 18:14:44.132291 RxClkDly_Margin_A0==98 ps 10
749 18:14:44.136244 TxDqDly_Margin_A0==88 ps 9
750 18:14:44.136717 RxClkDly_Margin_A1==88 ps 9
751 18:14:44.141724 TxDqDly_Margin_A1==88 ps 9
752 18:14:44.142190 TrainedVREFDQ_A0==75
753 18:14:44.142602 TrainedVREFDQ_A1==77
754 18:14:44.147451 VrefDac_Margin_A0==22
755 18:14:44.147909 DeviceVref_Margin_A0==38
756 18:14:44.152998 VrefDac_Margin_A1==24
757 18:14:44.153465 DeviceVref_Margin_A1==37
758 18:14:44.153870
759 18:14:44.158625 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 18:14:44.159089
761 18:14:44.186582 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
762 18:14:44.192079 2D training succeed
763 18:14:44.197610 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 18:14:44.198079 auto size-- 65535DDR cs0 size: 2048MB
765 18:14:44.203200 DDR cs1 size: 2048MB
766 18:14:44.203663 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 18:14:44.208808 cs0 DataBus test pass
768 18:14:44.209267 cs1 DataBus test pass
769 18:14:44.209674 cs0 AddrBus test pass
770 18:14:44.214442 cs1 AddrBus test pass
771 18:14:44.214907
772 18:14:44.215316 100bdlr_step_size ps== 420
773 18:14:44.215729 result report
774 18:14:44.220027 boot times 0Enable ddr reg access
775 18:14:44.227544 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 18:14:44.240970 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 18:14:44.814104 0.0;M3 CHK:0;cm4_sp_mode 0
778 18:14:44.814738 MVN_1=0x00000000
779 18:14:44.819652 MVN_2=0x00000000
780 18:14:44.825402 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 18:14:44.825919 OPS=0x10
782 18:14:44.826318 ring efuse init
783 18:14:44.826705 chipver efuse init
784 18:14:44.830917 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 18:14:44.836528 [0.018961 Inits done]
786 18:14:44.837016 secure task start!
787 18:14:44.837422 high task start!
788 18:14:44.841120 low task start!
789 18:14:44.841581 run into bl31
790 18:14:44.847750 NOTICE: BL31: v1.3(release):4fc40b1
791 18:14:44.855600 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 18:14:44.856097 NOTICE: BL31: G12A normal boot!
793 18:14:44.880930 NOTICE: BL31: BL33 decompress pass
794 18:14:44.886635 ERROR: Error initializing runtime service opteed_fast
795 18:14:46.119535
796 18:14:46.120219
797 18:14:46.127903 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 18:14:46.128447
799 18:14:46.128875 Model: Libre Computer AML-A311D-CC Alta
800 18:14:46.336347 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 18:14:46.359793 DRAM: 2 GiB (effective 3.8 GiB)
802 18:14:46.502775 Core: 408 devices, 31 uclasses, devicetree: separate
803 18:14:46.508608 WDT: Not starting watchdog@f0d0
804 18:14:46.540845 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 18:14:46.553235 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 18:14:46.558243 ** Bad device specification mmc 0 **
807 18:14:46.568677 Card did not respond to voltage select! : -110
808 18:14:46.576258 ** Bad device specification mmc 0 **
809 18:14:46.576738 Couldn't find partition mmc 0
810 18:14:46.584653 Card did not respond to voltage select! : -110
811 18:14:46.590082 ** Bad device specification mmc 0 **
812 18:14:46.590553 Couldn't find partition mmc 0
813 18:14:46.595168 Error: could not access storage.
814 18:14:46.937539 Net: eth0: ethernet@ff3f0000
815 18:14:46.937957 starting USB...
816 18:14:47.189411 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 18:14:47.190042 Starting the controller
818 18:14:47.196356 USB XHCI 1.10
819 18:14:49.359495 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 18:14:49.360167 bl2_stage_init 0x01
821 18:14:49.360610 bl2_stage_init 0x81
822 18:14:49.364547 hw id: 0x0000 - pwm id 0x01
823 18:14:49.365025 bl2_stage_init 0xc1
824 18:14:49.365443 bl2_stage_init 0x02
825 18:14:49.365851
826 18:14:49.370076 L0:00000000
827 18:14:49.370563 L1:20000703
828 18:14:49.370972 L2:00008067
829 18:14:49.371373 L3:14000000
830 18:14:49.375731 B2:00402000
831 18:14:49.376244 B1:e0f83180
832 18:14:49.376656
833 18:14:49.377062 TE: 58124
834 18:14:49.377467
835 18:14:49.381330 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 18:14:49.381817
837 18:14:49.382237 Board ID = 1
838 18:14:49.386998 Set A53 clk to 24M
839 18:14:49.387468 Set A73 clk to 24M
840 18:14:49.387877 Set clk81 to 24M
841 18:14:49.392541 A53 clk: 1200 MHz
842 18:14:49.393013 A73 clk: 1200 MHz
843 18:14:49.393424 CLK81: 166.6M
844 18:14:49.393825 smccc: 00012a92
845 18:14:49.398118 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 18:14:49.403771 board id: 1
847 18:14:49.409574 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 18:14:49.420261 fw parse done
849 18:14:49.426222 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 18:14:49.468702 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 18:14:49.479626 PIEI prepare done
852 18:14:49.480160 fastboot data load
853 18:14:49.480583 fastboot data verify
854 18:14:49.485325 verify result: 266
855 18:14:49.490975 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 18:14:49.491462 LPDDR4 probe
857 18:14:49.491878 ddr clk to 1584MHz
858 18:14:49.498937 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 18:14:49.536220
860 18:14:49.536749 dmc_version 0001
861 18:14:49.542835 Check phy result
862 18:14:49.548690 INFO : End of CA training
863 18:14:49.549170 INFO : End of initialization
864 18:14:49.554291 INFO : Training has run successfully!
865 18:14:49.554765 Check phy result
866 18:14:49.559875 INFO : End of initialization
867 18:14:49.560382 INFO : End of read enable training
868 18:14:49.565469 INFO : End of fine write leveling
869 18:14:49.571082 INFO : End of Write leveling coarse delay
870 18:14:49.571553 INFO : Training has run successfully!
871 18:14:49.571968 Check phy result
872 18:14:49.576693 INFO : End of initialization
873 18:14:49.577186 INFO : End of read dq deskew training
874 18:14:49.582268 INFO : End of MPR read delay center optimization
875 18:14:49.587938 INFO : End of write delay center optimization
876 18:14:49.593454 INFO : End of read delay center optimization
877 18:14:49.593923 INFO : End of max read latency training
878 18:14:49.599059 INFO : Training has run successfully!
879 18:14:49.599532 1D training succeed
880 18:14:49.608240 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 18:14:49.655895 Check phy result
882 18:14:49.656438 INFO : End of initialization
883 18:14:49.677604 INFO : End of 2D read delay Voltage center optimization
884 18:14:49.697847 INFO : End of 2D read delay Voltage center optimization
885 18:14:49.749839 INFO : End of 2D write delay Voltage center optimization
886 18:14:49.799244 INFO : End of 2D write delay Voltage center optimization
887 18:14:49.804770 INFO : Training has run successfully!
888 18:14:49.805241
889 18:14:49.805663 channel==0
890 18:14:49.810375 RxClkDly_Margin_A0==88 ps 9
891 18:14:49.810841 TxDqDly_Margin_A0==98 ps 10
892 18:14:49.816010 RxClkDly_Margin_A1==88 ps 9
893 18:14:49.816479 TxDqDly_Margin_A1==98 ps 10
894 18:14:49.816907 TrainedVREFDQ_A0==74
895 18:14:49.821660 TrainedVREFDQ_A1==74
896 18:14:49.822148 VrefDac_Margin_A0==25
897 18:14:49.822559 DeviceVref_Margin_A0==40
898 18:14:49.827177 VrefDac_Margin_A1==25
899 18:14:49.827647 DeviceVref_Margin_A1==40
900 18:14:49.828069
901 18:14:49.828463
902 18:14:49.832773 channel==1
903 18:14:49.833234 RxClkDly_Margin_A0==98 ps 10
904 18:14:49.833627 TxDqDly_Margin_A0==88 ps 9
905 18:14:49.838356 RxClkDly_Margin_A1==98 ps 10
906 18:14:49.838806 TxDqDly_Margin_A1==88 ps 9
907 18:14:49.843963 TrainedVREFDQ_A0==75
908 18:14:49.844448 TrainedVREFDQ_A1==77
909 18:14:49.844841 VrefDac_Margin_A0==22
910 18:14:49.849593 DeviceVref_Margin_A0==39
911 18:14:49.850043 VrefDac_Margin_A1==22
912 18:14:49.855150 DeviceVref_Margin_A1==37
913 18:14:49.855603
914 18:14:49.856019 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 18:14:49.856417
916 18:14:49.888731 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
917 18:14:49.889239 2D training succeed
918 18:14:49.894394 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 18:14:49.899967 auto size-- 65535DDR cs0 size: 2048MB
920 18:14:49.900455 DDR cs1 size: 2048MB
921 18:14:49.905562 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 18:14:49.906015 cs0 DataBus test pass
923 18:14:49.911160 cs1 DataBus test pass
924 18:14:49.911600 cs0 AddrBus test pass
925 18:14:49.912026 cs1 AddrBus test pass
926 18:14:49.912422
927 18:14:49.916756 100bdlr_step_size ps== 420
928 18:14:49.917216 result report
929 18:14:49.922357 boot times 0Enable ddr reg access
930 18:14:49.927724 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 18:14:49.941178 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 18:14:50.514894 0.0;M3 CHK:0;cm4_sp_mode 0
933 18:14:50.515495 MVN_1=0x00000000
934 18:14:50.520396 MVN_2=0x00000000
935 18:14:50.526122 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 18:14:50.526597 OPS=0x10
937 18:14:50.527010 ring efuse init
938 18:14:50.527410 chipver efuse init
939 18:14:50.531720 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 18:14:50.537328 [0.018960 Inits done]
941 18:14:50.537808 secure task start!
942 18:14:50.538221 high task start!
943 18:14:50.541930 low task start!
944 18:14:50.542403 run into bl31
945 18:14:50.548560 NOTICE: BL31: v1.3(release):4fc40b1
946 18:14:50.556362 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 18:14:50.556842 NOTICE: BL31: G12A normal boot!
948 18:14:50.581754 NOTICE: BL31: BL33 decompress pass
949 18:14:50.587449 ERROR: Error initializing runtime service opteed_fast
950 18:14:51.820343
951 18:14:51.820969
952 18:14:51.828696 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 18:14:51.829171
954 18:14:51.829600 Model: Libre Computer AML-A311D-CC Alta
955 18:14:52.037134 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 18:14:52.059551 DRAM: 2 GiB (effective 3.8 GiB)
957 18:14:52.203488 Core: 408 devices, 31 uclasses, devicetree: separate
958 18:14:52.209432 WDT: Not starting watchdog@f0d0
959 18:14:52.241614 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 18:14:52.254000 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 18:14:52.258625 ** Bad device specification mmc 0 **
962 18:14:52.269385 Card did not respond to voltage select! : -110
963 18:14:52.276854 ** Bad device specification mmc 0 **
964 18:14:52.277322 Couldn't find partition mmc 0
965 18:14:52.285305 Card did not respond to voltage select! : -110
966 18:14:52.290873 ** Bad device specification mmc 0 **
967 18:14:52.291352 Couldn't find partition mmc 0
968 18:14:52.295658 Error: could not access storage.
969 18:14:52.638909 Net: eth0: ethernet@ff3f0000
970 18:14:52.639548 starting USB...
971 18:14:52.891213 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 18:14:52.891818 Starting the controller
973 18:14:52.897578 USB XHCI 1.10
974 18:14:54.452284 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 18:14:54.460283 scanning usb for storage devices... 0 Storage Device(s) found
977 18:14:54.511332 Hit any key to stop autoboot: 1
978 18:14:54.512227 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 18:14:54.512602 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 18:14:54.512884 Setting prompt string to ['=>']
981 18:14:54.513144 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 18:14:54.517558 0
983 18:14:54.518181 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 18:14:54.518481 Sending with 10 millisecond of delay
986 18:14:55.652747 => setenv autoload no
987 18:14:55.665730 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 18:14:55.671188 setenv autoload no
989 18:14:55.671957 Sending with 10 millisecond of delay
991 18:14:57.469237 => setenv initrd_high 0xffffffff
992 18:14:57.480054 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 18:14:57.480984 setenv initrd_high 0xffffffff
994 18:14:57.481738 Sending with 10 millisecond of delay
996 18:14:59.098402 => setenv fdt_high 0xffffffff
997 18:14:59.109080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 18:14:59.110048 setenv fdt_high 0xffffffff
999 18:14:59.110775 Sending with 10 millisecond of delay
1001 18:14:59.402651 => dhcp
1002 18:14:59.413434 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 18:14:59.414272 dhcp
1004 18:14:59.414703 Speed: 1000, full duplex
1005 18:14:59.415108 BOOTP broadcast 1
1006 18:14:59.424288 DHCP client bound to address 192.168.6.27 (11 ms)
1007 18:14:59.425022 Sending with 10 millisecond of delay
1009 18:15:01.101948 => setenv serverip 192.168.6.2
1010 18:15:01.112713 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 18:15:01.113310 setenv serverip 192.168.6.2
1012 18:15:01.113804 Sending with 10 millisecond of delay
1014 18:15:04.836963 => tftpboot 0x01080000 953492/tftp-deploy-rdljfbzn/kernel/uImage
1015 18:15:04.847730 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 18:15:04.848562 tftpboot 0x01080000 953492/tftp-deploy-rdljfbzn/kernel/uImage
1017 18:15:04.849010 Speed: 1000, full duplex
1018 18:15:04.849424 Using ethernet@ff3f0000 device
1019 18:15:04.850568 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 18:15:04.856068 Filename '953492/tftp-deploy-rdljfbzn/kernel/uImage'.
1021 18:15:04.859952 Load address: 0x1080000
1022 18:15:07.634904 Loading: *################################################## 43.6 MiB
1023 18:15:07.635533 15.7 MiB/s
1024 18:15:07.635968 done
1025 18:15:07.639349 Bytes transferred = 45713984 (2b98a40 hex)
1026 18:15:07.640139 Sending with 10 millisecond of delay
1028 18:15:12.326194 => tftpboot 0x08000000 953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
1029 18:15:12.337005 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 18:15:12.337853 tftpboot 0x08000000 953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot
1031 18:15:12.338303 Speed: 1000, full duplex
1032 18:15:12.338723 Using ethernet@ff3f0000 device
1033 18:15:12.339644 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 18:15:12.348205 Filename '953492/tftp-deploy-rdljfbzn/ramdisk/ramdisk.cpio.gz.uboot'.
1035 18:15:12.348712 Load address: 0x8000000
1036 18:15:19.252654 Loading: *#########################T ######################## UDP wrong checksum 00000005 00007aa2
1037 18:15:24.253174 T UDP wrong checksum 00000005 00007aa2
1038 18:15:34.256472 T T UDP wrong checksum 00000005 00007aa2
1039 18:15:47.597921 T T UDP wrong checksum 000000ff 000087ed
1040 18:15:47.637668 UDP wrong checksum 000000ff 000017e0
1041 18:15:50.680296 T UDP wrong checksum 000000ff 00001270
1042 18:15:50.691837 UDP wrong checksum 000000ff 0000a062
1043 18:15:54.260263 T UDP wrong checksum 00000005 00007aa2
1044 18:16:09.264474 T T
1045 18:16:09.265163 Retry count exceeded; starting again
1047 18:16:09.266742 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1050 18:16:09.268910 end: 2.4 uboot-commands (duration 00:01:47) [common]
1052 18:16:09.270483 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1054 18:16:09.271637 end: 2 uboot-action (duration 00:01:47) [common]
1056 18:16:09.273369 Cleaning after the job
1057 18:16:09.273955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/ramdisk
1058 18:16:09.275343 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/kernel
1059 18:16:09.323736 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/dtb
1060 18:16:09.324671 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/nfsrootfs
1061 18:16:09.363433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953492/tftp-deploy-rdljfbzn/modules
1062 18:16:09.370465 start: 4.1 power-off (timeout 00:00:30) [common]
1063 18:16:09.371069 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1064 18:16:09.405444 >> OK - accepted request
1065 18:16:09.407311 Returned 0 in 0 seconds
1066 18:16:09.508389 end: 4.1 power-off (duration 00:00:00) [common]
1068 18:16:09.509437 start: 4.2 read-feedback (timeout 00:10:00) [common]
1069 18:16:09.510108 Listened to connection for namespace 'common' for up to 1s
1070 18:16:10.510265 Finalising connection for namespace 'common'
1071 18:16:10.511086 Disconnecting from shell: Finalise
1072 18:16:10.511656 =>
1073 18:16:10.612849 end: 4.2 read-feedback (duration 00:00:01) [common]
1074 18:16:10.613584 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953492
1075 18:16:13.502489 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953492
1076 18:16:13.503124 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.