Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:09:24.610007 lava-dispatcher, installed at version: 2024.01
2 19:09:24.610817 start: 0 validate
3 19:09:24.611392 Start time: 2024-11-07 19:09:24.611359+00:00 (UTC)
4 19:09:24.611956 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:09:24.612536 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:09:24.653413 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:09:24.653993 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:09:24.684755 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:09:24.685399 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:09:24.713082 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:09:24.713609 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:09:24.747275 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:09:24.747786 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:09:24.783773 validate duration: 0.17
16 19:09:24.784680 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:09:24.785019 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:09:24.785343 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:09:24.785927 Not decompressing ramdisk as can be used compressed.
20 19:09:24.786381 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 19:09:24.786669 saving as /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/ramdisk/initrd.cpio.gz
22 19:09:24.786940 total size: 5628140 (5 MB)
23 19:09:24.827574 progress 0 % (0 MB)
24 19:09:24.832133 progress 5 % (0 MB)
25 19:09:24.836271 progress 10 % (0 MB)
26 19:09:24.839888 progress 15 % (0 MB)
27 19:09:24.843936 progress 20 % (1 MB)
28 19:09:24.847642 progress 25 % (1 MB)
29 19:09:24.851642 progress 30 % (1 MB)
30 19:09:24.855767 progress 35 % (1 MB)
31 19:09:24.860367 progress 40 % (2 MB)
32 19:09:24.865338 progress 45 % (2 MB)
33 19:09:24.869028 progress 50 % (2 MB)
34 19:09:24.873003 progress 55 % (2 MB)
35 19:09:24.877022 progress 60 % (3 MB)
36 19:09:24.880583 progress 65 % (3 MB)
37 19:09:24.884573 progress 70 % (3 MB)
38 19:09:24.888119 progress 75 % (4 MB)
39 19:09:24.891956 progress 80 % (4 MB)
40 19:09:24.895377 progress 85 % (4 MB)
41 19:09:24.899138 progress 90 % (4 MB)
42 19:09:24.902850 progress 95 % (5 MB)
43 19:09:24.906611 progress 100 % (5 MB)
44 19:09:24.907348 5 MB downloaded in 0.12 s (44.58 MB/s)
45 19:09:24.907909 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:09:24.908852 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:09:24.909157 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:09:24.909434 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:09:24.909908 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kernel/Image
51 19:09:24.910192 saving as /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/kernel/Image
52 19:09:24.910408 total size: 45713920 (43 MB)
53 19:09:24.910624 No compression specified
54 19:09:24.943066 progress 0 % (0 MB)
55 19:09:24.970779 progress 5 % (2 MB)
56 19:09:24.998459 progress 10 % (4 MB)
57 19:09:25.026406 progress 15 % (6 MB)
58 19:09:25.054236 progress 20 % (8 MB)
59 19:09:25.081902 progress 25 % (10 MB)
60 19:09:25.109574 progress 30 % (13 MB)
61 19:09:25.137542 progress 35 % (15 MB)
62 19:09:25.165632 progress 40 % (17 MB)
63 19:09:25.193055 progress 45 % (19 MB)
64 19:09:25.223090 progress 50 % (21 MB)
65 19:09:25.250916 progress 55 % (24 MB)
66 19:09:25.278975 progress 60 % (26 MB)
67 19:09:25.306426 progress 65 % (28 MB)
68 19:09:25.334365 progress 70 % (30 MB)
69 19:09:25.362141 progress 75 % (32 MB)
70 19:09:25.390171 progress 80 % (34 MB)
71 19:09:25.417519 progress 85 % (37 MB)
72 19:09:25.445421 progress 90 % (39 MB)
73 19:09:25.473192 progress 95 % (41 MB)
74 19:09:25.499795 progress 100 % (43 MB)
75 19:09:25.500370 43 MB downloaded in 0.59 s (73.90 MB/s)
76 19:09:25.500853 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:09:25.501672 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:09:25.501951 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:09:25.502220 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:09:25.502703 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:09:25.502979 saving as /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:09:25.503190 total size: 54703 (0 MB)
84 19:09:25.503399 No compression specified
85 19:09:25.549355 progress 59 % (0 MB)
86 19:09:25.550261 progress 100 % (0 MB)
87 19:09:25.550888 0 MB downloaded in 0.05 s (1.09 MB/s)
88 19:09:25.551427 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:09:25.552309 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:09:25.552579 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:09:25.552846 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:09:25.553319 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 19:09:25.553567 saving as /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/nfsrootfs/full.rootfs.tar
95 19:09:25.553775 total size: 474398908 (452 MB)
96 19:09:25.553988 Using unxz to decompress xz
97 19:09:25.596166 progress 0 % (0 MB)
98 19:09:26.683549 progress 5 % (22 MB)
99 19:09:28.171949 progress 10 % (45 MB)
100 19:09:28.639880 progress 15 % (67 MB)
101 19:09:29.406576 progress 20 % (90 MB)
102 19:09:29.913140 progress 25 % (113 MB)
103 19:09:30.252181 progress 30 % (135 MB)
104 19:09:30.853921 progress 35 % (158 MB)
105 19:09:31.757163 progress 40 % (181 MB)
106 19:09:32.620747 progress 45 % (203 MB)
107 19:09:33.367063 progress 50 % (226 MB)
108 19:09:34.159029 progress 55 % (248 MB)
109 19:09:35.382631 progress 60 % (271 MB)
110 19:09:36.853171 progress 65 % (294 MB)
111 19:09:38.494469 progress 70 % (316 MB)
112 19:09:41.616409 progress 75 % (339 MB)
113 19:09:44.089200 progress 80 % (361 MB)
114 19:09:47.001183 progress 85 % (384 MB)
115 19:09:50.170626 progress 90 % (407 MB)
116 19:09:53.333861 progress 95 % (429 MB)
117 19:09:56.517590 progress 100 % (452 MB)
118 19:09:56.531608 452 MB downloaded in 30.98 s (14.60 MB/s)
119 19:09:56.532529 end: 1.4.1 http-download (duration 00:00:31) [common]
121 19:09:56.534121 end: 1.4 download-retry (duration 00:00:31) [common]
122 19:09:56.534631 start: 1.5 download-retry (timeout 00:09:28) [common]
123 19:09:56.535140 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 19:09:56.536212 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/modules.tar.xz
125 19:09:56.536712 saving as /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/modules/modules.tar
126 19:09:56.537120 total size: 11601668 (11 MB)
127 19:09:56.537535 Using unxz to decompress xz
128 19:09:56.587352 progress 0 % (0 MB)
129 19:09:56.655780 progress 5 % (0 MB)
130 19:09:56.731317 progress 10 % (1 MB)
131 19:09:56.829939 progress 15 % (1 MB)
132 19:09:56.921178 progress 20 % (2 MB)
133 19:09:57.001507 progress 25 % (2 MB)
134 19:09:57.078381 progress 30 % (3 MB)
135 19:09:57.152906 progress 35 % (3 MB)
136 19:09:57.230409 progress 40 % (4 MB)
137 19:09:57.307976 progress 45 % (5 MB)
138 19:09:57.392514 progress 50 % (5 MB)
139 19:09:57.470790 progress 55 % (6 MB)
140 19:09:57.560345 progress 60 % (6 MB)
141 19:09:57.662445 progress 65 % (7 MB)
142 19:09:57.740700 progress 70 % (7 MB)
143 19:09:57.823710 progress 75 % (8 MB)
144 19:09:57.909014 progress 80 % (8 MB)
145 19:09:57.986710 progress 85 % (9 MB)
146 19:09:58.071327 progress 90 % (9 MB)
147 19:09:58.150715 progress 95 % (10 MB)
148 19:09:58.229857 progress 100 % (11 MB)
149 19:09:58.241645 11 MB downloaded in 1.70 s (6.49 MB/s)
150 19:09:58.242617 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:09:58.244522 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:09:58.245116 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 19:09:58.245691 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 19:10:13.744757 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953580/extract-nfsrootfs-stxzfbnu
156 19:10:13.745490 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 19:10:13.745864 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 19:10:13.746756 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo
159 19:10:13.747430 makedir: /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin
160 19:10:13.747906 makedir: /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/tests
161 19:10:13.748489 makedir: /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/results
162 19:10:13.748970 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-add-keys
163 19:10:13.749722 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-add-sources
164 19:10:13.750458 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-background-process-start
165 19:10:13.751209 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-background-process-stop
166 19:10:13.752027 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-common-functions
167 19:10:13.752824 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-echo-ipv4
168 19:10:13.753638 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-install-packages
169 19:10:13.754355 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-installed-packages
170 19:10:13.755154 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-os-build
171 19:10:13.756475 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-probe-channel
172 19:10:13.757380 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-probe-ip
173 19:10:13.758151 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-target-ip
174 19:10:13.759561 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-target-mac
175 19:10:13.761035 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-target-storage
176 19:10:13.762345 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-case
177 19:10:13.763107 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-event
178 19:10:13.763752 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-feedback
179 19:10:13.765563 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-raise
180 19:10:13.766362 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-reference
181 19:10:13.766994 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-runner
182 19:10:13.767609 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-set
183 19:10:13.768238 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-test-shell
184 19:10:13.768812 Updating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-install-packages (oe)
185 19:10:13.769426 Updating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/bin/lava-installed-packages (oe)
186 19:10:13.769938 Creating /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/environment
187 19:10:13.770358 LAVA metadata
188 19:10:13.770656 - LAVA_JOB_ID=953580
189 19:10:13.770881 - LAVA_DISPATCHER_IP=192.168.6.2
190 19:10:13.771293 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 19:10:13.772462 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 19:10:13.772842 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 19:10:13.773060 skipped lava-vland-overlay
194 19:10:13.773309 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 19:10:13.773576 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 19:10:13.773843 skipped lava-multinode-overlay
197 19:10:13.774107 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 19:10:13.774369 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 19:10:13.774647 Loading test definitions
200 19:10:13.774939 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 19:10:13.775169 Using /lava-953580 at stage 0
202 19:10:13.776523 uuid=953580_1.6.2.4.1 testdef=None
203 19:10:13.776888 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 19:10:13.777167 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 19:10:13.779254 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 19:10:13.780140 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 19:10:13.782862 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 19:10:13.783759 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 19:10:13.787883 runner path: /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 953580_1.6.2.4.1
212 19:10:13.788693 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 19:10:13.789561 Creating lava-test-runner.conf files
215 19:10:13.789777 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953580/lava-overlay-rrfq5zlo/lava-953580/0 for stage 0
216 19:10:13.790187 - 0_v4l2-decoder-conformance-h265
217 19:10:13.790611 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 19:10:13.790903 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 19:10:13.828999 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 19:10:13.829641 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 19:10:13.829987 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 19:10:13.830333 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 19:10:13.830666 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 19:10:14.453962 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 19:10:14.454443 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 19:10:14.454712 extracting modules file /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953580/extract-nfsrootfs-stxzfbnu
227 19:10:15.805437 extracting modules file /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk
228 19:10:17.198152 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 19:10:17.198636 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 19:10:17.198929 [common] Applying overlay to NFS
231 19:10:17.199156 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953580/compress-overlay-qllyhn1f/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953580/extract-nfsrootfs-stxzfbnu
232 19:10:17.228353 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 19:10:17.228759 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 19:10:17.229055 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 19:10:17.229300 Converting downloaded kernel to a uImage
236 19:10:17.229633 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/kernel/Image /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/kernel/uImage
237 19:10:17.720487 output: Image Name:
238 19:10:17.720912 output: Created: Thu Nov 7 19:10:17 2024
239 19:10:17.721127 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 19:10:17.721336 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 19:10:17.721539 output: Load Address: 01080000
242 19:10:17.721738 output: Entry Point: 01080000
243 19:10:17.721935 output:
244 19:10:17.722271 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 19:10:17.722540 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 19:10:17.722807 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 19:10:17.723061 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 19:10:17.723318 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 19:10:17.723574 Building ramdisk /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk
250 19:10:19.889225 >> 166792 blocks
251 19:10:27.640781 Adding RAMdisk u-boot header.
252 19:10:27.641446 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk.cpio.gz.uboot
253 19:10:27.894867 output: Image Name:
254 19:10:27.895276 output: Created: Thu Nov 7 19:10:27 2024
255 19:10:27.895489 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 19:10:27.895695 output: Data Size: 23433063 Bytes = 22883.85 KiB = 22.35 MiB
257 19:10:27.895898 output: Load Address: 00000000
258 19:10:27.896270 output: Entry Point: 00000000
259 19:10:27.896712 output:
260 19:10:27.897884 rename /var/lib/lava/dispatcher/tmp/953580/extract-overlay-ramdisk-er9bckcf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
261 19:10:27.898672 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 19:10:27.899270 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 19:10:27.899883 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 19:10:27.900428 No LXC device requested
265 19:10:27.900986 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 19:10:27.901552 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 19:10:27.902101 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 19:10:27.902555 Checking files for TFTP limit of 4294967296 bytes.
269 19:10:27.905530 end: 1 tftp-deploy (duration 00:01:03) [common]
270 19:10:27.906161 start: 2 uboot-action (timeout 00:05:00) [common]
271 19:10:27.906741 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 19:10:27.907290 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 19:10:27.907840 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 19:10:27.908451 Using kernel file from prepare-kernel: 953580/tftp-deploy-ett1bf9u/kernel/uImage
275 19:10:27.909140 substitutions:
276 19:10:27.909591 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 19:10:27.910035 - {DTB_ADDR}: 0x01070000
278 19:10:27.910477 - {DTB}: 953580/tftp-deploy-ett1bf9u/dtb/meson-g12b-a311d-libretech-cc.dtb
279 19:10:27.910920 - {INITRD}: 953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
280 19:10:27.911358 - {KERNEL_ADDR}: 0x01080000
281 19:10:27.911791 - {KERNEL}: 953580/tftp-deploy-ett1bf9u/kernel/uImage
282 19:10:27.912265 - {LAVA_MAC}: None
283 19:10:27.912744 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953580/extract-nfsrootfs-stxzfbnu
284 19:10:27.913184 - {NFS_SERVER_IP}: 192.168.6.2
285 19:10:27.913616 - {PRESEED_CONFIG}: None
286 19:10:27.914048 - {PRESEED_LOCAL}: None
287 19:10:27.914481 - {RAMDISK_ADDR}: 0x08000000
288 19:10:27.914908 - {RAMDISK}: 953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
289 19:10:27.915334 - {ROOT_PART}: None
290 19:10:27.915761 - {ROOT}: None
291 19:10:27.916221 - {SERVER_IP}: 192.168.6.2
292 19:10:27.916654 - {TEE_ADDR}: 0x83000000
293 19:10:27.917083 - {TEE}: None
294 19:10:27.917513 Parsed boot commands:
295 19:10:27.917932 - setenv autoload no
296 19:10:27.918358 - setenv initrd_high 0xffffffff
297 19:10:27.918786 - setenv fdt_high 0xffffffff
298 19:10:27.919214 - dhcp
299 19:10:27.919638 - setenv serverip 192.168.6.2
300 19:10:27.920085 - tftpboot 0x01080000 953580/tftp-deploy-ett1bf9u/kernel/uImage
301 19:10:27.920516 - tftpboot 0x08000000 953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
302 19:10:27.920943 - tftpboot 0x01070000 953580/tftp-deploy-ett1bf9u/dtb/meson-g12b-a311d-libretech-cc.dtb
303 19:10:27.921369 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953580/extract-nfsrootfs-stxzfbnu,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 19:10:27.921808 - bootm 0x01080000 0x08000000 0x01070000
305 19:10:27.922358 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 19:10:27.924015 start: 2.3 connect-device (timeout 00:05:00) [common]
308 19:10:27.924487 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 19:10:27.940304 Setting prompt string to ['lava-test: # ']
310 19:10:27.941903 end: 2.3 connect-device (duration 00:00:00) [common]
311 19:10:27.942549 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 19:10:27.943157 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 19:10:27.943739 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 19:10:27.945039 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 19:10:27.983238 >> OK - accepted request
316 19:10:27.985902 Returned 0 in 0 seconds
317 19:10:28.087087 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 19:10:28.088943 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 19:10:28.089569 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 19:10:28.090133 Setting prompt string to ['Hit any key to stop autoboot']
322 19:10:28.090642 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 19:10:28.092389 Trying 192.168.56.21...
324 19:10:28.092904 Connected to conserv1.
325 19:10:28.093364 Escape character is '^]'.
326 19:10:28.093823
327 19:10:28.094288 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 19:10:28.094736
329 19:10:39.219012 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 19:10:39.219446 bl2_stage_init 0x01
331 19:10:39.219684 bl2_stage_init 0x81
332 19:10:39.224857 hw id: 0x0000 - pwm id 0x01
333 19:10:39.225200 bl2_stage_init 0xc1
334 19:10:39.225427 bl2_stage_init 0x02
335 19:10:39.225636
336 19:10:39.230392 L0:00000000
337 19:10:39.230704 L1:20000703
338 19:10:39.230925 L2:00008067
339 19:10:39.231136 L3:14000000
340 19:10:39.236247 B2:00402000
341 19:10:39.236623 B1:e0f83180
342 19:10:39.236851
343 19:10:39.237066 TE: 58124
344 19:10:39.237302
345 19:10:39.241555 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 19:10:39.241818
347 19:10:39.242019 Board ID = 1
348 19:10:39.247045 Set A53 clk to 24M
349 19:10:39.247287 Set A73 clk to 24M
350 19:10:39.247483 Set clk81 to 24M
351 19:10:39.252573 A53 clk: 1200 MHz
352 19:10:39.252901 A73 clk: 1200 MHz
353 19:10:39.253118 CLK81: 166.6M
354 19:10:39.253314 smccc: 00012a92
355 19:10:39.258098 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 19:10:39.263690 board id: 1
357 19:10:39.269376 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 19:10:39.280077 fw parse done
359 19:10:39.286034 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 19:10:39.328667 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 19:10:39.339526 PIEI prepare done
362 19:10:39.339753 fastboot data load
363 19:10:39.339954 fastboot data verify
364 19:10:39.345193 verify result: 266
365 19:10:39.350792 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 19:10:39.351264 LPDDR4 probe
367 19:10:39.351699 ddr clk to 1584MHz
368 19:10:39.358831 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 19:10:39.396275
370 19:10:39.396847 dmc_version 0001
371 19:10:39.402811 Check phy result
372 19:10:39.408647 INFO : End of CA training
373 19:10:39.409137 INFO : End of initialization
374 19:10:39.414284 INFO : Training has run successfully!
375 19:10:39.414805 Check phy result
376 19:10:39.419790 INFO : End of initialization
377 19:10:39.420318 INFO : End of read enable training
378 19:10:39.425384 INFO : End of fine write leveling
379 19:10:39.431069 INFO : End of Write leveling coarse delay
380 19:10:39.431538 INFO : Training has run successfully!
381 19:10:39.431976 Check phy result
382 19:10:39.436646 INFO : End of initialization
383 19:10:39.437108 INFO : End of read dq deskew training
384 19:10:39.442272 INFO : End of MPR read delay center optimization
385 19:10:39.447791 INFO : End of write delay center optimization
386 19:10:39.453470 INFO : End of read delay center optimization
387 19:10:39.453933 INFO : End of max read latency training
388 19:10:39.459060 INFO : Training has run successfully!
389 19:10:39.459562 1D training succeed
390 19:10:39.468280 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 19:10:39.515830 Check phy result
392 19:10:39.516261 INFO : End of initialization
393 19:10:39.538318 INFO : End of 2D read delay Voltage center optimization
394 19:10:39.557694 INFO : End of 2D read delay Voltage center optimization
395 19:10:39.610785 INFO : End of 2D write delay Voltage center optimization
396 19:10:39.660050 INFO : End of 2D write delay Voltage center optimization
397 19:10:39.665601 INFO : Training has run successfully!
398 19:10:39.666077
399 19:10:39.666527 channel==0
400 19:10:39.671234 RxClkDly_Margin_A0==88 ps 9
401 19:10:39.671706 TxDqDly_Margin_A0==98 ps 10
402 19:10:39.676691 RxClkDly_Margin_A1==88 ps 9
403 19:10:39.676980 TxDqDly_Margin_A1==98 ps 10
404 19:10:39.677208 TrainedVREFDQ_A0==74
405 19:10:39.682443 TrainedVREFDQ_A1==75
406 19:10:39.682712 VrefDac_Margin_A0==24
407 19:10:39.682927 DeviceVref_Margin_A0==40
408 19:10:39.688134 VrefDac_Margin_A1==24
409 19:10:39.688368 DeviceVref_Margin_A1==39
410 19:10:39.688569
411 19:10:39.688768
412 19:10:39.693555 channel==1
413 19:10:39.693778 RxClkDly_Margin_A0==98 ps 10
414 19:10:39.693980 TxDqDly_Margin_A0==98 ps 10
415 19:10:39.699132 RxClkDly_Margin_A1==88 ps 9
416 19:10:39.699358 TxDqDly_Margin_A1==88 ps 9
417 19:10:39.704701 TrainedVREFDQ_A0==77
418 19:10:39.705178 TrainedVREFDQ_A1==77
419 19:10:39.705619 VrefDac_Margin_A0==22
420 19:10:39.710351 DeviceVref_Margin_A0==37
421 19:10:39.710818 VrefDac_Margin_A1==24
422 19:10:39.715908 DeviceVref_Margin_A1==37
423 19:10:39.716409
424 19:10:39.716850 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 19:10:39.717285
426 19:10:39.749592 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 19:10:39.750247 2D training succeed
428 19:10:39.755088 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 19:10:39.760736 auto size-- 65535DDR cs0 size: 2048MB
430 19:10:39.761217 DDR cs1 size: 2048MB
431 19:10:39.766380 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 19:10:39.766858 cs0 DataBus test pass
433 19:10:39.771970 cs1 DataBus test pass
434 19:10:39.772567 cs0 AddrBus test pass
435 19:10:39.773010 cs1 AddrBus test pass
436 19:10:39.773443
437 19:10:39.777558 100bdlr_step_size ps== 420
438 19:10:39.778118 result report
439 19:10:39.783075 boot times 0Enable ddr reg access
440 19:10:39.788508 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 19:10:39.802128 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 19:10:40.375764 0.0;M3 CHK:0;cm4_sp_mode 0
443 19:10:40.376494 MVN_1=0x00000000
444 19:10:40.381152 MVN_2=0x00000000
445 19:10:40.386962 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 19:10:40.387521 OPS=0x10
447 19:10:40.388027 ring efuse init
448 19:10:40.388490 chipver efuse init
449 19:10:40.392514 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 19:10:40.398115 [0.018961 Inits done]
451 19:10:40.398599 secure task start!
452 19:10:40.399049 high task start!
453 19:10:40.402560 low task start!
454 19:10:40.403037 run into bl31
455 19:10:40.409310 NOTICE: BL31: v1.3(release):4fc40b1
456 19:10:40.417221 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 19:10:40.417776 NOTICE: BL31: G12A normal boot!
458 19:10:40.442496 NOTICE: BL31: BL33 decompress pass
459 19:10:40.447224 ERROR: Error initializing runtime service opteed_fast
460 19:10:41.681208
461 19:10:41.681847
462 19:10:41.688472 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 19:10:41.688754
464 19:10:41.688983 Model: Libre Computer AML-A311D-CC Alta
465 19:10:41.897067 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 19:10:41.920476 DRAM: 2 GiB (effective 3.8 GiB)
467 19:10:42.064473 Core: 408 devices, 31 uclasses, devicetree: separate
468 19:10:42.069381 WDT: Not starting watchdog@f0d0
469 19:10:42.102375 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 19:10:42.114841 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 19:10:42.119840 ** Bad device specification mmc 0 **
472 19:10:42.130141 Card did not respond to voltage select! : -110
473 19:10:42.137280 ** Bad device specification mmc 0 **
474 19:10:42.137716 Couldn't find partition mmc 0
475 19:10:42.146168 Card did not respond to voltage select! : -110
476 19:10:42.151681 ** Bad device specification mmc 0 **
477 19:10:42.152149 Couldn't find partition mmc 0
478 19:10:42.155735 Error: could not access storage.
479 19:10:43.420501 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 19:10:43.421109 bl2_stage_init 0x01
481 19:10:43.421492 bl2_stage_init 0x81
482 19:10:43.424897 hw id: 0x0000 - pwm id 0x01
483 19:10:43.425514 bl2_stage_init 0xc1
484 19:10:43.425949 bl2_stage_init 0x02
485 19:10:43.426366
486 19:10:43.430503 L0:00000000
487 19:10:43.431049 L1:20000703
488 19:10:43.431473 L2:00008067
489 19:10:43.431883 L3:14000000
490 19:10:43.436063 B2:00402000
491 19:10:43.436572 B1:e0f83180
492 19:10:43.437002
493 19:10:43.437422 TE: 58167
494 19:10:43.437837
495 19:10:43.441661 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 19:10:43.442174
497 19:10:43.442597 Board ID = 1
498 19:10:43.447257 Set A53 clk to 24M
499 19:10:43.447827 Set A73 clk to 24M
500 19:10:43.448303 Set clk81 to 24M
501 19:10:43.452912 A53 clk: 1200 MHz
502 19:10:43.453514 A73 clk: 1200 MHz
503 19:10:43.453772 CLK81: 166.6M
504 19:10:43.454009 smccc: 00012abe
505 19:10:43.458497 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 19:10:43.464197 board id: 1
507 19:10:43.468959 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 19:10:43.480682 fw parse done
509 19:10:43.486636 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 19:10:43.528321 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 19:10:43.540175 PIEI prepare done
512 19:10:43.540831 fastboot data load
513 19:10:43.541338 fastboot data verify
514 19:10:43.545881 verify result: 266
515 19:10:43.551355 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 19:10:43.552049 LPDDR4 probe
517 19:10:43.552596 ddr clk to 1584MHz
518 19:10:43.559704 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 19:10:43.596339
520 19:10:43.596779 dmc_version 0001
521 19:10:43.602916 Check phy result
522 19:10:43.609211 INFO : End of CA training
523 19:10:43.609745 INFO : End of initialization
524 19:10:43.614772 INFO : Training has run successfully!
525 19:10:43.615298 Check phy result
526 19:10:43.620574 INFO : End of initialization
527 19:10:43.621129 INFO : End of read enable training
528 19:10:43.626050 INFO : End of fine write leveling
529 19:10:43.631656 INFO : End of Write leveling coarse delay
530 19:10:43.632214 INFO : Training has run successfully!
531 19:10:43.632640 Check phy result
532 19:10:43.637194 INFO : End of initialization
533 19:10:43.637712 INFO : End of read dq deskew training
534 19:10:43.642924 INFO : End of MPR read delay center optimization
535 19:10:43.648403 INFO : End of write delay center optimization
536 19:10:43.653946 INFO : End of read delay center optimization
537 19:10:43.654316 INFO : End of max read latency training
538 19:10:43.659528 INFO : Training has run successfully!
539 19:10:43.659877 1D training succeed
540 19:10:43.668412 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 19:10:43.715498 Check phy result
542 19:10:43.716163 INFO : End of initialization
543 19:10:43.737890 INFO : End of 2D read delay Voltage center optimization
544 19:10:43.758069 INFO : End of 2D read delay Voltage center optimization
545 19:10:43.810248 INFO : End of 2D write delay Voltage center optimization
546 19:10:43.859741 INFO : End of 2D write delay Voltage center optimization
547 19:10:43.865153 INFO : Training has run successfully!
548 19:10:43.865472
549 19:10:43.865742 channel==0
550 19:10:43.870730 RxClkDly_Margin_A0==88 ps 9
551 19:10:43.871084 TxDqDly_Margin_A0==98 ps 10
552 19:10:43.876393 RxClkDly_Margin_A1==88 ps 9
553 19:10:43.876798 TxDqDly_Margin_A1==98 ps 10
554 19:10:43.877055 TrainedVREFDQ_A0==74
555 19:10:43.882265 TrainedVREFDQ_A1==74
556 19:10:43.883090 VrefDac_Margin_A0==25
557 19:10:43.883551 DeviceVref_Margin_A0==40
558 19:10:43.887646 VrefDac_Margin_A1==25
559 19:10:43.888215 DeviceVref_Margin_A1==40
560 19:10:43.888714
561 19:10:43.889186
562 19:10:43.893205 channel==1
563 19:10:43.893717 RxClkDly_Margin_A0==98 ps 10
564 19:10:43.894182 TxDqDly_Margin_A0==88 ps 9
565 19:10:43.898799 RxClkDly_Margin_A1==88 ps 9
566 19:10:43.899316 TxDqDly_Margin_A1==108 ps 11
567 19:10:43.904412 TrainedVREFDQ_A0==76
568 19:10:43.904948 TrainedVREFDQ_A1==78
569 19:10:43.905420 VrefDac_Margin_A0==22
570 19:10:43.910006 DeviceVref_Margin_A0==38
571 19:10:43.910525 VrefDac_Margin_A1==24
572 19:10:43.915678 DeviceVref_Margin_A1==36
573 19:10:43.916311
574 19:10:43.916739 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 19:10:43.921302
576 19:10:43.949252 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
577 19:10:43.949852 2D training succeed
578 19:10:43.954883 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 19:10:43.960459 auto size-- 65535DDR cs0 size: 2048MB
580 19:10:43.961029 DDR cs1 size: 2048MB
581 19:10:43.966112 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 19:10:43.966660 cs0 DataBus test pass
583 19:10:43.971772 cs1 DataBus test pass
584 19:10:43.972339 cs0 AddrBus test pass
585 19:10:43.972777 cs1 AddrBus test pass
586 19:10:43.973190
587 19:10:43.977283 100bdlr_step_size ps== 420
588 19:10:43.977807 result report
589 19:10:43.982850 boot times 0Enable ddr reg access
590 19:10:43.987619 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 19:10:44.001863 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 19:10:44.575328 0.0;M3 CHK:0;cm4_sp_mode 0
593 19:10:44.575752 MVN_1=0x00000000
594 19:10:44.580832 MVN_2=0x00000000
595 19:10:44.586575 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 19:10:44.586886 OPS=0x10
597 19:10:44.587117 ring efuse init
598 19:10:44.587335 chipver efuse init
599 19:10:44.594778 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 19:10:44.595113 [0.018961 Inits done]
601 19:10:44.602372 secure task start!
602 19:10:44.602794 high task start!
603 19:10:44.603208 low task start!
604 19:10:44.603605 run into bl31
605 19:10:44.609086 NOTICE: BL31: v1.3(release):4fc40b1
606 19:10:44.616936 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 19:10:44.617424 NOTICE: BL31: G12A normal boot!
608 19:10:44.642865 NOTICE: BL31: BL33 decompress pass
609 19:10:44.648606 ERROR: Error initializing runtime service opteed_fast
610 19:10:45.881521
611 19:10:45.882160
612 19:10:45.889152 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 19:10:45.889692
614 19:10:45.890152 Model: Libre Computer AML-A311D-CC Alta
615 19:10:46.098528 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 19:10:46.121922 DRAM: 2 GiB (effective 3.8 GiB)
617 19:10:46.264732 Core: 408 devices, 31 uclasses, devicetree: separate
618 19:10:46.270546 WDT: Not starting watchdog@f0d0
619 19:10:46.302949 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 19:10:46.315261 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 19:10:46.320228 ** Bad device specification mmc 0 **
622 19:10:46.330585 Card did not respond to voltage select! : -110
623 19:10:46.338247 ** Bad device specification mmc 0 **
624 19:10:46.338701 Couldn't find partition mmc 0
625 19:10:46.346553 Card did not respond to voltage select! : -110
626 19:10:46.352075 ** Bad device specification mmc 0 **
627 19:10:46.352519 Couldn't find partition mmc 0
628 19:10:46.357164 Error: could not access storage.
629 19:10:46.700751 Net: eth0: ethernet@ff3f0000
630 19:10:46.701349 starting USB...
631 19:10:46.952510 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 19:10:46.953122 Starting the controller
633 19:10:46.959513 USB XHCI 1.10
634 19:10:48.669585 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 19:10:48.670213 bl2_stage_init 0x81
636 19:10:48.675239 hw id: 0x0000 - pwm id 0x01
637 19:10:48.675702 bl2_stage_init 0xc1
638 19:10:48.676168 bl2_stage_init 0x02
639 19:10:48.676584
640 19:10:48.680649 L0:00000000
641 19:10:48.681093 L1:20000703
642 19:10:48.681499 L2:00008067
643 19:10:48.681902 L3:14000000
644 19:10:48.682302 B2:00402000
645 19:10:48.686253 B1:e0f83180
646 19:10:48.686694
647 19:10:48.687101 TE: 58150
648 19:10:48.687502
649 19:10:48.691842 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 19:10:48.692316
651 19:10:48.692730 Board ID = 1
652 19:10:48.697467 Set A53 clk to 24M
653 19:10:48.697908 Set A73 clk to 24M
654 19:10:48.698311 Set clk81 to 24M
655 19:10:48.703190 A53 clk: 1200 MHz
656 19:10:48.703628 A73 clk: 1200 MHz
657 19:10:48.704058 CLK81: 166.6M
658 19:10:48.704642 smccc: 00012aac
659 19:10:48.708725 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 19:10:48.714307 board id: 1
661 19:10:48.719192 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 19:10:48.730852 fw parse done
663 19:10:48.736763 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 19:10:48.779391 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 19:10:48.790262 PIEI prepare done
666 19:10:48.790717 fastboot data load
667 19:10:48.791132 fastboot data verify
668 19:10:48.795854 verify result: 266
669 19:10:48.801435 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 19:10:48.801883 LPDDR4 probe
671 19:10:48.802289 ddr clk to 1584MHz
672 19:10:48.809399 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 19:10:48.846800
674 19:10:48.847312 dmc_version 0001
675 19:10:48.853353 Check phy result
676 19:10:48.859288 INFO : End of CA training
677 19:10:48.859749 INFO : End of initialization
678 19:10:48.864849 INFO : Training has run successfully!
679 19:10:48.865338 Check phy result
680 19:10:48.870437 INFO : End of initialization
681 19:10:48.870878 INFO : End of read enable training
682 19:10:48.876035 INFO : End of fine write leveling
683 19:10:48.881612 INFO : End of Write leveling coarse delay
684 19:10:48.882055 INFO : Training has run successfully!
685 19:10:48.882463 Check phy result
686 19:10:48.887277 INFO : End of initialization
687 19:10:48.887719 INFO : End of read dq deskew training
688 19:10:48.892835 INFO : End of MPR read delay center optimization
689 19:10:48.898398 INFO : End of write delay center optimization
690 19:10:48.904022 INFO : End of read delay center optimization
691 19:10:48.904458 INFO : End of max read latency training
692 19:10:48.909658 INFO : Training has run successfully!
693 19:10:48.910110 1D training succeed
694 19:10:48.918858 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 19:10:48.966385 Check phy result
696 19:10:48.966890 INFO : End of initialization
697 19:10:48.988031 INFO : End of 2D read delay Voltage center optimization
698 19:10:49.008152 INFO : End of 2D read delay Voltage center optimization
699 19:10:49.060105 INFO : End of 2D write delay Voltage center optimization
700 19:10:49.109367 INFO : End of 2D write delay Voltage center optimization
701 19:10:49.114822 INFO : Training has run successfully!
702 19:10:49.115287
703 19:10:49.115704 channel==0
704 19:10:49.120558 RxClkDly_Margin_A0==88 ps 9
705 19:10:49.121034 TxDqDly_Margin_A0==98 ps 10
706 19:10:49.126150 RxClkDly_Margin_A1==88 ps 9
707 19:10:49.126677 TxDqDly_Margin_A1==98 ps 10
708 19:10:49.127111 TrainedVREFDQ_A0==74
709 19:10:49.131705 TrainedVREFDQ_A1==74
710 19:10:49.132261 VrefDac_Margin_A0==25
711 19:10:49.132715 DeviceVref_Margin_A0==40
712 19:10:49.137336 VrefDac_Margin_A1==25
713 19:10:49.137865 DeviceVref_Margin_A1==40
714 19:10:49.138296
715 19:10:49.138719
716 19:10:49.142842 channel==1
717 19:10:49.143821 RxClkDly_Margin_A0==98 ps 10
718 19:10:49.144292 TxDqDly_Margin_A0==98 ps 10
719 19:10:49.148375 RxClkDly_Margin_A1==88 ps 9
720 19:10:49.148887 TxDqDly_Margin_A1==88 ps 9
721 19:10:49.154043 TrainedVREFDQ_A0==77
722 19:10:49.154486 TrainedVREFDQ_A1==77
723 19:10:49.154928 VrefDac_Margin_A0==22
724 19:10:49.159659 DeviceVref_Margin_A0==37
725 19:10:49.160147 VrefDac_Margin_A1==24
726 19:10:49.165375 DeviceVref_Margin_A1==37
727 19:10:49.165855
728 19:10:49.166693 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 19:10:49.167109
730 19:10:49.198836 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
731 19:10:49.199383 2D training succeed
732 19:10:49.204446 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 19:10:49.210324 auto size-- 65535DDR cs0 size: 2048MB
734 19:10:49.210932 DDR cs1 size: 2048MB
735 19:10:49.215643 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 19:10:49.216236 cs0 DataBus test pass
737 19:10:49.221347 cs1 DataBus test pass
738 19:10:49.221905 cs0 AddrBus test pass
739 19:10:49.222427 cs1 AddrBus test pass
740 19:10:49.222941
741 19:10:49.226851 100bdlr_step_size ps== 420
742 19:10:49.227429 result report
743 19:10:49.232510 boot times 0Enable ddr reg access
744 19:10:49.237825 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 19:10:49.251289 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 19:10:49.823239 0.0;M3 CHK:0;cm4_sp_mode 0
747 19:10:49.823898 MVN_1=0x00000000
748 19:10:49.828734 MVN_2=0x00000000
749 19:10:49.834563 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 19:10:49.835156 OPS=0x10
751 19:10:49.835636 ring efuse init
752 19:10:49.836143 chipver efuse init
753 19:10:49.840166 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 19:10:49.845677 [0.018960 Inits done]
755 19:10:49.846191 secure task start!
756 19:10:49.846638 high task start!
757 19:10:49.850263 low task start!
758 19:10:49.850752 run into bl31
759 19:10:49.856930 NOTICE: BL31: v1.3(release):4fc40b1
760 19:10:49.864734 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 19:10:49.865257 NOTICE: BL31: G12A normal boot!
762 19:10:49.890656 NOTICE: BL31: BL33 decompress pass
763 19:10:49.896441 ERROR: Error initializing runtime service opteed_fast
764 19:10:51.129326
765 19:10:51.129979
766 19:10:51.137611 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 19:10:51.138396
768 19:10:51.138948 Model: Libre Computer AML-A311D-CC Alta
769 19:10:51.346258 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 19:10:51.369514 DRAM: 2 GiB (effective 3.8 GiB)
771 19:10:51.512555 Core: 408 devices, 31 uclasses, devicetree: separate
772 19:10:51.518345 WDT: Not starting watchdog@f0d0
773 19:10:51.550867 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 19:10:51.563268 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 19:10:51.567216 ** Bad device specification mmc 0 **
776 19:10:51.578566 Card did not respond to voltage select! : -110
777 19:10:51.585146 ** Bad device specification mmc 0 **
778 19:10:51.585695 Couldn't find partition mmc 0
779 19:10:51.594401 Card did not respond to voltage select! : -110
780 19:10:51.599881 ** Bad device specification mmc 0 **
781 19:10:51.600445 Couldn't find partition mmc 0
782 19:10:51.604186 Error: could not access storage.
783 19:10:51.947685 Net: eth0: ethernet@ff3f0000
784 19:10:51.948371 starting USB...
785 19:10:52.200393 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 19:10:52.201030 Starting the controller
787 19:10:52.207240 USB XHCI 1.10
788 19:10:54.371044 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 19:10:54.371743 bl2_stage_init 0x01
790 19:10:54.372304 bl2_stage_init 0x81
791 19:10:54.376634 hw id: 0x0000 - pwm id 0x01
792 19:10:54.377163 bl2_stage_init 0xc1
793 19:10:54.377644 bl2_stage_init 0x02
794 19:10:54.378107
795 19:10:54.382164 L0:00000000
796 19:10:54.382711 L1:20000703
797 19:10:54.383183 L2:00008067
798 19:10:54.383638 L3:14000000
799 19:10:54.387755 B2:00402000
800 19:10:54.388345 B1:e0f83180
801 19:10:54.388807
802 19:10:54.389269 TE: 58124
803 19:10:54.389722
804 19:10:54.393310 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 19:10:54.393830
806 19:10:54.394290 Board ID = 1
807 19:10:54.398957 Set A53 clk to 24M
808 19:10:54.399478 Set A73 clk to 24M
809 19:10:54.399931 Set clk81 to 24M
810 19:10:54.404559 A53 clk: 1200 MHz
811 19:10:54.405097 A73 clk: 1200 MHz
812 19:10:54.405557 CLK81: 166.6M
813 19:10:54.406010 smccc: 00012a92
814 19:10:54.410149 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 19:10:54.415687 board id: 1
816 19:10:54.421724 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 19:10:54.432266 fw parse done
818 19:10:54.437230 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 19:10:54.479781 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 19:10:54.491696 PIEI prepare done
821 19:10:54.492250 fastboot data load
822 19:10:54.492692 fastboot data verify
823 19:10:54.497344 verify result: 266
824 19:10:54.502961 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 19:10:54.503495 LPDDR4 probe
826 19:10:54.503934 ddr clk to 1584MHz
827 19:10:54.510999 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 19:10:54.548319
829 19:10:54.548878 dmc_version 0001
830 19:10:54.554904 Check phy result
831 19:10:54.560754 INFO : End of CA training
832 19:10:54.561273 INFO : End of initialization
833 19:10:54.566361 INFO : Training has run successfully!
834 19:10:54.566894 Check phy result
835 19:10:54.571908 INFO : End of initialization
836 19:10:54.572451 INFO : End of read enable training
837 19:10:54.577519 INFO : End of fine write leveling
838 19:10:54.583153 INFO : End of Write leveling coarse delay
839 19:10:54.583660 INFO : Training has run successfully!
840 19:10:54.584138 Check phy result
841 19:10:54.588745 INFO : End of initialization
842 19:10:54.589248 INFO : End of read dq deskew training
843 19:10:54.594339 INFO : End of MPR read delay center optimization
844 19:10:54.599914 INFO : End of write delay center optimization
845 19:10:54.605547 INFO : End of read delay center optimization
846 19:10:54.606051 INFO : End of max read latency training
847 19:10:54.611206 INFO : Training has run successfully!
848 19:10:54.611711 1D training succeed
849 19:10:54.620289 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 19:10:54.667913 Check phy result
851 19:10:54.668484 INFO : End of initialization
852 19:10:54.689485 INFO : End of 2D read delay Voltage center optimization
853 19:10:54.709566 INFO : End of 2D read delay Voltage center optimization
854 19:10:54.761492 INFO : End of 2D write delay Voltage center optimization
855 19:10:54.810744 INFO : End of 2D write delay Voltage center optimization
856 19:10:54.816338 INFO : Training has run successfully!
857 19:10:54.816861
858 19:10:54.817285 channel==0
859 19:10:54.821965 RxClkDly_Margin_A0==88 ps 9
860 19:10:54.822481 TxDqDly_Margin_A0==98 ps 10
861 19:10:54.827538 RxClkDly_Margin_A1==88 ps 9
862 19:10:54.828111 TxDqDly_Margin_A1==98 ps 10
863 19:10:54.828561 TrainedVREFDQ_A0==74
864 19:10:54.833197 TrainedVREFDQ_A1==74
865 19:10:54.833724 VrefDac_Margin_A0==25
866 19:10:54.834146 DeviceVref_Margin_A0==40
867 19:10:54.838744 VrefDac_Margin_A1==23
868 19:10:54.839249 DeviceVref_Margin_A1==40
869 19:10:54.839643
870 19:10:54.840071
871 19:10:54.844308 channel==1
872 19:10:54.844787 RxClkDly_Margin_A0==98 ps 10
873 19:10:54.845180 TxDqDly_Margin_A0==98 ps 10
874 19:10:54.849927 RxClkDly_Margin_A1==88 ps 9
875 19:10:54.850405 TxDqDly_Margin_A1==98 ps 10
876 19:10:54.855487 TrainedVREFDQ_A0==77
877 19:10:54.855969 TrainedVREFDQ_A1==77
878 19:10:54.856403 VrefDac_Margin_A0==22
879 19:10:54.861177 DeviceVref_Margin_A0==37
880 19:10:54.861656 VrefDac_Margin_A1==24
881 19:10:54.866704 DeviceVref_Margin_A1==37
882 19:10:54.867185
883 19:10:54.867582 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 19:10:54.872311
885 19:10:54.900251 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 19:10:54.900787 2D training succeed
887 19:10:54.905930 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 19:10:54.911428 auto size-- 65535DDR cs0 size: 2048MB
889 19:10:54.911913 DDR cs1 size: 2048MB
890 19:10:54.917193 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 19:10:54.917678 cs0 DataBus test pass
892 19:10:54.922716 cs1 DataBus test pass
893 19:10:54.923192 cs0 AddrBus test pass
894 19:10:54.923583 cs1 AddrBus test pass
895 19:10:54.923967
896 19:10:54.928287 100bdlr_step_size ps== 420
897 19:10:54.928771 result report
898 19:10:54.933950 boot times 0Enable ddr reg access
899 19:10:54.939334 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 19:10:54.952807 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 19:10:55.524818 0.0;M3 CHK:0;cm4_sp_mode 0
902 19:10:55.525440 MVN_1=0x00000000
903 19:10:55.530260 MVN_2=0x00000000
904 19:10:55.536062 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 19:10:55.536577 OPS=0x10
906 19:10:55.537007 ring efuse init
907 19:10:55.537417 chipver efuse init
908 19:10:55.541641 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 19:10:55.547240 [0.018961 Inits done]
910 19:10:55.547754 secure task start!
911 19:10:55.548219 high task start!
912 19:10:55.551851 low task start!
913 19:10:55.552382 run into bl31
914 19:10:55.558473 NOTICE: BL31: v1.3(release):4fc40b1
915 19:10:55.566292 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 19:10:55.566796 NOTICE: BL31: G12A normal boot!
917 19:10:55.591578 NOTICE: BL31: BL33 decompress pass
918 19:10:55.597294 ERROR: Error initializing runtime service opteed_fast
919 19:10:56.830222
920 19:10:56.830842
921 19:10:56.838549 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 19:10:56.839041
923 19:10:56.839468 Model: Libre Computer AML-A311D-CC Alta
924 19:10:57.047009 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 19:10:57.070353 DRAM: 2 GiB (effective 3.8 GiB)
926 19:10:57.213298 Core: 408 devices, 31 uclasses, devicetree: separate
927 19:10:57.219169 WDT: Not starting watchdog@f0d0
928 19:10:57.251468 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 19:10:57.264131 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 19:10:57.269029 ** Bad device specification mmc 0 **
931 19:10:57.279340 Card did not respond to voltage select! : -110
932 19:10:57.287029 ** Bad device specification mmc 0 **
933 19:10:57.287562 Couldn't find partition mmc 0
934 19:10:57.295201 Card did not respond to voltage select! : -110
935 19:10:57.300705 ** Bad device specification mmc 0 **
936 19:10:57.300993 Couldn't find partition mmc 0
937 19:10:57.305778 Error: could not access storage.
938 19:10:57.649344 Net: eth0: ethernet@ff3f0000
939 19:10:57.649732 starting USB...
940 19:10:57.901133 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 19:10:57.901696 Starting the controller
942 19:10:57.908194 USB XHCI 1.10
943 19:10:59.462379 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 19:10:59.470749 scanning usb for storage devices... 0 Storage Device(s) found
946 19:10:59.522522 Hit any key to stop autoboot: 1
947 19:10:59.523414 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 19:10:59.524124 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 19:10:59.524690 Setting prompt string to ['=>']
950 19:10:59.525251 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 19:10:59.538125 0
952 19:10:59.539106 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 19:10:59.539689 Sending with 10 millisecond of delay
955 19:11:00.674577 => setenv autoload no
956 19:11:00.685433 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 19:11:00.690843 setenv autoload no
958 19:11:00.691636 Sending with 10 millisecond of delay
960 19:11:02.488730 => setenv initrd_high 0xffffffff
961 19:11:02.499580 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 19:11:02.500568 setenv initrd_high 0xffffffff
963 19:11:02.501348 Sending with 10 millisecond of delay
965 19:11:04.118241 => setenv fdt_high 0xffffffff
966 19:11:04.129092 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 19:11:04.129958 setenv fdt_high 0xffffffff
968 19:11:04.130722 Sending with 10 millisecond of delay
970 19:11:04.422669 => dhcp
971 19:11:04.433489 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 19:11:04.434376 dhcp
973 19:11:04.434863 Speed: 1000, full duplex
974 19:11:04.435317 BOOTP broadcast 1
975 19:11:04.632053 DHCP client bound to address 192.168.6.27 (198 ms)
976 19:11:04.633000 Sending with 10 millisecond of delay
978 19:11:06.309707 => setenv serverip 192.168.6.2
979 19:11:06.320575 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 19:11:06.321595 setenv serverip 192.168.6.2
981 19:11:06.322346 Sending with 10 millisecond of delay
983 19:11:10.046992 => tftpboot 0x01080000 953580/tftp-deploy-ett1bf9u/kernel/uImage
984 19:11:10.057890 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 19:11:10.058930 tftpboot 0x01080000 953580/tftp-deploy-ett1bf9u/kernel/uImage
986 19:11:10.059448 Speed: 1000, full duplex
987 19:11:10.059914 Using ethernet@ff3f0000 device
988 19:11:10.060770 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 19:11:10.066103 Filename '953580/tftp-deploy-ett1bf9u/kernel/uImage'.
990 19:11:10.069886 Load address: 0x1080000
991 19:11:12.356053 Loading: *###################################### UDP wrong checksum 000000ff 0000344b
992 19:11:12.470094 ## UDP wrong checksum 000000ff 0000b93d
993 19:11:13.014424 ########## 43.6 MiB
994 19:11:13.015088 14.8 MiB/s
995 19:11:13.015563 done
996 19:11:13.018902 Bytes transferred = 45713984 (2b98a40 hex)
997 19:11:13.019737 Sending with 10 millisecond of delay
999 19:11:17.708584 => tftpboot 0x08000000 953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
1000 19:11:17.719404 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1001 19:11:17.720293 tftpboot 0x08000000 953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot
1002 19:11:17.720726 Speed: 1000, full duplex
1003 19:11:17.721122 Using ethernet@ff3f0000 device
1004 19:11:17.722075 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1005 19:11:17.730830 Filename '953580/tftp-deploy-ett1bf9u/ramdisk/ramdisk.cpio.gz.uboot'.
1006 19:11:17.731263 Load address: 0x8000000
1007 19:11:24.391910 Loading: *############T ##################################### UDP wrong checksum 00000005 00008e4b
1008 19:11:29.392284 T UDP wrong checksum 00000005 00008e4b
1009 19:11:39.393036 T T UDP wrong checksum 00000005 00008e4b
1010 19:11:59.398432 T T T T UDP wrong checksum 00000005 00008e4b
1011 19:12:05.870575 T UDP wrong checksum 000000ff 00002d33
1012 19:12:05.920962 UDP wrong checksum 000000ff 0000c025
1013 19:12:12.225452 T UDP wrong checksum 000000ff 00003107
1014 19:12:12.384579 UDP wrong checksum 000000ff 0000c9f9
1015 19:12:14.402468
1016 19:12:14.403100 Retry count exceeded; starting again
1018 19:12:14.404620 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1021 19:12:14.406474 end: 2.4 uboot-commands (duration 00:01:46) [common]
1023 19:12:14.407825 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1025 19:12:14.408904 end: 2 uboot-action (duration 00:01:47) [common]
1027 19:12:14.410452 Cleaning after the job
1028 19:12:14.411028 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/ramdisk
1029 19:12:14.412410 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/kernel
1030 19:12:14.438766 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/dtb
1031 19:12:14.440335 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/nfsrootfs
1032 19:12:14.502458 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953580/tftp-deploy-ett1bf9u/modules
1033 19:12:14.510304 start: 4.1 power-off (timeout 00:00:30) [common]
1034 19:12:14.510965 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1035 19:12:14.546977 >> OK - accepted request
1036 19:12:14.548969 Returned 0 in 0 seconds
1037 19:12:14.650096 end: 4.1 power-off (duration 00:00:00) [common]
1039 19:12:14.651169 start: 4.2 read-feedback (timeout 00:10:00) [common]
1040 19:12:14.651898 Listened to connection for namespace 'common' for up to 1s
1041 19:12:15.652175 Finalising connection for namespace 'common'
1042 19:12:15.652907 Disconnecting from shell: Finalise
1043 19:12:15.653468 =>
1044 19:12:15.754524 end: 4.2 read-feedback (duration 00:00:01) [common]
1045 19:12:15.755180 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953580
1046 19:12:18.303228 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953580
1047 19:12:18.303837 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.