Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 18:57:43.989791 lava-dispatcher, installed at version: 2024.01
2 18:57:43.990562 start: 0 validate
3 18:57:43.991029 Start time: 2024-11-07 18:57:43.991000+00:00 (UTC)
4 18:57:43.991565 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 18:57:43.992128 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 18:57:44.035073 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 18:57:44.035643 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 18:57:44.065503 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 18:57:44.066115 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 18:57:44.094370 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 18:57:44.095080 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 18:57:44.126304 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 18:57:44.126771 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-239-gba19e4550e25a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 18:57:44.162908 validate duration: 0.17
16 18:57:44.163745 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 18:57:44.164107 start: 1.1 download-retry (timeout 00:10:00) [common]
18 18:57:44.164418 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 18:57:44.165104 Not decompressing ramdisk as can be used compressed.
20 18:57:44.165573 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 18:57:44.165851 saving as /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/ramdisk/initrd.cpio.gz
22 18:57:44.166137 total size: 5628140 (5 MB)
23 18:57:44.200499 progress 0 % (0 MB)
24 18:57:44.204676 progress 5 % (0 MB)
25 18:57:44.208733 progress 10 % (0 MB)
26 18:57:44.212336 progress 15 % (0 MB)
27 18:57:44.216375 progress 20 % (1 MB)
28 18:57:44.219959 progress 25 % (1 MB)
29 18:57:44.223951 progress 30 % (1 MB)
30 18:57:44.227898 progress 35 % (1 MB)
31 18:57:44.231456 progress 40 % (2 MB)
32 18:57:44.235393 progress 45 % (2 MB)
33 18:57:44.238951 progress 50 % (2 MB)
34 18:57:44.242870 progress 55 % (2 MB)
35 18:57:44.246809 progress 60 % (3 MB)
36 18:57:44.250318 progress 65 % (3 MB)
37 18:57:44.254208 progress 70 % (3 MB)
38 18:57:44.257715 progress 75 % (4 MB)
39 18:57:44.261660 progress 80 % (4 MB)
40 18:57:44.265195 progress 85 % (4 MB)
41 18:57:44.269116 progress 90 % (4 MB)
42 18:57:44.272842 progress 95 % (5 MB)
43 18:57:44.276059 progress 100 % (5 MB)
44 18:57:44.276694 5 MB downloaded in 0.11 s (48.56 MB/s)
45 18:57:44.277227 end: 1.1.1 http-download (duration 00:00:00) [common]
47 18:57:44.278098 end: 1.1 download-retry (duration 00:00:00) [common]
48 18:57:44.278386 start: 1.2 download-retry (timeout 00:10:00) [common]
49 18:57:44.278654 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 18:57:44.279120 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/kernel/Image
51 18:57:44.279376 saving as /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/kernel/Image
52 18:57:44.279584 total size: 45713920 (43 MB)
53 18:57:44.279792 No compression specified
54 18:57:44.314220 progress 0 % (0 MB)
55 18:57:44.342676 progress 5 % (2 MB)
56 18:57:44.371088 progress 10 % (4 MB)
57 18:57:44.400693 progress 15 % (6 MB)
58 18:57:44.430288 progress 20 % (8 MB)
59 18:57:44.459493 progress 25 % (10 MB)
60 18:57:44.489174 progress 30 % (13 MB)
61 18:57:44.520415 progress 35 % (15 MB)
62 18:57:44.552732 progress 40 % (17 MB)
63 18:57:44.581456 progress 45 % (19 MB)
64 18:57:44.610894 progress 50 % (21 MB)
65 18:57:44.639500 progress 55 % (24 MB)
66 18:57:44.668332 progress 60 % (26 MB)
67 18:57:44.696890 progress 65 % (28 MB)
68 18:57:44.725766 progress 70 % (30 MB)
69 18:57:44.755344 progress 75 % (32 MB)
70 18:57:44.784825 progress 80 % (34 MB)
71 18:57:44.813283 progress 85 % (37 MB)
72 18:57:44.842489 progress 90 % (39 MB)
73 18:57:44.871069 progress 95 % (41 MB)
74 18:57:44.900054 progress 100 % (43 MB)
75 18:57:44.900578 43 MB downloaded in 0.62 s (70.21 MB/s)
76 18:57:44.901055 end: 1.2.1 http-download (duration 00:00:01) [common]
78 18:57:44.901898 end: 1.2 download-retry (duration 00:00:01) [common]
79 18:57:44.902174 start: 1.3 download-retry (timeout 00:09:59) [common]
80 18:57:44.902441 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 18:57:44.902914 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 18:57:44.903192 saving as /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 18:57:44.903400 total size: 53209 (0 MB)
84 18:57:44.903610 No compression specified
85 18:57:44.950891 progress 61 % (0 MB)
86 18:57:44.952310 progress 100 % (0 MB)
87 18:57:44.953004 0 MB downloaded in 0.05 s (1.02 MB/s)
88 18:57:44.953502 end: 1.3.1 http-download (duration 00:00:00) [common]
90 18:57:44.954312 end: 1.3 download-retry (duration 00:00:00) [common]
91 18:57:44.954578 start: 1.4 download-retry (timeout 00:09:59) [common]
92 18:57:44.954842 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 18:57:44.955301 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 18:57:44.955544 saving as /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/nfsrootfs/full.rootfs.tar
95 18:57:44.955749 total size: 474398908 (452 MB)
96 18:57:44.955957 Using unxz to decompress xz
97 18:57:44.992213 progress 0 % (0 MB)
98 18:57:46.191025 progress 5 % (22 MB)
99 18:57:47.687151 progress 10 % (45 MB)
100 18:57:48.155126 progress 15 % (67 MB)
101 18:57:48.943866 progress 20 % (90 MB)
102 18:57:49.513886 progress 25 % (113 MB)
103 18:57:49.905072 progress 30 % (135 MB)
104 18:57:50.528836 progress 35 % (158 MB)
105 18:57:51.442728 progress 40 % (181 MB)
106 18:57:52.272139 progress 45 % (203 MB)
107 18:57:52.825459 progress 50 % (226 MB)
108 18:57:53.480224 progress 55 % (248 MB)
109 18:57:54.691779 progress 60 % (271 MB)
110 18:57:56.102617 progress 65 % (294 MB)
111 18:57:57.700281 progress 70 % (316 MB)
112 18:58:00.833422 progress 75 % (339 MB)
113 18:58:03.270086 progress 80 % (361 MB)
114 18:58:06.199335 progress 85 % (384 MB)
115 18:58:09.366408 progress 90 % (407 MB)
116 18:58:12.545288 progress 95 % (429 MB)
117 18:58:15.746754 progress 100 % (452 MB)
118 18:58:15.761259 452 MB downloaded in 30.81 s (14.69 MB/s)
119 18:58:15.761943 end: 1.4.1 http-download (duration 00:00:31) [common]
121 18:58:15.762798 end: 1.4 download-retry (duration 00:00:31) [common]
122 18:58:15.763071 start: 1.5 download-retry (timeout 00:09:28) [common]
123 18:58:15.763341 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 18:58:15.763858 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-239-gba19e4550e25a/arm64/defconfig/gcc-12/modules.tar.xz
125 18:58:15.764332 saving as /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/modules/modules.tar
126 18:58:15.764825 total size: 11601668 (11 MB)
127 18:58:15.765296 Using unxz to decompress xz
128 18:58:15.808508 progress 0 % (0 MB)
129 18:58:15.877274 progress 5 % (0 MB)
130 18:58:15.956607 progress 10 % (1 MB)
131 18:58:16.058179 progress 15 % (1 MB)
132 18:58:16.150217 progress 20 % (2 MB)
133 18:58:16.230415 progress 25 % (2 MB)
134 18:58:16.305945 progress 30 % (3 MB)
135 18:58:16.380211 progress 35 % (3 MB)
136 18:58:16.458014 progress 40 % (4 MB)
137 18:58:16.536380 progress 45 % (5 MB)
138 18:58:16.623132 progress 50 % (5 MB)
139 18:58:16.703458 progress 55 % (6 MB)
140 18:58:16.791105 progress 60 % (6 MB)
141 18:58:16.873384 progress 65 % (7 MB)
142 18:58:16.951186 progress 70 % (7 MB)
143 18:58:17.034610 progress 75 % (8 MB)
144 18:58:17.123158 progress 80 % (8 MB)
145 18:58:17.199286 progress 85 % (9 MB)
146 18:58:17.281866 progress 90 % (9 MB)
147 18:58:17.359546 progress 95 % (10 MB)
148 18:58:17.436889 progress 100 % (11 MB)
149 18:58:17.448239 11 MB downloaded in 1.68 s (6.57 MB/s)
150 18:58:17.449914 end: 1.5.1 http-download (duration 00:00:02) [common]
152 18:58:17.453239 end: 1.5 download-retry (duration 00:00:02) [common]
153 18:58:17.454307 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 18:58:17.455376 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 18:58:33.193616 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953538/extract-nfsrootfs-smwk3h9n
156 18:58:33.194223 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 18:58:33.194513 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 18:58:33.195131 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij
159 18:58:33.195578 makedir: /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin
160 18:58:33.195951 makedir: /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/tests
161 18:58:33.196300 makedir: /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/results
162 18:58:33.196643 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-add-keys
163 18:58:33.197187 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-add-sources
164 18:58:33.197696 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-background-process-start
165 18:58:33.198190 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-background-process-stop
166 18:58:33.198713 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-common-functions
167 18:58:33.199202 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-echo-ipv4
168 18:58:33.199678 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-install-packages
169 18:58:33.200189 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-installed-packages
170 18:58:33.200666 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-os-build
171 18:58:33.201131 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-probe-channel
172 18:58:33.201602 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-probe-ip
173 18:58:33.202068 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-target-ip
174 18:58:33.202529 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-target-mac
175 18:58:33.202994 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-target-storage
176 18:58:33.203504 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-case
177 18:58:33.204042 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-event
178 18:58:33.204612 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-feedback
179 18:58:33.205096 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-raise
180 18:58:33.205568 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-reference
181 18:58:33.206040 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-runner
182 18:58:33.206511 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-set
183 18:58:33.206977 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-test-shell
184 18:58:33.207486 Updating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-install-packages (oe)
185 18:58:33.208047 Updating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/bin/lava-installed-packages (oe)
186 18:58:33.208494 Creating /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/environment
187 18:58:33.208863 LAVA metadata
188 18:58:33.209116 - LAVA_JOB_ID=953538
189 18:58:33.209328 - LAVA_DISPATCHER_IP=192.168.6.2
190 18:58:33.209680 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 18:58:33.210619 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 18:58:33.210926 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 18:58:33.211135 skipped lava-vland-overlay
194 18:58:33.211375 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 18:58:33.211628 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 18:58:33.211843 skipped lava-multinode-overlay
197 18:58:33.212113 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 18:58:33.212366 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 18:58:33.212615 Loading test definitions
200 18:58:33.212894 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 18:58:33.213113 Using /lava-953538 at stage 0
202 18:58:33.214229 uuid=953538_1.6.2.4.1 testdef=None
203 18:58:33.214528 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 18:58:33.214789 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 18:58:33.216529 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 18:58:33.217319 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 18:58:33.219435 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 18:58:33.220320 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 18:58:33.222353 runner path: /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 953538_1.6.2.4.1
212 18:58:33.222891 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 18:58:33.223644 Creating lava-test-runner.conf files
215 18:58:33.223842 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953538/lava-overlay-zcu7k0ij/lava-953538/0 for stage 0
216 18:58:33.224194 - 0_v4l2-decoder-conformance-h265
217 18:58:33.224531 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 18:58:33.224801 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 18:58:33.245932 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 18:58:33.246271 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 18:58:33.246527 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 18:58:33.246787 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 18:58:33.247045 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 18:58:33.853662 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 18:58:33.854245 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 18:58:33.854579 extracting modules file /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953538/extract-nfsrootfs-smwk3h9n
227 18:58:35.488137 extracting modules file /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk
228 18:58:37.160687 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 18:58:37.161263 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 18:58:37.161617 [common] Applying overlay to NFS
231 18:58:37.161895 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953538/compress-overlay-0dt33slx/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953538/extract-nfsrootfs-smwk3h9n
232 18:58:37.196927 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 18:58:37.197372 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 18:58:37.197730 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 18:58:37.198024 Converting downloaded kernel to a uImage
236 18:58:37.198423 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/kernel/Image /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/kernel/uImage
237 18:58:37.680622 output: Image Name:
238 18:58:37.681046 output: Created: Thu Nov 7 18:58:37 2024
239 18:58:37.681274 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 18:58:37.681489 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 18:58:37.681698 output: Load Address: 01080000
242 18:58:37.681901 output: Entry Point: 01080000
243 18:58:37.682103 output:
244 18:58:37.682443 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 18:58:37.682724 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 18:58:37.683021 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 18:58:37.683308 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 18:58:37.683583 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 18:58:37.683848 Building ramdisk /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk
250 18:58:39.796741 >> 166792 blocks
251 18:58:47.537031 Adding RAMdisk u-boot header.
252 18:58:47.537744 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk.cpio.gz.uboot
253 18:58:47.778050 output: Image Name:
254 18:58:47.778458 output: Created: Thu Nov 7 18:58:47 2024
255 18:58:47.778672 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 18:58:47.778877 output: Data Size: 23432087 Bytes = 22882.90 KiB = 22.35 MiB
257 18:58:47.779077 output: Load Address: 00000000
258 18:58:47.779276 output: Entry Point: 00000000
259 18:58:47.779471 output:
260 18:58:47.780255 rename /var/lib/lava/dispatcher/tmp/953538/extract-overlay-ramdisk-5w1l77vp/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
261 18:58:47.781045 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 18:58:47.781646 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 18:58:47.782224 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 18:58:47.782725 No LXC device requested
265 18:58:47.783274 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 18:58:47.783828 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 18:58:47.784412 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 18:58:47.784866 Checking files for TFTP limit of 4294967296 bytes.
269 18:58:47.787759 end: 1 tftp-deploy (duration 00:01:04) [common]
270 18:58:47.788428 start: 2 uboot-action (timeout 00:05:00) [common]
271 18:58:47.789007 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 18:58:47.789552 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 18:58:47.790105 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 18:58:47.790676 Using kernel file from prepare-kernel: 953538/tftp-deploy-wkl31htj/kernel/uImage
275 18:58:47.791362 substitutions:
276 18:58:47.791811 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 18:58:47.792281 - {DTB_ADDR}: 0x01070000
278 18:58:47.792719 - {DTB}: 953538/tftp-deploy-wkl31htj/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 18:58:47.793154 - {INITRD}: 953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
280 18:58:47.793589 - {KERNEL_ADDR}: 0x01080000
281 18:58:47.794017 - {KERNEL}: 953538/tftp-deploy-wkl31htj/kernel/uImage
282 18:58:47.794447 - {LAVA_MAC}: None
283 18:58:47.794913 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953538/extract-nfsrootfs-smwk3h9n
284 18:58:47.795351 - {NFS_SERVER_IP}: 192.168.6.2
285 18:58:47.795780 - {PRESEED_CONFIG}: None
286 18:58:47.796244 - {PRESEED_LOCAL}: None
287 18:58:47.796671 - {RAMDISK_ADDR}: 0x08000000
288 18:58:47.797095 - {RAMDISK}: 953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
289 18:58:47.797519 - {ROOT_PART}: None
290 18:58:47.797941 - {ROOT}: None
291 18:58:47.798365 - {SERVER_IP}: 192.168.6.2
292 18:58:47.798791 - {TEE_ADDR}: 0x83000000
293 18:58:47.799212 - {TEE}: None
294 18:58:47.799633 Parsed boot commands:
295 18:58:47.800069 - setenv autoload no
296 18:58:47.800496 - setenv initrd_high 0xffffffff
297 18:58:47.800920 - setenv fdt_high 0xffffffff
298 18:58:47.801341 - dhcp
299 18:58:47.801761 - setenv serverip 192.168.6.2
300 18:58:47.802181 - tftpboot 0x01080000 953538/tftp-deploy-wkl31htj/kernel/uImage
301 18:58:47.802602 - tftpboot 0x08000000 953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
302 18:58:47.803024 - tftpboot 0x01070000 953538/tftp-deploy-wkl31htj/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 18:58:47.803447 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953538/extract-nfsrootfs-smwk3h9n,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 18:58:47.803882 - bootm 0x01080000 0x08000000 0x01070000
305 18:58:47.804451 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 18:58:47.806085 start: 2.3 connect-device (timeout 00:05:00) [common]
308 18:58:47.806543 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 18:58:47.821946 Setting prompt string to ['lava-test: # ']
310 18:58:47.823551 end: 2.3 connect-device (duration 00:00:00) [common]
311 18:58:47.824243 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 18:58:47.824844 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 18:58:47.825424 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 18:58:47.826658 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 18:58:47.861920 >> OK - accepted request
316 18:58:47.864044 Returned 0 in 0 seconds
317 18:58:47.965252 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 18:58:47.967001 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 18:58:47.967637 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 18:58:47.968259 Setting prompt string to ['Hit any key to stop autoboot']
322 18:58:47.968771 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 18:58:47.970469 Trying 192.168.56.21...
324 18:58:47.970993 Connected to conserv1.
325 18:58:47.971456 Escape character is '^]'.
326 18:58:47.971912
327 18:58:47.972403 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 18:58:47.972864
329 18:58:55.352871 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 18:58:55.353521 bl2_stage_init 0x01
331 18:58:55.354006 bl2_stage_init 0x81
332 18:58:55.358423 hw id: 0x0000 - pwm id 0x01
333 18:58:55.358923 bl2_stage_init 0xc1
334 18:58:55.362825 bl2_stage_init 0x02
335 18:58:55.363307
336 18:58:55.363767 L0:00000000
337 18:58:55.364334 L1:00000703
338 18:58:55.364791 L2:00008067
339 18:58:55.368384 L3:15000000
340 18:58:55.368860 S1:00000000
341 18:58:55.369322 B2:20282000
342 18:58:55.369781 B1:a0f83180
343 18:58:55.370226
344 18:58:55.370669 TE: 71928
345 18:58:55.371111
346 18:58:55.379537 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 18:58:55.380054
348 18:58:55.380519 Board ID = 1
349 18:58:55.380966 Set cpu clk to 24M
350 18:58:55.381407 Set clk81 to 24M
351 18:58:55.385241 Use GP1_pll as DSU clk.
352 18:58:55.385732 DSU clk: 1200 Mhz
353 18:58:55.386186 CPU clk: 1200 MHz
354 18:58:55.390728 Set clk81 to 166.6M
355 18:58:55.396368 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 18:58:55.396846 board id: 1
357 18:58:55.404804 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 18:58:55.415434 fw parse done
359 18:58:55.421446 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 18:58:55.464095 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 18:58:55.474950 PIEI prepare done
362 18:58:55.475430 fastboot data load
363 18:58:55.475884 fastboot data verify
364 18:58:55.480525 verify result: 266
365 18:58:55.486169 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 18:58:55.486643 LPDDR4 probe
367 18:58:55.487093 ddr clk to 1584MHz
368 18:58:55.494173 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 18:58:55.531365
370 18:58:55.531867 dmc_version 0001
371 18:58:55.538084 Check phy result
372 18:58:55.543966 INFO : End of CA training
373 18:58:55.544487 INFO : End of initialization
374 18:58:55.549555 INFO : Training has run successfully!
375 18:58:55.550033 Check phy result
376 18:58:55.555167 INFO : End of initialization
377 18:58:55.555644 INFO : End of read enable training
378 18:58:55.560740 INFO : End of fine write leveling
379 18:58:55.566377 INFO : End of Write leveling coarse delay
380 18:58:55.566864 INFO : Training has run successfully!
381 18:58:55.567315 Check phy result
382 18:58:55.572004 INFO : End of initialization
383 18:58:55.572483 INFO : End of read dq deskew training
384 18:58:55.577574 INFO : End of MPR read delay center optimization
385 18:58:55.583244 INFO : End of write delay center optimization
386 18:58:55.588780 INFO : End of read delay center optimization
387 18:58:55.589251 INFO : End of max read latency training
388 18:58:55.594373 INFO : Training has run successfully!
389 18:58:55.594840 1D training succeed
390 18:58:55.603600 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 18:58:55.651145 Check phy result
392 18:58:55.651629 INFO : End of initialization
393 18:58:55.673495 INFO : End of 2D read delay Voltage center optimization
394 18:58:55.692672 INFO : End of 2D read delay Voltage center optimization
395 18:58:55.744531 INFO : End of 2D write delay Voltage center optimization
396 18:58:55.793731 INFO : End of 2D write delay Voltage center optimization
397 18:58:55.799351 INFO : Training has run successfully!
398 18:58:55.799833
399 18:58:55.800354 channel==0
400 18:58:55.804938 RxClkDly_Margin_A0==78 ps 8
401 18:58:55.805408 TxDqDly_Margin_A0==88 ps 9
402 18:58:55.808212 RxClkDly_Margin_A1==88 ps 9
403 18:58:55.808682 TxDqDly_Margin_A1==98 ps 10
404 18:58:55.813712 TrainedVREFDQ_A0==74
405 18:58:55.814189 TrainedVREFDQ_A1==75
406 18:58:55.814642 VrefDac_Margin_A0==24
407 18:58:55.819387 DeviceVref_Margin_A0==40
408 18:58:55.819854 VrefDac_Margin_A1==22
409 18:58:55.824993 DeviceVref_Margin_A1==39
410 18:58:55.825468
411 18:58:55.825919
412 18:58:55.826366 channel==1
413 18:58:55.826806 RxClkDly_Margin_A0==78 ps 8
414 18:58:55.830581 TxDqDly_Margin_A0==98 ps 10
415 18:58:55.831057 RxClkDly_Margin_A1==88 ps 9
416 18:58:55.836207 TxDqDly_Margin_A1==88 ps 9
417 18:58:55.836675 TrainedVREFDQ_A0==78
418 18:58:55.837122 TrainedVREFDQ_A1==75
419 18:58:55.841785 VrefDac_Margin_A0==23
420 18:58:55.842256 DeviceVref_Margin_A0==36
421 18:58:55.847367 VrefDac_Margin_A1==20
422 18:58:55.847832 DeviceVref_Margin_A1==39
423 18:58:55.848310
424 18:58:55.852992 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 18:58:55.853463
426 18:58:55.880890 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 18:58:55.886466 2D training succeed
428 18:58:55.892110 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 18:58:55.892587 auto size-- 65535DDR cs0 size: 2048MB
430 18:58:55.897668 DDR cs1 size: 2048MB
431 18:58:55.898140 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 18:58:55.903252 cs0 DataBus test pass
433 18:58:55.903716 cs1 DataBus test pass
434 18:58:55.904209 cs0 AddrBus test pass
435 18:58:55.908852 cs1 AddrBus test pass
436 18:58:55.909320
437 18:58:55.909769 100bdlr_step_size ps== 478
438 18:58:55.910221 result report
439 18:58:55.914458 boot times 0Enable ddr reg access
440 18:58:55.922015 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 18:58:55.935841 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 18:58:56.590849 bl2z: ptr: 05129330, size: 00001e40
443 18:58:56.598032 0.0;M3 CHK:0;cm4_sp_mode 0
444 18:58:56.598529 MVN_1=0x00000000
445 18:58:56.598979 MVN_2=0x00000000
446 18:58:56.609518 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 18:58:56.609996 OPS=0x04
448 18:58:56.610448 ring efuse init
449 18:58:56.615148 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 18:58:56.615630 [0.017320 Inits done]
451 18:58:56.616139 secure task start!
452 18:58:56.622957 high task start!
453 18:58:56.623434 low task start!
454 18:58:56.623886 run into bl31
455 18:58:56.631576 NOTICE: BL31: v1.3(release):4fc40b1
456 18:58:56.639385 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 18:58:56.639881 NOTICE: BL31: G12A normal boot!
458 18:58:56.654901 NOTICE: BL31: BL33 decompress pass
459 18:58:56.660573 ERROR: Error initializing runtime service opteed_fast
460 18:58:57.900881 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 18:58:57.901520 bl2_stage_init 0x01
462 18:58:57.901980 bl2_stage_init 0x81
463 18:58:57.906455 hw id: 0x0000 - pwm id 0x01
464 18:58:57.906934 bl2_stage_init 0xc1
465 18:58:57.912106 bl2_stage_init 0x02
466 18:58:57.912608
467 18:58:57.913064 L0:00000000
468 18:58:57.913507 L1:00000703
469 18:58:57.913954 L2:00008067
470 18:58:57.914392 L3:15000000
471 18:58:57.917662 S1:00000000
472 18:58:57.918132 B2:20282000
473 18:58:57.918573 B1:a0f83180
474 18:58:57.919011
475 18:58:57.919452 TE: 68678
476 18:58:57.919893
477 18:58:57.923329 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 18:58:57.923804
479 18:58:57.928836 Board ID = 1
480 18:58:57.929307 Set cpu clk to 24M
481 18:58:57.929754 Set clk81 to 24M
482 18:58:57.934433 Use GP1_pll as DSU clk.
483 18:58:57.934902 DSU clk: 1200 Mhz
484 18:58:57.935346 CPU clk: 1200 MHz
485 18:58:57.940067 Set clk81 to 166.6M
486 18:58:57.945647 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 18:58:57.946119 board id: 1
488 18:58:57.952803 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 18:58:57.963498 fw parse done
490 18:58:57.969443 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 18:58:58.012097 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 18:58:58.023122 PIEI prepare done
493 18:58:58.023670 fastboot data load
494 18:58:58.024164 fastboot data verify
495 18:58:58.028665 verify result: 266
496 18:58:58.034285 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 18:58:58.034754 LPDDR4 probe
498 18:58:58.035188 ddr clk to 1584MHz
499 18:58:59.400151 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd00p SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 18:58:59.400814 bl2_stage_init 0x01
501 18:58:59.401283 bl2_stage_init 0x81
502 18:58:59.405630 hw id: 0x0000 - pwm id 0x01
503 18:58:59.406118 bl2_stage_init 0xc1
504 18:58:59.411212 bl2_stage_init 0x02
505 18:58:59.411691
506 18:58:59.412206 L0:00000000
507 18:58:59.412658 L1:00000703
508 18:58:59.413098 L2:00008067
509 18:58:59.413539 L3:15000000
510 18:58:59.416854 S1:00000000
511 18:58:59.417350 B2:20282000
512 18:58:59.417802 B1:a0f83180
513 18:58:59.418241
514 18:58:59.418682 TE: 69548
515 18:58:59.419122
516 18:58:59.422405 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 18:58:59.422887
518 18:58:59.428025 Board ID = 1
519 18:58:59.428503 Set cpu clk to 24M
520 18:58:59.428949 Set clk81 to 24M
521 18:58:59.433637 Use GP1_pll as DSU clk.
522 18:58:59.434108 DSU clk: 1200 Mhz
523 18:58:59.434551 CPU clk: 1200 MHz
524 18:58:59.439227 Set clk81 to 166.6M
525 18:58:59.444842 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 18:58:59.445355 board id: 1
527 18:58:59.452040 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 18:58:59.462675 fw parse done
529 18:58:59.468649 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 18:58:59.511283 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 18:58:59.522256 PIEI prepare done
532 18:58:59.522746 fastboot data load
533 18:58:59.523198 fastboot data verify
534 18:58:59.527853 verify result: 266
535 18:58:59.533430 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 18:58:59.533929 LPDDR4 probe
537 18:58:59.534379 ddr clk to 1584MHz
538 18:58:59.541432 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 18:58:59.578704
540 18:58:59.579208 dmc_version 0001
541 18:58:59.585347 Check phy result
542 18:58:59.591252 INFO : End of CA training
543 18:58:59.591724 INFO : End of initialization
544 18:58:59.596877 INFO : Training has run successfully!
545 18:58:59.597346 Check phy result
546 18:58:59.602473 INFO : End of initialization
547 18:58:59.602942 INFO : End of read enable training
548 18:58:59.608052 INFO : End of fine write leveling
549 18:58:59.613673 INFO : End of Write leveling coarse delay
550 18:58:59.614142 INFO : Training has run successfully!
551 18:58:59.614594 Check phy result
552 18:58:59.619268 INFO : End of initialization
553 18:58:59.619742 INFO : End of read dq deskew training
554 18:58:59.624857 INFO : End of MPR read delay center optimization
555 18:58:59.630506 INFO : End of write delay center optimization
556 18:58:59.636082 INFO : End of read delay center optimization
557 18:58:59.636600 INFO : End of max read latency training
558 18:58:59.641682 INFO : Training has run successfully!
559 18:58:59.642159 1D training succeed
560 18:58:59.650865 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 18:58:59.698408 Check phy result
562 18:58:59.698895 INFO : End of initialization
563 18:58:59.720775 INFO : End of 2D read delay Voltage center optimization
564 18:58:59.739921 INFO : End of 2D read delay Voltage center optimization
565 18:58:59.791797 INFO : End of 2D write delay Voltage center optimization
566 18:58:59.841009 INFO : End of 2D write delay Voltage center optimization
567 18:58:59.846651 INFO : Training has run successfully!
568 18:58:59.847124
569 18:58:59.847574 channel==0
570 18:58:59.852222 RxClkDly_Margin_A0==78 ps 8
571 18:58:59.852693 TxDqDly_Margin_A0==98 ps 10
572 18:58:59.857777 RxClkDly_Margin_A1==88 ps 9
573 18:58:59.858244 TxDqDly_Margin_A1==98 ps 10
574 18:58:59.858693 TrainedVREFDQ_A0==74
575 18:58:59.864142 TrainedVREFDQ_A1==75
576 18:58:59.864629 VrefDac_Margin_A0==24
577 18:58:59.865071 DeviceVref_Margin_A0==40
578 18:58:59.868980 VrefDac_Margin_A1==23
579 18:58:59.869447 DeviceVref_Margin_A1==39
580 18:58:59.869894
581 18:58:59.870337
582 18:58:59.874657 channel==1
583 18:58:59.875128 RxClkDly_Margin_A0==88 ps 9
584 18:58:59.875571 TxDqDly_Margin_A0==88 ps 9
585 18:58:59.880215 RxClkDly_Margin_A1==78 ps 8
586 18:58:59.880683 TxDqDly_Margin_A1==88 ps 9
587 18:58:59.885782 TrainedVREFDQ_A0==75
588 18:58:59.886261 TrainedVREFDQ_A1==75
589 18:58:59.886713 VrefDac_Margin_A0==23
590 18:58:59.891374 DeviceVref_Margin_A0==39
591 18:58:59.891850 VrefDac_Margin_A1==20
592 18:58:59.896972 DeviceVref_Margin_A1==39
593 18:58:59.897448
594 18:58:59.897894 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 18:58:59.898340
596 18:58:59.930665 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000016 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
597 18:58:59.931168 2D training succeed
598 18:58:59.936211 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 18:58:59.941779 auto size-- 65535DDR cs0 size: 2048MB
600 18:58:59.942249 DDR cs1 size: 2048MB
601 18:58:59.947371 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 18:58:59.947843 cs0 DataBus test pass
603 18:58:59.952966 cs1 DataBus test pass
604 18:58:59.953449 cs0 AddrBus test pass
605 18:58:59.953898 cs1 AddrBus test pass
606 18:58:59.954340
607 18:58:59.958656 100bdlr_step_size ps== 478
608 18:58:59.959140 result report
609 18:58:59.964204 boot times 0Enable ddr reg access
610 18:58:59.969363 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 18:58:59.983190 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 18:59:00.637714 bl2z: ptr: 05129330, size: 00001e40
613 18:59:00.643881 0.0;M3 CHK:0;cm4_sp_mode 0
614 18:59:00.644453 MVN_1=0x00000000
615 18:59:00.644921 MVN_2=0x00000000
616 18:59:00.655339 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 18:59:00.655835 OPS=0x04
618 18:59:00.656317 ring efuse init
619 18:59:00.660994 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 18:59:00.661484 [0.017310 Inits done]
621 18:59:00.661933 secure task start!
622 18:59:00.668824 high task start!
623 18:59:00.669310 low task start!
624 18:59:00.669760 run into bl31
625 18:59:00.677413 NOTICE: BL31: v1.3(release):4fc40b1
626 18:59:00.685196 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 18:59:00.685677 NOTICE: BL31: G12A normal boot!
628 18:59:00.700737 NOTICE: BL31: BL33 decompress pass
629 18:59:00.706419 ERROR: Error initializing runtime service opteed_fast
630 18:59:01.949272 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 18:59:01.949891 bl2_stage_init 0x01
632 18:59:01.950351 bl2_stage_init 0x81
633 18:59:01.954876 hw id: 0x0000 - pwm id 0x01
634 18:59:01.955352 bl2_stage_init 0xc1
635 18:59:01.960414 bl2_stage_init 0x02
636 18:59:01.960892
637 18:59:01.961350 L0:00000000
638 18:59:01.961792 L1:00000703
639 18:59:01.962233 L2:00008067
640 18:59:01.962673 L3:15000000
641 18:59:01.966050 S1:00000000
642 18:59:01.966523 B2:20282000
643 18:59:01.966970 B1:a0f83180
644 18:59:01.967411
645 18:59:01.967854 TE: 68262
646 18:59:01.968330
647 18:59:01.971642 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 18:59:01.972146
649 18:59:01.977163 Board ID = 1
650 18:59:01.977631 Set cpu clk to 24M
651 18:59:01.978077 Set clk81 to 24M
652 18:59:01.982747 Use GP1_pll as DSU clk.
653 18:59:01.983217 DSU clk: 1200 Mhz
654 18:59:01.983661 CPU clk: 1200 MHz
655 18:59:01.988331 Set clk81 to 166.6M
656 18:59:01.993909 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 18:59:01.994383 board id: 1
658 18:59:02.001179 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 18:59:02.011792 fw parse done
660 18:59:02.017788 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 18:59:02.060435 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 18:59:02.071382 PIEI prepare done
663 18:59:02.071859 fastboot data load
664 18:59:02.072356 fastboot data verify
665 18:59:02.076991 verify result: 266
666 18:59:02.082539 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 18:59:02.083011 LPDDR4 probe
668 18:59:02.083457 ddr clk to 1584MHz
669 18:59:02.090548 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 18:59:02.127785
671 18:59:02.128291 dmc_version 0001
672 18:59:02.134479 Check phy result
673 18:59:02.140372 INFO : End of CA training
674 18:59:02.140845 INFO : End of initialization
675 18:59:02.146012 INFO : Training has run successfully!
676 18:59:02.146483 Check phy result
677 18:59:02.151575 INFO : End of initialization
678 18:59:02.152069 INFO : End of read enable training
679 18:59:02.157148 INFO : End of fine write leveling
680 18:59:02.162761 INFO : End of Write leveling coarse delay
681 18:59:02.163233 INFO : Training has run successfully!
682 18:59:02.163680 Check phy result
683 18:59:02.168379 INFO : End of initialization
684 18:59:02.168858 INFO : End of read dq deskew training
685 18:59:02.173983 INFO : End of MPR read delay center optimization
686 18:59:02.179551 INFO : End of write delay center optimization
687 18:59:02.185158 INFO : End of read delay center optimization
688 18:59:02.185634 INFO : End of max read latency training
689 18:59:02.190755 INFO : Training has run successfully!
690 18:59:02.191225 1D training succeed
691 18:59:02.200011 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 18:59:02.247538 Check phy result
693 18:59:02.248041 INFO : End of initialization
694 18:59:02.269900 INFO : End of 2D read delay Voltage center optimization
695 18:59:02.289159 INFO : End of 2D read delay Voltage center optimization
696 18:59:02.340944 INFO : End of 2D write delay Voltage center optimization
697 18:59:02.390291 INFO : End of 2D write delay Voltage center optimization
698 18:59:02.395705 INFO : Training has run successfully!
699 18:59:02.396227
700 18:59:02.396685 channel==0
701 18:59:02.401380 RxClkDly_Margin_A0==78 ps 8
702 18:59:02.401851 TxDqDly_Margin_A0==98 ps 10
703 18:59:02.406880 RxClkDly_Margin_A1==69 ps 7
704 18:59:02.407360 TxDqDly_Margin_A1==88 ps 9
705 18:59:02.407812 TrainedVREFDQ_A0==74
706 18:59:02.412494 TrainedVREFDQ_A1==74
707 18:59:02.412976 VrefDac_Margin_A0==23
708 18:59:02.413425 DeviceVref_Margin_A0==40
709 18:59:02.418201 VrefDac_Margin_A1==23
710 18:59:02.418698 DeviceVref_Margin_A1==40
711 18:59:02.419146
712 18:59:02.419592
713 18:59:02.420069 channel==1
714 18:59:02.423759 RxClkDly_Margin_A0==78 ps 8
715 18:59:02.424267 TxDqDly_Margin_A0==98 ps 10
716 18:59:02.429380 RxClkDly_Margin_A1==78 ps 8
717 18:59:02.429849 TxDqDly_Margin_A1==88 ps 9
718 18:59:02.434876 TrainedVREFDQ_A0==78
719 18:59:02.435346 TrainedVREFDQ_A1==75
720 18:59:02.435793 VrefDac_Margin_A0==23
721 18:59:02.440475 DeviceVref_Margin_A0==36
722 18:59:02.440944 VrefDac_Margin_A1==22
723 18:59:02.446143 DeviceVref_Margin_A1==39
724 18:59:02.446650
725 18:59:02.447107 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 18:59:02.447556
727 18:59:02.479828 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000060
728 18:59:02.480710 2D training succeed
729 18:59:02.485581 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 18:59:02.490992 auto size-- 65535DDR cs0 size: 2048MB
731 18:59:02.491759 DDR cs1 size: 2048MB
732 18:59:02.496710 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 18:59:02.497347 cs0 DataBus test pass
734 18:59:02.502276 cs1 DataBus test pass
735 18:59:02.502873 cs0 AddrBus test pass
736 18:59:02.503344 cs1 AddrBus test pass
737 18:59:02.503818
738 18:59:02.507838 100bdlr_step_size ps== 478
739 18:59:02.508473 result report
740 18:59:02.513502 boot times 0Enable ddr reg access
741 18:59:02.518797 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 18:59:02.532425 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 18:59:03.186782 bl2z: ptr: 05129330, size: 00001e40
744 18:59:03.193459 0.0;M3 CHK:0;cm4_sp_mode 0
745 18:59:03.194078 MVN_1=0x00000000
746 18:59:03.194530 MVN_2=0x00000000
747 18:59:03.204870 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 18:59:03.205476 OPS=0x04
749 18:59:03.205929 ring efuse init
750 18:59:03.210512 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 18:59:03.211050 [0.017319 Inits done]
752 18:59:03.211494 secure task start!
753 18:59:03.218040 high task start!
754 18:59:03.218574 low task start!
755 18:59:03.219013 run into bl31
756 18:59:03.226642 NOTICE: BL31: v1.3(release):4fc40b1
757 18:59:03.234510 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 18:59:03.235091 NOTICE: BL31: G12A normal boot!
759 18:59:03.249970 NOTICE: BL31: BL33 decompress pass
760 18:59:03.255702 ERROR: Error initializing runtime service opteed_fast
761 18:59:04.049768
762 18:59:04.050428
763 18:59:04.055164 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 18:59:04.055695
765 18:59:04.058648 Model: Libre Computer AML-S905D3-CC Solitude
766 18:59:04.205499 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 18:59:04.220851 DRAM: 2 GiB (effective 3.8 GiB)
768 18:59:04.321765 Core: 406 devices, 33 uclasses, devicetree: separate
769 18:59:04.327672 WDT: Not starting watchdog@f0d0
770 18:59:04.352714 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 18:59:04.364956 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 18:59:04.369951 ** Bad device specification mmc 0 **
773 18:59:04.380112 Card did not respond to voltage select! : -110
774 18:59:04.387744 ** Bad device specification mmc 0 **
775 18:59:04.388329 Couldn't find partition mmc 0
776 18:59:04.396045 Card did not respond to voltage select! : -110
777 18:59:04.401520 ** Bad device specification mmc 0 **
778 18:59:04.402036 Couldn't find partition mmc 0
779 18:59:04.406593 Error: could not access storage.
780 18:59:04.702952 Net: eth0: ethernet@ff3f0000
781 18:59:04.703586 starting USB...
782 18:59:04.947663 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 18:59:04.948257 Starting the controller
784 18:59:04.954625 USB XHCI 1.10
785 18:59:06.510681 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 18:59:06.518960 scanning usb for storage devices... 0 Storage Device(s) found
788 18:59:06.570702 Hit any key to stop autoboot: 1
789 18:59:06.571839 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 18:59:06.572700 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 18:59:06.573244 Setting prompt string to ['=>']
792 18:59:06.573785 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 18:59:06.584998 0
794 18:59:06.586065 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 18:59:06.687397 => setenv autoload no
797 18:59:06.688378 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 18:59:06.693740 setenv autoload no
800 18:59:06.795287 => setenv initrd_high 0xffffffff
801 18:59:06.796217 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 18:59:06.800424 setenv initrd_high 0xffffffff
804 18:59:06.901935 => setenv fdt_high 0xffffffff
805 18:59:06.902689 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 18:59:06.907902 setenv fdt_high 0xffffffff
808 18:59:07.009516 => dhcp
809 18:59:07.010384 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 18:59:07.014344 dhcp
811 18:59:07.519958 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 18:59:07.520676 Speed: 1000, full duplex
813 18:59:07.521148 BOOTP broadcast 1
814 18:59:07.768241 BOOTP broadcast 2
815 18:59:07.794598 DHCP client bound to address 192.168.6.21 (274 ms)
817 18:59:07.896148 => setenv serverip 192.168.6.2
818 18:59:07.896913 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 18:59:07.902278 setenv serverip 192.168.6.2
821 18:59:08.003840 => tftpboot 0x01080000 953538/tftp-deploy-wkl31htj/kernel/uImage
822 18:59:08.004836 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
823 18:59:08.011464 tftpboot 0x01080000 953538/tftp-deploy-wkl31htj/kernel/uImage
824 18:59:08.012027 Speed: 1000, full duplex
825 18:59:08.012501 Using ethernet@ff3f0000 device
826 18:59:08.016908 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 18:59:08.022578 Filename '953538/tftp-deploy-wkl31htj/kernel/uImage'.
828 18:59:08.026360 Load address: 0x1080000
829 18:59:11.010272 Loading: *################################################## 43.6 MiB
830 18:59:11.010926 14.6 MiB/s
831 18:59:11.011376 done
832 18:59:11.014731 Bytes transferred = 45713984 (2b98a40 hex)
834 18:59:11.116362 => tftpboot 0x08000000 953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
835 18:59:11.117148 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
836 18:59:11.124072 tftpboot 0x08000000 953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot
837 18:59:11.124589 Speed: 1000, full duplex
838 18:59:11.125032 Using ethernet@ff3f0000 device
839 18:59:11.129527 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 18:59:11.139331 Filename '953538/tftp-deploy-wkl31htj/ramdisk/ramdisk.cpio.gz.uboot'.
841 18:59:11.139871 Load address: 0x8000000
842 18:59:12.587632 Loading: *################################################# UDP wrong checksum 00000005 0000fa43
843 18:59:17.588287 T UDP wrong checksum 00000005 0000fa43
844 18:59:27.590278 T T UDP wrong checksum 00000005 0000fa43
845 18:59:40.022204 T T UDP wrong checksum 000000ff 00008061
846 18:59:40.056838 UDP wrong checksum 000000ff 00001a54
847 18:59:47.592472 T UDP wrong checksum 00000005 0000fa43
848 19:00:01.799097 T T T UDP wrong checksum 000000ff 000031c5
849 19:00:01.840080 UDP wrong checksum 000000ff 0000c2b7
850 19:00:07.599042 T
851 19:00:07.599724 Retry count exceeded; starting again
853 19:00:07.601293 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
856 19:00:07.603283 end: 2.4 uboot-commands (duration 00:01:20) [common]
858 19:00:07.604834 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
860 19:00:07.605964 end: 2 uboot-action (duration 00:01:20) [common]
862 19:00:07.607668 Cleaning after the job
863 19:00:07.608319 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/ramdisk
864 19:00:07.609697 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/kernel
865 19:00:07.640061 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/dtb
866 19:00:07.641356 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/nfsrootfs
867 19:00:07.818925 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953538/tftp-deploy-wkl31htj/modules
868 19:00:07.839774 start: 4.1 power-off (timeout 00:00:30) [common]
869 19:00:07.840496 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
870 19:00:07.872063 >> OK - accepted request
871 19:00:07.874412 Returned 0 in 0 seconds
872 19:00:07.975174 end: 4.1 power-off (duration 00:00:00) [common]
874 19:00:07.976175 start: 4.2 read-feedback (timeout 00:10:00) [common]
875 19:00:07.976821 Listened to connection for namespace 'common' for up to 1s
876 19:00:08.977340 Finalising connection for namespace 'common'
877 19:00:08.977825 Disconnecting from shell: Finalise
878 19:00:08.978111 =>
879 19:00:09.078859 end: 4.2 read-feedback (duration 00:00:01) [common]
880 19:00:09.079485 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953538
881 19:00:11.723901 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953538
882 19:00:11.724568 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.