Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:24:40.992400 lava-dispatcher, installed at version: 2024.01
2 17:24:40.993234 start: 0 validate
3 17:24:40.993732 Start time: 2024-11-07 17:24:40.993702+00:00 (UTC)
4 17:24:40.994298 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:24:40.994847 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 17:24:41.032721 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:24:41.033294 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:24:41.060421 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:24:41.061061 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 17:24:42.113454 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:24:42.113962 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 17:24:42.153148 validate duration: 1.16
14 17:24:42.154036 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:24:42.154362 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:24:42.154664 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:24:42.156248 Not decompressing ramdisk as can be used compressed.
18 17:24:42.156922 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 17:24:42.157258 saving as /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/ramdisk/rootfs.cpio.gz
20 17:24:42.157585 total size: 8181887 (7 MB)
21 17:24:42.198736 progress 0 % (0 MB)
22 17:24:42.205647 progress 5 % (0 MB)
23 17:24:42.211692 progress 10 % (0 MB)
24 17:24:42.219292 progress 15 % (1 MB)
25 17:24:42.224993 progress 20 % (1 MB)
26 17:24:42.231089 progress 25 % (1 MB)
27 17:24:42.236676 progress 30 % (2 MB)
28 17:24:42.242624 progress 35 % (2 MB)
29 17:24:42.248277 progress 40 % (3 MB)
30 17:24:42.254359 progress 45 % (3 MB)
31 17:24:42.260011 progress 50 % (3 MB)
32 17:24:42.266182 progress 55 % (4 MB)
33 17:24:42.271744 progress 60 % (4 MB)
34 17:24:42.278039 progress 65 % (5 MB)
35 17:24:42.283751 progress 70 % (5 MB)
36 17:24:42.289799 progress 75 % (5 MB)
37 17:24:42.295812 progress 80 % (6 MB)
38 17:24:42.303566 progress 85 % (6 MB)
39 17:24:42.309326 progress 90 % (7 MB)
40 17:24:42.315497 progress 95 % (7 MB)
41 17:24:42.320948 progress 100 % (7 MB)
42 17:24:42.321884 7 MB downloaded in 0.16 s (47.50 MB/s)
43 17:24:42.322508 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:24:42.323439 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:24:42.323747 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:24:42.324060 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:24:42.324635 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/kernel/Image
49 17:24:42.325014 saving as /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/kernel/Image
50 17:24:42.325244 total size: 45713920 (43 MB)
51 17:24:42.325463 No compression specified
52 17:24:42.365691 progress 0 % (0 MB)
53 17:24:42.395723 progress 5 % (2 MB)
54 17:24:42.424897 progress 10 % (4 MB)
55 17:24:42.454505 progress 15 % (6 MB)
56 17:24:42.485132 progress 20 % (8 MB)
57 17:24:42.514555 progress 25 % (10 MB)
58 17:24:42.544852 progress 30 % (13 MB)
59 17:24:42.573990 progress 35 % (15 MB)
60 17:24:42.603507 progress 40 % (17 MB)
61 17:24:42.632803 progress 45 % (19 MB)
62 17:24:42.662024 progress 50 % (21 MB)
63 17:24:42.691681 progress 55 % (24 MB)
64 17:24:42.720768 progress 60 % (26 MB)
65 17:24:42.750043 progress 65 % (28 MB)
66 17:24:42.779044 progress 70 % (30 MB)
67 17:24:42.808213 progress 75 % (32 MB)
68 17:24:42.837731 progress 80 % (34 MB)
69 17:24:42.866568 progress 85 % (37 MB)
70 17:24:42.896028 progress 90 % (39 MB)
71 17:24:42.925327 progress 95 % (41 MB)
72 17:24:42.953587 progress 100 % (43 MB)
73 17:24:42.954156 43 MB downloaded in 0.63 s (69.32 MB/s)
74 17:24:42.954638 end: 1.2.1 http-download (duration 00:00:01) [common]
76 17:24:42.955444 end: 1.2 download-retry (duration 00:00:01) [common]
77 17:24:42.955720 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:24:42.956003 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:24:42.956594 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 17:24:42.956905 saving as /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 17:24:42.957114 total size: 53209 (0 MB)
82 17:24:42.957322 No compression specified
83 17:24:42.993926 progress 61 % (0 MB)
84 17:24:42.994765 progress 100 % (0 MB)
85 17:24:42.995321 0 MB downloaded in 0.04 s (1.33 MB/s)
86 17:24:42.995784 end: 1.3.1 http-download (duration 00:00:00) [common]
88 17:24:42.996626 end: 1.3 download-retry (duration 00:00:00) [common]
89 17:24:42.996887 start: 1.4 download-retry (timeout 00:09:59) [common]
90 17:24:42.997148 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 17:24:42.997657 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/modules.tar.xz
92 17:24:42.997923 saving as /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/modules/modules.tar
93 17:24:42.998128 total size: 11613380 (11 MB)
94 17:24:42.998337 Using unxz to decompress xz
95 17:24:43.033682 progress 0 % (0 MB)
96 17:24:43.100896 progress 5 % (0 MB)
97 17:24:43.177270 progress 10 % (1 MB)
98 17:24:43.277613 progress 15 % (1 MB)
99 17:24:43.374990 progress 20 % (2 MB)
100 17:24:43.457049 progress 25 % (2 MB)
101 17:24:43.533959 progress 30 % (3 MB)
102 17:24:43.613592 progress 35 % (3 MB)
103 17:24:43.686873 progress 40 % (4 MB)
104 17:24:43.764884 progress 45 % (5 MB)
105 17:24:43.850134 progress 50 % (5 MB)
106 17:24:43.929553 progress 55 % (6 MB)
107 17:24:44.015568 progress 60 % (6 MB)
108 17:24:44.096709 progress 65 % (7 MB)
109 17:24:44.177712 progress 70 % (7 MB)
110 17:24:44.256446 progress 75 % (8 MB)
111 17:24:44.340633 progress 80 % (8 MB)
112 17:24:44.421884 progress 85 % (9 MB)
113 17:24:44.500814 progress 90 % (9 MB)
114 17:24:44.579698 progress 95 % (10 MB)
115 17:24:44.658681 progress 100 % (11 MB)
116 17:24:44.670605 11 MB downloaded in 1.67 s (6.62 MB/s)
117 17:24:44.671204 end: 1.4.1 http-download (duration 00:00:02) [common]
119 17:24:44.672074 end: 1.4 download-retry (duration 00:00:02) [common]
120 17:24:44.672673 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 17:24:44.673244 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 17:24:44.673785 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 17:24:44.674335 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 17:24:44.675506 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz
125 17:24:44.676496 makedir: /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin
126 17:24:44.676934 makedir: /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/tests
127 17:24:44.677272 makedir: /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/results
128 17:24:44.677616 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-add-keys
129 17:24:44.678167 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-add-sources
130 17:24:44.678698 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-background-process-start
131 17:24:44.679234 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-background-process-stop
132 17:24:44.679799 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-common-functions
133 17:24:44.680729 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-echo-ipv4
134 17:24:44.681751 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-install-packages
135 17:24:44.682735 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-installed-packages
136 17:24:44.683714 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-os-build
137 17:24:44.684775 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-probe-channel
138 17:24:44.685767 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-probe-ip
139 17:24:44.686747 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-target-ip
140 17:24:44.687725 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-target-mac
141 17:24:44.688680 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-target-storage
142 17:24:44.689268 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-case
143 17:24:44.689809 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-event
144 17:24:44.690335 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-feedback
145 17:24:44.690843 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-raise
146 17:24:44.691346 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-reference
147 17:24:44.691866 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-runner
148 17:24:44.692802 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-set
149 17:24:44.693782 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-test-shell
150 17:24:44.694769 Updating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-install-packages (oe)
151 17:24:44.695938 Updating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/bin/lava-installed-packages (oe)
152 17:24:44.696942 Creating /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/environment
153 17:24:44.697724 LAVA metadata
154 17:24:44.698256 - LAVA_JOB_ID=954187
155 17:24:44.698730 - LAVA_DISPATCHER_IP=192.168.6.2
156 17:24:44.699460 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 17:24:44.701434 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 17:24:44.702037 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 17:24:44.702447 skipped lava-vland-overlay
160 17:24:44.702930 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 17:24:44.703436 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 17:24:44.703860 skipped lava-multinode-overlay
163 17:24:44.704385 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 17:24:44.704885 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 17:24:44.705358 Loading test definitions
166 17:24:44.705897 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 17:24:44.706332 Using /lava-954187 at stage 0
168 17:24:44.708224 uuid=954187_1.5.2.4.1 testdef=None
169 17:24:44.708565 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 17:24:44.708838 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 17:24:44.710733 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 17:24:44.711541 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 17:24:44.713898 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 17:24:44.714765 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 17:24:44.717056 runner path: /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/0/tests/0_dmesg test_uuid 954187_1.5.2.4.1
178 17:24:44.717653 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 17:24:44.718424 Creating lava-test-runner.conf files
181 17:24:44.718628 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/954187/lava-overlay-2humrdiz/lava-954187/0 for stage 0
182 17:24:44.718984 - 0_dmesg
183 17:24:44.719337 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 17:24:44.719615 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 17:24:44.743895 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 17:24:44.744364 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 17:24:44.744633 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 17:24:44.744899 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 17:24:44.745163 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 17:24:45.678792 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 17:24:45.679268 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 17:24:45.679515 extracting modules file /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk
193 17:24:47.008030 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 17:24:47.008517 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 17:24:47.008795 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954187/compress-overlay-l218bvim/overlay-1.5.2.5.tar.gz to ramdisk
196 17:24:47.009009 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954187/compress-overlay-l218bvim/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk
197 17:24:47.039758 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 17:24:47.040234 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 17:24:47.040508 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 17:24:47.040737 Converting downloaded kernel to a uImage
201 17:24:47.041043 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/kernel/Image /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/kernel/uImage
202 17:24:47.525343 output: Image Name:
203 17:24:47.525769 output: Created: Thu Nov 7 17:24:47 2024
204 17:24:47.525982 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 17:24:47.526188 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 17:24:47.526391 output: Load Address: 01080000
207 17:24:47.526589 output: Entry Point: 01080000
208 17:24:47.526786 output:
209 17:24:47.527122 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 17:24:47.527389 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 17:24:47.527662 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 17:24:47.527917 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 17:24:47.528263 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 17:24:47.528543 Building ramdisk /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk
215 17:24:50.047039 >> 181575 blocks
216 17:24:58.506345 Adding RAMdisk u-boot header.
217 17:24:58.506811 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk.cpio.gz.uboot
218 17:24:58.779715 output: Image Name:
219 17:24:58.780180 output: Created: Thu Nov 7 17:24:58 2024
220 17:24:58.780394 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 17:24:58.780597 output: Data Size: 26054412 Bytes = 25443.76 KiB = 24.85 MiB
222 17:24:58.780796 output: Load Address: 00000000
223 17:24:58.780994 output: Entry Point: 00000000
224 17:24:58.781187 output:
225 17:24:58.781789 rename /var/lib/lava/dispatcher/tmp/954187/extract-overlay-ramdisk-jia0hrwl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/ramdisk/ramdisk.cpio.gz.uboot
226 17:24:58.782206 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 17:24:58.782486 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 17:24:58.782754 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 17:24:58.782992 No LXC device requested
230 17:24:58.783246 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 17:24:58.783502 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 17:24:58.783746 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 17:24:58.783953 Checking files for TFTP limit of 4294967296 bytes.
234 17:24:58.786946 end: 1 tftp-deploy (duration 00:00:17) [common]
235 17:24:58.787580 start: 2 uboot-action (timeout 00:05:00) [common]
236 17:24:58.788194 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 17:24:58.788746 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 17:24:58.789294 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 17:24:58.789872 Using kernel file from prepare-kernel: 954187/tftp-deploy-e8dupw9l/kernel/uImage
240 17:24:58.790553 substitutions:
241 17:24:58.790999 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 17:24:58.791440 - {DTB_ADDR}: 0x01070000
243 17:24:58.791875 - {DTB}: 954187/tftp-deploy-e8dupw9l/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 17:24:58.792345 - {INITRD}: 954187/tftp-deploy-e8dupw9l/ramdisk/ramdisk.cpio.gz.uboot
245 17:24:58.792783 - {KERNEL_ADDR}: 0x01080000
246 17:24:58.793216 - {KERNEL}: 954187/tftp-deploy-e8dupw9l/kernel/uImage
247 17:24:58.793646 - {LAVA_MAC}: None
248 17:24:58.794118 - {PRESEED_CONFIG}: None
249 17:24:58.794552 - {PRESEED_LOCAL}: None
250 17:24:58.794979 - {RAMDISK_ADDR}: 0x08000000
251 17:24:58.795404 - {RAMDISK}: 954187/tftp-deploy-e8dupw9l/ramdisk/ramdisk.cpio.gz.uboot
252 17:24:58.795837 - {ROOT_PART}: None
253 17:24:58.796291 - {ROOT}: None
254 17:24:58.796722 - {SERVER_IP}: 192.168.6.2
255 17:24:58.797159 - {TEE_ADDR}: 0x83000000
256 17:24:58.797585 - {TEE}: None
257 17:24:58.798010 Parsed boot commands:
258 17:24:58.798430 - setenv autoload no
259 17:24:58.798854 - setenv initrd_high 0xffffffff
260 17:24:58.799281 - setenv fdt_high 0xffffffff
261 17:24:58.799705 - dhcp
262 17:24:58.800153 - setenv serverip 192.168.6.2
263 17:24:58.800584 - tftpboot 0x01080000 954187/tftp-deploy-e8dupw9l/kernel/uImage
264 17:24:58.801015 - tftpboot 0x08000000 954187/tftp-deploy-e8dupw9l/ramdisk/ramdisk.cpio.gz.uboot
265 17:24:58.801442 - tftpboot 0x01070000 954187/tftp-deploy-e8dupw9l/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 17:24:58.801866 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 17:24:58.802302 - bootm 0x01080000 0x08000000 0x01070000
268 17:24:58.802842 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 17:24:58.804506 start: 2.3 connect-device (timeout 00:05:00) [common]
271 17:24:58.804992 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 17:24:58.819195 Setting prompt string to ['lava-test: # ']
273 17:24:58.820825 end: 2.3 connect-device (duration 00:00:00) [common]
274 17:24:58.821474 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 17:24:58.822059 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 17:24:58.822625 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 17:24:58.823855 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 17:24:58.860941 >> OK - accepted request
279 17:24:58.862904 Returned 0 in 0 seconds
280 17:24:58.964201 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 17:24:58.966026 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 17:24:58.966656 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 17:24:58.967222 Setting prompt string to ['Hit any key to stop autoboot']
285 17:24:58.967712 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 17:24:58.969523 Trying 192.168.56.21...
287 17:24:58.970050 Connected to conserv1.
288 17:24:58.970514 Escape character is '^]'.
289 17:24:58.970999
290 17:24:58.971509 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 17:24:58.972038
292 17:25:06.146243 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 17:25:06.146927 bl2_stage_init 0x01
294 17:25:06.147408 bl2_stage_init 0x81
295 17:25:06.151815 hw id: 0x0000 - pwm id 0x01
296 17:25:06.152357 bl2_stage_init 0xc1
297 17:25:06.157431 bl2_stage_init 0x02
298 17:25:06.157911
299 17:25:06.158354 L0:00000000
300 17:25:06.158802 L1:00000703
301 17:25:06.159232 L2:00008067
302 17:25:06.159659 L3:15000000
303 17:25:06.163116 S1:00000000
304 17:25:06.163578 B2:20282000
305 17:25:06.164041 B1:a0f83180
306 17:25:06.164477
307 17:25:06.164911 TE: 69264
308 17:25:06.165343
309 17:25:06.168510 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 17:25:06.168978
311 17:25:06.174050 Board ID = 1
312 17:25:06.174512 Set cpu clk to 24M
313 17:25:06.174947 Set clk81 to 24M
314 17:25:06.179637 Use GP1_pll as DSU clk.
315 17:25:06.180130 DSU clk: 1200 Mhz
316 17:25:06.180566 CPU clk: 1200 MHz
317 17:25:06.185254 Set clk81 to 166.6M
318 17:25:06.191009 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 17:25:06.191471 board id: 1
320 17:25:06.198040 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 17:25:06.208618 fw parse done
322 17:25:06.214566 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 17:25:06.257229 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 17:25:06.268271 PIEI prepare done
325 17:25:06.268727 fastboot data load
326 17:25:06.269163 fastboot data verify
327 17:25:06.273808 verify result: 266
328 17:25:06.279380 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 17:25:06.279838 LPDDR4 probe
330 17:25:06.280314 ddr clk to 1584MHz
331 17:25:06.287339 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 17:25:06.324591
333 17:25:06.325078 dmc_version 0001
334 17:25:06.331271 Check phy result
335 17:25:06.337203 INFO : End of CA training
336 17:25:06.337670 INFO : End of initialization
337 17:25:06.342825 INFO : Training has run successfully!
338 17:25:06.343281 Check phy result
339 17:25:06.348385 INFO : End of initialization
340 17:25:06.348842 INFO : End of read enable training
341 17:25:06.353992 INFO : End of fine write leveling
342 17:25:06.359595 INFO : End of Write leveling coarse delay
343 17:25:06.360078 INFO : Training has run successfully!
344 17:25:06.360515 Check phy result
345 17:25:06.365197 INFO : End of initialization
346 17:25:06.365652 INFO : End of read dq deskew training
347 17:25:06.370824 INFO : End of MPR read delay center optimization
348 17:25:06.376402 INFO : End of write delay center optimization
349 17:25:06.381984 INFO : End of read delay center optimization
350 17:25:06.382444 INFO : End of max read latency training
351 17:25:06.387592 INFO : Training has run successfully!
352 17:25:06.388082 1D training succeed
353 17:25:06.396778 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 17:25:06.444446 Check phy result
355 17:25:06.444952 INFO : End of initialization
356 17:25:06.466813 INFO : End of 2D read delay Voltage center optimization
357 17:25:06.485926 INFO : End of 2D read delay Voltage center optimization
358 17:25:06.537806 INFO : End of 2D write delay Voltage center optimization
359 17:25:06.587028 INFO : End of 2D write delay Voltage center optimization
360 17:25:06.592483 INFO : Training has run successfully!
361 17:25:06.592708
362 17:25:06.592911 channel==0
363 17:25:06.598080 RxClkDly_Margin_A0==88 ps 9
364 17:25:06.598306 TxDqDly_Margin_A0==88 ps 9
365 17:25:06.603676 RxClkDly_Margin_A1==88 ps 9
366 17:25:06.603898 TxDqDly_Margin_A1==88 ps 9
367 17:25:06.604329 TrainedVREFDQ_A0==74
368 17:25:06.609338 TrainedVREFDQ_A1==74
369 17:25:06.609801 VrefDac_Margin_A0==25
370 17:25:06.610233 DeviceVref_Margin_A0==40
371 17:25:06.614996 VrefDac_Margin_A1==23
372 17:25:06.615455 DeviceVref_Margin_A1==40
373 17:25:06.615890
374 17:25:06.616357
375 17:25:06.616788 channel==1
376 17:25:06.620506 RxClkDly_Margin_A0==88 ps 9
377 17:25:06.620966 TxDqDly_Margin_A0==98 ps 10
378 17:25:06.626523 RxClkDly_Margin_A1==88 ps 9
379 17:25:06.626985 TxDqDly_Margin_A1==88 ps 9
380 17:25:06.631739 TrainedVREFDQ_A0==77
381 17:25:06.632228 TrainedVREFDQ_A1==75
382 17:25:06.632666 VrefDac_Margin_A0==22
383 17:25:06.637321 DeviceVref_Margin_A0==37
384 17:25:06.637772 VrefDac_Margin_A1==23
385 17:25:06.638203 DeviceVref_Margin_A1==39
386 17:25:06.642996
387 17:25:06.643459 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 17:25:06.643892
389 17:25:06.676541 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000018 00000016 00000018 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
390 17:25:06.677068 2D training succeed
391 17:25:06.682126 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 17:25:06.687737 auto size-- 65535DDR cs0 size: 2048MB
393 17:25:06.688227 DDR cs1 size: 2048MB
394 17:25:06.693334 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 17:25:06.693787 cs0 DataBus test pass
396 17:25:06.698983 cs1 DataBus test pass
397 17:25:06.699436 cs0 AddrBus test pass
398 17:25:06.699862 cs1 AddrBus test pass
399 17:25:06.700322
400 17:25:06.704516 100bdlr_step_size ps== 478
401 17:25:06.704986 result report
402 17:25:06.710123 boot times 0Enable ddr reg access
403 17:25:06.715192 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 17:25:06.729062 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 17:25:07.384733 bl2z: ptr: 05129330, size: 00001e40
406 17:25:07.391322 0.0;M3 CHK:0;cm4_sp_mode 0
407 17:25:07.391801 MVN_1=0x00000000
408 17:25:07.392289 MVN_2=0x00000000
409 17:25:07.402817 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 17:25:07.403290 OPS=0x04
411 17:25:07.403727 ring efuse init
412 17:25:07.408414 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 17:25:07.408889 [0.017319 Inits done]
414 17:25:07.409323 secure task start!
415 17:25:07.416233 high task start!
416 17:25:07.416711 low task start!
417 17:25:07.417142 run into bl31
418 17:25:07.424824 NOTICE: BL31: v1.3(release):4fc40b1
419 17:25:07.432610 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 17:25:07.433083 NOTICE: BL31: G12A normal boot!
421 17:25:07.448160 NOTICE: BL31: BL33 decompress pass
422 17:25:07.453834 ERROR: Error initializing runtime service opteed_fast
423 17:25:10.194141 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 17:25:10.194820 bl2_stage_init 0x01
425 17:25:10.195295 bl2_stage_init 0x81
426 17:25:10.199751 hw id: 0x0000 - pwm id 0x01
427 17:25:10.200315 bl2_stage_init 0xc1
428 17:25:10.204486 bl2_stage_init 0x02
429 17:25:10.205075
430 17:25:10.205528 L0:00000000
431 17:25:10.205964 L1:00000703
432 17:25:10.206397 L2:00008067
433 17:25:10.210066 L3:15000000
434 17:25:10.210546 S1:00000000
435 17:25:10.210984 B2:20282000
436 17:25:10.211419 B1:a0f83180
437 17:25:10.211848
438 17:25:10.212365 TE: 68764
439 17:25:10.212801
440 17:25:10.221208 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 17:25:10.221701
442 17:25:10.222135 Board ID = 1
443 17:25:10.222569 Set cpu clk to 24M
444 17:25:10.222999 Set clk81 to 24M
445 17:25:10.226843 Use GP1_pll as DSU clk.
446 17:25:10.227322 DSU clk: 1200 Mhz
447 17:25:10.227752 CPU clk: 1200 MHz
448 17:25:10.232433 Set clk81 to 166.6M
449 17:25:10.238021 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 17:25:10.238505 board id: 1
451 17:25:10.246120 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 17:25:10.257052 fw parse done
453 17:25:10.262990 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 17:25:10.306127 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 17:25:10.317336 PIEI prepare done
456 17:25:10.317861 fastboot data load
457 17:25:10.318302 fastboot data verify
458 17:25:10.322936 verify result: 266
459 17:25:10.328581 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 17:25:10.329095 LPDDR4 probe
461 17:25:10.329526 ddr clk to 1584MHz
462 17:25:10.336526 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 17:25:10.374321
464 17:25:10.374909 dmc_version 0001
465 17:25:10.381356 Check phy result
466 17:25:10.387281 INFO : End of CA training
467 17:25:10.387837 INFO : End of initialization
468 17:25:10.392778 INFO : Training has run successfully!
469 17:25:10.393237 Check phy result
470 17:25:10.398363 INFO : End of initialization
471 17:25:10.398802 INFO : End of read enable training
472 17:25:10.403964 INFO : End of fine write leveling
473 17:25:10.409554 INFO : End of Write leveling coarse delay
474 17:25:10.409985 INFO : Training has run successfully!
475 17:25:10.410384 Check phy result
476 17:25:10.415154 INFO : End of initialization
477 17:25:10.415586 INFO : End of read dq deskew training
478 17:25:10.420758 INFO : End of MPR read delay center optimization
479 17:25:10.426393 INFO : End of write delay center optimization
480 17:25:10.431939 INFO : End of read delay center optimization
481 17:25:10.432393 INFO : End of max read latency training
482 17:25:10.437563 INFO : Training has run successfully!
483 17:25:10.437995 1D training succeed
484 17:25:10.446777 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 17:25:10.495123 Check phy result
486 17:25:10.495602 INFO : End of initialization
487 17:25:10.522600 INFO : End of 2D read delay Voltage center optimization
488 17:25:10.546711 INFO : End of 2D read delay Voltage center optimization
489 17:25:10.603275 INFO : End of 2D write delay Voltage center optimization
490 17:25:10.657345 INFO : End of 2D write delay Voltage center optimization
491 17:25:10.662880 INFO : Training has run successfully!
492 17:25:10.663317
493 17:25:10.663714 channel==0
494 17:25:10.668525 RxClkDly_Margin_A0==78 ps 8
495 17:25:10.668953 TxDqDly_Margin_A0==88 ps 9
496 17:25:10.674078 RxClkDly_Margin_A1==88 ps 9
497 17:25:10.674501 TxDqDly_Margin_A1==98 ps 10
498 17:25:10.674897 TrainedVREFDQ_A0==74
499 17:25:10.679668 TrainedVREFDQ_A1==74
500 17:25:10.680127 VrefDac_Margin_A0==25
501 17:25:10.680523 DeviceVref_Margin_A0==40
502 17:25:10.685272 VrefDac_Margin_A1==23
503 17:25:10.685698 DeviceVref_Margin_A1==40
504 17:25:10.686093
505 17:25:10.686481
506 17:25:10.686871 channel==1
507 17:25:10.690882 RxClkDly_Margin_A0==88 ps 9
508 17:25:10.691304 TxDqDly_Margin_A0==88 ps 9
509 17:25:10.696517 RxClkDly_Margin_A1==88 ps 9
510 17:25:10.696946 TxDqDly_Margin_A1==78 ps 8
511 17:25:10.702073 TrainedVREFDQ_A0==75
512 17:25:10.702498 TrainedVREFDQ_A1==75
513 17:25:10.702894 VrefDac_Margin_A0==22
514 17:25:10.707670 DeviceVref_Margin_A0==38
515 17:25:10.708130 VrefDac_Margin_A1==23
516 17:25:10.708526 DeviceVref_Margin_A1==39
517 17:25:10.713282
518 17:25:10.713706 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 17:25:10.714099
520 17:25:10.746866 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000018 00000019 00000016 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
521 17:25:10.747344 2D training succeed
522 17:25:10.752537 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 17:25:10.758071 auto size-- 65535DDR cs0 size: 2048MB
524 17:25:10.758501 DDR cs1 size: 2048MB
525 17:25:10.763665 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 17:25:10.764116 cs0 DataBus test pass
527 17:25:10.769270 cs1 DataBus test pass
528 17:25:10.769693 cs0 AddrBus test pass
529 17:25:10.770083 cs1 AddrBus test pass
530 17:25:10.770468
531 17:25:10.774848 100bdlr_step_size ps== 464
532 17:25:10.775283 result report
533 17:25:10.780518 boot times 0Enable ddr reg access
534 17:25:10.785605 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 17:25:10.799456 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 17:25:11.459183 bl2z: ptr: 05129330, size: 00001e40
537 17:25:11.466623 0.0;M3 CHK:0;cm4_sp_mode 0
538 17:25:11.467109 MVN_1=0x00000000
539 17:25:11.467521 MVN_2=0x00000000
540 17:25:11.478193 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 17:25:11.478657 OPS=0x04
542 17:25:11.479072 ring efuse init
543 17:25:11.483801 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 17:25:11.484286 [0.017354 Inits done]
545 17:25:11.484698 secure task start!
546 17:25:11.491166 high task start!
547 17:25:11.491640 low task start!
548 17:25:11.492081 run into bl31
549 17:25:11.499822 NOTICE: BL31: v1.3(release):4fc40b1
550 17:25:11.507591 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 17:25:11.508079 NOTICE: BL31: G12A normal boot!
552 17:25:11.523060 NOTICE: BL31: BL33 decompress pass
553 17:25:11.528897 ERROR: Error initializing runtime service opteed_fast
554 17:25:12.746980 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 17:25:12.747559 bl2_stage_init 0x01
556 17:25:12.748076 bl2_stage_init 0x81
557 17:25:12.752492 hw id: 0x0000 - pwm id 0x01
558 17:25:12.752938 bl2_stage_init 0xc1
559 17:25:12.757537 bl2_stage_init 0x02
560 17:25:12.757983
561 17:25:12.758398 L0:00000000
562 17:25:12.758796 L1:00000703
563 17:25:12.759190 L2:00008067
564 17:25:12.763068 L3:15000000
565 17:25:12.763515 S1:00000000
566 17:25:12.763921 B2:20282000
567 17:25:12.764362 B1:a0f83180
568 17:25:12.764762
569 17:25:12.765163 TE: 69891
570 17:25:12.765564
571 17:25:12.774264 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 17:25:12.774719
573 17:25:12.775127 Board ID = 1
574 17:25:12.775527 Set cpu clk to 24M
575 17:25:12.775920 Set clk81 to 24M
576 17:25:12.780032 Use GP1_pll as DSU clk.
577 17:25:12.780478 DSU clk: 1200 Mhz
578 17:25:12.780882 CPU clk: 1200 MHz
579 17:25:12.785502 Set clk81 to 166.6M
580 17:25:12.791100 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 17:25:12.791539 board id: 1
582 17:25:12.798961 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 17:25:12.809552 fw parse done
584 17:25:12.815516 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 17:25:12.858105 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 17:25:12.868995 PIEI prepare done
587 17:25:12.869439 fastboot data load
588 17:25:12.869853 fastboot data verify
589 17:25:12.874583 verify result: 266
590 17:25:12.880210 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 17:25:12.880646 LPDDR4 probe
592 17:25:12.881052 ddr clk to 1584MHz
593 17:25:12.888168 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 17:25:12.925429
595 17:25:12.925894 dmc_version 0001
596 17:25:12.932086 Check phy result
597 17:25:12.937948 INFO : End of CA training
598 17:25:12.938388 INFO : End of initialization
599 17:25:12.943589 INFO : Training has run successfully!
600 17:25:12.944073 Check phy result
601 17:25:12.949301 INFO : End of initialization
602 17:25:12.949739 INFO : End of read enable training
603 17:25:12.954898 INFO : End of fine write leveling
604 17:25:12.960456 INFO : End of Write leveling coarse delay
605 17:25:12.960897 INFO : Training has run successfully!
606 17:25:12.961302 Check phy result
607 17:25:12.965925 INFO : End of initialization
608 17:25:12.966360 INFO : End of read dq deskew training
609 17:25:12.971592 INFO : End of MPR read delay center optimization
610 17:25:12.977265 INFO : End of write delay center optimization
611 17:25:12.982935 INFO : End of read delay center optimization
612 17:25:12.983385 INFO : End of max read latency training
613 17:25:12.988436 INFO : Training has run successfully!
614 17:25:12.988874 1D training succeed
615 17:25:12.997626 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 17:25:13.045240 Check phy result
617 17:25:13.045722 INFO : End of initialization
618 17:25:13.067570 INFO : End of 2D read delay Voltage center optimization
619 17:25:13.086732 INFO : End of 2D read delay Voltage center optimization
620 17:25:13.138604 INFO : End of 2D write delay Voltage center optimization
621 17:25:13.188131 INFO : End of 2D write delay Voltage center optimization
622 17:25:13.193513 INFO : Training has run successfully!
623 17:25:13.193974
624 17:25:13.194391 channel==0
625 17:25:13.199090 RxClkDly_Margin_A0==78 ps 8
626 17:25:13.199541 TxDqDly_Margin_A0==88 ps 9
627 17:25:13.202442 RxClkDly_Margin_A1==88 ps 9
628 17:25:13.202886 TxDqDly_Margin_A1==88 ps 9
629 17:25:13.208126 TrainedVREFDQ_A0==74
630 17:25:13.208576 TrainedVREFDQ_A1==74
631 17:25:13.208987 VrefDac_Margin_A0==24
632 17:25:13.213549 DeviceVref_Margin_A0==40
633 17:25:13.214000 VrefDac_Margin_A1==23
634 17:25:13.219164 DeviceVref_Margin_A1==40
635 17:25:13.219614
636 17:25:13.220064
637 17:25:13.220475 channel==1
638 17:25:13.220871 RxClkDly_Margin_A0==88 ps 9
639 17:25:13.224665 TxDqDly_Margin_A0==88 ps 9
640 17:25:13.225112 RxClkDly_Margin_A1==98 ps 10
641 17:25:13.230402 TxDqDly_Margin_A1==78 ps 8
642 17:25:13.230849 TrainedVREFDQ_A0==77
643 17:25:13.231256 TrainedVREFDQ_A1==75
644 17:25:13.236032 VrefDac_Margin_A0==22
645 17:25:13.236487 DeviceVref_Margin_A0==37
646 17:25:13.236886 VrefDac_Margin_A1==22
647 17:25:13.241480 DeviceVref_Margin_A1==38
648 17:25:13.241927
649 17:25:13.247068 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 17:25:13.247507
651 17:25:13.275154 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
652 17:25:13.280650 2D training succeed
653 17:25:13.286193 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 17:25:13.286642 auto size-- 65535DDR cs0 size: 2048MB
655 17:25:13.291885 DDR cs1 size: 2048MB
656 17:25:13.292356 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 17:25:13.297389 cs0 DataBus test pass
658 17:25:13.297831 cs1 DataBus test pass
659 17:25:13.298238 cs0 AddrBus test pass
660 17:25:13.303000 cs1 AddrBus test pass
661 17:25:13.303434
662 17:25:13.303843 100bdlr_step_size ps== 478
663 17:25:13.304286 result report
664 17:25:13.308574 boot times 0Enable ddr reg access
665 17:25:13.315969 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 17:25:13.329812 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 17:25:13.984439 bl2z: ptr: 05129330, size: 00001e40
668 17:25:13.991094 0.0;M3 CHK:0;cm4_sp_mode 0
669 17:25:13.991566 MVN_1=0x00000000
670 17:25:13.991971 MVN_2=0x00000000
671 17:25:14.002589 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 17:25:14.003047 OPS=0x04
673 17:25:14.003458 ring efuse init
674 17:25:14.008213 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 17:25:14.008667 [0.017310 Inits done]
676 17:25:14.009070 secure task start!
677 17:25:14.015553 high task start!
678 17:25:14.016018 low task start!
679 17:25:14.016429 run into bl31
680 17:25:14.024199 NOTICE: BL31: v1.3(release):4fc40b1
681 17:25:14.032040 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 17:25:14.032501 NOTICE: BL31: G12A normal boot!
683 17:25:14.047559 NOTICE: BL31: BL33 decompress pass
684 17:25:14.053268 ERROR: Error initializing runtime service opteed_fast
685 17:25:14.848784
686 17:25:14.849373
687 17:25:14.854058 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 17:25:14.854503
689 17:25:14.857534 Model: Libre Computer AML-S905D3-CC Solitude
690 17:25:15.004632 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 17:25:15.020047 DRAM: 2 GiB (effective 3.8 GiB)
692 17:25:15.120882 Core: 406 devices, 33 uclasses, devicetree: separate
693 17:25:15.126896 WDT: Not starting watchdog@f0d0
694 17:25:15.152057 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 17:25:15.164305 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 17:25:15.169292 ** Bad device specification mmc 0 **
697 17:25:15.179250 Card did not respond to voltage select! : -110
698 17:25:15.186887 ** Bad device specification mmc 0 **
699 17:25:15.187365 Couldn't find partition mmc 0
700 17:25:15.195240 Card did not respond to voltage select! : -110
701 17:25:15.200724 ** Bad device specification mmc 0 **
702 17:25:15.201259 Couldn't find partition mmc 0
703 17:25:15.205937 Error: could not access storage.
704 17:25:15.503228 Net: eth0: ethernet@ff3f0000
705 17:25:15.503834 starting USB...
706 17:25:15.747890 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 17:25:15.748351 Starting the controller
708 17:25:15.754857 USB XHCI 1.10
709 17:25:17.309189 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 17:25:17.317483 scanning usb for storage devices... 0 Storage Device(s) found
712 17:25:17.368865 Hit any key to stop autoboot: 1
713 17:25:17.369490 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 17:25:17.369861 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 17:25:17.370155 Setting prompt string to ['=>']
716 17:25:17.370447 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 17:25:17.383487 0
718 17:25:17.384169 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 17:25:17.485082 => setenv autoload no
721 17:25:17.485885 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 17:25:17.490313 setenv autoload no
724 17:25:17.591549 => setenv initrd_high 0xffffffff
725 17:25:17.592122 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 17:25:17.596398 setenv initrd_high 0xffffffff
728 17:25:17.697377 => setenv fdt_high 0xffffffff
729 17:25:17.697873 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 17:25:17.702218 setenv fdt_high 0xffffffff
732 17:25:17.803251 => dhcp
733 17:25:17.803901 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 17:25:17.808005 dhcp
735 17:25:21.967955 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete......... TIMEOUT !
736 17:25:21.968594 Could not initialize PHY ethernet@ff3f0000
738 17:25:21.969978 end: 2.4.3 bootloader-commands (duration 00:00:05) [common]
741 17:25:21.971783 end: 2.4 uboot-commands (duration 00:00:23) [common]
743 17:25:21.973181 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TIMEOUT' (3)'
745 17:25:21.974243 end: 2 uboot-action (duration 00:00:23) [common]
747 17:25:21.975851 Cleaning after the job
748 17:25:21.976494 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/ramdisk
749 17:25:21.991321 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/kernel
750 17:25:22.031791 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/dtb
751 17:25:22.032739 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954187/tftp-deploy-e8dupw9l/modules
752 17:25:22.051820 start: 4.1 power-off (timeout 00:00:30) [common]
753 17:25:22.052542 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
754 17:25:22.086225 >> OK - accepted request
755 17:25:22.088362 Returned 0 in 0 seconds
756 17:25:22.189395 end: 4.1 power-off (duration 00:00:00) [common]
758 17:25:22.190368 start: 4.2 read-feedback (timeout 00:10:00) [common]
759 17:25:22.191001 Listened to connection for namespace 'common' for up to 1s
760 17:25:23.192023 Finalising connection for namespace 'common'
761 17:25:23.192751 Disconnecting from shell: Finalise
762 17:25:23.193276 =>
763 17:25:23.294295 end: 4.2 read-feedback (duration 00:00:01) [common]
764 17:25:23.295000 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/954187
765 17:25:23.586147 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/954187
766 17:25:23.586727 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.