Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:33:25.676907 lava-dispatcher, installed at version: 2024.01
2 19:33:25.677724 start: 0 validate
3 19:33:25.678209 Start time: 2024-11-07 19:33:25.678179+00:00 (UTC)
4 19:33:25.678756 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:33:25.679311 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:33:25.718660 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:33:25.719183 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:33:25.755527 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:33:25.756172 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:33:25.791043 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:33:25.791808 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:33:25.826720 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:33:25.827227 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:33:25.877357 validate duration: 0.20
16 19:33:25.878871 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:33:25.879482 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:33:25.880103 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:33:25.881068 Not decompressing ramdisk as can be used compressed.
20 19:33:25.881845 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 19:33:25.882358 saving as /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/ramdisk/initrd.cpio.gz
22 19:33:25.882851 total size: 5628169 (5 MB)
23 19:33:25.928402 progress 0 % (0 MB)
24 19:33:25.933540 progress 5 % (0 MB)
25 19:33:25.938523 progress 10 % (0 MB)
26 19:33:25.943367 progress 15 % (0 MB)
27 19:33:25.948579 progress 20 % (1 MB)
28 19:33:25.953225 progress 25 % (1 MB)
29 19:33:25.958743 progress 30 % (1 MB)
30 19:33:25.964188 progress 35 % (1 MB)
31 19:33:25.968807 progress 40 % (2 MB)
32 19:33:25.974224 progress 45 % (2 MB)
33 19:33:25.978384 progress 50 % (2 MB)
34 19:33:25.982594 progress 55 % (2 MB)
35 19:33:25.986913 progress 60 % (3 MB)
36 19:33:25.990728 progress 65 % (3 MB)
37 19:33:25.994941 progress 70 % (3 MB)
38 19:33:25.998883 progress 75 % (4 MB)
39 19:33:26.003117 progress 80 % (4 MB)
40 19:33:26.007178 progress 85 % (4 MB)
41 19:33:26.011469 progress 90 % (4 MB)
42 19:33:26.015486 progress 95 % (5 MB)
43 19:33:26.018905 progress 100 % (5 MB)
44 19:33:26.019629 5 MB downloaded in 0.14 s (39.25 MB/s)
45 19:33:26.020206 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:33:26.021122 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:33:26.021418 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:33:26.021691 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:33:26.022215 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/kernel/Image
51 19:33:26.022535 saving as /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/kernel/Image
52 19:33:26.022760 total size: 45713920 (43 MB)
53 19:33:26.022973 No compression specified
54 19:33:26.057661 progress 0 % (0 MB)
55 19:33:26.086615 progress 5 % (2 MB)
56 19:33:26.115649 progress 10 % (4 MB)
57 19:33:26.144184 progress 15 % (6 MB)
58 19:33:26.172961 progress 20 % (8 MB)
59 19:33:26.200921 progress 25 % (10 MB)
60 19:33:26.229675 progress 30 % (13 MB)
61 19:33:26.257913 progress 35 % (15 MB)
62 19:33:26.286545 progress 40 % (17 MB)
63 19:33:26.314920 progress 45 % (19 MB)
64 19:33:26.343308 progress 50 % (21 MB)
65 19:33:26.372553 progress 55 % (24 MB)
66 19:33:26.401425 progress 60 % (26 MB)
67 19:33:26.430360 progress 65 % (28 MB)
68 19:33:26.459357 progress 70 % (30 MB)
69 19:33:26.488007 progress 75 % (32 MB)
70 19:33:26.517859 progress 80 % (34 MB)
71 19:33:26.546191 progress 85 % (37 MB)
72 19:33:26.575219 progress 90 % (39 MB)
73 19:33:26.604479 progress 95 % (41 MB)
74 19:33:26.632480 progress 100 % (43 MB)
75 19:33:26.633027 43 MB downloaded in 0.61 s (71.44 MB/s)
76 19:33:26.633495 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:33:26.634311 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:33:26.634581 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:33:26.634843 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:33:26.635297 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:33:26.635563 saving as /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:33:26.635770 total size: 54703 (0 MB)
84 19:33:26.636002 No compression specified
85 19:33:26.675484 progress 59 % (0 MB)
86 19:33:26.676402 progress 100 % (0 MB)
87 19:33:26.677003 0 MB downloaded in 0.04 s (1.27 MB/s)
88 19:33:26.677513 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:33:26.678400 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:33:26.678702 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:33:26.679000 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:33:26.679488 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 19:33:26.679757 saving as /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/nfsrootfs/full.rootfs.tar
95 19:33:26.680002 total size: 120894716 (115 MB)
96 19:33:26.680249 Using unxz to decompress xz
97 19:33:26.727047 progress 0 % (0 MB)
98 19:33:27.725817 progress 5 % (5 MB)
99 19:33:28.683686 progress 10 % (11 MB)
100 19:33:29.481292 progress 15 % (17 MB)
101 19:33:30.227075 progress 20 % (23 MB)
102 19:33:30.820285 progress 25 % (28 MB)
103 19:33:31.646248 progress 30 % (34 MB)
104 19:33:32.437693 progress 35 % (40 MB)
105 19:33:32.790465 progress 40 % (46 MB)
106 19:33:33.161172 progress 45 % (51 MB)
107 19:33:33.894744 progress 50 % (57 MB)
108 19:33:34.814011 progress 55 % (63 MB)
109 19:33:35.607068 progress 60 % (69 MB)
110 19:33:36.369287 progress 65 % (74 MB)
111 19:33:37.158970 progress 70 % (80 MB)
112 19:33:37.990039 progress 75 % (86 MB)
113 19:33:38.782365 progress 80 % (92 MB)
114 19:33:39.548855 progress 85 % (98 MB)
115 19:33:40.426747 progress 90 % (103 MB)
116 19:33:41.230425 progress 95 % (109 MB)
117 19:33:42.080609 progress 100 % (115 MB)
118 19:33:42.094523 115 MB downloaded in 15.41 s (7.48 MB/s)
119 19:33:42.095465 end: 1.4.1 http-download (duration 00:00:15) [common]
121 19:33:42.097123 end: 1.4 download-retry (duration 00:00:15) [common]
122 19:33:42.097701 start: 1.5 download-retry (timeout 00:09:44) [common]
123 19:33:42.098238 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 19:33:42.099175 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/modules.tar.xz
125 19:33:42.099647 saving as /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/modules/modules.tar
126 19:33:42.100080 total size: 11613380 (11 MB)
127 19:33:42.100497 Using unxz to decompress xz
128 19:33:42.150403 progress 0 % (0 MB)
129 19:33:42.220404 progress 5 % (0 MB)
130 19:33:42.298610 progress 10 % (1 MB)
131 19:33:42.397266 progress 15 % (1 MB)
132 19:33:42.491891 progress 20 % (2 MB)
133 19:33:42.573531 progress 25 % (2 MB)
134 19:33:42.650095 progress 30 % (3 MB)
135 19:33:42.729586 progress 35 % (3 MB)
136 19:33:42.803651 progress 40 % (4 MB)
137 19:33:42.882521 progress 45 % (5 MB)
138 19:33:42.968573 progress 50 % (5 MB)
139 19:33:43.046413 progress 55 % (6 MB)
140 19:33:43.132211 progress 60 % (6 MB)
141 19:33:43.212881 progress 65 % (7 MB)
142 19:33:43.293936 progress 70 % (7 MB)
143 19:33:43.376088 progress 75 % (8 MB)
144 19:33:43.462928 progress 80 % (8 MB)
145 19:33:43.544732 progress 85 % (9 MB)
146 19:33:43.624091 progress 90 % (9 MB)
147 19:33:43.702997 progress 95 % (10 MB)
148 19:33:43.780196 progress 100 % (11 MB)
149 19:33:43.792316 11 MB downloaded in 1.69 s (6.54 MB/s)
150 19:33:43.792873 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:33:43.793721 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:33:43.794002 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 19:33:43.794272 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 19:34:01.199936 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/954167/extract-nfsrootfs-35a5r8pp
156 19:34:01.200602 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 19:34:01.200896 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 19:34:01.201659 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino
159 19:34:01.202271 makedir: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin
160 19:34:01.202764 makedir: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/tests
161 19:34:01.203361 makedir: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/results
162 19:34:01.203819 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-add-keys
163 19:34:01.204531 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-add-sources
164 19:34:01.205924 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-background-process-start
165 19:34:01.206554 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-background-process-stop
166 19:34:01.207893 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-common-functions
167 19:34:01.208663 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-echo-ipv4
168 19:34:01.209736 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-install-packages
169 19:34:01.210470 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-installed-packages
170 19:34:01.212193 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-os-build
171 19:34:01.212792 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-probe-channel
172 19:34:01.213702 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-probe-ip
173 19:34:01.215834 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-target-ip
174 19:34:01.216669 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-target-mac
175 19:34:01.217836 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-target-storage
176 19:34:01.219030 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-case
177 19:34:01.219769 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-event
178 19:34:01.220482 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-feedback
179 19:34:01.221016 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-raise
180 19:34:01.221524 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-reference
181 19:34:01.222056 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-runner
182 19:34:01.222596 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-set
183 19:34:01.223132 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-test-shell
184 19:34:01.223709 Updating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-add-keys (debian)
185 19:34:01.224338 Updating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-add-sources (debian)
186 19:34:01.225539 Updating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-install-packages (debian)
187 19:34:01.226149 Updating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-installed-packages (debian)
188 19:34:01.226688 Updating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/bin/lava-os-build (debian)
189 19:34:01.227154 Creating /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/environment
190 19:34:01.227602 LAVA metadata
191 19:34:01.227872 - LAVA_JOB_ID=954167
192 19:34:01.228126 - LAVA_DISPATCHER_IP=192.168.6.2
193 19:34:01.228539 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 19:34:01.229645 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 19:34:01.229987 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 19:34:01.230195 skipped lava-vland-overlay
197 19:34:01.230439 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 19:34:01.230694 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 19:34:01.230917 skipped lava-multinode-overlay
200 19:34:01.231160 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 19:34:01.231410 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 19:34:01.231661 Loading test definitions
203 19:34:01.231939 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 19:34:01.232253 Using /lava-954167 at stage 0
205 19:34:01.233613 uuid=954167_1.6.2.4.1 testdef=None
206 19:34:01.233945 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 19:34:01.234216 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 19:34:01.235918 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 19:34:01.236752 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 19:34:01.240465 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 19:34:01.241348 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 19:34:01.244242 runner path: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/0/tests/0_timesync-off test_uuid 954167_1.6.2.4.1
215 19:34:01.244873 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 19:34:01.245696 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 19:34:01.245923 Using /lava-954167 at stage 0
219 19:34:01.246292 Fetching tests from https://github.com/kernelci/test-definitions.git
220 19:34:01.246592 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/0/tests/1_kselftest-alsa'
221 19:34:04.651763 Running '/usr/bin/git checkout kernelci.org
222 19:34:05.104067 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 19:34:05.106374 uuid=954167_1.6.2.4.5 testdef=None
224 19:34:05.106972 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 19:34:05.108447 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 19:34:05.113929 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 19:34:05.115496 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 19:34:05.122714 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 19:34:05.124419 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 19:34:05.131438 runner path: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/0/tests/1_kselftest-alsa test_uuid 954167_1.6.2.4.5
234 19:34:05.132008 BOARD='meson-g12b-a311d-libretech-cc'
235 19:34:05.132425 BRANCH='broonie-sound'
236 19:34:05.132815 SKIPFILE='/dev/null'
237 19:34:05.133204 SKIP_INSTALL='True'
238 19:34:05.133590 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 19:34:05.133985 TST_CASENAME=''
240 19:34:05.134370 TST_CMDFILES='alsa'
241 19:34:05.135368 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 19:34:05.136933 Creating lava-test-runner.conf files
244 19:34:05.137334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/954167/lava-overlay-a7rqcino/lava-954167/0 for stage 0
245 19:34:05.138076 - 0_timesync-off
246 19:34:05.138545 - 1_kselftest-alsa
247 19:34:05.139179 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 19:34:05.139714 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 19:34:28.677763 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 19:34:28.678182 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 19:34:28.678447 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 19:34:28.678717 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 19:34:28.678980 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 19:34:29.306558 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 19:34:29.307037 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 19:34:29.307289 extracting modules file /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954167/extract-nfsrootfs-35a5r8pp
257 19:34:30.807067 extracting modules file /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk
258 19:34:32.206512 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 19:34:32.206992 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 19:34:32.207270 [common] Applying overlay to NFS
261 19:34:32.207487 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954167/compress-overlay-vyw6fhbz/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/954167/extract-nfsrootfs-35a5r8pp
262 19:34:34.971128 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 19:34:34.971606 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 19:34:34.971880 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 19:34:34.972143 Converting downloaded kernel to a uImage
266 19:34:34.972457 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/kernel/Image /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/kernel/uImage
267 19:34:35.523790 output: Image Name:
268 19:34:35.524261 output: Created: Thu Nov 7 19:34:34 2024
269 19:34:35.524480 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 19:34:35.524684 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 19:34:35.524884 output: Load Address: 01080000
272 19:34:35.525085 output: Entry Point: 01080000
273 19:34:35.525282 output:
274 19:34:35.525617 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 19:34:35.525886 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 19:34:35.526158 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 19:34:35.526434 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 19:34:35.526734 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 19:34:35.526994 Building ramdisk /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk
280 19:34:37.778333 >> 166792 blocks
281 19:34:45.536190 Adding RAMdisk u-boot header.
282 19:34:45.536637 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk.cpio.gz.uboot
283 19:34:45.809289 output: Image Name:
284 19:34:45.809867 output: Created: Thu Nov 7 19:34:45 2024
285 19:34:45.810212 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 19:34:45.810491 output: Data Size: 23432141 Bytes = 22882.95 KiB = 22.35 MiB
287 19:34:45.810746 output: Load Address: 00000000
288 19:34:45.811080 output: Entry Point: 00000000
289 19:34:45.811340 output:
290 19:34:45.813336 rename /var/lib/lava/dispatcher/tmp/954167/extract-overlay-ramdisk-38ee0uap/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
291 19:34:45.814054 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 19:34:45.814557 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 19:34:45.815098 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 19:34:45.815593 No LXC device requested
295 19:34:45.816114 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 19:34:45.816583 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 19:34:45.817108 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 19:34:45.817450 Checking files for TFTP limit of 4294967296 bytes.
299 19:34:45.821968 end: 1 tftp-deploy (duration 00:01:20) [common]
300 19:34:45.822529 start: 2 uboot-action (timeout 00:05:00) [common]
301 19:34:45.822909 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 19:34:45.823257 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 19:34:45.823596 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 19:34:45.824009 Using kernel file from prepare-kernel: 954167/tftp-deploy-qhv8xqzw/kernel/uImage
305 19:34:45.824449 substitutions:
306 19:34:45.824733 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 19:34:45.824998 - {DTB_ADDR}: 0x01070000
308 19:34:45.825257 - {DTB}: 954167/tftp-deploy-qhv8xqzw/dtb/meson-g12b-a311d-libretech-cc.dtb
309 19:34:45.825522 - {INITRD}: 954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
310 19:34:45.825772 - {KERNEL_ADDR}: 0x01080000
311 19:34:45.826022 - {KERNEL}: 954167/tftp-deploy-qhv8xqzw/kernel/uImage
312 19:34:45.826283 - {LAVA_MAC}: None
313 19:34:45.826574 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/954167/extract-nfsrootfs-35a5r8pp
314 19:34:45.826838 - {NFS_SERVER_IP}: 192.168.6.2
315 19:34:45.827120 - {PRESEED_CONFIG}: None
316 19:34:45.827543 - {PRESEED_LOCAL}: None
317 19:34:45.827856 - {RAMDISK_ADDR}: 0x08000000
318 19:34:45.828570 - {RAMDISK}: 954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
319 19:34:45.829526 - {ROOT_PART}: None
320 19:34:45.829812 - {ROOT}: None
321 19:34:45.830066 - {SERVER_IP}: 192.168.6.2
322 19:34:45.830438 - {TEE_ADDR}: 0x83000000
323 19:34:45.830757 - {TEE}: None
324 19:34:45.831024 Parsed boot commands:
325 19:34:45.831285 - setenv autoload no
326 19:34:45.831534 - setenv initrd_high 0xffffffff
327 19:34:45.831785 - setenv fdt_high 0xffffffff
328 19:34:45.832071 - dhcp
329 19:34:45.832329 - setenv serverip 192.168.6.2
330 19:34:45.832583 - tftpboot 0x01080000 954167/tftp-deploy-qhv8xqzw/kernel/uImage
331 19:34:45.832846 - tftpboot 0x08000000 954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
332 19:34:45.833116 - tftpboot 0x01070000 954167/tftp-deploy-qhv8xqzw/dtb/meson-g12b-a311d-libretech-cc.dtb
333 19:34:45.833402 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/954167/extract-nfsrootfs-35a5r8pp,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 19:34:45.833669 - bootm 0x01080000 0x08000000 0x01070000
335 19:34:45.834035 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 19:34:45.835010 start: 2.3 connect-device (timeout 00:05:00) [common]
338 19:34:45.835312 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 19:34:45.849738 Setting prompt string to ['lava-test: # ']
340 19:34:45.850900 end: 2.3 connect-device (duration 00:00:00) [common]
341 19:34:45.851360 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 19:34:45.851724 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 19:34:45.852139 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 19:34:45.852936 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 19:34:45.889644 >> OK - accepted request
346 19:34:45.892220 Returned 0 in 0 seconds
347 19:34:45.993264 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 19:34:45.994405 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 19:34:45.994795 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 19:34:45.995135 Setting prompt string to ['Hit any key to stop autoboot']
352 19:34:45.995432 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 19:34:45.996503 Trying 192.168.56.21...
354 19:34:45.996829 Connected to conserv1.
355 19:34:45.997085 Escape character is '^]'.
356 19:34:45.997334
357 19:34:45.997585 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 19:34:45.997839
359 19:34:56.978614 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 19:34:56.979046 bl2_stage_init 0x01
361 19:34:56.979264 bl2_stage_init 0x81
362 19:34:56.984174 hw id: 0x0000 - pwm id 0x01
363 19:34:56.984500 bl2_stage_init 0xc1
364 19:34:56.984718 bl2_stage_init 0x02
365 19:34:56.984927
366 19:34:56.989815 L0:00000000
367 19:34:56.990112 L1:20000703
368 19:34:56.990328 L2:00008067
369 19:34:56.990538 L3:14000000
370 19:34:56.992657 B2:00402000
371 19:34:56.992921 B1:e0f83180
372 19:34:56.993126
373 19:34:56.993328 TE: 58124
374 19:34:56.993528
375 19:34:57.003764 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 19:34:57.004095
377 19:34:57.004307 Board ID = 1
378 19:34:57.004506 Set A53 clk to 24M
379 19:34:57.004700 Set A73 clk to 24M
380 19:34:57.009194 Set clk81 to 24M
381 19:34:57.009450 A53 clk: 1200 MHz
382 19:34:57.009653 A73 clk: 1200 MHz
383 19:34:57.013126 CLK81: 166.6M
384 19:34:57.013391 smccc: 00012a91
385 19:34:57.018674 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 19:34:57.018945 board id: 1
387 19:34:57.028964 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 19:34:57.039729 fw parse done
389 19:34:57.045666 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 19:34:57.088266 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 19:34:57.099302 PIEI prepare done
392 19:34:57.099646 fastboot data load
393 19:34:57.099867 fastboot data verify
394 19:34:57.104889 verify result: 266
395 19:34:57.110482 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 19:34:57.110815 LPDDR4 probe
397 19:34:57.111032 ddr clk to 1584MHz
398 19:34:57.118407 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 19:34:57.155876
400 19:34:57.156281 dmc_version 0001
401 19:34:57.162337 Check phy result
402 19:34:57.168187 INFO : End of CA training
403 19:34:57.168476 INFO : End of initialization
404 19:34:57.173793 INFO : Training has run successfully!
405 19:34:57.174071 Check phy result
406 19:34:57.179415 INFO : End of initialization
407 19:34:57.179701 INFO : End of read enable training
408 19:34:57.182682 INFO : End of fine write leveling
409 19:34:57.188208 INFO : End of Write leveling coarse delay
410 19:34:57.193835 INFO : Training has run successfully!
411 19:34:57.194120 Check phy result
412 19:34:57.194344 INFO : End of initialization
413 19:34:57.199423 INFO : End of read dq deskew training
414 19:34:57.205048 INFO : End of MPR read delay center optimization
415 19:34:57.205330 INFO : End of write delay center optimization
416 19:34:57.210622 INFO : End of read delay center optimization
417 19:34:57.216193 INFO : End of max read latency training
418 19:34:57.216481 INFO : Training has run successfully!
419 19:34:57.221819 1D training succeed
420 19:34:57.227751 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 19:34:57.275387 Check phy result
422 19:34:57.275977 INFO : End of initialization
423 19:34:57.297078 INFO : End of 2D read delay Voltage center optimization
424 19:34:57.317375 INFO : End of 2D read delay Voltage center optimization
425 19:34:57.369412 INFO : End of 2D write delay Voltage center optimization
426 19:34:57.418868 INFO : End of 2D write delay Voltage center optimization
427 19:34:57.424302 INFO : Training has run successfully!
428 19:34:57.424775
429 19:34:57.425204 channel==0
430 19:34:57.429925 RxClkDly_Margin_A0==88 ps 9
431 19:34:57.430367 TxDqDly_Margin_A0==98 ps 10
432 19:34:57.435448 RxClkDly_Margin_A1==88 ps 9
433 19:34:57.435892 TxDqDly_Margin_A1==98 ps 10
434 19:34:57.436357 TrainedVREFDQ_A0==74
435 19:34:57.441152 TrainedVREFDQ_A1==74
436 19:34:57.441621 VrefDac_Margin_A0==25
437 19:34:57.442039 DeviceVref_Margin_A0==40
438 19:34:57.446717 VrefDac_Margin_A1==25
439 19:34:57.447159 DeviceVref_Margin_A1==40
440 19:34:57.447572
441 19:34:57.448013
442 19:34:57.452335 channel==1
443 19:34:57.452784 RxClkDly_Margin_A0==98 ps 10
444 19:34:57.453194 TxDqDly_Margin_A0==98 ps 10
445 19:34:57.457877 RxClkDly_Margin_A1==88 ps 9
446 19:34:57.458318 TxDqDly_Margin_A1==88 ps 9
447 19:34:57.463509 TrainedVREFDQ_A0==77
448 19:34:57.463972 TrainedVREFDQ_A1==77
449 19:34:57.464423 VrefDac_Margin_A0==22
450 19:34:57.469171 DeviceVref_Margin_A0==37
451 19:34:57.469642 VrefDac_Margin_A1==24
452 19:34:57.474697 DeviceVref_Margin_A1==37
453 19:34:57.475147
454 19:34:57.475564 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 19:34:57.475970
456 19:34:57.508307 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 19:34:57.508892 2D training succeed
458 19:34:57.513880 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 19:34:57.519556 auto size-- 65535DDR cs0 size: 2048MB
460 19:34:57.520045 DDR cs1 size: 2048MB
461 19:34:57.525104 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 19:34:57.525569 cs0 DataBus test pass
463 19:34:57.530795 cs1 DataBus test pass
464 19:34:57.531312 cs0 AddrBus test pass
465 19:34:57.531738 cs1 AddrBus test pass
466 19:34:57.532189
467 19:34:57.536335 100bdlr_step_size ps== 420
468 19:34:57.536797 result report
469 19:34:57.541877 boot times 0Enable ddr reg access
470 19:34:57.547275 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 19:34:57.560784 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 19:34:58.134352 0.0;M3 CHK:0;cm4_sp_mode 0
473 19:34:58.134753 MVN_1=0x00000000
474 19:34:58.139825 MVN_2=0x00000000
475 19:34:58.145697 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 19:34:58.146004 OPS=0x10
477 19:34:58.146220 ring efuse init
478 19:34:58.146422 chipver efuse init
479 19:34:58.151177 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 19:34:58.156849 [0.018961 Inits done]
481 19:34:58.157347 secure task start!
482 19:34:58.157825 high task start!
483 19:34:58.161383 low task start!
484 19:34:58.161813 run into bl31
485 19:34:58.168049 NOTICE: BL31: v1.3(release):4fc40b1
486 19:34:58.175908 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 19:34:58.176411 NOTICE: BL31: G12A normal boot!
488 19:34:58.201267 NOTICE: BL31: BL33 decompress pass
489 19:34:58.206964 ERROR: Error initializing runtime service opteed_fast
490 19:34:59.439926
491 19:34:59.440371
492 19:34:59.448268 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 19:34:59.448577
494 19:34:59.448800 Model: Libre Computer AML-A311D-CC Alta
495 19:34:59.656737 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 19:34:59.680180 DRAM: 2 GiB (effective 3.8 GiB)
497 19:34:59.823317 Core: 408 devices, 31 uclasses, devicetree: separate
498 19:34:59.829189 WDT: Not starting watchdog@f0d0
499 19:34:59.861318 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 19:34:59.873788 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 19:34:59.878737 ** Bad device specification mmc 0 **
502 19:34:59.889013 Card did not respond to voltage select! : -110
503 19:34:59.896646 ** Bad device specification mmc 0 **
504 19:34:59.897167 Couldn't find partition mmc 0
505 19:34:59.905032 Card did not respond to voltage select! : -110
506 19:34:59.910530 ** Bad device specification mmc 0 **
507 19:34:59.911040 Couldn't find partition mmc 0
508 19:34:59.915582 Error: could not access storage.
509 19:35:01.179146 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
510 19:35:01.179582 bl2_stage_init 0x81
511 19:35:01.184595 hw id: 0x0000 - pwm id 0x01
512 19:35:01.184896 bl2_stage_init 0xc1
513 19:35:01.185115 bl2_stage_init 0x02
514 19:35:01.185326
515 19:35:01.190221 L0:00000000
516 19:35:01.190549 L1:20000703
517 19:35:01.190774 L2:00008067
518 19:35:01.190997 L3:14000000
519 19:35:01.191209 B2:00402000
520 19:35:01.195846 B1:e0f83180
521 19:35:01.196360
522 19:35:01.196721 TE: 58150
523 19:35:01.197076
524 19:35:01.201381 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 19:35:01.201805
526 19:35:01.202160 Board ID = 1
527 19:35:01.206968 Set A53 clk to 24M
528 19:35:01.207355 Set A73 clk to 24M
529 19:35:01.207602 Set clk81 to 24M
530 19:35:01.212534 A53 clk: 1200 MHz
531 19:35:01.212859 A73 clk: 1200 MHz
532 19:35:01.213095 CLK81: 166.6M
533 19:35:01.213320 smccc: 00012aac
534 19:35:01.218133 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 19:35:01.223806 board id: 1
536 19:35:01.229536 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 19:35:01.240194 fw parse done
538 19:35:01.246275 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 19:35:01.288815 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 19:35:01.299714 PIEI prepare done
541 19:35:01.300098 fastboot data load
542 19:35:01.300347 fastboot data verify
543 19:35:01.305369 verify result: 266
544 19:35:01.310987 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 19:35:01.311338 LPDDR4 probe
546 19:35:01.311562 ddr clk to 1584MHz
547 19:35:01.318947 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 19:35:01.356273
549 19:35:01.356874 dmc_version 0001
550 19:35:01.362917 Check phy result
551 19:35:01.368845 INFO : End of CA training
552 19:35:01.369239 INFO : End of initialization
553 19:35:01.375942 INFO : Training has run successfully!
554 19:35:01.377478 Check phy result
555 19:35:01.379952 INFO : End of initialization
556 19:35:01.380483 INFO : End of read enable training
557 19:35:01.383212 INFO : End of fine write leveling
558 19:35:01.388751 INFO : End of Write leveling coarse delay
559 19:35:01.394378 INFO : Training has run successfully!
560 19:35:01.394838 Check phy result
561 19:35:01.395257 INFO : End of initialization
562 19:35:01.399936 INFO : End of read dq deskew training
563 19:35:01.405558 INFO : End of MPR read delay center optimization
564 19:35:01.406035 INFO : End of write delay center optimization
565 19:35:01.411276 INFO : End of read delay center optimization
566 19:35:01.416800 INFO : End of max read latency training
567 19:35:01.417394 INFO : Training has run successfully!
568 19:35:01.422306 1D training succeed
569 19:35:01.428286 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 19:35:01.475960 Check phy result
571 19:35:01.476519 INFO : End of initialization
572 19:35:01.497500 INFO : End of 2D read delay Voltage center optimization
573 19:35:01.517647 INFO : End of 2D read delay Voltage center optimization
574 19:35:01.569593 INFO : End of 2D write delay Voltage center optimization
575 19:35:01.619538 INFO : End of 2D write delay Voltage center optimization
576 19:35:01.624342 INFO : Training has run successfully!
577 19:35:01.624820
578 19:35:01.625245 channel==0
579 19:35:01.629921 RxClkDly_Margin_A0==88 ps 9
580 19:35:01.630379 TxDqDly_Margin_A0==98 ps 10
581 19:35:01.633201 RxClkDly_Margin_A1==88 ps 9
582 19:35:01.633654 TxDqDly_Margin_A1==98 ps 10
583 19:35:01.638753 TrainedVREFDQ_A0==74
584 19:35:01.639208 TrainedVREFDQ_A1==74
585 19:35:01.644346 VrefDac_Margin_A0==25
586 19:35:01.644796 DeviceVref_Margin_A0==40
587 19:35:01.645211 VrefDac_Margin_A1==25
588 19:35:01.649965 DeviceVref_Margin_A1==40
589 19:35:01.650422
590 19:35:01.650841
591 19:35:01.651255 channel==1
592 19:35:01.651659 RxClkDly_Margin_A0==98 ps 10
593 19:35:01.656372 TxDqDly_Margin_A0==98 ps 10
594 19:35:01.656853 RxClkDly_Margin_A1==88 ps 9
595 19:35:01.664138 TxDqDly_Margin_A1==88 ps 9
596 19:35:01.664630 TrainedVREFDQ_A0==77
597 19:35:01.665057 TrainedVREFDQ_A1==77
598 19:35:01.668300 VrefDac_Margin_A0==22
599 19:35:01.668786 DeviceVref_Margin_A0==37
600 19:35:01.672443 VrefDac_Margin_A1==24
601 19:35:01.672921 DeviceVref_Margin_A1==37
602 19:35:01.673406
603 19:35:01.678135 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 19:35:01.678641
605 19:35:01.706088 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000016 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
606 19:35:01.711599 2D training succeed
607 19:35:01.717301 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 19:35:01.717804 auto size-- 65535DDR cs0 size: 2048MB
609 19:35:01.722760 DDR cs1 size: 2048MB
610 19:35:01.723251 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 19:35:01.728343 cs0 DataBus test pass
612 19:35:01.728857 cs1 DataBus test pass
613 19:35:01.729286 cs0 AddrBus test pass
614 19:35:01.733939 cs1 AddrBus test pass
615 19:35:01.734445
616 19:35:01.734876 100bdlr_step_size ps== 420
617 19:35:01.735304 result report
618 19:35:01.739540 boot times 0Enable ddr reg access
619 19:35:01.747262 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 19:35:01.760683 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 19:35:02.332982 0.0;M3 CHK:0;cm4_sp_mode 0
622 19:35:02.333609 MVN_1=0x00000000
623 19:35:02.338553 MVN_2=0x00000000
624 19:35:02.344232 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 19:35:02.344738 OPS=0x10
626 19:35:02.345185 ring efuse init
627 19:35:02.345588 chipver efuse init
628 19:35:02.352487 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 19:35:02.352978 [0.018961 Inits done]
630 19:35:02.359965 secure task start!
631 19:35:02.360453 high task start!
632 19:35:02.360846 low task start!
633 19:35:02.361234 run into bl31
634 19:35:02.366982 NOTICE: BL31: v1.3(release):4fc40b1
635 19:35:02.374395 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 19:35:02.374833 NOTICE: BL31: G12A normal boot!
637 19:35:02.399651 NOTICE: BL31: BL33 decompress pass
638 19:35:02.405462 ERROR: Error initializing runtime service opteed_fast
639 19:35:03.638305
640 19:35:03.638737
641 19:35:03.646726 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 19:35:03.647164
643 19:35:03.647510 Model: Libre Computer AML-A311D-CC Alta
644 19:35:03.855052 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 19:35:03.878616 DRAM: 2 GiB (effective 3.8 GiB)
646 19:35:04.021623 Core: 408 devices, 31 uclasses, devicetree: separate
647 19:35:04.027350 WDT: Not starting watchdog@f0d0
648 19:35:04.059776 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 19:35:04.072218 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 19:35:04.077088 ** Bad device specification mmc 0 **
651 19:35:04.087547 Card did not respond to voltage select! : -110
652 19:35:04.095139 ** Bad device specification mmc 0 **
653 19:35:04.095481 Couldn't find partition mmc 0
654 19:35:04.103388 Card did not respond to voltage select! : -110
655 19:35:04.108867 ** Bad device specification mmc 0 **
656 19:35:04.109219 Couldn't find partition mmc 0
657 19:35:04.113892 Error: could not access storage.
658 19:35:04.457451 Net: eth0: ethernet@ff3f0000
659 19:35:04.457835 starting USB...
660 19:35:04.709281 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 19:35:04.709699 Starting the controller
662 19:35:04.716203 USB XHCI 1.10
663 19:35:06.427795 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 19:35:06.428446 bl2_stage_init 0x01
665 19:35:06.428715 bl2_stage_init 0x81
666 19:35:06.433253 hw id: 0x0000 - pwm id 0x01
667 19:35:06.433593 bl2_stage_init 0xc1
668 19:35:06.433827 bl2_stage_init 0x02
669 19:35:06.434040
670 19:35:06.438861 L0:00000000
671 19:35:06.439335 L1:20000703
672 19:35:06.439694 L2:00008067
673 19:35:06.440087 L3:14000000
674 19:35:06.441827 B2:00402000
675 19:35:06.442120 B1:e0f83180
676 19:35:06.442336
677 19:35:06.442549 TE: 58124
678 19:35:06.442769
679 19:35:06.452930 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 19:35:06.453456
681 19:35:06.453808 Board ID = 1
682 19:35:06.454048 Set A53 clk to 24M
683 19:35:06.454256 Set A73 clk to 24M
684 19:35:06.458559 Set clk81 to 24M
685 19:35:06.458895 A53 clk: 1200 MHz
686 19:35:06.459111 A73 clk: 1200 MHz
687 19:35:06.464246 CLK81: 166.6M
688 19:35:06.464971 smccc: 00012a92
689 19:35:06.469717 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 19:35:06.470373 board id: 1
691 19:35:06.478327 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 19:35:06.489010 fw parse done
693 19:35:06.495017 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 19:35:06.537545 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 19:35:06.548441 PIEI prepare done
696 19:35:06.549136 fastboot data load
697 19:35:06.549700 fastboot data verify
698 19:35:06.554058 verify result: 266
699 19:35:06.559728 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 19:35:06.560527 LPDDR4 probe
701 19:35:06.560994 ddr clk to 1584MHz
702 19:35:06.567609 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 19:35:06.605000
704 19:35:06.605412 dmc_version 0001
705 19:35:06.611537 Check phy result
706 19:35:06.617419 INFO : End of CA training
707 19:35:06.617930 INFO : End of initialization
708 19:35:06.622981 INFO : Training has run successfully!
709 19:35:06.623339 Check phy result
710 19:35:06.628642 INFO : End of initialization
711 19:35:06.629129 INFO : End of read enable training
712 19:35:06.632024 INFO : End of fine write leveling
713 19:35:06.637543 INFO : End of Write leveling coarse delay
714 19:35:06.643143 INFO : Training has run successfully!
715 19:35:06.643499 Check phy result
716 19:35:06.643716 INFO : End of initialization
717 19:35:06.648727 INFO : End of read dq deskew training
718 19:35:06.652289 INFO : End of MPR read delay center optimization
719 19:35:06.657825 INFO : End of write delay center optimization
720 19:35:06.663388 INFO : End of read delay center optimization
721 19:35:06.663742 INFO : End of max read latency training
722 19:35:06.669000 INFO : Training has run successfully!
723 19:35:06.669489 1D training succeed
724 19:35:06.677002 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 19:35:06.724675 Check phy result
726 19:35:06.725088 INFO : End of initialization
727 19:35:06.746422 INFO : End of 2D read delay Voltage center optimization
728 19:35:06.766511 INFO : End of 2D read delay Voltage center optimization
729 19:35:06.818360 INFO : End of 2D write delay Voltage center optimization
730 19:35:06.867578 INFO : End of 2D write delay Voltage center optimization
731 19:35:06.873223 INFO : Training has run successfully!
732 19:35:06.873855
733 19:35:06.874351 channel==0
734 19:35:06.878872 RxClkDly_Margin_A0==88 ps 9
735 19:35:06.879507 TxDqDly_Margin_A0==98 ps 10
736 19:35:06.882260 RxClkDly_Margin_A1==88 ps 9
737 19:35:06.882834 TxDqDly_Margin_A1==98 ps 10
738 19:35:06.887912 TrainedVREFDQ_A0==74
739 19:35:06.888579 TrainedVREFDQ_A1==74
740 19:35:06.889073 VrefDac_Margin_A0==25
741 19:35:06.893526 DeviceVref_Margin_A0==40
742 19:35:06.894135 VrefDac_Margin_A1==25
743 19:35:06.899195 DeviceVref_Margin_A1==40
744 19:35:06.899773
745 19:35:06.900301
746 19:35:06.900766 channel==1
747 19:35:06.901222 RxClkDly_Margin_A0==98 ps 10
748 19:35:06.902243 TxDqDly_Margin_A0==88 ps 9
749 19:35:06.908130 RxClkDly_Margin_A1==88 ps 9
750 19:35:06.908799 TxDqDly_Margin_A1==88 ps 9
751 19:35:06.909281 TrainedVREFDQ_A0==77
752 19:35:06.913666 TrainedVREFDQ_A1==77
753 19:35:06.914245 VrefDac_Margin_A0==22
754 19:35:06.919315 DeviceVref_Margin_A0==37
755 19:35:06.919895 VrefDac_Margin_A1==24
756 19:35:06.920404 DeviceVref_Margin_A1==37
757 19:35:06.920867
758 19:35:06.924818 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 19:35:06.925402
760 19:35:06.958122 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
761 19:35:06.958567 2D training succeed
762 19:35:06.963898 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 19:35:06.969737 auto size-- 65535DDR cs0 size: 2048MB
764 19:35:06.970114 DDR cs1 size: 2048MB
765 19:35:06.975000 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 19:35:06.976061 cs0 DataBus test pass
767 19:35:06.976528 cs1 DataBus test pass
768 19:35:06.980451 cs0 AddrBus test pass
769 19:35:06.980959 cs1 AddrBus test pass
770 19:35:06.981398
771 19:35:06.986115 100bdlr_step_size ps== 420
772 19:35:06.986654 result report
773 19:35:06.986988 boot times 0Enable ddr reg access
774 19:35:06.995889 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 19:35:07.009358 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 19:35:07.583244 0.0;M3 CHK:0;cm4_sp_mode 0
777 19:35:07.583931 MVN_1=0x00000000
778 19:35:07.586831 MVN_2=0x00000000
779 19:35:07.592607 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 19:35:07.593201 OPS=0x10
781 19:35:07.593740 ring efuse init
782 19:35:07.593977 chipver efuse init
783 19:35:07.598157 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 19:35:07.604184 [0.018960 Inits done]
785 19:35:07.604718 secure task start!
786 19:35:07.605167 high task start!
787 19:35:07.608300 low task start!
788 19:35:07.608780 run into bl31
789 19:35:07.614990 NOTICE: BL31: v1.3(release):4fc40b1
790 19:35:07.622773 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 19:35:07.623044 NOTICE: BL31: G12A normal boot!
792 19:35:07.648230 NOTICE: BL31: BL33 decompress pass
793 19:35:07.653833 ERROR: Error initializing runtime service opteed_fast
794 19:35:08.886836
795 19:35:08.887284
796 19:35:08.895159 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 19:35:08.895519
798 19:35:08.895732 Model: Libre Computer AML-A311D-CC Alta
799 19:35:09.103719 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 19:35:09.127031 DRAM: 2 GiB (effective 3.8 GiB)
801 19:35:09.270104 Core: 408 devices, 31 uclasses, devicetree: separate
802 19:35:09.276103 WDT: Not starting watchdog@f0d0
803 19:35:09.308275 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 19:35:09.320700 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 19:35:09.325717 ** Bad device specification mmc 0 **
806 19:35:09.336079 Card did not respond to voltage select! : -110
807 19:35:09.343688 ** Bad device specification mmc 0 **
808 19:35:09.344327 Couldn't find partition mmc 0
809 19:35:09.352067 Card did not respond to voltage select! : -110
810 19:35:09.357549 ** Bad device specification mmc 0 **
811 19:35:09.358144 Couldn't find partition mmc 0
812 19:35:09.362659 Error: could not access storage.
813 19:35:09.706099 Net: eth0: ethernet@ff3f0000
814 19:35:09.706788 starting USB...
815 19:35:09.957866 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 19:35:09.958557 Starting the controller
817 19:35:09.964882 USB XHCI 1.10
818 19:35:12.128108 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 19:35:12.128815 bl2_stage_init 0x01
820 19:35:12.129315 bl2_stage_init 0x81
821 19:35:12.133479 hw id: 0x0000 - pwm id 0x01
822 19:35:12.133870 bl2_stage_init 0xc1
823 19:35:12.134116 bl2_stage_init 0x02
824 19:35:12.134354
825 19:35:12.139105 L0:00000000
826 19:35:12.139497 L1:20000703
827 19:35:12.139710 L2:00008067
828 19:35:12.139923 L3:14000000
829 19:35:12.144617 B2:00402000
830 19:35:12.144976 B1:e0f83180
831 19:35:12.145225
832 19:35:12.145456 TE: 58159
833 19:35:12.145699
834 19:35:12.150477 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 19:35:12.150882
836 19:35:12.151124 Board ID = 1
837 19:35:12.156760 Set A53 clk to 24M
838 19:35:12.157083 Set A73 clk to 24M
839 19:35:12.157320 Set clk81 to 24M
840 19:35:12.161597 A53 clk: 1200 MHz
841 19:35:12.161996 A73 clk: 1200 MHz
842 19:35:12.162234 CLK81: 166.6M
843 19:35:12.162494 smccc: 00012ab5
844 19:35:12.167160 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 19:35:12.172714 board id: 1
846 19:35:12.178552 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 19:35:12.189269 fw parse done
848 19:35:12.195299 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 19:35:12.237926 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 19:35:12.248762 PIEI prepare done
851 19:35:12.249401 fastboot data load
852 19:35:12.249685 fastboot data verify
853 19:35:12.254471 verify result: 266
854 19:35:12.259962 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 19:35:12.260477 LPDDR4 probe
856 19:35:12.260708 ddr clk to 1584MHz
857 19:35:12.268059 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 19:35:12.305159
859 19:35:12.305609 dmc_version 0001
860 19:35:12.311878 Check phy result
861 19:35:12.317749 INFO : End of CA training
862 19:35:12.318179 INFO : End of initialization
863 19:35:12.323304 INFO : Training has run successfully!
864 19:35:12.323955 Check phy result
865 19:35:12.329348 INFO : End of initialization
866 19:35:12.329763 INFO : End of read enable training
867 19:35:12.332190 INFO : End of fine write leveling
868 19:35:12.337834 INFO : End of Write leveling coarse delay
869 19:35:12.343239 INFO : Training has run successfully!
870 19:35:12.343515 Check phy result
871 19:35:12.343744 INFO : End of initialization
872 19:35:12.349386 INFO : End of read dq deskew training
873 19:35:12.354449 INFO : End of MPR read delay center optimization
874 19:35:12.354769 INFO : End of write delay center optimization
875 19:35:12.359959 INFO : End of read delay center optimization
876 19:35:12.365600 INFO : End of max read latency training
877 19:35:12.365954 INFO : Training has run successfully!
878 19:35:12.371220 1D training succeed
879 19:35:12.377340 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 19:35:12.425003 Check phy result
881 19:35:12.425638 INFO : End of initialization
882 19:35:12.446470 INFO : End of 2D read delay Voltage center optimization
883 19:35:12.465732 INFO : End of 2D read delay Voltage center optimization
884 19:35:12.517679 INFO : End of 2D write delay Voltage center optimization
885 19:35:12.567010 INFO : End of 2D write delay Voltage center optimization
886 19:35:12.572530 INFO : Training has run successfully!
887 19:35:12.573124
888 19:35:12.573545 channel==0
889 19:35:12.578078 RxClkDly_Margin_A0==88 ps 9
890 19:35:12.578579 TxDqDly_Margin_A0==98 ps 10
891 19:35:12.583709 RxClkDly_Margin_A1==88 ps 9
892 19:35:12.584226 TxDqDly_Margin_A1==98 ps 10
893 19:35:12.584634 TrainedVREFDQ_A0==74
894 19:35:12.589302 TrainedVREFDQ_A1==74
895 19:35:12.589811 VrefDac_Margin_A0==25
896 19:35:12.590227 DeviceVref_Margin_A0==40
897 19:35:12.594864 VrefDac_Margin_A1==25
898 19:35:12.595317 DeviceVref_Margin_A1==40
899 19:35:12.595714
900 19:35:12.596142
901 19:35:12.600424 channel==1
902 19:35:12.600883 RxClkDly_Margin_A0==88 ps 9
903 19:35:12.601298 TxDqDly_Margin_A0==88 ps 9
904 19:35:12.606029 RxClkDly_Margin_A1==88 ps 9
905 19:35:12.606483 TxDqDly_Margin_A1==88 ps 9
906 19:35:12.611586 TrainedVREFDQ_A0==77
907 19:35:12.612094 TrainedVREFDQ_A1==77
908 19:35:12.612509 VrefDac_Margin_A0==23
909 19:35:12.617262 DeviceVref_Margin_A0==37
910 19:35:12.617708 VrefDac_Margin_A1==24
911 19:35:12.622884 DeviceVref_Margin_A1==37
912 19:35:12.623320
913 19:35:12.623714 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 19:35:12.624136
915 19:35:12.656303 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
916 19:35:12.656688 2D training succeed
917 19:35:12.661943 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 19:35:12.667565 auto size-- 65535DDR cs0 size: 2048MB
919 19:35:12.668064 DDR cs1 size: 2048MB
920 19:35:12.673182 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 19:35:12.673632 cs0 DataBus test pass
922 19:35:12.678810 cs1 DataBus test pass
923 19:35:12.679267 cs0 AddrBus test pass
924 19:35:12.679657 cs1 AddrBus test pass
925 19:35:12.680086
926 19:35:12.684395 100bdlr_step_size ps== 420
927 19:35:12.684853 result report
928 19:35:12.689968 boot times 0Enable ddr reg access
929 19:35:12.695150 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 19:35:12.708613 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 19:35:13.280656 0.0;M3 CHK:0;cm4_sp_mode 0
932 19:35:13.281385 MVN_1=0x00000000
933 19:35:13.286165 MVN_2=0x00000000
934 19:35:13.291859 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 19:35:13.292526 OPS=0x10
936 19:35:13.293012 ring efuse init
937 19:35:13.293337 chipver efuse init
938 19:35:13.297578 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 19:35:13.303150 [0.018961 Inits done]
940 19:35:13.303741 secure task start!
941 19:35:13.304265 high task start!
942 19:35:13.307708 low task start!
943 19:35:13.308284 run into bl31
944 19:35:13.314276 NOTICE: BL31: v1.3(release):4fc40b1
945 19:35:13.322256 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 19:35:13.322897 NOTICE: BL31: G12A normal boot!
947 19:35:13.348190 NOTICE: BL31: BL33 decompress pass
948 19:35:13.353843 ERROR: Error initializing runtime service opteed_fast
949 19:35:14.586903
950 19:35:14.587343
951 19:35:14.595228 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 19:35:14.595585
953 19:35:14.595928 Model: Libre Computer AML-A311D-CC Alta
954 19:35:14.803577 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 19:35:14.827007 DRAM: 2 GiB (effective 3.8 GiB)
956 19:35:14.970040 Core: 408 devices, 31 uclasses, devicetree: separate
957 19:35:14.975783 WDT: Not starting watchdog@f0d0
958 19:35:15.008238 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 19:35:15.020571 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 19:35:15.025586 ** Bad device specification mmc 0 **
961 19:35:15.035888 Card did not respond to voltage select! : -110
962 19:35:15.043479 ** Bad device specification mmc 0 **
963 19:35:15.044127 Couldn't find partition mmc 0
964 19:35:15.051844 Card did not respond to voltage select! : -110
965 19:35:15.057379 ** Bad device specification mmc 0 **
966 19:35:15.057739 Couldn't find partition mmc 0
967 19:35:15.062414 Error: could not access storage.
968 19:35:15.404802 Net: eth0: ethernet@ff3f0000
969 19:35:15.405239 starting USB...
970 19:35:15.656604 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 19:35:15.657066 Starting the controller
972 19:35:15.664177 USB XHCI 1.10
973 19:35:17.217640 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 19:35:17.225963 scanning usb for storage devices... 0 Storage Device(s) found
976 19:35:17.277192 Hit any key to stop autoboot: 1
977 19:35:17.278288 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 19:35:17.278672 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
979 19:35:17.278948 Setting prompt string to ['=>']
980 19:35:17.279212 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
981 19:35:17.283458 0
982 19:35:17.284108 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 19:35:17.284409 Sending with 10 millisecond of delay
985 19:35:18.421175 => setenv autoload no
986 19:35:18.432095 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 19:35:18.438931 setenv autoload no
988 19:35:18.439890 Sending with 10 millisecond of delay
990 19:35:20.243598 => setenv initrd_high 0xffffffff
991 19:35:20.254483 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
992 19:35:20.255445 setenv initrd_high 0xffffffff
993 19:35:20.256194 Sending with 10 millisecond of delay
995 19:35:21.874166 => setenv fdt_high 0xffffffff
996 19:35:21.884722 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 19:35:21.885241 setenv fdt_high 0xffffffff
998 19:35:21.885712 Sending with 10 millisecond of delay
1000 19:35:22.177149 => dhcp
1001 19:35:22.187724 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 19:35:22.188320 dhcp
1003 19:35:22.188574 Speed: 1000, full duplex
1004 19:35:22.188805 BOOTP broadcast 1
1005 19:35:22.196507 DHCP client bound to address 192.168.6.27 (9 ms)
1006 19:35:22.197043 Sending with 10 millisecond of delay
1008 19:35:23.873353 => setenv serverip 192.168.6.2
1009 19:35:23.883929 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 19:35:23.884507 setenv serverip 192.168.6.2
1011 19:35:23.884980 Sending with 10 millisecond of delay
1013 19:35:27.608970 => tftpboot 0x01080000 954167/tftp-deploy-qhv8xqzw/kernel/uImage
1014 19:35:27.619593 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 19:35:27.620212 tftpboot 0x01080000 954167/tftp-deploy-qhv8xqzw/kernel/uImage
1016 19:35:27.620479 Speed: 1000, full duplex
1017 19:35:27.620713 Using ethernet@ff3f0000 device
1018 19:35:27.622410 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 19:35:27.627963 Filename '954167/tftp-deploy-qhv8xqzw/kernel/uImage'.
1020 19:35:27.631802 Load address: 0x1080000
1021 19:35:30.544529 Loading: *################################################## 43.6 MiB
1022 19:35:30.547861 14.9 MiB/s
1023 19:35:30.548498 done
1024 19:35:30.548913 Bytes transferred = 45713984 (2b98a40 hex)
1025 19:35:30.549607 Sending with 10 millisecond of delay
1027 19:35:35.238584 =>tftpboot 0x08000000 954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
1028 19:35:35.249203 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 19:35:35.249725 tftpboot 0x08000000 954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot
1030 19:35:35.249955 Speed: 1000, full duplex
1031 19:35:35.250161 Using ethernet@ff3f0000 device
1032 19:35:35.251957 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 19:35:35.260662 Filename '954167/tftp-deploy-qhv8xqzw/ramdisk/ramdisk.cpio.gz.uboot'.
1034 19:35:35.261091 Load address: 0x8000000
1035 19:35:42.371364 Loading: *##################T ############################### UDP wrong checksum 00000005 0000b0af
1036 19:35:47.371830 T UDP wrong checksum 00000005 0000b0af
1037 19:35:57.374792 T T UDP wrong checksum 00000005 0000b0af
1038 19:36:13.322171 T T T UDP wrong checksum 000000ff 00005521
1039 19:36:13.377457 UDP wrong checksum 000000ff 0000de13
1040 19:36:17.378834 T UDP wrong checksum 00000005 0000b0af
1041 19:36:32.382890 T T
1042 19:36:32.383528 Retry count exceeded; starting again
1044 19:36:32.384961 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1047 19:36:32.386833 end: 2.4 uboot-commands (duration 00:01:47) [common]
1049 19:36:32.388299 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 19:36:32.389401 end: 2 uboot-action (duration 00:01:47) [common]
1053 19:36:32.390906 Cleaning after the job
1054 19:36:32.391450 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/ramdisk
1055 19:36:32.393020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/kernel
1056 19:36:32.439096 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/dtb
1057 19:36:32.440016 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/nfsrootfs
1058 19:36:32.467763 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954167/tftp-deploy-qhv8xqzw/modules
1059 19:36:32.471672 start: 4.1 power-off (timeout 00:00:30) [common]
1060 19:36:32.472560 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 19:36:32.506719 >> OK - accepted request
1062 19:36:32.508873 Returned 0 in 0 seconds
1063 19:36:32.609743 end: 4.1 power-off (duration 00:00:00) [common]
1065 19:36:32.610744 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 19:36:32.611411 Listened to connection for namespace 'common' for up to 1s
1067 19:36:33.612320 Finalising connection for namespace 'common'
1068 19:36:33.612829 Disconnecting from shell: Finalise
1069 19:36:33.613108 =>
1070 19:36:33.713786 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 19:36:33.714234 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/954167
1072 19:36:36.504135 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/954167
1073 19:36:36.504753 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.