Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:47:25.946953 lava-dispatcher, installed at version: 2024.01
2 19:47:25.947739 start: 0 validate
3 19:47:25.948234 Start time: 2024-11-07 19:47:25.948204+00:00 (UTC)
4 19:47:25.948766 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:47:25.949305 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:47:25.993540 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:47:25.994103 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:47:26.029011 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:47:26.029669 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 19:47:26.063129 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:47:26.063811 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:47:26.097198 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:47:26.097662 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-241-gd613d4c396116%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:47:26.135825 validate duration: 0.19
16 19:47:26.136675 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:47:26.136994 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:47:26.137281 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:47:26.138072 Not decompressing ramdisk as can be used compressed.
20 19:47:26.138949 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 19:47:26.139513 saving as /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/ramdisk/initrd.cpio.gz
22 19:47:26.140109 total size: 5628140 (5 MB)
23 19:47:26.181638 progress 0 % (0 MB)
24 19:47:26.189070 progress 5 % (0 MB)
25 19:47:26.196773 progress 10 % (0 MB)
26 19:47:26.203612 progress 15 % (0 MB)
27 19:47:26.209723 progress 20 % (1 MB)
28 19:47:26.213387 progress 25 % (1 MB)
29 19:47:26.217367 progress 30 % (1 MB)
30 19:47:26.221378 progress 35 % (1 MB)
31 19:47:26.224996 progress 40 % (2 MB)
32 19:47:26.228994 progress 45 % (2 MB)
33 19:47:26.232602 progress 50 % (2 MB)
34 19:47:26.236607 progress 55 % (2 MB)
35 19:47:26.240692 progress 60 % (3 MB)
36 19:47:26.244291 progress 65 % (3 MB)
37 19:47:26.248283 progress 70 % (3 MB)
38 19:47:26.251825 progress 75 % (4 MB)
39 19:47:26.255816 progress 80 % (4 MB)
40 19:47:26.259371 progress 85 % (4 MB)
41 19:47:26.263326 progress 90 % (4 MB)
42 19:47:26.267180 progress 95 % (5 MB)
43 19:47:26.270440 progress 100 % (5 MB)
44 19:47:26.271116 5 MB downloaded in 0.13 s (40.98 MB/s)
45 19:47:26.271702 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:47:26.272672 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:47:26.272993 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:47:26.273286 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:47:26.273887 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/kernel/Image
51 19:47:26.274214 saving as /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/kernel/Image
52 19:47:26.274444 total size: 45713920 (43 MB)
53 19:47:26.274663 No compression specified
54 19:47:26.314658 progress 0 % (0 MB)
55 19:47:26.343903 progress 5 % (2 MB)
56 19:47:26.373119 progress 10 % (4 MB)
57 19:47:26.402404 progress 15 % (6 MB)
58 19:47:26.433037 progress 20 % (8 MB)
59 19:47:26.461615 progress 25 % (10 MB)
60 19:47:26.490692 progress 30 % (13 MB)
61 19:47:26.519848 progress 35 % (15 MB)
62 19:47:26.549311 progress 40 % (17 MB)
63 19:47:26.578335 progress 45 % (19 MB)
64 19:47:26.607468 progress 50 % (21 MB)
65 19:47:26.636952 progress 55 % (24 MB)
66 19:47:26.666148 progress 60 % (26 MB)
67 19:47:26.694938 progress 65 % (28 MB)
68 19:47:26.724349 progress 70 % (30 MB)
69 19:47:26.753928 progress 75 % (32 MB)
70 19:47:26.783316 progress 80 % (34 MB)
71 19:47:26.812295 progress 85 % (37 MB)
72 19:47:26.841763 progress 90 % (39 MB)
73 19:47:26.871167 progress 95 % (41 MB)
74 19:47:26.899866 progress 100 % (43 MB)
75 19:47:26.900415 43 MB downloaded in 0.63 s (69.65 MB/s)
76 19:47:26.900915 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:47:26.901770 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:47:26.902045 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:47:26.902312 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:47:26.902900 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 19:47:26.903212 saving as /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 19:47:26.903439 total size: 53209 (0 MB)
84 19:47:26.903664 No compression specified
85 19:47:26.946122 progress 61 % (0 MB)
86 19:47:26.946972 progress 100 % (0 MB)
87 19:47:26.947514 0 MB downloaded in 0.04 s (1.15 MB/s)
88 19:47:26.948010 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:47:26.948840 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:47:26.949106 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:47:26.949372 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:47:26.949936 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 19:47:26.950221 saving as /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/nfsrootfs/full.rootfs.tar
95 19:47:26.950442 total size: 474398908 (452 MB)
96 19:47:26.950669 Using unxz to decompress xz
97 19:47:26.989784 progress 0 % (0 MB)
98 19:47:28.096056 progress 5 % (22 MB)
99 19:47:29.553524 progress 10 % (45 MB)
100 19:47:30.002137 progress 15 % (67 MB)
101 19:47:30.777947 progress 20 % (90 MB)
102 19:47:31.316145 progress 25 % (113 MB)
103 19:47:31.686760 progress 30 % (135 MB)
104 19:47:32.301525 progress 35 % (158 MB)
105 19:47:33.227584 progress 40 % (181 MB)
106 19:47:33.988700 progress 45 % (203 MB)
107 19:47:34.545062 progress 50 % (226 MB)
108 19:47:35.230008 progress 55 % (248 MB)
109 19:47:36.465285 progress 60 % (271 MB)
110 19:47:37.957773 progress 65 % (294 MB)
111 19:47:39.636821 progress 70 % (316 MB)
112 19:47:42.778623 progress 75 % (339 MB)
113 19:47:45.276857 progress 80 % (361 MB)
114 19:47:48.689835 progress 85 % (384 MB)
115 19:47:52.456620 progress 90 % (407 MB)
116 19:47:55.662452 progress 95 % (429 MB)
117 19:47:58.855380 progress 100 % (452 MB)
118 19:47:58.869361 452 MB downloaded in 31.92 s (14.17 MB/s)
119 19:47:58.869926 end: 1.4.1 http-download (duration 00:00:32) [common]
121 19:47:58.870750 end: 1.4 download-retry (duration 00:00:32) [common]
122 19:47:58.871015 start: 1.5 download-retry (timeout 00:09:27) [common]
123 19:47:58.871274 start: 1.5.1 http-download (timeout 00:09:27) [common]
124 19:47:58.871748 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-241-gd613d4c396116/arm64/defconfig/gcc-12/modules.tar.xz
125 19:47:58.872037 saving as /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/modules/modules.tar
126 19:47:58.872497 total size: 11613380 (11 MB)
127 19:47:58.872958 Using unxz to decompress xz
128 19:47:58.916679 progress 0 % (0 MB)
129 19:47:58.984620 progress 5 % (0 MB)
130 19:47:59.061982 progress 10 % (1 MB)
131 19:47:59.161769 progress 15 % (1 MB)
132 19:47:59.253700 progress 20 % (2 MB)
133 19:47:59.334866 progress 25 % (2 MB)
134 19:47:59.411506 progress 30 % (3 MB)
135 19:47:59.492302 progress 35 % (3 MB)
136 19:47:59.567167 progress 40 % (4 MB)
137 19:47:59.644145 progress 45 % (5 MB)
138 19:47:59.729327 progress 50 % (5 MB)
139 19:47:59.807560 progress 55 % (6 MB)
140 19:47:59.896816 progress 60 % (6 MB)
141 19:47:59.980929 progress 65 % (7 MB)
142 19:48:00.064884 progress 70 % (7 MB)
143 19:48:00.146542 progress 75 % (8 MB)
144 19:48:00.234682 progress 80 % (8 MB)
145 19:48:00.318489 progress 85 % (9 MB)
146 19:48:00.401607 progress 90 % (9 MB)
147 19:48:00.483600 progress 95 % (10 MB)
148 19:48:00.565382 progress 100 % (11 MB)
149 19:48:00.577921 11 MB downloaded in 1.71 s (6.49 MB/s)
150 19:48:00.579426 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:48:00.582284 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:48:00.583217 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 19:48:00.584105 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 19:48:16.875078 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/954186/extract-nfsrootfs-2sgrsvgv
156 19:48:16.875678 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 19:48:16.875965 start: 1.6.2 lava-overlay (timeout 00:09:09) [common]
158 19:48:16.880510 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io
159 19:48:16.883270 makedir: /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin
160 19:48:16.883893 makedir: /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/tests
161 19:48:16.884269 makedir: /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/results
162 19:48:16.884637 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-add-keys
163 19:48:16.885214 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-add-sources
164 19:48:16.885761 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-background-process-start
165 19:48:16.886290 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-background-process-stop
166 19:48:16.886847 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-common-functions
167 19:48:16.887360 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-echo-ipv4
168 19:48:16.887869 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-install-packages
169 19:48:16.888426 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-installed-packages
170 19:48:16.888950 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-os-build
171 19:48:16.889456 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-probe-channel
172 19:48:16.889979 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-probe-ip
173 19:48:16.890476 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-target-ip
174 19:48:16.890951 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-target-mac
175 19:48:16.891438 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-target-storage
176 19:48:16.891959 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-case
177 19:48:16.892525 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-event
178 19:48:16.893036 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-feedback
179 19:48:16.893553 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-raise
180 19:48:16.894059 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-reference
181 19:48:16.894561 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-runner
182 19:48:16.895071 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-set
183 19:48:16.895575 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-test-shell
184 19:48:16.896138 Updating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-install-packages (oe)
185 19:48:16.896744 Updating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/bin/lava-installed-packages (oe)
186 19:48:16.897217 Creating /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/environment
187 19:48:16.897623 LAVA metadata
188 19:48:16.897905 - LAVA_JOB_ID=954186
189 19:48:16.898122 - LAVA_DISPATCHER_IP=192.168.6.2
190 19:48:16.898522 start: 1.6.2.1 ssh-authorize (timeout 00:09:09) [common]
191 19:48:16.899571 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 19:48:16.899914 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:09) [common]
193 19:48:16.900156 skipped lava-vland-overlay
194 19:48:16.900404 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 19:48:16.900659 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:09) [common]
196 19:48:16.900885 skipped lava-multinode-overlay
197 19:48:16.901130 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 19:48:16.901383 start: 1.6.2.4 test-definition (timeout 00:09:09) [common]
199 19:48:16.901642 Loading test definitions
200 19:48:16.901926 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:09) [common]
201 19:48:16.902148 Using /lava-954186 at stage 0
202 19:48:16.903439 uuid=954186_1.6.2.4.1 testdef=None
203 19:48:16.903806 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 19:48:16.904109 start: 1.6.2.4.2 test-overlay (timeout 00:09:09) [common]
205 19:48:16.905959 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 19:48:16.906789 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:09) [common]
208 19:48:16.909999 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 19:48:16.910894 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:09) [common]
211 19:48:16.913396 runner path: /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 954186_1.6.2.4.1
212 19:48:16.914041 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 19:48:16.914845 Creating lava-test-runner.conf files
215 19:48:16.915075 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/954186/lava-overlay-4w_x67io/lava-954186/0 for stage 0
216 19:48:16.915500 - 0_v4l2-decoder-conformance-vp9
217 19:48:16.915895 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 19:48:16.916230 start: 1.6.2.5 compress-overlay (timeout 00:09:09) [common]
219 19:48:16.940864 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 19:48:16.941320 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:09) [common]
221 19:48:16.941584 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 19:48:16.941852 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 19:48:16.942115 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:09) [common]
224 19:48:17.619242 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 19:48:17.619723 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 19:48:17.619971 extracting modules file /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954186/extract-nfsrootfs-2sgrsvgv
227 19:48:18.977998 extracting modules file /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk
228 19:48:20.362076 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 19:48:20.362563 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 19:48:20.362840 [common] Applying overlay to NFS
231 19:48:20.363053 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954186/compress-overlay-nxdyimge/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/954186/extract-nfsrootfs-2sgrsvgv
232 19:48:20.392176 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 19:48:20.392588 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 19:48:20.392857 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 19:48:20.393084 Converting downloaded kernel to a uImage
236 19:48:20.393391 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/kernel/Image /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/kernel/uImage
237 19:48:20.860926 output: Image Name:
238 19:48:20.861355 output: Created: Thu Nov 7 19:48:20 2024
239 19:48:20.861567 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 19:48:20.861772 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 19:48:20.861974 output: Load Address: 01080000
242 19:48:20.862172 output: Entry Point: 01080000
243 19:48:20.862369 output:
244 19:48:20.862703 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 19:48:20.862967 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 19:48:20.863232 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 19:48:20.863482 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 19:48:20.863738 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 19:48:20.864022 Building ramdisk /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk
250 19:48:23.082566 >> 166792 blocks
251 19:48:30.854608 Adding RAMdisk u-boot header.
252 19:48:30.855050 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk.cpio.gz.uboot
253 19:48:31.106817 output: Image Name:
254 19:48:31.107242 output: Created: Thu Nov 7 19:48:30 2024
255 19:48:31.107457 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 19:48:31.107663 output: Data Size: 23433711 Bytes = 22884.48 KiB = 22.35 MiB
257 19:48:31.107864 output: Load Address: 00000000
258 19:48:31.108210 output: Entry Point: 00000000
259 19:48:31.108653 output:
260 19:48:31.109726 rename /var/lib/lava/dispatcher/tmp/954186/extract-overlay-ramdisk-tyaagtly/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
261 19:48:31.110488 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 19:48:31.111083 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 19:48:31.111658 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 19:48:31.112193 No LXC device requested
265 19:48:31.112748 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 19:48:31.113306 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 19:48:31.113848 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 19:48:31.114301 Checking files for TFTP limit of 4294967296 bytes.
269 19:48:31.117298 end: 1 tftp-deploy (duration 00:01:05) [common]
270 19:48:31.117919 start: 2 uboot-action (timeout 00:05:00) [common]
271 19:48:31.118487 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 19:48:31.119027 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 19:48:31.119571 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 19:48:31.120162 Using kernel file from prepare-kernel: 954186/tftp-deploy-2ba4v_mi/kernel/uImage
275 19:48:31.120857 substitutions:
276 19:48:31.121301 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 19:48:31.121736 - {DTB_ADDR}: 0x01070000
278 19:48:31.122168 - {DTB}: 954186/tftp-deploy-2ba4v_mi/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 19:48:31.122601 - {INITRD}: 954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
280 19:48:31.123034 - {KERNEL_ADDR}: 0x01080000
281 19:48:31.123461 - {KERNEL}: 954186/tftp-deploy-2ba4v_mi/kernel/uImage
282 19:48:31.123891 - {LAVA_MAC}: None
283 19:48:31.124398 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/954186/extract-nfsrootfs-2sgrsvgv
284 19:48:31.124838 - {NFS_SERVER_IP}: 192.168.6.2
285 19:48:31.125264 - {PRESEED_CONFIG}: None
286 19:48:31.125687 - {PRESEED_LOCAL}: None
287 19:48:31.126110 - {RAMDISK_ADDR}: 0x08000000
288 19:48:31.126530 - {RAMDISK}: 954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
289 19:48:31.126952 - {ROOT_PART}: None
290 19:48:31.127374 - {ROOT}: None
291 19:48:31.127914 - {SERVER_IP}: 192.168.6.2
292 19:48:31.128424 - {TEE_ADDR}: 0x83000000
293 19:48:31.128860 - {TEE}: None
294 19:48:31.129290 Parsed boot commands:
295 19:48:31.129707 - setenv autoload no
296 19:48:31.130132 - setenv initrd_high 0xffffffff
297 19:48:31.130557 - setenv fdt_high 0xffffffff
298 19:48:31.130980 - dhcp
299 19:48:31.131402 - setenv serverip 192.168.6.2
300 19:48:31.131821 - tftpboot 0x01080000 954186/tftp-deploy-2ba4v_mi/kernel/uImage
301 19:48:31.132283 - tftpboot 0x08000000 954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
302 19:48:31.132715 - tftpboot 0x01070000 954186/tftp-deploy-2ba4v_mi/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 19:48:31.133139 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/954186/extract-nfsrootfs-2sgrsvgv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 19:48:31.133578 - bootm 0x01080000 0x08000000 0x01070000
305 19:48:31.134122 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 19:48:31.135742 start: 2.3 connect-device (timeout 00:05:00) [common]
308 19:48:31.136230 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 19:48:31.151622 Setting prompt string to ['lava-test: # ']
310 19:48:31.153238 end: 2.3 connect-device (duration 00:00:00) [common]
311 19:48:31.153881 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 19:48:31.154472 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 19:48:31.155051 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 19:48:31.156372 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 19:48:31.191299 >> OK - accepted request
316 19:48:31.193442 Returned 0 in 0 seconds
317 19:48:31.294602 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 19:48:31.296332 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 19:48:31.296960 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 19:48:31.297512 Setting prompt string to ['Hit any key to stop autoboot']
322 19:48:31.298008 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 19:48:31.299674 Trying 192.168.56.21...
324 19:48:31.300215 Connected to conserv1.
325 19:48:31.300677 Escape character is '^]'.
326 19:48:31.301130
327 19:48:31.301587 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 19:48:31.302048
329 19:48:38.966484 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 19:48:38.966914 bl2_stage_init 0x01
331 19:48:38.967176 bl2_stage_init 0x81
332 19:48:38.972018 hw id: 0x0000 - pwm id 0x01
333 19:48:38.972313 bl2_stage_init 0xc1
334 19:48:38.977494 bl2_stage_init 0x02
335 19:48:38.977778
336 19:48:38.978016 L0:00000000
337 19:48:38.978258 L1:00000703
338 19:48:38.978486 L2:00008067
339 19:48:38.978711 L3:15000000
340 19:48:38.982935 S1:00000000
341 19:48:38.983231 B2:20282000
342 19:48:38.983480 B1:a0f83180
343 19:48:38.983710
344 19:48:38.983942 TE: 68156
345 19:48:38.984211
346 19:48:38.988701 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 19:48:38.989008
348 19:48:38.994418 Board ID = 1
349 19:48:38.994727 Set cpu clk to 24M
350 19:48:38.994966 Set clk81 to 24M
351 19:48:38.999826 Use GP1_pll as DSU clk.
352 19:48:39.000171 DSU clk: 1200 Mhz
353 19:48:39.000411 CPU clk: 1200 MHz
354 19:48:39.005488 Set clk81 to 166.6M
355 19:48:39.011033 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 19:48:39.011309 board id: 1
357 19:48:39.018453 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 19:48:39.029469 fw parse done
359 19:48:39.035279 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 19:48:39.078258 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 19:48:39.089498 PIEI prepare done
362 19:48:39.089852 fastboot data load
363 19:48:39.090092 fastboot data verify
364 19:48:39.095008 verify result: 266
365 19:48:39.100530 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 19:48:39.100803 LPDDR4 probe
367 19:48:39.101033 ddr clk to 1584MHz
368 19:48:39.108565 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 19:48:39.146429
370 19:48:39.146836 dmc_version 0001
371 19:48:39.153358 Check phy result
372 19:48:39.159301 INFO : End of CA training
373 19:48:39.159586 INFO : End of initialization
374 19:48:39.164877 INFO : Training has run successfully!
375 19:48:39.165148 Check phy result
376 19:48:39.170509 INFO : End of initialization
377 19:48:39.170784 INFO : End of read enable training
378 19:48:39.176084 INFO : End of fine write leveling
379 19:48:39.181677 INFO : End of Write leveling coarse delay
380 19:48:39.181944 INFO : Training has run successfully!
381 19:48:39.182177 Check phy result
382 19:48:39.187257 INFO : End of initialization
383 19:48:39.187529 INFO : End of read dq deskew training
384 19:48:39.192880 INFO : End of MPR read delay center optimization
385 19:48:39.198475 INFO : End of write delay center optimization
386 19:48:39.204079 INFO : End of read delay center optimization
387 19:48:39.204349 INFO : End of max read latency training
388 19:48:39.209645 INFO : Training has run successfully!
389 19:48:39.209911 1D training succeed
390 19:48:39.218868 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 19:48:39.267218 Check phy result
392 19:48:39.267627 INFO : End of initialization
393 19:48:39.294617 INFO : End of 2D read delay Voltage center optimization
394 19:48:39.318746 INFO : End of 2D read delay Voltage center optimization
395 19:48:39.375644 INFO : End of 2D write delay Voltage center optimization
396 19:48:39.429568 INFO : End of 2D write delay Voltage center optimization
397 19:48:39.434994 INFO : Training has run successfully!
398 19:48:39.435337
399 19:48:39.435592 channel==0
400 19:48:39.440588 RxClkDly_Margin_A0==78 ps 8
401 19:48:39.440935 TxDqDly_Margin_A0==98 ps 10
402 19:48:39.446374 RxClkDly_Margin_A1==69 ps 7
403 19:48:39.446725 TxDqDly_Margin_A1==98 ps 10
404 19:48:39.446958 TrainedVREFDQ_A0==74
405 19:48:39.451808 TrainedVREFDQ_A1==74
406 19:48:39.452196 VrefDac_Margin_A0==23
407 19:48:39.452440 DeviceVref_Margin_A0==40
408 19:48:39.457418 VrefDac_Margin_A1==22
409 19:48:39.457765 DeviceVref_Margin_A1==40
410 19:48:39.458001
411 19:48:39.458227
412 19:48:39.463012 channel==1
413 19:48:39.463367 RxClkDly_Margin_A0==78 ps 8
414 19:48:39.463602 TxDqDly_Margin_A0==88 ps 9
415 19:48:39.468602 RxClkDly_Margin_A1==78 ps 8
416 19:48:39.468952 TxDqDly_Margin_A1==88 ps 9
417 19:48:39.474341 TrainedVREFDQ_A0==75
418 19:48:39.474701 TrainedVREFDQ_A1==77
419 19:48:39.474944 VrefDac_Margin_A0==22
420 19:48:39.479801 DeviceVref_Margin_A0==39
421 19:48:39.480189 VrefDac_Margin_A1==22
422 19:48:39.485423 DeviceVref_Margin_A1==37
423 19:48:39.485778
424 19:48:39.486020 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 19:48:39.486247
426 19:48:39.519096 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 19:48:39.519563 2D training succeed
428 19:48:39.524593 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 19:48:39.530348 auto size-- 65535DDR cs0 size: 2048MB
430 19:48:39.530704 DDR cs1 size: 2048MB
431 19:48:39.535776 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 19:48:39.536141 cs0 DataBus test pass
433 19:48:39.541386 cs1 DataBus test pass
434 19:48:39.541722 cs0 AddrBus test pass
435 19:48:39.541959 cs1 AddrBus test pass
436 19:48:39.542186
437 19:48:39.546975 100bdlr_step_size ps== 485
438 19:48:39.547322 result report
439 19:48:39.552807 boot times 0Enable ddr reg access
440 19:48:39.557798 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 19:48:39.571654 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 19:48:40.231022 bl2z: ptr: 05129330, size: 00001e40
443 19:48:40.240407 0.0;M3 CHK:0;cm4_sp_mode 0
444 19:48:40.240796 MVN_1=0x00000000
445 19:48:40.241035 MVN_2=0x00000000
446 19:48:40.251707 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 19:48:40.252228 OPS=0x04
448 19:48:40.252621 ring efuse init
449 19:48:40.257366 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 19:48:40.257830 [0.017355 Inits done]
451 19:48:40.258097 secure task start!
452 19:48:40.265190 high task start!
453 19:48:40.265666 low task start!
454 19:48:40.266062 run into bl31
455 19:48:40.273771 NOTICE: BL31: v1.3(release):4fc40b1
456 19:48:40.281605 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 19:48:40.281964 NOTICE: BL31: G12A normal boot!
458 19:48:40.297108 NOTICE: BL31: BL33 decompress pass
459 19:48:40.302789 ERROR: Error initializing runtime service opteed_fast
460 19:48:41.521941 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 19:48:41.522418 bl2_stage_init 0x01
462 19:48:41.522719 bl2_stage_init 0x81
463 19:48:41.527533 hw id: 0x0000 - pwm id 0x01
464 19:48:41.528033 bl2_stage_init 0xc1
465 19:48:41.533098 bl2_stage_init 0x02
466 19:48:41.533538
467 19:48:41.533788 L0:00000000
468 19:48:41.534017 L1:00000703
469 19:48:41.534243 L2:00008067
470 19:48:41.534462 L3:15000000
471 19:48:41.538773 S1:00000000
472 19:48:41.539213 B2:20282000
473 19:48:41.539533 B1:a0f83180
474 19:48:41.539849
475 19:48:41.540172 TE: 72176
476 19:48:41.540439
477 19:48:41.544328 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 19:48:41.544936
479 19:48:41.549920 Board ID = 1
480 19:48:41.550354 Set cpu clk to 24M
481 19:48:41.550603 Set clk81 to 24M
482 19:48:41.555479 Use GP1_pll as DSU clk.
483 19:48:41.555918 DSU clk: 1200 Mhz
484 19:48:41.556211 CPU clk: 1200 MHz
485 19:48:41.561095 Set clk81 to 166.6M
486 19:48:41.566719 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 19:48:41.567171 board id: 1
488 19:48:41.573904 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 19:48:41.584756 fw parse done
490 19:48:41.590790 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 19:48:41.633746 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 19:48:41.644922 PIEI prepare done
493 19:48:41.645169 fastboot data load
494 19:48:41.645369 fastboot data verify
495 19:48:41.650650 verify result: 266
496 19:48:41.657431 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 19:48:41.657680 LPDDR4 probe
498 19:48:41.657891 ddr clk to 1584MHz
499 19:48:43.017972 Load d SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 19:48:43.018660 bl2_stage_init 0x01
501 19:48:43.020115 bl2_stage_init 0x81
502 19:48:43.023047 hw id: 0x0000 - pwm id 0x01
503 19:48:43.023559 bl2_stage_init 0xc1
504 19:48:43.029623 bl2_stage_init 0x02
505 19:48:43.031226
506 19:48:43.032111 L0:00000000
507 19:48:43.032577 L1:00000703
508 19:48:43.033939 L2:00008067
509 19:48:43.034408 L3:15000000
510 19:48:43.036268 S1:00000000
511 19:48:43.037270 B2:20282000
512 19:48:43.037662 B1:a0f83180
513 19:48:43.037896
514 19:48:43.038109 TE: 69155
515 19:48:43.038317
516 19:48:43.039542 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 19:48:43.039800
518 19:48:43.045085 Board ID = 1
519 19:48:43.045600 Set cpu clk to 24M
520 19:48:43.046036 Set clk81 to 24M
521 19:48:43.050744 Use GP1_pll as DSU clk.
522 19:48:43.051218 DSU clk: 1200 Mhz
523 19:48:43.051655 CPU clk: 1200 MHz
524 19:48:43.059168 Set clk81 to 166.6M
525 19:48:43.061812 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 19:48:43.062302 board id: 1
527 19:48:43.074483 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 19:48:43.080080 fw parse done
529 19:48:43.086004 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 19:48:43.129148 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 19:48:43.140250 PIEI prepare done
532 19:48:43.140778 fastboot data load
533 19:48:43.141241 fastboot data verify
534 19:48:43.145855 verify result: 266
535 19:48:43.151397 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 19:48:43.151922 LPDDR4 probe
537 19:48:43.152437 ddr clk to 1584MHz
538 19:48:43.159388 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 19:48:43.197244
540 19:48:43.197882 dmc_version 0001
541 19:48:43.204209 Check phy result
542 19:48:43.210117 INFO : End of CA training
543 19:48:43.210640 INFO : End of initialization
544 19:48:43.215922 INFO : Training has run successfully!
545 19:48:43.216809 Check phy result
546 19:48:43.221360 INFO : End of initialization
547 19:48:43.221888 INFO : End of read enable training
548 19:48:43.226938 INFO : End of fine write leveling
549 19:48:43.232525 INFO : End of Write leveling coarse delay
550 19:48:43.233037 INFO : Training has run successfully!
551 19:48:43.233494 Check phy result
552 19:48:43.238152 INFO : End of initialization
553 19:48:43.238712 INFO : End of read dq deskew training
554 19:48:43.243854 INFO : End of MPR read delay center optimization
555 19:48:43.249355 INFO : End of write delay center optimization
556 19:48:43.254922 INFO : End of read delay center optimization
557 19:48:43.255461 INFO : End of max read latency training
558 19:48:43.260544 INFO : Training has run successfully!
559 19:48:43.261070 1D training succeed
560 19:48:43.269729 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 19:48:43.318108 Check phy result
562 19:48:43.318771 INFO : End of initialization
563 19:48:43.345483 INFO : End of 2D read delay Voltage center optimization
564 19:48:43.369650 INFO : End of 2D read delay Voltage center optimization
565 19:48:43.426322 INFO : End of 2D write delay Voltage center optimization
566 19:48:43.480332 INFO : End of 2D write delay Voltage center optimization
567 19:48:43.485887 INFO : Training has run successfully!
568 19:48:43.486273
569 19:48:43.486504 channel==0
570 19:48:43.491384 RxClkDly_Margin_A0==78 ps 8
571 19:48:43.491705 TxDqDly_Margin_A0==98 ps 10
572 19:48:43.496990 RxClkDly_Margin_A1==88 ps 9
573 19:48:43.497343 TxDqDly_Margin_A1==88 ps 9
574 19:48:43.497597 TrainedVREFDQ_A0==74
575 19:48:43.502684 TrainedVREFDQ_A1==74
576 19:48:43.503060 VrefDac_Margin_A0==24
577 19:48:43.503312 DeviceVref_Margin_A0==40
578 19:48:43.508328 VrefDac_Margin_A1==23
579 19:48:43.508694 DeviceVref_Margin_A1==40
580 19:48:43.508929
581 19:48:43.509149
582 19:48:43.509368 channel==1
583 19:48:43.513898 RxClkDly_Margin_A0==78 ps 8
584 19:48:43.514273 TxDqDly_Margin_A0==98 ps 10
585 19:48:43.519401 RxClkDly_Margin_A1==78 ps 8
586 19:48:43.519752 TxDqDly_Margin_A1==88 ps 9
587 19:48:43.525055 TrainedVREFDQ_A0==78
588 19:48:43.525422 TrainedVREFDQ_A1==76
589 19:48:43.525661 VrefDac_Margin_A0==22
590 19:48:43.530660 DeviceVref_Margin_A0==36
591 19:48:43.531027 VrefDac_Margin_A1==22
592 19:48:43.536296 DeviceVref_Margin_A1==38
593 19:48:43.536658
594 19:48:43.536896 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 19:48:43.537122
596 19:48:43.570104 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
597 19:48:43.570823 2D training succeed
598 19:48:43.575538 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 19:48:43.581258 auto size-- 65535DDR cs0 size: 2048MB
600 19:48:43.581896 DDR cs1 size: 2048MB
601 19:48:43.586717 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 19:48:43.587261 cs0 DataBus test pass
603 19:48:43.592338 cs1 DataBus test pass
604 19:48:43.592887 cs0 AddrBus test pass
605 19:48:43.593353 cs1 AddrBus test pass
606 19:48:43.593801
607 19:48:43.597967 100bdlr_step_size ps== 471
608 19:48:43.598523 result report
609 19:48:43.603486 boot times 0Enable ddr reg access
610 19:48:43.608690 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 19:48:43.622567 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 19:48:44.282422 bl2z: ptr: 05129330, size: 00001e40
613 19:48:44.290575 0.0;M3 CHK:0;cm4_sp_mode 0
614 19:48:44.291118 MVN_1=0x00000000
615 19:48:44.291573 MVN_2=0x00000000
616 19:48:44.302147 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 19:48:44.302676 OPS=0x04
618 19:48:44.303134 ring efuse init
619 19:48:44.307648 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 19:48:44.308319 [0.017354 Inits done]
621 19:48:44.308817 secure task start!
622 19:48:44.315204 high task start!
623 19:48:44.315782 low task start!
624 19:48:44.316303 run into bl31
625 19:48:44.323816 NOTICE: BL31: v1.3(release):4fc40b1
626 19:48:44.331697 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 19:48:44.332362 NOTICE: BL31: G12A normal boot!
628 19:48:44.347305 NOTICE: BL31: BL33 decompress pass
629 19:48:44.352980 ERROR: Error initializing runtime service opteed_fast
630 19:48:45.569042 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 19:48:45.569713 bl2_stage_init 0x01
632 19:48:45.570184 bl2_stage_init 0x81
633 19:48:45.574726 hw id: 0x0000 - pwm id 0x01
634 19:48:45.575294 bl2_stage_init 0xc1
635 19:48:45.579957 bl2_stage_init 0x02
636 19:48:45.580732
637 19:48:45.581248 L0:00000000
638 19:48:45.581766 L1:00000703
639 19:48:45.582281 L2:00008067
640 19:48:45.582767 L3:15000000
641 19:48:45.585497 S1:00000000
642 19:48:45.585806 B2:20282000
643 19:48:45.586029 B1:a0f83180
644 19:48:45.586303
645 19:48:45.586528 TE: 70806
646 19:48:45.586733
647 19:48:45.590946 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 19:48:45.596561
649 19:48:45.596890 Board ID = 1
650 19:48:45.597120 Set cpu clk to 24M
651 19:48:45.597330 Set clk81 to 24M
652 19:48:45.602200 Use GP1_pll as DSU clk.
653 19:48:45.602514 DSU clk: 1200 Mhz
654 19:48:45.602743 CPU clk: 1200 MHz
655 19:48:45.607715 Set clk81 to 166.6M
656 19:48:45.613350 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 19:48:45.613636 board id: 1
658 19:48:45.621014 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 19:48:45.631943 fw parse done
660 19:48:45.637936 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 19:48:45.680896 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 19:48:45.692152 PIEI prepare done
663 19:48:45.692728 fastboot data load
664 19:48:45.693241 fastboot data verify
665 19:48:45.697666 verify result: 266
666 19:48:45.703325 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 19:48:45.703828 LPDDR4 probe
668 19:48:45.704302 ddr clk to 1584MHz
669 19:48:45.711466 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 19:48:45.749121
671 19:48:45.749667 dmc_version 0001
672 19:48:45.756192 Check phy result
673 19:48:45.762098 INFO : End of CA training
674 19:48:45.762599 INFO : End of initialization
675 19:48:45.767733 INFO : Training has run successfully!
676 19:48:45.768262 Check phy result
677 19:48:45.773276 INFO : End of initialization
678 19:48:45.773773 INFO : End of read enable training
679 19:48:45.776689 INFO : End of fine write leveling
680 19:48:45.782171 INFO : End of Write leveling coarse delay
681 19:48:45.787720 INFO : Training has run successfully!
682 19:48:45.788277 Check phy result
683 19:48:45.788729 INFO : End of initialization
684 19:48:45.793392 INFO : End of read dq deskew training
685 19:48:45.798895 INFO : End of MPR read delay center optimization
686 19:48:45.799427 INFO : End of write delay center optimization
687 19:48:45.804565 INFO : End of read delay center optimization
688 19:48:45.810199 INFO : End of max read latency training
689 19:48:45.810900 INFO : Training has run successfully!
690 19:48:45.815704 1D training succeed
691 19:48:45.821722 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 19:48:45.870036 Check phy result
693 19:48:45.870641 INFO : End of initialization
694 19:48:45.897485 INFO : End of 2D read delay Voltage center optimization
695 19:48:45.921636 INFO : End of 2D read delay Voltage center optimization
696 19:48:45.978327 INFO : End of 2D write delay Voltage center optimization
697 19:48:46.032383 INFO : End of 2D write delay Voltage center optimization
698 19:48:46.037931 INFO : Training has run successfully!
699 19:48:46.038497
700 19:48:46.038956 channel==0
701 19:48:46.043472 RxClkDly_Margin_A0==78 ps 8
702 19:48:46.044057 TxDqDly_Margin_A0==88 ps 9
703 19:48:46.046789 RxClkDly_Margin_A1==88 ps 9
704 19:48:46.047335 TxDqDly_Margin_A1==98 ps 10
705 19:48:46.052440 TrainedVREFDQ_A0==74
706 19:48:46.053026 TrainedVREFDQ_A1==75
707 19:48:46.053478 VrefDac_Margin_A0==24
708 19:48:46.057900 DeviceVref_Margin_A0==40
709 19:48:46.058485 VrefDac_Margin_A1==23
710 19:48:46.063423 DeviceVref_Margin_A1==39
711 19:48:46.064057
712 19:48:46.064522
713 19:48:46.065015 channel==1
714 19:48:46.065466 RxClkDly_Margin_A0==78 ps 8
715 19:48:46.067099 TxDqDly_Margin_A0==98 ps 10
716 19:48:46.072550 RxClkDly_Margin_A1==88 ps 9
717 19:48:46.073118 TxDqDly_Margin_A1==88 ps 9
718 19:48:46.073581 TrainedVREFDQ_A0==78
719 19:48:46.078165 TrainedVREFDQ_A1==75
720 19:48:46.078741 VrefDac_Margin_A0==22
721 19:48:46.083841 DeviceVref_Margin_A0==36
722 19:48:46.084483 VrefDac_Margin_A1==22
723 19:48:46.084982 DeviceVref_Margin_A1==39
724 19:48:46.085429
725 19:48:46.089368 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 19:48:46.089935
727 19:48:46.122942 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
728 19:48:46.123577 2D training succeed
729 19:48:46.128561 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 19:48:46.134147 auto size-- 65535DDR cs0 size: 2048MB
731 19:48:46.134711 DDR cs1 size: 2048MB
732 19:48:46.139729 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 19:48:46.140359 cs0 DataBus test pass
734 19:48:46.140839 cs1 DataBus test pass
735 19:48:46.145416 cs0 AddrBus test pass
736 19:48:46.146041 cs1 AddrBus test pass
737 19:48:46.146537
738 19:48:46.150922 100bdlr_step_size ps== 471
739 19:48:46.151501 result report
740 19:48:46.151940 boot times 0Enable ddr reg access
741 19:48:46.160543 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 19:48:46.174517 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 19:48:46.834109 bl2z: ptr: 05129330, size: 00001e40
744 19:48:46.842793 0.0;M3 CHK:0;cm4_sp_mode 0
745 19:48:46.843326 MVN_1=0x00000000
746 19:48:46.843768 MVN_2=0x00000000
747 19:48:46.854211 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 19:48:46.854777 OPS=0x04
749 19:48:46.855327 ring efuse init
750 19:48:46.857394 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 19:48:46.862793 [0.017354 Inits done]
752 19:48:46.863368 secure task start!
753 19:48:46.863836 high task start!
754 19:48:46.864328 low task start!
755 19:48:46.866991 run into bl31
756 19:48:46.875649 NOTICE: BL31: v1.3(release):4fc40b1
757 19:48:46.883564 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 19:48:46.884092 NOTICE: BL31: G12A normal boot!
759 19:48:46.899051 NOTICE: BL31: BL33 decompress pass
760 19:48:46.904741 ERROR: Error initializing runtime service opteed_fast
761 19:48:47.700079
762 19:48:47.700746
763 19:48:47.705532 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 19:48:47.706051
765 19:48:47.709059 Model: Libre Computer AML-S905D3-CC Solitude
766 19:48:47.855949 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 19:48:47.871352 DRAM: 2 GiB (effective 3.8 GiB)
768 19:48:47.972277 Core: 406 devices, 33 uclasses, devicetree: separate
769 19:48:47.978234 WDT: Not starting watchdog@f0d0
770 19:48:48.003298 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 19:48:48.015550 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 19:48:48.020491 ** Bad device specification mmc 0 **
773 19:48:48.030636 Card did not respond to voltage select! : -110
774 19:48:48.038188 ** Bad device specification mmc 0 **
775 19:48:48.038679 Couldn't find partition mmc 0
776 19:48:48.046545 Card did not respond to voltage select! : -110
777 19:48:48.051973 ** Bad device specification mmc 0 **
778 19:48:48.052493 Couldn't find partition mmc 0
779 19:48:48.057136 Error: could not access storage.
780 19:48:48.353532 Net: eth0: ethernet@ff3f0000
781 19:48:48.354184 starting USB...
782 19:48:48.598290 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 19:48:48.598955 Starting the controller
784 19:48:48.605178 USB XHCI 1.10
785 19:48:50.161539 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 19:48:50.169838 scanning usb for storage devices... 0 Storage Device(s) found
788 19:48:50.221568 Hit any key to stop autoboot: 1
789 19:48:50.222447 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 19:48:50.223111 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 19:48:50.223649 Setting prompt string to ['=>']
792 19:48:50.224244 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 19:48:50.236254 0
794 19:48:50.237320 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 19:48:50.338718 => setenv autoload no
797 19:48:50.339761 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 19:48:50.345107 setenv autoload no
800 19:48:50.446798 => setenv initrd_high 0xffffffff
801 19:48:50.447904 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 19:48:50.452319 setenv initrd_high 0xffffffff
804 19:48:50.553913 => setenv fdt_high 0xffffffff
805 19:48:50.555043 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 19:48:50.559590 setenv fdt_high 0xffffffff
808 19:48:50.661580 => dhcp
809 19:48:50.664881 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 19:48:50.671022 dhcp
811 19:48:51.174124 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 19:48:51.174553 Speed: 1000, full duplex
813 19:48:51.174797 BOOTP broadcast 1
814 19:48:51.422842 BOOTP broadcast 2
815 19:48:51.434433 DHCP client bound to address 192.168.6.21 (260 ms)
817 19:48:51.535489 => setenv serverip 192.168.6.2
818 19:48:51.536063 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 19:48:51.541322 setenv serverip 192.168.6.2
821 19:48:51.642404 => tftpboot 0x01080000 954186/tftp-deploy-2ba4v_mi/kernel/uImage
822 19:48:51.643088 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
823 19:48:51.649619 tftpboot 0x01080000 954186/tftp-deploy-2ba4v_mi/kernel/uImage
824 19:48:51.649918 Speed: 1000, full duplex
825 19:48:51.650147 Using ethernet@ff3f0000 device
826 19:48:51.655133 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 19:48:51.660877 Filename '954186/tftp-deploy-2ba4v_mi/kernel/uImage'.
828 19:48:51.664873 Load address: 0x1080000
829 19:48:54.419491 Loading: *################################################## 43.6 MiB
830 19:48:54.420207 15.8 MiB/s
831 19:48:54.420688 done
832 19:48:54.423743 Bytes transferred = 45713984 (2b98a40 hex)
834 19:48:54.525396 => tftpboot 0x08000000 954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
835 19:48:54.526210 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
836 19:48:54.533262 tftpboot 0x08000000 954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot
837 19:48:54.533801 Speed: 1000, full duplex
838 19:48:54.534238 Using ethernet@ff3f0000 device
839 19:48:54.538989 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 19:48:54.549612 Filename '954186/tftp-deploy-2ba4v_mi/ramdisk/ramdisk.cpio.gz.uboot'.
841 19:48:54.550188 Load address: 0x8000000
842 19:48:56.006852 Loading: *################################################# UDP wrong checksum 00000005 00004a8c
843 19:49:01.005933 T UDP wrong checksum 00000005 00004a8c
844 19:49:11.007941 T T UDP wrong checksum 00000005 00004a8c
845 19:49:31.011949 T T T T UDP wrong checksum 00000005 00004a8c
846 19:49:36.181121 T UDP wrong checksum 000000ff 00004e20
847 19:49:36.255896 UDP wrong checksum 000000ff 0000da12
848 19:49:41.032282 T UDP wrong checksum 000000ff 0000e2d1
849 19:49:41.086307 UDP wrong checksum 000000ff 00007ec4
850 19:49:51.016869 T
851 19:49:51.017466 Retry count exceeded; starting again
853 19:49:51.018888 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
856 19:49:51.020790 end: 2.4 uboot-commands (duration 00:01:20) [common]
858 19:49:51.022158 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
860 19:49:51.023208 end: 2 uboot-action (duration 00:01:20) [common]
862 19:49:51.024803 Cleaning after the job
863 19:49:51.025387 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/ramdisk
864 19:49:51.026648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/kernel
865 19:49:51.056699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/dtb
866 19:49:51.058027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/nfsrootfs
867 19:49:51.118975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954186/tftp-deploy-2ba4v_mi/modules
868 19:49:51.125944 start: 4.1 power-off (timeout 00:00:30) [common]
869 19:49:51.126557 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
870 19:49:51.160264 >> OK - accepted request
871 19:49:51.162184 Returned 0 in 0 seconds
872 19:49:51.263071 end: 4.1 power-off (duration 00:00:00) [common]
874 19:49:51.264184 start: 4.2 read-feedback (timeout 00:10:00) [common]
875 19:49:51.264930 Listened to connection for namespace 'common' for up to 1s
876 19:49:52.265884 Finalising connection for namespace 'common'
877 19:49:52.266840 Disconnecting from shell: Finalise
878 19:49:52.267168 =>
879 19:49:52.368025 end: 4.2 read-feedback (duration 00:00:01) [common]
880 19:49:52.368748 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/954186
881 19:49:55.144132 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/954186
882 19:49:55.144751 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.