Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:36:40.974533 lava-dispatcher, installed at version: 2024.01
2 17:36:40.975319 start: 0 validate
3 17:36:40.975821 Start time: 2024-11-07 17:36:40.975792+00:00 (UTC)
4 17:36:40.976405 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:36:40.976942 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 17:36:41.012921 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:36:41.013493 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:36:41.047562 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:36:41.048221 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 17:36:41.081394 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:36:41.081912 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 17:36:41.117368 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 17:36:41.117880 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 17:36:41.180064 validate duration: 0.20
16 17:36:41.180941 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 17:36:41.181271 start: 1.1 download-retry (timeout 00:10:00) [common]
18 17:36:41.181588 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 17:36:41.182165 Not decompressing ramdisk as can be used compressed.
20 17:36:41.182611 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 17:36:41.182893 saving as /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/ramdisk/initrd.cpio.gz
22 17:36:41.183168 total size: 5628182 (5 MB)
23 17:36:41.231184 progress 0 % (0 MB)
24 17:36:41.239094 progress 5 % (0 MB)
25 17:36:41.247401 progress 10 % (0 MB)
26 17:36:41.254683 progress 15 % (0 MB)
27 17:36:41.262934 progress 20 % (1 MB)
28 17:36:41.267309 progress 25 % (1 MB)
29 17:36:41.271456 progress 30 % (1 MB)
30 17:36:41.275535 progress 35 % (1 MB)
31 17:36:41.279453 progress 40 % (2 MB)
32 17:36:41.283543 progress 45 % (2 MB)
33 17:36:41.287316 progress 50 % (2 MB)
34 17:36:41.291370 progress 55 % (2 MB)
35 17:36:41.295505 progress 60 % (3 MB)
36 17:36:41.299178 progress 65 % (3 MB)
37 17:36:41.303287 progress 70 % (3 MB)
38 17:36:41.306907 progress 75 % (4 MB)
39 17:36:41.311238 progress 80 % (4 MB)
40 17:36:41.314843 progress 85 % (4 MB)
41 17:36:41.318939 progress 90 % (4 MB)
42 17:36:41.322950 progress 95 % (5 MB)
43 17:36:41.326407 progress 100 % (5 MB)
44 17:36:41.327083 5 MB downloaded in 0.14 s (37.30 MB/s)
45 17:36:41.327649 end: 1.1.1 http-download (duration 00:00:00) [common]
47 17:36:41.328612 end: 1.1 download-retry (duration 00:00:00) [common]
48 17:36:41.328928 start: 1.2 download-retry (timeout 00:10:00) [common]
49 17:36:41.329215 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 17:36:41.329688 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/kernel/Image
51 17:36:41.329956 saving as /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/kernel/Image
52 17:36:41.330176 total size: 45713920 (43 MB)
53 17:36:41.330393 No compression specified
54 17:36:41.370348 progress 0 % (0 MB)
55 17:36:41.399285 progress 5 % (2 MB)
56 17:36:41.428779 progress 10 % (4 MB)
57 17:36:41.458289 progress 15 % (6 MB)
58 17:36:41.487634 progress 20 % (8 MB)
59 17:36:41.518940 progress 25 % (10 MB)
60 17:36:41.553845 progress 30 % (13 MB)
61 17:36:41.583781 progress 35 % (15 MB)
62 17:36:41.613763 progress 40 % (17 MB)
63 17:36:41.643016 progress 45 % (19 MB)
64 17:36:41.673173 progress 50 % (21 MB)
65 17:36:41.703128 progress 55 % (24 MB)
66 17:36:41.732994 progress 60 % (26 MB)
67 17:36:41.762377 progress 65 % (28 MB)
68 17:36:41.797452 progress 70 % (30 MB)
69 17:36:41.833553 progress 75 % (32 MB)
70 17:36:41.869688 progress 80 % (34 MB)
71 17:36:41.906662 progress 85 % (37 MB)
72 17:36:41.943386 progress 90 % (39 MB)
73 17:36:41.980638 progress 95 % (41 MB)
74 17:36:42.011578 progress 100 % (43 MB)
75 17:36:42.012151 43 MB downloaded in 0.68 s (63.93 MB/s)
76 17:36:42.012649 end: 1.2.1 http-download (duration 00:00:01) [common]
78 17:36:42.013467 end: 1.2 download-retry (duration 00:00:01) [common]
79 17:36:42.013742 start: 1.3 download-retry (timeout 00:09:59) [common]
80 17:36:42.014004 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 17:36:42.014477 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 17:36:42.014728 saving as /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/dtb/meson-g12b-a311d-libretech-cc.dtb
83 17:36:42.014937 total size: 54703 (0 MB)
84 17:36:42.015146 No compression specified
85 17:36:42.055465 progress 59 % (0 MB)
86 17:36:42.056368 progress 100 % (0 MB)
87 17:36:42.056935 0 MB downloaded in 0.04 s (1.24 MB/s)
88 17:36:42.057411 end: 1.3.1 http-download (duration 00:00:00) [common]
90 17:36:42.058233 end: 1.3 download-retry (duration 00:00:00) [common]
91 17:36:42.058496 start: 1.4 download-retry (timeout 00:09:59) [common]
92 17:36:42.058761 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 17:36:42.059219 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 17:36:42.059465 saving as /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/nfsrootfs/full.rootfs.tar
95 17:36:42.059668 total size: 107552908 (102 MB)
96 17:36:42.059876 Using unxz to decompress xz
97 17:36:42.099483 progress 0 % (0 MB)
98 17:36:42.752972 progress 5 % (5 MB)
99 17:36:43.483202 progress 10 % (10 MB)
100 17:36:44.219805 progress 15 % (15 MB)
101 17:36:45.061740 progress 20 % (20 MB)
102 17:36:45.632371 progress 25 % (25 MB)
103 17:36:46.253279 progress 30 % (30 MB)
104 17:36:46.994311 progress 35 % (35 MB)
105 17:36:47.346684 progress 40 % (41 MB)
106 17:36:47.771490 progress 45 % (46 MB)
107 17:36:48.488919 progress 50 % (51 MB)
108 17:36:49.190345 progress 55 % (56 MB)
109 17:36:49.947959 progress 60 % (61 MB)
110 17:36:50.706638 progress 65 % (66 MB)
111 17:36:51.438553 progress 70 % (71 MB)
112 17:36:52.206608 progress 75 % (76 MB)
113 17:36:52.898081 progress 80 % (82 MB)
114 17:36:53.609058 progress 85 % (87 MB)
115 17:36:54.350676 progress 90 % (92 MB)
116 17:36:55.069580 progress 95 % (97 MB)
117 17:36:55.810031 progress 100 % (102 MB)
118 17:36:55.822915 102 MB downloaded in 13.76 s (7.45 MB/s)
119 17:36:55.823610 end: 1.4.1 http-download (duration 00:00:14) [common]
121 17:36:55.825285 end: 1.4 download-retry (duration 00:00:14) [common]
122 17:36:55.825810 start: 1.5 download-retry (timeout 00:09:45) [common]
123 17:36:55.826325 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 17:36:55.827128 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/modules.tar.xz
125 17:36:55.827587 saving as /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/modules/modules.tar
126 17:36:55.828021 total size: 11609200 (11 MB)
127 17:36:55.828448 Using unxz to decompress xz
128 17:36:55.876572 progress 0 % (0 MB)
129 17:36:55.944314 progress 5 % (0 MB)
130 17:36:56.019570 progress 10 % (1 MB)
131 17:36:56.117625 progress 15 % (1 MB)
132 17:36:56.208415 progress 20 % (2 MB)
133 17:36:56.288334 progress 25 % (2 MB)
134 17:36:56.363618 progress 30 % (3 MB)
135 17:36:56.437618 progress 35 % (3 MB)
136 17:36:56.514498 progress 40 % (4 MB)
137 17:36:56.590597 progress 45 % (5 MB)
138 17:36:56.674473 progress 50 % (5 MB)
139 17:36:56.751293 progress 55 % (6 MB)
140 17:36:56.836146 progress 60 % (6 MB)
141 17:36:56.916476 progress 65 % (7 MB)
142 17:36:56.992667 progress 70 % (7 MB)
143 17:36:57.074836 progress 75 % (8 MB)
144 17:36:57.158099 progress 80 % (8 MB)
145 17:36:57.237775 progress 85 % (9 MB)
146 17:36:57.316047 progress 90 % (9 MB)
147 17:36:57.393605 progress 95 % (10 MB)
148 17:36:57.470974 progress 100 % (11 MB)
149 17:36:57.483070 11 MB downloaded in 1.66 s (6.69 MB/s)
150 17:36:57.483682 end: 1.5.1 http-download (duration 00:00:02) [common]
152 17:36:57.485183 end: 1.5 download-retry (duration 00:00:02) [common]
153 17:36:57.485770 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 17:36:57.486341 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 17:37:07.576919 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/954402/extract-nfsrootfs-kwuz_1o9
156 17:37:07.577536 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 17:37:07.577825 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 17:37:07.578577 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0
159 17:37:07.579035 makedir: /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin
160 17:37:07.579362 makedir: /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/tests
161 17:37:07.579673 makedir: /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/results
162 17:37:07.580023 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-add-keys
163 17:37:07.580565 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-add-sources
164 17:37:07.581072 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-background-process-start
165 17:37:07.581604 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-background-process-stop
166 17:37:07.582185 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-common-functions
167 17:37:07.582687 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-echo-ipv4
168 17:37:07.583165 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-install-packages
169 17:37:07.583654 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-installed-packages
170 17:37:07.584156 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-os-build
171 17:37:07.584643 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-probe-channel
172 17:37:07.585120 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-probe-ip
173 17:37:07.585634 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-target-ip
174 17:37:07.586158 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-target-mac
175 17:37:07.586643 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-target-storage
176 17:37:07.587127 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-case
177 17:37:07.587606 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-event
178 17:37:07.588106 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-feedback
179 17:37:07.588605 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-raise
180 17:37:07.589075 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-reference
181 17:37:07.589574 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-runner
182 17:37:07.590082 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-set
183 17:37:07.590555 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-test-shell
184 17:37:07.591040 Updating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-install-packages (oe)
185 17:37:07.591575 Updating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/bin/lava-installed-packages (oe)
186 17:37:07.592043 Creating /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/environment
187 17:37:07.592431 LAVA metadata
188 17:37:07.592688 - LAVA_JOB_ID=954402
189 17:37:07.592901 - LAVA_DISPATCHER_IP=192.168.6.2
190 17:37:07.593246 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 17:37:07.594235 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 17:37:07.594543 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 17:37:07.594748 skipped lava-vland-overlay
194 17:37:07.594986 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 17:37:07.595238 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 17:37:07.595453 skipped lava-multinode-overlay
197 17:37:07.595692 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 17:37:07.595940 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 17:37:07.596213 Loading test definitions
200 17:37:07.596487 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 17:37:07.596704 Using /lava-954402 at stage 0
202 17:37:07.597917 uuid=954402_1.6.2.4.1 testdef=None
203 17:37:07.598225 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 17:37:07.598486 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 17:37:07.600303 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 17:37:07.601081 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 17:37:07.603312 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 17:37:07.604191 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 17:37:07.606339 runner path: /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/0/tests/0_dmesg test_uuid 954402_1.6.2.4.1
212 17:37:07.606879 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 17:37:07.607618 Creating lava-test-runner.conf files
215 17:37:07.607815 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/954402/lava-overlay-6_ojdyn0/lava-954402/0 for stage 0
216 17:37:07.608178 - 0_dmesg
217 17:37:07.608522 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 17:37:07.608792 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 17:37:07.630326 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 17:37:07.630675 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 17:37:07.630929 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 17:37:07.631190 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 17:37:07.631448 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 17:37:08.251759 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 17:37:08.252259 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 17:37:08.252512 extracting modules file /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954402/extract-nfsrootfs-kwuz_1o9
227 17:37:09.603205 extracting modules file /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk
228 17:37:10.995525 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 17:37:10.996036 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 17:37:10.996320 [common] Applying overlay to NFS
231 17:37:10.996533 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954402/compress-overlay-hmeip8u0/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/954402/extract-nfsrootfs-kwuz_1o9
232 17:37:11.025863 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 17:37:11.026245 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 17:37:11.026516 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 17:37:11.026744 Converting downloaded kernel to a uImage
236 17:37:11.027052 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/kernel/Image /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/kernel/uImage
237 17:37:11.497253 output: Image Name:
238 17:37:11.497667 output: Created: Thu Nov 7 17:37:11 2024
239 17:37:11.497877 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 17:37:11.498083 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 17:37:11.498284 output: Load Address: 01080000
242 17:37:11.498482 output: Entry Point: 01080000
243 17:37:11.498679 output:
244 17:37:11.499012 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 17:37:11.499281 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 17:37:11.499550 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 17:37:11.499804 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 17:37:11.500104 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 17:37:11.500384 Building ramdisk /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk
250 17:37:13.651217 >> 166792 blocks
251 17:37:21.377153 Adding RAMdisk u-boot header.
252 17:37:21.377597 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk.cpio.gz.uboot
253 17:37:21.682985 output: Image Name:
254 17:37:21.683399 output: Created: Thu Nov 7 17:37:21 2024
255 17:37:21.683830 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 17:37:21.684308 output: Data Size: 23433349 Bytes = 22884.13 KiB = 22.35 MiB
257 17:37:21.684721 output: Load Address: 00000000
258 17:37:21.685122 output: Entry Point: 00000000
259 17:37:21.685516 output:
260 17:37:21.686755 rename /var/lib/lava/dispatcher/tmp/954402/extract-overlay-ramdisk-qyi64it_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
261 17:37:21.687485 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 17:37:21.688072 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 17:37:21.688620 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 17:37:21.689082 No LXC device requested
265 17:37:21.689595 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 17:37:21.690111 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 17:37:21.690613 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 17:37:21.691031 Checking files for TFTP limit of 4294967296 bytes.
269 17:37:21.693757 end: 1 tftp-deploy (duration 00:00:41) [common]
270 17:37:21.694348 start: 2 uboot-action (timeout 00:05:00) [common]
271 17:37:21.694887 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 17:37:21.695391 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 17:37:21.695897 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 17:37:21.696470 Using kernel file from prepare-kernel: 954402/tftp-deploy-iptvs1ga/kernel/uImage
275 17:37:21.697105 substitutions:
276 17:37:21.697515 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 17:37:21.697923 - {DTB_ADDR}: 0x01070000
278 17:37:21.698321 - {DTB}: 954402/tftp-deploy-iptvs1ga/dtb/meson-g12b-a311d-libretech-cc.dtb
279 17:37:21.698717 - {INITRD}: 954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
280 17:37:21.699121 - {KERNEL_ADDR}: 0x01080000
281 17:37:21.699516 - {KERNEL}: 954402/tftp-deploy-iptvs1ga/kernel/uImage
282 17:37:21.699911 - {LAVA_MAC}: None
283 17:37:21.700374 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/954402/extract-nfsrootfs-kwuz_1o9
284 17:37:21.700782 - {NFS_SERVER_IP}: 192.168.6.2
285 17:37:21.701177 - {PRESEED_CONFIG}: None
286 17:37:21.701571 - {PRESEED_LOCAL}: None
287 17:37:21.701959 - {RAMDISK_ADDR}: 0x08000000
288 17:37:21.702343 - {RAMDISK}: 954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
289 17:37:21.702730 - {ROOT_PART}: None
290 17:37:21.703116 - {ROOT}: None
291 17:37:21.703502 - {SERVER_IP}: 192.168.6.2
292 17:37:21.703889 - {TEE_ADDR}: 0x83000000
293 17:37:21.704366 - {TEE}: None
294 17:37:21.704761 Parsed boot commands:
295 17:37:21.705141 - setenv autoload no
296 17:37:21.705527 - setenv initrd_high 0xffffffff
297 17:37:21.705912 - setenv fdt_high 0xffffffff
298 17:37:21.706295 - dhcp
299 17:37:21.706677 - setenv serverip 192.168.6.2
300 17:37:21.707058 - tftpboot 0x01080000 954402/tftp-deploy-iptvs1ga/kernel/uImage
301 17:37:21.707445 - tftpboot 0x08000000 954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
302 17:37:21.707831 - tftpboot 0x01070000 954402/tftp-deploy-iptvs1ga/dtb/meson-g12b-a311d-libretech-cc.dtb
303 17:37:21.708257 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/954402/extract-nfsrootfs-kwuz_1o9,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 17:37:21.708674 - bootm 0x01080000 0x08000000 0x01070000
305 17:37:21.709193 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 17:37:21.710683 start: 2.3 connect-device (timeout 00:05:00) [common]
308 17:37:21.711108 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 17:37:21.725884 Setting prompt string to ['lava-test: # ']
310 17:37:21.727361 end: 2.3 connect-device (duration 00:00:00) [common]
311 17:37:21.728017 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 17:37:21.728587 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 17:37:21.729117 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 17:37:21.730409 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 17:37:21.767360 >> OK - accepted request
316 17:37:21.769493 Returned 0 in 0 seconds
317 17:37:21.870587 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 17:37:21.871670 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 17:37:21.872068 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 17:37:21.872620 Setting prompt string to ['Hit any key to stop autoboot']
322 17:37:21.873106 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 17:37:21.874668 Trying 192.168.56.21...
324 17:37:21.875134 Connected to conserv1.
325 17:37:21.875555 Escape character is '^]'.
326 17:37:21.876004
327 17:37:21.876466 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 17:37:21.876901
329 17:37:33.164443 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 17:37:33.165071 bl2_stage_init 0x01
331 17:37:33.165502 bl2_stage_init 0x81
332 17:37:33.169990 hw id: 0x0000 - pwm id 0x01
333 17:37:33.170563 bl2_stage_init 0xc1
334 17:37:33.171021 bl2_stage_init 0x02
335 17:37:33.171475
336 17:37:33.175579 L0:00000000
337 17:37:33.176144 L1:20000703
338 17:37:33.176606 L2:00008067
339 17:37:33.177041 L3:14000000
340 17:37:33.181048 B2:00402000
341 17:37:33.181521 B1:e0f83180
342 17:37:33.181954
343 17:37:33.182387 TE: 58167
344 17:37:33.182819
345 17:37:33.186654 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 17:37:33.187126
347 17:37:33.187564 Board ID = 1
348 17:37:33.192188 Set A53 clk to 24M
349 17:37:33.192664 Set A73 clk to 24M
350 17:37:33.193096 Set clk81 to 24M
351 17:37:33.197850 A53 clk: 1200 MHz
352 17:37:33.198317 A73 clk: 1200 MHz
353 17:37:33.198748 CLK81: 166.6M
354 17:37:33.199173 smccc: 00012abe
355 17:37:33.203489 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 17:37:33.209017 board id: 1
357 17:37:33.214863 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 17:37:33.225548 fw parse done
359 17:37:33.231608 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 17:37:33.274076 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 17:37:33.284956 PIEI prepare done
362 17:37:33.285431 fastboot data load
363 17:37:33.285872 fastboot data verify
364 17:37:33.290670 verify result: 266
365 17:37:33.296238 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 17:37:33.296703 LPDDR4 probe
367 17:37:33.297131 ddr clk to 1584MHz
368 17:37:33.304292 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 17:37:33.341580
370 17:37:33.342167 dmc_version 0001
371 17:37:33.348258 Check phy result
372 17:37:33.354102 INFO : End of CA training
373 17:37:33.354660 INFO : End of initialization
374 17:37:33.359690 INFO : Training has run successfully!
375 17:37:33.360284 Check phy result
376 17:37:33.365309 INFO : End of initialization
377 17:37:33.365860 INFO : End of read enable training
378 17:37:33.370964 INFO : End of fine write leveling
379 17:37:33.376580 INFO : End of Write leveling coarse delay
380 17:37:33.377132 INFO : Training has run successfully!
381 17:37:33.377576 Check phy result
382 17:37:33.382129 INFO : End of initialization
383 17:37:33.382685 INFO : End of read dq deskew training
384 17:37:33.387768 INFO : End of MPR read delay center optimization
385 17:37:33.393333 INFO : End of write delay center optimization
386 17:37:33.398875 INFO : End of read delay center optimization
387 17:37:33.399418 INFO : End of max read latency training
388 17:37:33.404504 INFO : Training has run successfully!
389 17:37:33.405050 1D training succeed
390 17:37:33.413753 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 17:37:33.461329 Check phy result
392 17:37:33.461896 INFO : End of initialization
393 17:37:33.483080 INFO : End of 2D read delay Voltage center optimization
394 17:37:33.503315 INFO : End of 2D read delay Voltage center optimization
395 17:37:33.555398 INFO : End of 2D write delay Voltage center optimization
396 17:37:33.604786 INFO : End of 2D write delay Voltage center optimization
397 17:37:33.610462 INFO : Training has run successfully!
398 17:37:33.610990
399 17:37:33.611439 channel==0
400 17:37:33.615977 RxClkDly_Margin_A0==88 ps 9
401 17:37:33.616546 TxDqDly_Margin_A0==98 ps 10
402 17:37:33.621580 RxClkDly_Margin_A1==88 ps 9
403 17:37:33.622110 TxDqDly_Margin_A1==98 ps 10
404 17:37:33.622554 TrainedVREFDQ_A0==74
405 17:37:33.627139 TrainedVREFDQ_A1==74
406 17:37:33.627679 VrefDac_Margin_A0==25
407 17:37:33.628156 DeviceVref_Margin_A0==40
408 17:37:33.632747 VrefDac_Margin_A1==25
409 17:37:33.633279 DeviceVref_Margin_A1==40
410 17:37:33.633715
411 17:37:33.634150
412 17:37:33.638374 channel==1
413 17:37:33.638901 RxClkDly_Margin_A0==88 ps 9
414 17:37:33.639339 TxDqDly_Margin_A0==88 ps 9
415 17:37:33.644009 RxClkDly_Margin_A1==88 ps 9
416 17:37:33.644550 TxDqDly_Margin_A1==98 ps 10
417 17:37:33.649531 TrainedVREFDQ_A0==76
418 17:37:33.650058 TrainedVREFDQ_A1==78
419 17:37:33.650498 VrefDac_Margin_A0==22
420 17:37:33.655087 DeviceVref_Margin_A0==38
421 17:37:33.655611 VrefDac_Margin_A1==24
422 17:37:33.660755 DeviceVref_Margin_A1==36
423 17:37:33.661280
424 17:37:33.661717 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 17:37:33.662150
426 17:37:33.694314 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 17:37:33.694957 2D training succeed
428 17:37:33.700010 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 17:37:33.705420 auto size-- 65535DDR cs0 size: 2048MB
430 17:37:33.705949 DDR cs1 size: 2048MB
431 17:37:33.710994 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 17:37:33.711521 cs0 DataBus test pass
433 17:37:33.716635 cs1 DataBus test pass
434 17:37:33.717161 cs0 AddrBus test pass
435 17:37:33.717597 cs1 AddrBus test pass
436 17:37:33.718024
437 17:37:33.722229 100bdlr_step_size ps== 420
438 17:37:33.722765 result report
439 17:37:33.727814 boot times 0Enable ddr reg access
440 17:37:33.733046 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 17:37:33.746488 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 17:37:34.320266 0.0;M3 CHK:0;cm4_sp_mode 0
443 17:37:34.320977 MVN_1=0x00000000
444 17:37:34.325684 MVN_2=0x00000000
445 17:37:34.331373 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 17:37:34.331933 OPS=0x10
447 17:37:34.332470 ring efuse init
448 17:37:34.332921 chipver efuse init
449 17:37:34.336996 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 17:37:34.342607 [0.018961 Inits done]
451 17:37:34.343149 secure task start!
452 17:37:34.343607 high task start!
453 17:37:34.347103 low task start!
454 17:37:34.347426 run into bl31
455 17:37:34.353698 NOTICE: BL31: v1.3(release):4fc40b1
456 17:37:34.361587 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 17:37:34.362036 NOTICE: BL31: G12A normal boot!
458 17:37:34.387020 NOTICE: BL31: BL33 decompress pass
459 17:37:34.392691 ERROR: Error initializing runtime service opteed_fast
460 17:37:35.625634
461 17:37:35.626308
462 17:37:35.634023 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 17:37:35.634561
464 17:37:35.635023 Model: Libre Computer AML-A311D-CC Alta
465 17:37:35.842345 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 17:37:35.865749 DRAM: 2 GiB (effective 3.8 GiB)
467 17:37:36.008766 Core: 408 devices, 31 uclasses, devicetree: separate
468 17:37:36.016852 WDT: Not starting watchdog@f0d0
469 17:37:36.047434 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 17:37:36.059447 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 17:37:36.064358 ** Bad device specification mmc 0 **
472 17:37:36.076840 Card did not respond to voltage select! : -110
473 17:37:36.098627 ** Bad device specification mmc 0 **
474 17:37:36.099357 Couldn't find partition mmc 0
475 17:37:36.099874 Card did not respond to voltage select! : -110
476 17:37:36.100456 ** Bad device specification mmc 0 **
477 17:37:36.100948 Couldn't find partition mmc 0
478 17:37:36.101788 Error: could not access storage.
479 17:37:37.364440 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 17:37:37.365094 bl2_stage_init 0x01
481 17:37:37.365564 bl2_stage_init 0x81
482 17:37:37.370078 hw id: 0x0000 - pwm id 0x01
483 17:37:37.370599 bl2_stage_init 0xc1
484 17:37:37.371058 bl2_stage_init 0x02
485 17:37:37.371501
486 17:37:37.375645 L0:00000000
487 17:37:37.376208 L1:20000703
488 17:37:37.376673 L2:00008067
489 17:37:37.377116 L3:14000000
490 17:37:37.381275 B2:00402000
491 17:37:37.381788 B1:e0f83180
492 17:37:37.382235
493 17:37:37.382680 TE: 58159
494 17:37:37.383117
495 17:37:37.386839 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 17:37:37.387361
497 17:37:37.387816 Board ID = 1
498 17:37:37.392428 Set A53 clk to 24M
499 17:37:37.392939 Set A73 clk to 24M
500 17:37:37.393387 Set clk81 to 24M
501 17:37:37.398035 A53 clk: 1200 MHz
502 17:37:37.398543 A73 clk: 1200 MHz
503 17:37:37.398992 CLK81: 166.6M
504 17:37:37.399434 smccc: 00012ab5
505 17:37:37.403617 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 17:37:37.409224 board id: 1
507 17:37:37.415160 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 17:37:37.425792 fw parse done
509 17:37:37.431758 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 17:37:37.474329 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 17:37:37.485266 PIEI prepare done
512 17:37:37.485792 fastboot data load
513 17:37:37.486246 fastboot data verify
514 17:37:37.490949 verify result: 266
515 17:37:37.496550 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 17:37:37.497070 LPDDR4 probe
517 17:37:37.497521 ddr clk to 1584MHz
518 17:37:37.504556 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 17:37:37.541824
520 17:37:37.542405 dmc_version 0001
521 17:37:37.548514 Check phy result
522 17:37:37.554380 INFO : End of CA training
523 17:37:37.554906 INFO : End of initialization
524 17:37:37.559954 INFO : Training has run successfully!
525 17:37:37.560515 Check phy result
526 17:37:37.565570 INFO : End of initialization
527 17:37:37.566088 INFO : End of read enable training
528 17:37:37.571217 INFO : End of fine write leveling
529 17:37:37.576755 INFO : End of Write leveling coarse delay
530 17:37:37.577269 INFO : Training has run successfully!
531 17:37:37.577720 Check phy result
532 17:37:37.582324 INFO : End of initialization
533 17:37:37.582833 INFO : End of read dq deskew training
534 17:37:37.587956 INFO : End of MPR read delay center optimization
535 17:37:37.593560 INFO : End of write delay center optimization
536 17:37:37.599189 INFO : End of read delay center optimization
537 17:37:37.599706 INFO : End of max read latency training
538 17:37:37.604754 INFO : Training has run successfully!
539 17:37:37.605269 1D training succeed
540 17:37:37.613910 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 17:37:37.661513 Check phy result
542 17:37:37.662048 INFO : End of initialization
543 17:37:37.683277 INFO : End of 2D read delay Voltage center optimization
544 17:37:37.703532 INFO : End of 2D read delay Voltage center optimization
545 17:37:37.755581 INFO : End of 2D write delay Voltage center optimization
546 17:37:37.804915 INFO : End of 2D write delay Voltage center optimization
547 17:37:37.810469 INFO : Training has run successfully!
548 17:37:37.810985
549 17:37:37.811444 channel==0
550 17:37:37.816093 RxClkDly_Margin_A0==88 ps 9
551 17:37:37.816629 TxDqDly_Margin_A0==98 ps 10
552 17:37:37.821688 RxClkDly_Margin_A1==88 ps 9
553 17:37:37.822200 TxDqDly_Margin_A1==98 ps 10
554 17:37:37.822650 TrainedVREFDQ_A0==74
555 17:37:37.827295 TrainedVREFDQ_A1==74
556 17:37:37.827819 VrefDac_Margin_A0==25
557 17:37:37.828308 DeviceVref_Margin_A0==40
558 17:37:37.832892 VrefDac_Margin_A1==24
559 17:37:37.833405 DeviceVref_Margin_A1==40
560 17:37:37.833854
561 17:37:37.834294
562 17:37:37.838464 channel==1
563 17:37:37.838965 RxClkDly_Margin_A0==98 ps 10
564 17:37:37.839410 TxDqDly_Margin_A0==88 ps 9
565 17:37:37.844089 RxClkDly_Margin_A1==88 ps 9
566 17:37:37.844595 TxDqDly_Margin_A1==88 ps 9
567 17:37:37.849688 TrainedVREFDQ_A0==76
568 17:37:37.850201 TrainedVREFDQ_A1==77
569 17:37:37.850648 VrefDac_Margin_A0==22
570 17:37:37.855262 DeviceVref_Margin_A0==38
571 17:37:37.855775 VrefDac_Margin_A1==24
572 17:37:37.860857 DeviceVref_Margin_A1==37
573 17:37:37.861374
574 17:37:37.861818 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 17:37:37.862259
576 17:37:37.894465 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000016 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000018 dram_vref_reg_value 0x 00000060
577 17:37:37.895083 2D training succeed
578 17:37:37.900171 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 17:37:37.905729 auto size-- 65535DDR cs0 size: 2048MB
580 17:37:37.906269 DDR cs1 size: 2048MB
581 17:37:37.911320 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 17:37:37.911850 cs0 DataBus test pass
583 17:37:37.916886 cs1 DataBus test pass
584 17:37:37.917407 cs0 AddrBus test pass
585 17:37:37.917854 cs1 AddrBus test pass
586 17:37:37.918292
587 17:37:37.922505 100bdlr_step_size ps== 420
588 17:37:37.923035 result report
589 17:37:37.928102 boot times 0Enable ddr reg access
590 17:37:37.933335 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 17:37:37.946790 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 17:37:38.520548 0.0;M3 CHK:0;cm4_sp_mode 0
593 17:37:38.521209 MVN_1=0x00000000
594 17:37:38.526007 MVN_2=0x00000000
595 17:37:38.531763 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 17:37:38.532400 OPS=0x10
597 17:37:38.532888 ring efuse init
598 17:37:38.533346 chipver efuse init
599 17:37:38.537331 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 17:37:38.542904 [0.018961 Inits done]
601 17:37:38.543424 secure task start!
602 17:37:38.543858 high task start!
603 17:37:38.547464 low task start!
604 17:37:38.547967 run into bl31
605 17:37:38.554149 NOTICE: BL31: v1.3(release):4fc40b1
606 17:37:38.561947 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 17:37:38.562466 NOTICE: BL31: G12A normal boot!
608 17:37:38.587368 NOTICE: BL31: BL33 decompress pass
609 17:37:38.593043 ERROR: Error initializing runtime service opteed_fast
610 17:37:39.826080
611 17:37:39.826748
612 17:37:39.834589 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 17:37:39.835126
614 17:37:39.835586 Model: Libre Computer AML-A311D-CC Alta
615 17:37:40.042918 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 17:37:40.066344 DRAM: 2 GiB (effective 3.8 GiB)
617 17:37:40.209114 Core: 408 devices, 31 uclasses, devicetree: separate
618 17:37:40.215201 WDT: Not starting watchdog@f0d0
619 17:37:40.247343 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 17:37:40.259803 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 17:37:40.264867 ** Bad device specification mmc 0 **
622 17:37:40.275220 Card did not respond to voltage select! : -110
623 17:37:40.282865 ** Bad device specification mmc 0 **
624 17:37:40.283378 Couldn't find partition mmc 0
625 17:37:40.291043 Card did not respond to voltage select! : -110
626 17:37:40.296653 ** Bad device specification mmc 0 **
627 17:37:40.297156 Couldn't find partition mmc 0
628 17:37:40.301774 Error: could not access storage.
629 17:37:40.644250 Net: eth0: ethernet@ff3f0000
630 17:37:40.644829 starting USB...
631 17:37:40.896083 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 17:37:40.896621 Starting the controller
633 17:37:40.903046 USB XHCI 1.10
634 17:37:42.616509 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 17:37:42.617154 bl2_stage_init 0x01
636 17:37:42.617624 bl2_stage_init 0x81
637 17:37:42.622095 hw id: 0x0000 - pwm id 0x01
638 17:37:42.622608 bl2_stage_init 0xc1
639 17:37:42.623061 bl2_stage_init 0x02
640 17:37:42.623508
641 17:37:42.627559 L0:00000000
642 17:37:42.628107 L1:20000703
643 17:37:42.628571 L2:00008067
644 17:37:42.629018 L3:14000000
645 17:37:42.633230 B2:00402000
646 17:37:42.633728 B1:e0f83180
647 17:37:42.634177
648 17:37:42.634616 TE: 58167
649 17:37:42.635057
650 17:37:42.638860 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 17:37:42.639360
652 17:37:42.639809 Board ID = 1
653 17:37:42.644393 Set A53 clk to 24M
654 17:37:42.644890 Set A73 clk to 24M
655 17:37:42.645337 Set clk81 to 24M
656 17:37:42.650041 A53 clk: 1200 MHz
657 17:37:42.650535 A73 clk: 1200 MHz
658 17:37:42.650982 CLK81: 166.6M
659 17:37:42.651414 smccc: 00012abe
660 17:37:42.655567 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 17:37:42.661158 board id: 1
662 17:37:42.667084 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 17:37:42.677750 fw parse done
664 17:37:42.683696 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 17:37:42.726252 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 17:37:42.737180 PIEI prepare done
667 17:37:42.737686 fastboot data load
668 17:37:42.738140 fastboot data verify
669 17:37:42.742887 verify result: 266
670 17:37:42.748466 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 17:37:42.748972 LPDDR4 probe
672 17:37:42.749427 ddr clk to 1584MHz
673 17:37:42.756448 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 17:37:42.793688
675 17:37:42.794193 dmc_version 0001
676 17:37:42.800379 Check phy result
677 17:37:42.806223 INFO : End of CA training
678 17:37:42.806721 INFO : End of initialization
679 17:37:42.811846 INFO : Training has run successfully!
680 17:37:42.812385 Check phy result
681 17:37:42.817387 INFO : End of initialization
682 17:37:42.817885 INFO : End of read enable training
683 17:37:42.823004 INFO : End of fine write leveling
684 17:37:42.828622 INFO : End of Write leveling coarse delay
685 17:37:42.829132 INFO : Training has run successfully!
686 17:37:42.829585 Check phy result
687 17:37:42.834303 INFO : End of initialization
688 17:37:42.834806 INFO : End of read dq deskew training
689 17:37:42.839880 INFO : End of MPR read delay center optimization
690 17:37:42.845415 INFO : End of write delay center optimization
691 17:37:42.851038 INFO : End of read delay center optimization
692 17:37:42.851537 INFO : End of max read latency training
693 17:37:42.856600 INFO : Training has run successfully!
694 17:37:42.857099 1D training succeed
695 17:37:42.865777 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 17:37:42.913443 Check phy result
697 17:37:42.913972 INFO : End of initialization
698 17:37:42.935027 INFO : End of 2D read delay Voltage center optimization
699 17:37:42.955174 INFO : End of 2D read delay Voltage center optimization
700 17:37:43.007130 INFO : End of 2D write delay Voltage center optimization
701 17:37:43.056355 INFO : End of 2D write delay Voltage center optimization
702 17:37:43.061947 INFO : Training has run successfully!
703 17:37:43.062447
704 17:37:43.062898 channel==0
705 17:37:43.067541 RxClkDly_Margin_A0==88 ps 9
706 17:37:43.068105 TxDqDly_Margin_A0==98 ps 10
707 17:37:43.070785 RxClkDly_Margin_A1==88 ps 9
708 17:37:43.071282 TxDqDly_Margin_A1==88 ps 9
709 17:37:43.076358 TrainedVREFDQ_A0==74
710 17:37:43.076859 TrainedVREFDQ_A1==74
711 17:37:43.077308 VrefDac_Margin_A0==25
712 17:37:43.082070 DeviceVref_Margin_A0==40
713 17:37:43.082563 VrefDac_Margin_A1==25
714 17:37:43.087540 DeviceVref_Margin_A1==40
715 17:37:43.088065
716 17:37:43.088522
717 17:37:43.088965 channel==1
718 17:37:43.089398 RxClkDly_Margin_A0==98 ps 10
719 17:37:43.090994 TxDqDly_Margin_A0==98 ps 10
720 17:37:43.096458 RxClkDly_Margin_A1==98 ps 10
721 17:37:43.096958 TxDqDly_Margin_A1==88 ps 9
722 17:37:43.097408 TrainedVREFDQ_A0==77
723 17:37:43.102073 TrainedVREFDQ_A1==77
724 17:37:43.102569 VrefDac_Margin_A0==22
725 17:37:43.107663 DeviceVref_Margin_A0==37
726 17:37:43.108187 VrefDac_Margin_A1==24
727 17:37:43.108635 DeviceVref_Margin_A1==37
728 17:37:43.109072
729 17:37:43.113291 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 17:37:43.113786
731 17:37:43.146714 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 17:37:43.147290 2D training succeed
733 17:37:43.152410 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 17:37:43.157943 auto size-- 65535DDR cs0 size: 2048MB
735 17:37:43.158467 DDR cs1 size: 2048MB
736 17:37:43.163560 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 17:37:43.164112 cs0 DataBus test pass
738 17:37:43.164566 cs1 DataBus test pass
739 17:37:43.169207 cs0 AddrBus test pass
740 17:37:43.169725 cs1 AddrBus test pass
741 17:37:43.170173
742 17:37:43.174796 100bdlr_step_size ps== 420
743 17:37:43.175361 result report
744 17:37:43.175816 boot times 0Enable ddr reg access
745 17:37:43.184678 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 17:37:43.198135 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 17:37:43.770260 0.0;M3 CHK:0;cm4_sp_mode 0
748 17:37:43.770914 MVN_1=0x00000000
749 17:37:43.775753 MVN_2=0x00000000
750 17:37:43.781414 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 17:37:43.781965 OPS=0x10
752 17:37:43.782418 ring efuse init
753 17:37:43.782855 chipver efuse init
754 17:37:43.789628 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 17:37:43.790120 [0.018961 Inits done]
756 17:37:43.790563 secure task start!
757 17:37:43.797093 high task start!
758 17:37:43.797554 low task start!
759 17:37:43.797985 run into bl31
760 17:37:43.803792 NOTICE: BL31: v1.3(release):4fc40b1
761 17:37:43.811555 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 17:37:43.812053 NOTICE: BL31: G12A normal boot!
763 17:37:43.836954 NOTICE: BL31: BL33 decompress pass
764 17:37:43.842640 ERROR: Error initializing runtime service opteed_fast
765 17:37:45.075594
766 17:37:45.076304
767 17:37:45.083939 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 17:37:45.084473
769 17:37:45.084924 Model: Libre Computer AML-A311D-CC Alta
770 17:37:45.292504 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 17:37:45.315765 DRAM: 2 GiB (effective 3.8 GiB)
772 17:37:45.458905 Core: 408 devices, 31 uclasses, devicetree: separate
773 17:37:45.464627 WDT: Not starting watchdog@f0d0
774 17:37:45.496837 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 17:37:45.509317 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 17:37:45.514281 ** Bad device specification mmc 0 **
777 17:37:45.524619 Card did not respond to voltage select! : -110
778 17:37:45.532279 ** Bad device specification mmc 0 **
779 17:37:45.532766 Couldn't find partition mmc 0
780 17:37:45.540627 Card did not respond to voltage select! : -110
781 17:37:45.546123 ** Bad device specification mmc 0 **
782 17:37:45.546605 Couldn't find partition mmc 0
783 17:37:45.551223 Error: could not access storage.
784 17:37:45.893846 Net: eth0: ethernet@ff3f0000
785 17:37:45.894483 starting USB...
786 17:37:46.145656 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 17:37:46.146277 Starting the controller
788 17:37:46.152595 USB XHCI 1.10
789 17:37:48.315004 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 17:37:48.315435 bl2_stage_init 0x81
791 17:37:48.320600 hw id: 0x0000 - pwm id 0x01
792 17:37:48.321000 bl2_stage_init 0xc1
793 17:37:48.321307 bl2_stage_init 0x02
794 17:37:48.321603
795 17:37:48.326195 L0:00000000
796 17:37:48.326488 L1:20000703
797 17:37:48.326692 L2:00008067
798 17:37:48.326890 L3:14000000
799 17:37:48.327085 B2:00402000
800 17:37:48.331823 B1:e0f83180
801 17:37:48.332244
802 17:37:48.332561 TE: 58150
803 17:37:48.332858
804 17:37:48.337425 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 17:37:48.337812
806 17:37:48.338116 Board ID = 1
807 17:37:48.342975 Set A53 clk to 24M
808 17:37:48.343356 Set A73 clk to 24M
809 17:37:48.343659 Set clk81 to 24M
810 17:37:48.348566 A53 clk: 1200 MHz
811 17:37:48.348853 A73 clk: 1200 MHz
812 17:37:48.349057 CLK81: 166.6M
813 17:37:48.349254 smccc: 00012aac
814 17:37:48.354186 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 17:37:48.359696 board id: 1
816 17:37:48.365631 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 17:37:48.376252 fw parse done
818 17:37:48.382199 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 17:37:48.424711 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 17:37:48.435626 PIEI prepare done
821 17:37:48.435924 fastboot data load
822 17:37:48.436539 fastboot data verify
823 17:37:48.441256 verify result: 266
824 17:37:48.446841 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 17:37:48.447286 LPDDR4 probe
826 17:37:48.447686 ddr clk to 1584MHz
827 17:37:48.454800 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 17:37:48.492067
829 17:37:48.492513 dmc_version 0001
830 17:37:48.498728 Check phy result
831 17:37:48.504659 INFO : End of CA training
832 17:37:48.505103 INFO : End of initialization
833 17:37:48.510257 INFO : Training has run successfully!
834 17:37:48.510690 Check phy result
835 17:37:48.515846 INFO : End of initialization
836 17:37:48.516323 INFO : End of read enable training
837 17:37:48.519121 INFO : End of fine write leveling
838 17:37:48.524683 INFO : End of Write leveling coarse delay
839 17:37:48.530301 INFO : Training has run successfully!
840 17:37:48.530744 Check phy result
841 17:37:48.531135 INFO : End of initialization
842 17:37:48.535902 INFO : End of read dq deskew training
843 17:37:48.541571 INFO : End of MPR read delay center optimization
844 17:37:48.542040 INFO : End of write delay center optimization
845 17:37:48.547076 INFO : End of read delay center optimization
846 17:37:48.552768 INFO : End of max read latency training
847 17:37:48.553213 INFO : Training has run successfully!
848 17:37:48.558323 1D training succeed
849 17:37:48.564270 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 17:37:48.611958 Check phy result
851 17:37:48.612451 INFO : End of initialization
852 17:37:48.634301 INFO : End of 2D read delay Voltage center optimization
853 17:37:48.654620 INFO : End of 2D read delay Voltage center optimization
854 17:37:48.706654 INFO : End of 2D write delay Voltage center optimization
855 17:37:48.756095 INFO : End of 2D write delay Voltage center optimization
856 17:37:48.761637 INFO : Training has run successfully!
857 17:37:48.762090
858 17:37:48.762489 channel==0
859 17:37:48.767224 RxClkDly_Margin_A0==88 ps 9
860 17:37:48.767675 TxDqDly_Margin_A0==98 ps 10
861 17:37:48.772852 RxClkDly_Margin_A1==88 ps 9
862 17:37:48.773297 TxDqDly_Margin_A1==88 ps 9
863 17:37:48.773691 TrainedVREFDQ_A0==74
864 17:37:48.778470 TrainedVREFDQ_A1==74
865 17:37:48.778926 VrefDac_Margin_A0==24
866 17:37:48.779313 DeviceVref_Margin_A0==40
867 17:37:48.784009 VrefDac_Margin_A1==24
868 17:37:48.784445 DeviceVref_Margin_A1==40
869 17:37:48.784830
870 17:37:48.785213
871 17:37:48.785596 channel==1
872 17:37:48.789649 RxClkDly_Margin_A0==98 ps 10
873 17:37:48.790084 TxDqDly_Margin_A0==88 ps 9
874 17:37:48.795231 RxClkDly_Margin_A1==88 ps 9
875 17:37:48.795660 TxDqDly_Margin_A1==88 ps 9
876 17:37:48.800754 TrainedVREFDQ_A0==75
877 17:37:48.801186 TrainedVREFDQ_A1==77
878 17:37:48.801576 VrefDac_Margin_A0==22
879 17:37:48.806373 DeviceVref_Margin_A0==38
880 17:37:48.806802 VrefDac_Margin_A1==24
881 17:37:48.812023 DeviceVref_Margin_A1==37
882 17:37:48.812458
883 17:37:48.812843 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 17:37:48.813229
885 17:37:48.845591 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
886 17:37:48.846057 2D training succeed
887 17:37:48.851253 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 17:37:48.856637 auto size-- 65535DDR cs0 size: 2048MB
889 17:37:48.857083 DDR cs1 size: 2048MB
890 17:37:48.862247 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 17:37:48.862677 cs0 DataBus test pass
892 17:37:48.867830 cs1 DataBus test pass
893 17:37:48.868299 cs0 AddrBus test pass
894 17:37:48.868688 cs1 AddrBus test pass
895 17:37:48.869068
896 17:37:48.873487 100bdlr_step_size ps== 420
897 17:37:48.873928 result report
898 17:37:48.879044 boot times 0Enable ddr reg access
899 17:37:48.884214 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 17:37:48.897750 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 17:37:49.471605 0.0;M3 CHK:0;cm4_sp_mode 0
902 17:37:49.472267 MVN_1=0x00000000
903 17:37:49.477004 MVN_2=0x00000000
904 17:37:49.482730 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 17:37:49.483195 OPS=0x10
906 17:37:49.483609 ring efuse init
907 17:37:49.484043 chipver efuse init
908 17:37:49.488337 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 17:37:49.493983 [0.018961 Inits done]
910 17:37:49.494481 secure task start!
911 17:37:49.494898 high task start!
912 17:37:49.498556 low task start!
913 17:37:49.499026 run into bl31
914 17:37:49.505165 NOTICE: BL31: v1.3(release):4fc40b1
915 17:37:49.512977 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 17:37:49.513466 NOTICE: BL31: G12A normal boot!
917 17:37:49.538445 NOTICE: BL31: BL33 decompress pass
918 17:37:49.544059 ERROR: Error initializing runtime service opteed_fast
919 17:37:50.777119
920 17:37:50.777741
921 17:37:50.785419 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 17:37:50.785891
923 17:37:50.786311 Model: Libre Computer AML-A311D-CC Alta
924 17:37:50.993976 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 17:37:51.017310 DRAM: 2 GiB (effective 3.8 GiB)
926 17:37:51.160233 Core: 408 devices, 31 uclasses, devicetree: separate
927 17:37:51.166109 WDT: Not starting watchdog@f0d0
928 17:37:51.198340 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 17:37:51.210888 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 17:37:51.215811 ** Bad device specification mmc 0 **
931 17:37:51.226127 Card did not respond to voltage select! : -110
932 17:37:51.233790 ** Bad device specification mmc 0 **
933 17:37:51.234244 Couldn't find partition mmc 0
934 17:37:51.242138 Card did not respond to voltage select! : -110
935 17:37:51.247641 ** Bad device specification mmc 0 **
936 17:37:51.248114 Couldn't find partition mmc 0
937 17:37:51.252699 Error: could not access storage.
938 17:37:51.596318 Net: eth0: ethernet@ff3f0000
939 17:37:51.596932 starting USB...
940 17:37:51.848290 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 17:37:51.848875 Starting the controller
942 17:37:51.855113 USB XHCI 1.10
943 17:37:53.714577 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
944 17:37:53.715017 bl2_stage_init 0x01
945 17:37:53.715239 bl2_stage_init 0x81
946 17:37:53.720206 hw id: 0x0000 - pwm id 0x01
947 17:37:53.720630 bl2_stage_init 0xc1
948 17:37:53.720950 bl2_stage_init 0x02
949 17:37:53.721256
950 17:37:53.725669 L0:00000000
951 17:37:53.726089 L1:20000703
952 17:37:53.726331 L2:00008067
953 17:37:53.726537 L3:14000000
954 17:37:53.731305 B2:00402000
955 17:37:53.731738 B1:e0f83180
956 17:37:53.732117
957 17:37:53.732652 TE: 58167
958 17:37:53.733081
959 17:37:53.736933 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 17:37:53.737413
961 17:37:53.737836 Board ID = 1
962 17:37:53.742522 Set A53 clk to 24M
963 17:37:53.742906 Set A73 clk to 24M
964 17:37:53.743133 Set clk81 to 24M
965 17:37:53.748145 A53 clk: 1200 MHz
966 17:37:53.748759 A73 clk: 1200 MHz
967 17:37:53.749259 CLK81: 166.6M
968 17:37:53.749716 smccc: 00012abd
969 17:37:53.753819 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 17:37:53.759414 board id: 1
971 17:37:53.765365 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 17:37:53.775940 fw parse done
973 17:37:53.782255 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 17:37:53.824519 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 17:37:53.835403 PIEI prepare done
976 17:37:53.835970 fastboot data load
977 17:37:53.836455 fastboot data verify
978 17:37:53.841103 verify result: 266
979 17:37:53.846657 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 17:37:53.847208 LPDDR4 probe
981 17:37:53.847645 ddr clk to 1584MHz
982 17:37:53.854813 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 17:37:53.892163
984 17:37:53.892759 dmc_version 0001
985 17:37:53.898804 Check phy result
986 17:37:53.904660 INFO : End of CA training
987 17:37:53.905197 INFO : End of initialization
988 17:37:53.910269 INFO : Training has run successfully!
989 17:37:53.910855 Check phy result
990 17:37:53.915809 INFO : End of initialization
991 17:37:53.916428 INFO : End of read enable training
992 17:37:53.919166 INFO : End of fine write leveling
993 17:37:53.924766 INFO : End of Write leveling coarse delay
994 17:37:53.930346 INFO : Training has run successfully!
995 17:37:53.930894 Check phy result
996 17:37:53.931353 INFO : End of initialization
997 17:37:53.935874 INFO : End of read dq deskew training
998 17:37:53.939447 INFO : End of MPR read delay center optimization
999 17:37:53.944985 INFO : End of write delay center optimization
1000 17:37:53.950597 INFO : End of read delay center optimization
1001 17:37:53.951147 INFO : End of max read latency training
1002 17:37:53.956052 INFO : Training has run successfully!
1003 17:37:53.956602 1D training succeed
1004 17:37:53.964109 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 17:37:54.011750 Check phy result
1006 17:37:54.012397 INFO : End of initialization
1007 17:37:54.033553 INFO : End of 2D read delay Voltage center optimization
1008 17:37:54.053720 INFO : End of 2D read delay Voltage center optimization
1009 17:37:54.105735 INFO : End of 2D write delay Voltage center optimization
1010 17:37:54.155109 INFO : End of 2D write delay Voltage center optimization
1011 17:37:54.160648 INFO : Training has run successfully!
1012 17:37:54.161206
1013 17:37:54.161681 channel==0
1014 17:37:54.166274 RxClkDly_Margin_A0==88 ps 9
1015 17:37:54.166839 TxDqDly_Margin_A0==98 ps 10
1016 17:37:54.171823 RxClkDly_Margin_A1==88 ps 9
1017 17:37:54.172409 TxDqDly_Margin_A1==98 ps 10
1018 17:37:54.172882 TrainedVREFDQ_A0==74
1019 17:37:54.177431 TrainedVREFDQ_A1==74
1020 17:37:54.177984 VrefDac_Margin_A0==25
1021 17:37:54.178451 DeviceVref_Margin_A0==40
1022 17:37:54.183014 VrefDac_Margin_A1==25
1023 17:37:54.183561 DeviceVref_Margin_A1==40
1024 17:37:54.184056
1025 17:37:54.184518
1026 17:37:54.188616 channel==1
1027 17:37:54.189175 RxClkDly_Margin_A0==98 ps 10
1028 17:37:54.189633 TxDqDly_Margin_A0==88 ps 9
1029 17:37:54.194238 RxClkDly_Margin_A1==98 ps 10
1030 17:37:54.194778 TxDqDly_Margin_A1==88 ps 9
1031 17:37:54.199824 TrainedVREFDQ_A0==75
1032 17:37:54.200426 TrainedVREFDQ_A1==77
1033 17:37:54.200894 VrefDac_Margin_A0==22
1034 17:37:54.205429 DeviceVref_Margin_A0==39
1035 17:37:54.205974 VrefDac_Margin_A1==22
1036 17:37:54.211031 DeviceVref_Margin_A1==37
1037 17:37:54.211572
1038 17:37:54.212071 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 17:37:54.212525
1040 17:37:54.244589 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
1041 17:37:54.245199 2D training succeed
1042 17:37:54.250349 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 17:37:54.255834 auto size-- 65535DDR cs0 size: 2048MB
1044 17:37:54.256425 DDR cs1 size: 2048MB
1045 17:37:54.261421 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 17:37:54.261965 cs0 DataBus test pass
1047 17:37:54.266995 cs1 DataBus test pass
1048 17:37:54.267533 cs0 AddrBus test pass
1049 17:37:54.268019 cs1 AddrBus test pass
1050 17:37:54.268480
1051 17:37:54.272624 100bdlr_step_size ps== 420
1052 17:37:54.273191 result report
1053 17:37:54.278222 boot times 0Enable ddr reg access
1054 17:37:54.283533 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 17:37:54.296977 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 17:37:54.870711 0.0;M3 CHK:0;cm4_sp_mode 0
1057 17:37:54.871375 MVN_1=0x00000000
1058 17:37:54.876218 MVN_2=0x00000000
1059 17:37:54.881936 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 17:37:54.882465 OPS=0x10
1061 17:37:54.882923 ring efuse init
1062 17:37:54.883366 chipver efuse init
1063 17:37:54.887540 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 17:37:54.893112 [0.018961 Inits done]
1065 17:37:54.893630 secure task start!
1066 17:37:54.894084 high task start!
1067 17:37:54.897734 low task start!
1068 17:37:54.898253 run into bl31
1069 17:37:54.904425 NOTICE: BL31: v1.3(release):4fc40b1
1070 17:37:54.912217 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 17:37:54.912768 NOTICE: BL31: G12A normal boot!
1072 17:37:54.937642 NOTICE: BL31: BL33 decompress pass
1073 17:37:54.943320 ERROR: Error initializing runtime service opteed_fast
1074 17:37:56.176205
1075 17:37:56.176885
1076 17:37:56.184605 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 17:37:56.185152
1078 17:37:56.185619 Model: Libre Computer AML-A311D-CC Alta
1079 17:37:56.393061 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 17:37:56.416434 DRAM: 2 GiB (effective 3.8 GiB)
1081 17:37:56.559480 Core: 408 devices, 31 uclasses, devicetree: separate
1082 17:37:56.565362 WDT: Not starting watchdog@f0d0
1083 17:37:56.597738 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 17:37:56.609991 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 17:37:56.614967 ** Bad device specification mmc 0 **
1086 17:37:56.625337 Card did not respond to voltage select! : -110
1087 17:37:56.632956 ** Bad device specification mmc 0 **
1088 17:37:56.633485 Couldn't find partition mmc 0
1089 17:37:56.641311 Card did not respond to voltage select! : -110
1090 17:37:56.646810 ** Bad device specification mmc 0 **
1091 17:37:56.647339 Couldn't find partition mmc 0
1092 17:37:56.651881 Error: could not access storage.
1093 17:37:56.996550 Net: eth0: ethernet@ff3f0000
1094 17:37:56.996989 starting USB...
1095 17:37:57.247266 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 17:37:57.248023 Starting the controller
1097 17:37:57.254219 USB XHCI 1.10
1098 17:37:58.808179 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 17:37:58.816454 scanning usb for storage devices... 0 Storage Device(s) found
1101 17:37:58.868261 Hit any key to stop autoboot: 1
1102 17:37:58.869239 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1103 17:37:58.869937 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1104 17:37:58.870454 Setting prompt string to ['=>']
1105 17:37:58.870974 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1106 17:37:58.883900 0
1107 17:37:58.884914 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 17:37:58.885446 Sending with 10 millisecond of delay
1110 17:38:00.020512 => setenv autoload no
1111 17:38:00.031373 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1112 17:38:00.036785 setenv autoload no
1113 17:38:00.037589 Sending with 10 millisecond of delay
1115 17:38:01.835184 => setenv initrd_high 0xffffffff
1116 17:38:01.846020 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1117 17:38:01.846924 setenv initrd_high 0xffffffff
1118 17:38:01.847683 Sending with 10 millisecond of delay
1120 17:38:03.464523 => setenv fdt_high 0xffffffff
1121 17:38:03.475373 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1122 17:38:03.476322 setenv fdt_high 0xffffffff
1123 17:38:03.477099 Sending with 10 millisecond of delay
1125 17:38:03.768991 => dhcp
1126 17:38:03.779796 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 17:38:03.780746 dhcp
1128 17:38:03.781221 Speed: 1000, full duplex
1129 17:38:03.781669 BOOTP broadcast 1
1130 17:38:03.790647 DHCP client bound to address 192.168.6.27 (10 ms)
1131 17:38:03.791429 Sending with 10 millisecond of delay
1133 17:38:05.468589 => setenv serverip 192.168.6.2
1134 17:38:05.479472 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1135 17:38:05.480527 setenv serverip 192.168.6.2
1136 17:38:05.481278 Sending with 10 millisecond of delay
1138 17:38:09.205321 => tftpboot 0x01080000 954402/tftp-deploy-iptvs1ga/kernel/uImage
1139 17:38:09.216183 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1140 17:38:09.217115 tftpboot 0x01080000 954402/tftp-deploy-iptvs1ga/kernel/uImage
1141 17:38:09.217606 Speed: 1000, full duplex
1142 17:38:09.218062 Using ethernet@ff3f0000 device
1143 17:38:09.219109 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 17:38:09.224648 Filename '954402/tftp-deploy-iptvs1ga/kernel/uImage'.
1145 17:38:09.228437 Load address: 0x1080000
1146 17:38:12.081921 Loading: *################################################## 43.6 MiB
1147 17:38:12.082341 15.3 MiB/s
1148 17:38:12.082559 done
1149 17:38:12.086320 Bytes transferred = 45713984 (2b98a40 hex)
1150 17:38:12.086891 Sending with 10 millisecond of delay
1152 17:38:16.777732 => tftpboot 0x08000000 954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
1153 17:38:16.788583 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1154 17:38:16.789487 tftpboot 0x08000000 954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot
1155 17:38:16.789976 Speed: 1000, full duplex
1156 17:38:16.790432 Using ethernet@ff3f0000 device
1157 17:38:16.791524 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 17:38:16.803208 Filename '954402/tftp-deploy-iptvs1ga/ramdisk/ramdisk.cpio.gz.uboot'.
1159 17:38:16.803767 Load address: 0x8000000
1160 17:38:23.484144 Loading: *####################T ############################# UDP wrong checksum 00000005 00000b3e
1161 17:38:28.485119 T UDP wrong checksum 00000005 00000b3e
1162 17:38:38.488367 T T UDP wrong checksum 00000005 00000b3e
1163 17:38:50.423378 T T UDP wrong checksum 000000ff 00007fe9
1164 17:38:50.464183 UDP wrong checksum 000000ff 0000d873
1165 17:38:58.491958 T T UDP wrong checksum 00000005 00000b3e
1166 17:39:13.496346 T T
1167 17:39:13.497029 Retry count exceeded; starting again
1169 17:39:13.498570 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1172 17:39:13.500700 end: 2.4 uboot-commands (duration 00:01:52) [common]
1174 17:39:13.502243 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1176 17:39:13.503385 end: 2 uboot-action (duration 00:01:52) [common]
1178 17:39:13.505098 Cleaning after the job
1179 17:39:13.505684 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/ramdisk
1180 17:39:13.507394 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/kernel
1181 17:39:13.538058 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/dtb
1182 17:39:13.539373 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/nfsrootfs
1183 17:39:13.578840 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954402/tftp-deploy-iptvs1ga/modules
1184 17:39:13.591622 start: 4.1 power-off (timeout 00:00:30) [common]
1185 17:39:13.592246 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1186 17:39:13.625848 >> OK - accepted request
1187 17:39:13.627334 Returned 0 in 0 seconds
1188 17:39:13.728418 end: 4.1 power-off (duration 00:00:00) [common]
1190 17:39:13.729339 start: 4.2 read-feedback (timeout 00:10:00) [common]
1191 17:39:13.729990 Listened to connection for namespace 'common' for up to 1s
1192 17:39:14.730353 Finalising connection for namespace 'common'
1193 17:39:14.731141 Disconnecting from shell: Finalise
1194 17:39:14.731701 =>
1195 17:39:14.832847 end: 4.2 read-feedback (duration 00:00:01) [common]
1196 17:39:14.833512 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/954402
1197 17:39:16.486154 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/954402
1198 17:39:16.486784 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.