Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:16:27.219186 lava-dispatcher, installed at version: 2024.01
2 20:16:27.219968 start: 0 validate
3 20:16:27.220467 Start time: 2024-11-07 20:16:27.220437+00:00 (UTC)
4 20:16:27.221009 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:16:27.221552 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:16:27.256199 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:16:27.256746 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:16:27.289535 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:16:27.290156 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:16:27.320649 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:16:27.321146 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:16:27.353591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:16:27.354067 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-244-g7a812b09d88be%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 20:16:27.390438 validate duration: 0.17
16 20:16:27.391263 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:16:27.391592 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:16:27.391915 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:16:27.392527 Not decompressing ramdisk as can be used compressed.
20 20:16:27.392912 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 20:16:27.393193 saving as /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/ramdisk/initrd.cpio.gz
22 20:16:27.393465 total size: 5628169 (5 MB)
23 20:16:27.433141 progress 0 % (0 MB)
24 20:16:27.441090 progress 5 % (0 MB)
25 20:16:27.448924 progress 10 % (0 MB)
26 20:16:27.455900 progress 15 % (0 MB)
27 20:16:27.462026 progress 20 % (1 MB)
28 20:16:27.465686 progress 25 % (1 MB)
29 20:16:27.469730 progress 30 % (1 MB)
30 20:16:27.473764 progress 35 % (1 MB)
31 20:16:27.477373 progress 40 % (2 MB)
32 20:16:27.481433 progress 45 % (2 MB)
33 20:16:27.485264 progress 50 % (2 MB)
34 20:16:27.489411 progress 55 % (2 MB)
35 20:16:27.493570 progress 60 % (3 MB)
36 20:16:27.497264 progress 65 % (3 MB)
37 20:16:27.501323 progress 70 % (3 MB)
38 20:16:27.504980 progress 75 % (4 MB)
39 20:16:27.509032 progress 80 % (4 MB)
40 20:16:27.512655 progress 85 % (4 MB)
41 20:16:27.516668 progress 90 % (4 MB)
42 20:16:27.520386 progress 95 % (5 MB)
43 20:16:27.523681 progress 100 % (5 MB)
44 20:16:27.524355 5 MB downloaded in 0.13 s (41.01 MB/s)
45 20:16:27.524898 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:16:27.525828 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:16:27.526150 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:16:27.526436 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:16:27.526922 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/kernel/Image
51 20:16:27.527193 saving as /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/kernel/Image
52 20:16:27.527416 total size: 45713920 (43 MB)
53 20:16:27.527636 No compression specified
54 20:16:27.567298 progress 0 % (0 MB)
55 20:16:27.595628 progress 5 % (2 MB)
56 20:16:27.624258 progress 10 % (4 MB)
57 20:16:27.652815 progress 15 % (6 MB)
58 20:16:27.681249 progress 20 % (8 MB)
59 20:16:27.709134 progress 25 % (10 MB)
60 20:16:27.737559 progress 30 % (13 MB)
61 20:16:27.766011 progress 35 % (15 MB)
62 20:16:27.794436 progress 40 % (17 MB)
63 20:16:27.822486 progress 45 % (19 MB)
64 20:16:27.851009 progress 50 % (21 MB)
65 20:16:27.879369 progress 55 % (24 MB)
66 20:16:27.907693 progress 60 % (26 MB)
67 20:16:27.935679 progress 65 % (28 MB)
68 20:16:27.964119 progress 70 % (30 MB)
69 20:16:27.992680 progress 75 % (32 MB)
70 20:16:28.020927 progress 80 % (34 MB)
71 20:16:28.049064 progress 85 % (37 MB)
72 20:16:28.077366 progress 90 % (39 MB)
73 20:16:28.105777 progress 95 % (41 MB)
74 20:16:28.133624 progress 100 % (43 MB)
75 20:16:28.134162 43 MB downloaded in 0.61 s (71.85 MB/s)
76 20:16:28.134636 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:16:28.135450 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:16:28.135728 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:16:28.136019 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:16:28.136484 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:16:28.136751 saving as /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:16:28.136959 total size: 54703 (0 MB)
84 20:16:28.137169 No compression specified
85 20:16:28.171389 progress 59 % (0 MB)
86 20:16:28.172266 progress 100 % (0 MB)
87 20:16:28.172843 0 MB downloaded in 0.04 s (1.45 MB/s)
88 20:16:28.173325 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:16:28.174139 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:16:28.174401 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:16:28.174664 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:16:28.175109 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 20:16:28.175348 saving as /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/nfsrootfs/full.rootfs.tar
95 20:16:28.175554 total size: 120894716 (115 MB)
96 20:16:28.175766 Using unxz to decompress xz
97 20:16:28.209777 progress 0 % (0 MB)
98 20:16:29.002295 progress 5 % (5 MB)
99 20:16:30.018657 progress 10 % (11 MB)
100 20:16:30.807132 progress 15 % (17 MB)
101 20:16:31.541133 progress 20 % (23 MB)
102 20:16:32.132650 progress 25 % (28 MB)
103 20:16:32.954717 progress 30 % (34 MB)
104 20:16:33.744937 progress 35 % (40 MB)
105 20:16:34.112811 progress 40 % (46 MB)
106 20:16:34.503094 progress 45 % (51 MB)
107 20:16:35.226898 progress 50 % (57 MB)
108 20:16:36.125712 progress 55 % (63 MB)
109 20:16:36.910028 progress 60 % (69 MB)
110 20:16:37.680766 progress 65 % (74 MB)
111 20:16:38.458109 progress 70 % (80 MB)
112 20:16:39.280525 progress 75 % (86 MB)
113 20:16:40.067692 progress 80 % (92 MB)
114 20:16:40.835164 progress 85 % (98 MB)
115 20:16:41.700650 progress 90 % (103 MB)
116 20:16:42.492665 progress 95 % (109 MB)
117 20:16:43.384802 progress 100 % (115 MB)
118 20:16:43.400245 115 MB downloaded in 15.22 s (7.57 MB/s)
119 20:16:43.401214 end: 1.4.1 http-download (duration 00:00:15) [common]
121 20:16:43.402976 end: 1.4 download-retry (duration 00:00:15) [common]
122 20:16:43.403548 start: 1.5 download-retry (timeout 00:09:44) [common]
123 20:16:43.404152 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 20:16:43.405133 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/modules.tar.xz
125 20:16:43.405655 saving as /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/modules/modules.tar
126 20:16:43.406108 total size: 11609200 (11 MB)
127 20:16:43.406570 Using unxz to decompress xz
128 20:16:43.452278 progress 0 % (0 MB)
129 20:16:43.522341 progress 5 % (0 MB)
130 20:16:43.602026 progress 10 % (1 MB)
131 20:16:43.704884 progress 15 % (1 MB)
132 20:16:43.812743 progress 20 % (2 MB)
133 20:16:43.902738 progress 25 % (2 MB)
134 20:16:43.996060 progress 30 % (3 MB)
135 20:16:44.087720 progress 35 % (3 MB)
136 20:16:44.180716 progress 40 % (4 MB)
137 20:16:44.273000 progress 45 % (5 MB)
138 20:16:44.376651 progress 50 % (5 MB)
139 20:16:44.461778 progress 55 % (6 MB)
140 20:16:44.586661 progress 60 % (6 MB)
141 20:16:44.669665 progress 65 % (7 MB)
142 20:16:44.748973 progress 70 % (7 MB)
143 20:16:44.833270 progress 75 % (8 MB)
144 20:16:44.918622 progress 80 % (8 MB)
145 20:16:45.000401 progress 85 % (9 MB)
146 20:16:45.079087 progress 90 % (9 MB)
147 20:16:45.156674 progress 95 % (10 MB)
148 20:16:45.233789 progress 100 % (11 MB)
149 20:16:45.245245 11 MB downloaded in 1.84 s (6.02 MB/s)
150 20:16:45.246236 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:16:45.248095 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:16:45.248725 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 20:16:45.249323 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 20:17:02.371049 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/954430/extract-nfsrootfs-fnc3_w3z
156 20:17:02.371764 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 20:17:02.372155 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 20:17:02.372884 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l
159 20:17:02.373455 makedir: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin
160 20:17:02.373874 makedir: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/tests
161 20:17:02.374286 makedir: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/results
162 20:17:02.374693 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-add-keys
163 20:17:02.375455 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-add-sources
164 20:17:02.376186 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-background-process-start
165 20:17:02.376860 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-background-process-stop
166 20:17:02.377540 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-common-functions
167 20:17:02.378209 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-echo-ipv4
168 20:17:02.378829 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-install-packages
169 20:17:02.379422 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-installed-packages
170 20:17:02.380140 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-os-build
171 20:17:02.380818 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-probe-channel
172 20:17:02.381420 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-probe-ip
173 20:17:02.382010 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-target-ip
174 20:17:02.382614 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-target-mac
175 20:17:02.383278 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-target-storage
176 20:17:02.383956 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-case
177 20:17:02.384701 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-event
178 20:17:02.385338 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-feedback
179 20:17:02.385949 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-raise
180 20:17:02.386571 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-reference
181 20:17:02.387167 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-runner
182 20:17:02.387813 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-set
183 20:17:02.388536 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-test-shell
184 20:17:02.389165 Updating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-add-keys (debian)
185 20:17:02.389832 Updating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-add-sources (debian)
186 20:17:02.390487 Updating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-install-packages (debian)
187 20:17:02.391128 Updating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-installed-packages (debian)
188 20:17:02.391775 Updating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/bin/lava-os-build (debian)
189 20:17:02.392377 Creating /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/environment
190 20:17:02.392861 LAVA metadata
191 20:17:02.393182 - LAVA_JOB_ID=954430
192 20:17:02.393446 - LAVA_DISPATCHER_IP=192.168.6.2
193 20:17:02.393900 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 20:17:02.395105 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 20:17:02.395494 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 20:17:02.395761 skipped lava-vland-overlay
197 20:17:02.396079 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 20:17:02.396405 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 20:17:02.396681 skipped lava-multinode-overlay
200 20:17:02.396979 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 20:17:02.397288 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 20:17:02.397601 Loading test definitions
203 20:17:02.397938 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 20:17:02.398204 Using /lava-954430 at stage 0
205 20:17:02.399606 uuid=954430_1.6.2.4.1 testdef=None
206 20:17:02.400013 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 20:17:02.400354 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 20:17:02.402395 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 20:17:02.403368 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 20:17:02.405850 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 20:17:02.406876 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 20:17:02.409548 runner path: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/0/tests/0_timesync-off test_uuid 954430_1.6.2.4.1
215 20:17:02.410345 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 20:17:02.411433 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 20:17:02.411763 Using /lava-954430 at stage 0
219 20:17:02.412270 Fetching tests from https://github.com/kernelci/test-definitions.git
220 20:17:02.412694 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/0/tests/1_kselftest-dt'
221 20:17:05.792281 Running '/usr/bin/git checkout kernelci.org
222 20:17:06.240230 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 20:17:06.242797 uuid=954430_1.6.2.4.5 testdef=None
224 20:17:06.243419 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 20:17:06.244933 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 20:17:06.250495 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 20:17:06.252140 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 20:17:06.259476 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 20:17:06.261218 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 20:17:06.268707 runner path: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/0/tests/1_kselftest-dt test_uuid 954430_1.6.2.4.5
234 20:17:06.269300 BOARD='meson-g12b-a311d-libretech-cc'
235 20:17:06.269723 BRANCH='broonie-sound'
236 20:17:06.270127 SKIPFILE='/dev/null'
237 20:17:06.270534 SKIP_INSTALL='True'
238 20:17:06.270933 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-244-g7a812b09d88be/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 20:17:06.271348 TST_CASENAME=''
240 20:17:06.271749 TST_CMDFILES='dt'
241 20:17:06.272896 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 20:17:06.274520 Creating lava-test-runner.conf files
244 20:17:06.274938 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/954430/lava-overlay-zbadrz3l/lava-954430/0 for stage 0
245 20:17:06.275626 - 0_timesync-off
246 20:17:06.276161 - 1_kselftest-dt
247 20:17:06.276853 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 20:17:06.277436 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 20:17:29.784317 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 20:17:29.784781 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 20:17:29.785085 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 20:17:29.785405 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 20:17:29.785705 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 20:17:30.407907 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 20:17:30.408455 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 20:17:30.408744 extracting modules file /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954430/extract-nfsrootfs-fnc3_w3z
257 20:17:31.909328 extracting modules file /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/modules/modules.tar to /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk
258 20:17:33.319558 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 20:17:33.320069 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 20:17:33.320375 [common] Applying overlay to NFS
261 20:17:33.320608 [common] Applying overlay /var/lib/lava/dispatcher/tmp/954430/compress-overlay-7_iwjag_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/954430/extract-nfsrootfs-fnc3_w3z
262 20:17:36.193803 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 20:17:36.194357 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 20:17:36.194642 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 20:17:36.194882 Converting downloaded kernel to a uImage
266 20:17:36.195201 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/kernel/Image /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/kernel/uImage
267 20:17:36.813614 output: Image Name:
268 20:17:36.814039 output: Created: Thu Nov 7 20:17:36 2024
269 20:17:36.814253 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 20:17:36.814460 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 20:17:36.814667 output: Load Address: 01080000
272 20:17:36.814873 output: Entry Point: 01080000
273 20:17:36.815072 output:
274 20:17:36.815408 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 20:17:36.815682 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 20:17:36.815955 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 20:17:36.816268 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 20:17:36.816538 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 20:17:36.816799 Building ramdisk /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk
280 20:17:39.219123 >> 166792 blocks
281 20:17:47.084408 Adding RAMdisk u-boot header.
282 20:17:47.084842 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk.cpio.gz.uboot
283 20:17:47.329182 output: Image Name:
284 20:17:47.329614 output: Created: Thu Nov 7 20:17:47 2024
285 20:17:47.329827 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 20:17:47.330032 output: Data Size: 23433953 Bytes = 22884.72 KiB = 22.35 MiB
287 20:17:47.330233 output: Load Address: 00000000
288 20:17:47.330435 output: Entry Point: 00000000
289 20:17:47.330636 output:
290 20:17:47.331258 rename /var/lib/lava/dispatcher/tmp/954430/extract-overlay-ramdisk-n86v6n3n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
291 20:17:47.331679 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 20:17:47.331966 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 20:17:47.332594 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 20:17:47.333107 No LXC device requested
295 20:17:47.333665 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 20:17:47.334230 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 20:17:47.334777 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 20:17:47.335234 Checking files for TFTP limit of 4294967296 bytes.
299 20:17:47.338272 end: 1 tftp-deploy (duration 00:01:20) [common]
300 20:17:47.338908 start: 2 uboot-action (timeout 00:05:00) [common]
301 20:17:47.339489 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 20:17:47.340076 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 20:17:47.340647 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 20:17:47.341227 Using kernel file from prepare-kernel: 954430/tftp-deploy-o7y7fvma/kernel/uImage
305 20:17:47.341923 substitutions:
306 20:17:47.342373 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 20:17:47.342827 - {DTB_ADDR}: 0x01070000
308 20:17:47.343271 - {DTB}: 954430/tftp-deploy-o7y7fvma/dtb/meson-g12b-a311d-libretech-cc.dtb
309 20:17:47.343719 - {INITRD}: 954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
310 20:17:47.344204 - {KERNEL_ADDR}: 0x01080000
311 20:17:47.344648 - {KERNEL}: 954430/tftp-deploy-o7y7fvma/kernel/uImage
312 20:17:47.345089 - {LAVA_MAC}: None
313 20:17:47.345567 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/954430/extract-nfsrootfs-fnc3_w3z
314 20:17:47.346010 - {NFS_SERVER_IP}: 192.168.6.2
315 20:17:47.346445 - {PRESEED_CONFIG}: None
316 20:17:47.346877 - {PRESEED_LOCAL}: None
317 20:17:47.347310 - {RAMDISK_ADDR}: 0x08000000
318 20:17:47.347740 - {RAMDISK}: 954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
319 20:17:47.348222 - {ROOT_PART}: None
320 20:17:47.348660 - {ROOT}: None
321 20:17:47.349091 - {SERVER_IP}: 192.168.6.2
322 20:17:47.349522 - {TEE_ADDR}: 0x83000000
323 20:17:47.349951 - {TEE}: None
324 20:17:47.350383 Parsed boot commands:
325 20:17:47.350805 - setenv autoload no
326 20:17:47.351235 - setenv initrd_high 0xffffffff
327 20:17:47.351663 - setenv fdt_high 0xffffffff
328 20:17:47.352242 - dhcp
329 20:17:47.352689 - setenv serverip 192.168.6.2
330 20:17:47.353132 - tftpboot 0x01080000 954430/tftp-deploy-o7y7fvma/kernel/uImage
331 20:17:47.353576 - tftpboot 0x08000000 954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
332 20:17:47.354017 - tftpboot 0x01070000 954430/tftp-deploy-o7y7fvma/dtb/meson-g12b-a311d-libretech-cc.dtb
333 20:17:47.354454 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/954430/extract-nfsrootfs-fnc3_w3z,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 20:17:47.354903 - bootm 0x01080000 0x08000000 0x01070000
335 20:17:47.355469 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 20:17:47.357158 start: 2.3 connect-device (timeout 00:05:00) [common]
338 20:17:47.357628 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 20:17:47.373418 Setting prompt string to ['lava-test: # ']
340 20:17:47.375073 end: 2.3 connect-device (duration 00:00:00) [common]
341 20:17:47.375755 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 20:17:47.376420 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 20:17:47.377020 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 20:17:47.378250 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 20:17:47.432903 >> OK - accepted request
346 20:17:47.434805 Returned 0 in 0 seconds
347 20:17:47.536015 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 20:17:47.537776 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 20:17:47.538381 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 20:17:47.538937 Setting prompt string to ['Hit any key to stop autoboot']
352 20:17:47.539430 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 20:17:47.541153 Trying 192.168.56.21...
354 20:17:47.541696 Connected to conserv1.
355 20:17:47.542146 Escape character is '^]'.
356 20:17:47.542606
357 20:17:47.543072 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 20:17:47.543543
359 20:17:59.382813 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 20:17:59.383517 bl2_stage_init 0x01
361 20:17:59.384033 bl2_stage_init 0x81
362 20:17:59.388273 hw id: 0x0000 - pwm id 0x01
363 20:17:59.388800 bl2_stage_init 0xc1
364 20:17:59.389271 bl2_stage_init 0x02
365 20:17:59.389743
366 20:17:59.393924 L0:00000000
367 20:17:59.394440 L1:20000703
368 20:17:59.394896 L2:00008067
369 20:17:59.395346 L3:14000000
370 20:17:59.396784 B2:00402000
371 20:17:59.397278 B1:e0f83180
372 20:17:59.397726
373 20:17:59.398098 TE: 58167
374 20:17:59.398302
375 20:17:59.407911 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 20:17:59.408467
377 20:17:59.408961 Board ID = 1
378 20:17:59.409414 Set A53 clk to 24M
379 20:17:59.409864 Set A73 clk to 24M
380 20:17:59.413650 Set clk81 to 24M
381 20:17:59.414266 A53 clk: 1200 MHz
382 20:17:59.414736 A73 clk: 1200 MHz
383 20:17:59.419173 CLK81: 166.6M
384 20:17:59.419811 smccc: 00012abe
385 20:17:59.424697 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 20:17:59.425265 board id: 1
387 20:17:59.433437 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 20:17:59.443974 fw parse done
389 20:17:59.450047 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 20:17:59.492669 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 20:17:59.503509 PIEI prepare done
392 20:17:59.504141 fastboot data load
393 20:17:59.504626 fastboot data verify
394 20:17:59.509341 verify result: 266
395 20:17:59.514792 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 20:17:59.515370 LPDDR4 probe
397 20:17:59.515824 ddr clk to 1584MHz
398 20:17:59.522757 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 20:17:59.560124
400 20:17:59.560774 dmc_version 0001
401 20:17:59.566739 Check phy result
402 20:17:59.572577 INFO : End of CA training
403 20:17:59.573178 INFO : End of initialization
404 20:17:59.578182 INFO : Training has run successfully!
405 20:17:59.578770 Check phy result
406 20:17:59.583756 INFO : End of initialization
407 20:17:59.584418 INFO : End of read enable training
408 20:17:59.587079 INFO : End of fine write leveling
409 20:17:59.592714 INFO : End of Write leveling coarse delay
410 20:17:59.598298 INFO : Training has run successfully!
411 20:17:59.598830 Check phy result
412 20:17:59.599272 INFO : End of initialization
413 20:17:59.603890 INFO : End of read dq deskew training
414 20:17:59.609541 INFO : End of MPR read delay center optimization
415 20:17:59.610083 INFO : End of write delay center optimization
416 20:17:59.615082 INFO : End of read delay center optimization
417 20:17:59.620660 INFO : End of max read latency training
418 20:17:59.621190 INFO : Training has run successfully!
419 20:17:59.626290 1D training succeed
420 20:17:59.632217 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 20:17:59.679677 Check phy result
422 20:17:59.680105 INFO : End of initialization
423 20:17:59.701579 INFO : End of 2D read delay Voltage center optimization
424 20:17:59.721789 INFO : End of 2D read delay Voltage center optimization
425 20:17:59.773799 INFO : End of 2D write delay Voltage center optimization
426 20:17:59.823189 INFO : End of 2D write delay Voltage center optimization
427 20:17:59.828781 INFO : Training has run successfully!
428 20:17:59.829331
429 20:17:59.829786 channel==0
430 20:17:59.835470 RxClkDly_Margin_A0==88 ps 9
431 20:17:59.836028 TxDqDly_Margin_A0==98 ps 10
432 20:17:59.839977 RxClkDly_Margin_A1==88 ps 9
433 20:17:59.840525 TxDqDly_Margin_A1==98 ps 10
434 20:17:59.840971 TrainedVREFDQ_A0==74
435 20:17:59.845453 TrainedVREFDQ_A1==74
436 20:17:59.845978 VrefDac_Margin_A0==25
437 20:17:59.846426 DeviceVref_Margin_A0==40
438 20:17:59.851193 VrefDac_Margin_A1==25
439 20:17:59.851717 DeviceVref_Margin_A1==40
440 20:17:59.852207
441 20:17:59.852652
442 20:17:59.856715 channel==1
443 20:17:59.857228 RxClkDly_Margin_A0==98 ps 10
444 20:17:59.857670 TxDqDly_Margin_A0==98 ps 10
445 20:17:59.862384 RxClkDly_Margin_A1==88 ps 9
446 20:17:59.862914 TxDqDly_Margin_A1==88 ps 9
447 20:17:59.868060 TrainedVREFDQ_A0==77
448 20:17:59.868590 TrainedVREFDQ_A1==77
449 20:17:59.869040 VrefDac_Margin_A0==22
450 20:17:59.873513 DeviceVref_Margin_A0==37
451 20:17:59.874033 VrefDac_Margin_A1==24
452 20:17:59.879160 DeviceVref_Margin_A1==37
453 20:17:59.879675
454 20:17:59.880160 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 20:17:59.880604
456 20:17:59.912681 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000017 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 20:17:59.913348 2D training succeed
458 20:17:59.918388 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 20:17:59.923820 auto size-- 65535DDR cs0 size: 2048MB
460 20:17:59.924404 DDR cs1 size: 2048MB
461 20:17:59.929395 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 20:17:59.929921 cs0 DataBus test pass
463 20:17:59.935051 cs1 DataBus test pass
464 20:17:59.935567 cs0 AddrBus test pass
465 20:17:59.936047 cs1 AddrBus test pass
466 20:17:59.936489
467 20:17:59.940670 100bdlr_step_size ps== 420
468 20:17:59.941198 result report
469 20:17:59.946203 boot times 0Enable ddr reg access
470 20:17:59.951508 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 20:17:59.965085 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 20:18:00.538579 0.0;M3 CHK:0;cm4_sp_mode 0
473 20:18:00.539003 MVN_1=0x00000000
474 20:18:00.544144 MVN_2=0x00000000
475 20:18:00.549997 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 20:18:00.550311 OPS=0x10
477 20:18:00.550520 ring efuse init
478 20:18:00.550724 chipver efuse init
479 20:18:00.555495 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 20:18:00.561022 [0.018961 Inits done]
481 20:18:00.561332 secure task start!
482 20:18:00.561554 high task start!
483 20:18:00.565658 low task start!
484 20:18:00.565951 run into bl31
485 20:18:00.572331 NOTICE: BL31: v1.3(release):4fc40b1
486 20:18:00.580227 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 20:18:00.580820 NOTICE: BL31: G12A normal boot!
488 20:18:00.605386 NOTICE: BL31: BL33 decompress pass
489 20:18:00.611051 ERROR: Error initializing runtime service opteed_fast
490 20:18:01.844016
491 20:18:01.844692
492 20:18:01.852366 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 20:18:01.852869
494 20:18:01.853320 Model: Libre Computer AML-A311D-CC Alta
495 20:18:02.060898 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 20:18:02.084291 DRAM: 2 GiB (effective 3.8 GiB)
497 20:18:02.227547 Core: 408 devices, 31 uclasses, devicetree: separate
498 20:18:02.233125 WDT: Not starting watchdog@f0d0
499 20:18:02.265331 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 20:18:02.277897 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 20:18:02.283148 ** Bad device specification mmc 0 **
502 20:18:02.293339 Card did not respond to voltage select! : -110
503 20:18:02.301610 ** Bad device specification mmc 0 **
504 20:18:02.302033 Couldn't find partition mmc 0
505 20:18:02.309208 Card did not respond to voltage select! : -110
506 20:18:02.314647 ** Bad device specification mmc 0 **
507 20:18:02.315066 Couldn't find partition mmc 0
508 20:18:02.319765 Error: could not access storage.
509 20:18:03.583145 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 20:18:03.583798 bl2_stage_init 0x01
511 20:18:03.584334 bl2_stage_init 0x81
512 20:18:03.588584 hw id: 0x0000 - pwm id 0x01
513 20:18:03.589082 bl2_stage_init 0xc1
514 20:18:03.589549 bl2_stage_init 0x02
515 20:18:03.590003
516 20:18:03.594167 L0:00000000
517 20:18:03.594658 L1:20000703
518 20:18:03.595107 L2:00008067
519 20:18:03.595554 L3:14000000
520 20:18:03.599736 B2:00402000
521 20:18:03.600255 B1:e0f83180
522 20:18:03.600707
523 20:18:03.601155 TE: 58159
524 20:18:03.601596
525 20:18:03.605434 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 20:18:03.605941
527 20:18:03.606399 Board ID = 1
528 20:18:03.611012 Set A53 clk to 24M
529 20:18:03.611518 Set A73 clk to 24M
530 20:18:03.612010 Set clk81 to 24M
531 20:18:03.616544 A53 clk: 1200 MHz
532 20:18:03.617039 A73 clk: 1200 MHz
533 20:18:03.617491 CLK81: 166.6M
534 20:18:03.617932 smccc: 00012ab5
535 20:18:03.622149 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 20:18:03.627783 board id: 1
537 20:18:03.633608 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 20:18:03.644390 fw parse done
539 20:18:03.650227 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 20:18:03.692883 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 20:18:03.703786 PIEI prepare done
542 20:18:03.704320 fastboot data load
543 20:18:03.704785 fastboot data verify
544 20:18:03.709471 verify result: 266
545 20:18:03.715064 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 20:18:03.715549 LPDDR4 probe
547 20:18:03.716031 ddr clk to 1584MHz
548 20:18:03.723030 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 20:18:03.760299
550 20:18:03.760827 dmc_version 0001
551 20:18:03.766971 Check phy result
552 20:18:03.772859 INFO : End of CA training
553 20:18:03.773401 INFO : End of initialization
554 20:18:03.778488 INFO : Training has run successfully!
555 20:18:03.779004 Check phy result
556 20:18:03.784063 INFO : End of initialization
557 20:18:03.784587 INFO : End of read enable training
558 20:18:03.789649 INFO : End of fine write leveling
559 20:18:03.795269 INFO : End of Write leveling coarse delay
560 20:18:03.795775 INFO : Training has run successfully!
561 20:18:03.796273 Check phy result
562 20:18:03.800836 INFO : End of initialization
563 20:18:03.801347 INFO : End of read dq deskew training
564 20:18:03.806483 INFO : End of MPR read delay center optimization
565 20:18:03.812120 INFO : End of write delay center optimization
566 20:18:03.817639 INFO : End of read delay center optimization
567 20:18:03.818160 INFO : End of max read latency training
568 20:18:03.823318 INFO : Training has run successfully!
569 20:18:03.823826 1D training succeed
570 20:18:03.832522 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 20:18:03.880066 Check phy result
572 20:18:03.880605 INFO : End of initialization
573 20:18:03.902636 INFO : End of 2D read delay Voltage center optimization
574 20:18:03.922614 INFO : End of 2D read delay Voltage center optimization
575 20:18:03.974630 INFO : End of 2D write delay Voltage center optimization
576 20:18:04.023766 INFO : End of 2D write delay Voltage center optimization
577 20:18:04.029298 INFO : Training has run successfully!
578 20:18:04.029820
579 20:18:04.030278 channel==0
580 20:18:04.034903 RxClkDly_Margin_A0==88 ps 9
581 20:18:04.035382 TxDqDly_Margin_A0==98 ps 10
582 20:18:04.040494 RxClkDly_Margin_A1==88 ps 9
583 20:18:04.041003 TxDqDly_Margin_A1==98 ps 10
584 20:18:04.041466 TrainedVREFDQ_A0==74
585 20:18:04.046128 TrainedVREFDQ_A1==74
586 20:18:04.046636 VrefDac_Margin_A0==25
587 20:18:04.047085 DeviceVref_Margin_A0==40
588 20:18:04.051699 VrefDac_Margin_A1==24
589 20:18:04.052216 DeviceVref_Margin_A1==40
590 20:18:04.052702
591 20:18:04.053168
592 20:18:04.057294 channel==1
593 20:18:04.057805 RxClkDly_Margin_A0==98 ps 10
594 20:18:04.058258 TxDqDly_Margin_A0==98 ps 10
595 20:18:04.062936 RxClkDly_Margin_A1==88 ps 9
596 20:18:04.063433 TxDqDly_Margin_A1==88 ps 9
597 20:18:04.068505 TrainedVREFDQ_A0==77
598 20:18:04.069006 TrainedVREFDQ_A1==77
599 20:18:04.069457 VrefDac_Margin_A0==22
600 20:18:04.074133 DeviceVref_Margin_A0==37
601 20:18:04.074610 VrefDac_Margin_A1==24
602 20:18:04.079713 DeviceVref_Margin_A1==37
603 20:18:04.080227
604 20:18:04.080681 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 20:18:04.081128
606 20:18:04.113310 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000016 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 20:18:04.113858 2D training succeed
608 20:18:04.118869 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 20:18:04.124503 auto size-- 65535DDR cs0 size: 2048MB
610 20:18:04.124996 DDR cs1 size: 2048MB
611 20:18:04.130136 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 20:18:04.130620 cs0 DataBus test pass
613 20:18:04.135706 cs1 DataBus test pass
614 20:18:04.136241 cs0 AddrBus test pass
615 20:18:04.136700 cs1 AddrBus test pass
616 20:18:04.137144
617 20:18:04.141308 100bdlr_step_size ps== 420
618 20:18:04.141803 result report
619 20:18:04.146884 boot times 0Enable ddr reg access
620 20:18:04.152252 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 20:18:04.165214 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 20:18:04.737796 0.0;M3 CHK:0;cm4_sp_mode 0
623 20:18:04.738535 MVN_1=0x00000000
624 20:18:04.743373 MVN_2=0x00000000
625 20:18:04.749519 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 20:18:04.750144 OPS=0x10
627 20:18:04.750641 ring efuse init
628 20:18:04.751124 chipver efuse init
629 20:18:04.755787 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 20:18:04.761189 [0.018960 Inits done]
631 20:18:04.761724 secure task start!
632 20:18:04.762162 high task start!
633 20:18:04.764927 low task start!
634 20:18:04.765427 run into bl31
635 20:18:04.774214 NOTICE: BL31: v1.3(release):4fc40b1
636 20:18:04.779372 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 20:18:04.779945 NOTICE: BL31: G12A normal boot!
638 20:18:04.809804 NOTICE: BL31: BL33 decompress pass
639 20:18:04.819495 ERROR: Error initializing runtime service opteed_fast
640 20:18:06.043255
641 20:18:06.043706
642 20:18:06.052217 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 20:18:06.052646
644 20:18:06.052916 Model: Libre Computer AML-A311D-CC Alta
645 20:18:06.260345 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 20:18:06.283609 DRAM: 2 GiB (effective 3.8 GiB)
647 20:18:06.426635 Core: 408 devices, 31 uclasses, devicetree: separate
648 20:18:06.432342 WDT: Not starting watchdog@f0d0
649 20:18:06.464567 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 20:18:06.477217 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 20:18:06.482033 ** Bad device specification mmc 0 **
652 20:18:06.492325 Card did not respond to voltage select! : -110
653 20:18:06.500088 ** Bad device specification mmc 0 **
654 20:18:06.500618 Couldn't find partition mmc 0
655 20:18:06.508342 Card did not respond to voltage select! : -110
656 20:18:06.513880 ** Bad device specification mmc 0 **
657 20:18:06.514359 Couldn't find partition mmc 0
658 20:18:06.519007 Error: could not access storage.
659 20:18:06.861481 Net: eth0: ethernet@ff3f0000
660 20:18:06.862298 starting USB...
661 20:18:07.113245 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 20:18:07.114001 Starting the controller
663 20:18:07.120227 USB XHCI 1.10
664 20:18:08.693245 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 20:18:08.693892 bl2_stage_init 0x01
666 20:18:08.694334 bl2_stage_init 0x81
667 20:18:08.698828 hw id: 0x0000 - pwm id 0x01
668 20:18:08.699347 bl2_stage_init 0xc1
669 20:18:08.699774 bl2_stage_init 0x02
670 20:18:08.700242
671 20:18:08.704437 L0:00000000
672 20:18:08.704928 L1:20000703
673 20:18:08.705349 L2:00008067
674 20:18:08.705757 L3:14000000
675 20:18:08.710054 B2:00402000
676 20:18:08.710593 B1:e0f83180
677 20:18:08.711013
678 20:18:08.711431 TE: 58124
679 20:18:08.711843
680 20:18:08.715651 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 20:18:08.716177
682 20:18:08.716607 Board ID = 1
683 20:18:08.721195 Set A53 clk to 24M
684 20:18:08.721720 Set A73 clk to 24M
685 20:18:08.722141 Set clk81 to 24M
686 20:18:08.726853 A53 clk: 1200 MHz
687 20:18:08.727409 A73 clk: 1200 MHz
688 20:18:08.727823 CLK81: 166.6M
689 20:18:08.728275 smccc: 00012a92
690 20:18:08.732447 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 20:18:08.738000 board id: 1
692 20:18:08.742961 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 20:18:08.754544 fw parse done
694 20:18:08.760526 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 20:18:08.803355 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 20:18:08.814134 PIEI prepare done
697 20:18:08.814843 fastboot data load
698 20:18:08.815418 fastboot data verify
699 20:18:08.819726 verify result: 266
700 20:18:08.825310 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 20:18:08.825816 LPDDR4 probe
702 20:18:08.826238 ddr clk to 1584MHz
703 20:18:08.833281 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 20:18:08.870542
705 20:18:08.871056 dmc_version 0001
706 20:18:08.877286 Check phy result
707 20:18:08.883082 INFO : End of CA training
708 20:18:08.883523 INFO : End of initialization
709 20:18:08.888733 INFO : Training has run successfully!
710 20:18:08.889194 Check phy result
711 20:18:08.894197 INFO : End of initialization
712 20:18:08.894651 INFO : End of read enable training
713 20:18:08.897540 INFO : End of fine write leveling
714 20:18:08.903206 INFO : End of Write leveling coarse delay
715 20:18:08.908699 INFO : Training has run successfully!
716 20:18:08.909137 Check phy result
717 20:18:08.909563 INFO : End of initialization
718 20:18:08.914259 INFO : End of read dq deskew training
719 20:18:08.919860 INFO : End of MPR read delay center optimization
720 20:18:08.920347 INFO : End of write delay center optimization
721 20:18:08.925471 INFO : End of read delay center optimization
722 20:18:08.931192 INFO : End of max read latency training
723 20:18:08.931635 INFO : Training has run successfully!
724 20:18:08.936744 1D training succeed
725 20:18:08.942550 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 20:18:08.989470 Check phy result
727 20:18:08.989824 INFO : End of initialization
728 20:18:09.012741 INFO : End of 2D read delay Voltage center optimization
729 20:18:09.032282 INFO : End of 2D read delay Voltage center optimization
730 20:18:09.084782 INFO : End of 2D write delay Voltage center optimization
731 20:18:09.133900 INFO : End of 2D write delay Voltage center optimization
732 20:18:09.139511 INFO : Training has run successfully!
733 20:18:09.139867
734 20:18:09.140145 channel==0
735 20:18:09.145148 RxClkDly_Margin_A0==88 ps 9
736 20:18:09.145715 TxDqDly_Margin_A0==98 ps 10
737 20:18:09.150708 RxClkDly_Margin_A1==88 ps 9
738 20:18:09.151253 TxDqDly_Margin_A1==98 ps 10
739 20:18:09.151691 TrainedVREFDQ_A0==74
740 20:18:09.156348 TrainedVREFDQ_A1==74
741 20:18:09.156858 VrefDac_Margin_A0==24
742 20:18:09.157287 DeviceVref_Margin_A0==40
743 20:18:09.162074 VrefDac_Margin_A1==24
744 20:18:09.162615 DeviceVref_Margin_A1==40
745 20:18:09.163050
746 20:18:09.163467
747 20:18:09.167442 channel==1
748 20:18:09.167791 RxClkDly_Margin_A0==88 ps 9
749 20:18:09.168076 TxDqDly_Margin_A0==88 ps 9
750 20:18:09.173229 RxClkDly_Margin_A1==88 ps 9
751 20:18:09.173804 TxDqDly_Margin_A1==88 ps 9
752 20:18:09.178835 TrainedVREFDQ_A0==77
753 20:18:09.179408 TrainedVREFDQ_A1==77
754 20:18:09.179669 VrefDac_Margin_A0==22
755 20:18:09.184308 DeviceVref_Margin_A0==37
756 20:18:09.184696 VrefDac_Margin_A1==24
757 20:18:09.189893 DeviceVref_Margin_A1==37
758 20:18:09.190266
759 20:18:09.190525 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 20:18:09.190756
761 20:18:09.223509 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000018 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 20:18:09.223948 2D training succeed
763 20:18:09.229080 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 20:18:09.234679 auto size-- 65535DDR cs0 size: 2048MB
765 20:18:09.235109 DDR cs1 size: 2048MB
766 20:18:09.240286 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 20:18:09.240681 cs0 DataBus test pass
768 20:18:09.245830 cs1 DataBus test pass
769 20:18:09.246106 cs0 AddrBus test pass
770 20:18:09.246317 cs1 AddrBus test pass
771 20:18:09.246521
772 20:18:09.251417 100bdlr_step_size ps== 420
773 20:18:09.251766 result report
774 20:18:09.257035 boot times 0Enable ddr reg access
775 20:18:09.262289 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 20:18:09.275728 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 20:18:09.847632 0.0;M3 CHK:0;cm4_sp_mode 0
778 20:18:09.848101 MVN_1=0x00000000
779 20:18:09.853236 MVN_2=0x00000000
780 20:18:09.858873 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 20:18:09.859203 OPS=0x10
782 20:18:09.859437 ring efuse init
783 20:18:09.859657 chipver efuse init
784 20:18:09.864474 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 20:18:09.870061 [0.018961 Inits done]
786 20:18:09.870383 secure task start!
787 20:18:09.870613 high task start!
788 20:18:09.874633 low task start!
789 20:18:09.874952 run into bl31
790 20:18:09.881270 NOTICE: BL31: v1.3(release):4fc40b1
791 20:18:09.889055 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 20:18:09.889389 NOTICE: BL31: G12A normal boot!
793 20:18:09.914529 NOTICE: BL31: BL33 decompress pass
794 20:18:09.919531 ERROR: Error initializing runtime service opteed_fast
795 20:18:11.153294
796 20:18:11.153690
797 20:18:11.162102 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 20:18:11.162509
799 20:18:11.162750 Model: Libre Computer AML-A311D-CC Alta
800 20:18:11.369926 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 20:18:11.393294 DRAM: 2 GiB (effective 3.8 GiB)
802 20:18:11.536203 Core: 408 devices, 31 uclasses, devicetree: separate
803 20:18:11.542060 WDT: Not starting watchdog@f0d0
804 20:18:11.574349 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 20:18:11.586700 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 20:18:11.591712 ** Bad device specification mmc 0 **
807 20:18:11.602023 Card did not respond to voltage select! : -110
808 20:18:11.609726 ** Bad device specification mmc 0 **
809 20:18:11.610219 Couldn't find partition mmc 0
810 20:18:11.618088 Card did not respond to voltage select! : -110
811 20:18:11.623622 ** Bad device specification mmc 0 **
812 20:18:11.624140 Couldn't find partition mmc 0
813 20:18:11.628650 Error: could not access storage.
814 20:18:11.970183 Net: eth0: ethernet@ff3f0000
815 20:18:11.970785 starting USB...
816 20:18:12.222910 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 20:18:12.223344 Starting the controller
818 20:18:12.229864 USB XHCI 1.10
819 20:18:14.394809 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 20:18:14.395418 bl2_stage_init 0x01
821 20:18:14.395840 bl2_stage_init 0x81
822 20:18:14.400317 hw id: 0x0000 - pwm id 0x01
823 20:18:14.400839 bl2_stage_init 0xc1
824 20:18:14.401288 bl2_stage_init 0x02
825 20:18:14.401866
826 20:18:14.405858 L0:00000000
827 20:18:14.406362 L1:20000703
828 20:18:14.406783 L2:00008067
829 20:18:14.407357 L3:14000000
830 20:18:14.411462 B2:00402000
831 20:18:14.411973 B1:e0f83180
832 20:18:14.412433
833 20:18:14.412778 TE: 58124
834 20:18:14.413133
835 20:18:14.417110 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 20:18:14.417446
837 20:18:14.417674 Board ID = 1
838 20:18:14.422642 Set A53 clk to 24M
839 20:18:14.423155 Set A73 clk to 24M
840 20:18:14.423572 Set clk81 to 24M
841 20:18:14.428207 A53 clk: 1200 MHz
842 20:18:14.428509 A73 clk: 1200 MHz
843 20:18:14.428734 CLK81: 166.6M
844 20:18:14.428958 smccc: 00012a92
845 20:18:14.433914 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 20:18:14.439369 board id: 1
847 20:18:14.445470 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 20:18:14.456103 fw parse done
849 20:18:14.461924 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 20:18:14.504534 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 20:18:14.515336 PIEI prepare done
852 20:18:14.515897 fastboot data load
853 20:18:14.516368 fastboot data verify
854 20:18:14.521135 verify result: 266
855 20:18:14.526510 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 20:18:14.526868 LPDDR4 probe
857 20:18:14.527093 ddr clk to 1584MHz
858 20:18:14.534649 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 20:18:14.572054
860 20:18:14.572708 dmc_version 0001
861 20:18:14.578668 Check phy result
862 20:18:14.584544 INFO : End of CA training
863 20:18:14.585178 INFO : End of initialization
864 20:18:14.590137 INFO : Training has run successfully!
865 20:18:14.590728 Check phy result
866 20:18:14.595696 INFO : End of initialization
867 20:18:14.596294 INFO : End of read enable training
868 20:18:14.598996 INFO : End of fine write leveling
869 20:18:14.604469 INFO : End of Write leveling coarse delay
870 20:18:14.610186 INFO : Training has run successfully!
871 20:18:14.610757 Check phy result
872 20:18:14.611252 INFO : End of initialization
873 20:18:14.615781 INFO : End of read dq deskew training
874 20:18:14.619181 INFO : End of MPR read delay center optimization
875 20:18:14.624595 INFO : End of write delay center optimization
876 20:18:14.630302 INFO : End of read delay center optimization
877 20:18:14.630848 INFO : End of max read latency training
878 20:18:14.635971 INFO : Training has run successfully!
879 20:18:14.636593 1D training succeed
880 20:18:14.644184 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 20:18:14.691673 Check phy result
882 20:18:14.692303 INFO : End of initialization
883 20:18:14.713333 INFO : End of 2D read delay Voltage center optimization
884 20:18:14.734415 INFO : End of 2D read delay Voltage center optimization
885 20:18:14.786576 INFO : End of 2D write delay Voltage center optimization
886 20:18:14.835844 INFO : End of 2D write delay Voltage center optimization
887 20:18:14.841378 INFO : Training has run successfully!
888 20:18:14.841783
889 20:18:14.842040 channel==0
890 20:18:14.847129 RxClkDly_Margin_A0==88 ps 9
891 20:18:14.847480 TxDqDly_Margin_A0==98 ps 10
892 20:18:14.850227 RxClkDly_Margin_A1==88 ps 9
893 20:18:14.850562 TxDqDly_Margin_A1==98 ps 10
894 20:18:14.855802 TrainedVREFDQ_A0==74
895 20:18:14.856182 TrainedVREFDQ_A1==74
896 20:18:14.861391 VrefDac_Margin_A0==24
897 20:18:14.861749 DeviceVref_Margin_A0==40
898 20:18:14.861955 VrefDac_Margin_A1==25
899 20:18:14.867149 DeviceVref_Margin_A1==40
900 20:18:14.867500
901 20:18:14.867709
902 20:18:14.867913 channel==1
903 20:18:14.868152 RxClkDly_Margin_A0==98 ps 10
904 20:18:14.872540 TxDqDly_Margin_A0==98 ps 10
905 20:18:14.872860 RxClkDly_Margin_A1==98 ps 10
906 20:18:14.878152 TxDqDly_Margin_A1==88 ps 9
907 20:18:14.878485 TrainedVREFDQ_A0==77
908 20:18:14.878692 TrainedVREFDQ_A1==77
909 20:18:14.883777 VrefDac_Margin_A0==22
910 20:18:14.884110 DeviceVref_Margin_A0==37
911 20:18:14.889390 VrefDac_Margin_A1==24
912 20:18:14.889757 DeviceVref_Margin_A1==37
913 20:18:14.889974
914 20:18:14.895234 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 20:18:14.895630
916 20:18:14.923084 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 20:18:14.928564 2D training succeed
918 20:18:14.934163 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 20:18:14.934478 auto size-- 65535DDR cs0 size: 2048MB
920 20:18:14.941425 DDR cs1 size: 2048MB
921 20:18:14.941791 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 20:18:14.945566 cs0 DataBus test pass
923 20:18:14.945813 cs1 DataBus test pass
924 20:18:14.946016 cs0 AddrBus test pass
925 20:18:14.951019 cs1 AddrBus test pass
926 20:18:14.951274
927 20:18:14.951480 100bdlr_step_size ps== 420
928 20:18:14.951684 result report
929 20:18:14.956478 boot times 0Enable ddr reg access
930 20:18:14.964303 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 20:18:14.977845 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 20:18:15.551706 0.0;M3 CHK:0;cm4_sp_mode 0
933 20:18:15.552453 MVN_1=0x00000000
934 20:18:15.557070 MVN_2=0x00000000
935 20:18:15.562784 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 20:18:15.563310 OPS=0x10
937 20:18:15.563780 ring efuse init
938 20:18:15.564291 chipver efuse init
939 20:18:15.571188 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 20:18:15.571732 [0.018960 Inits done]
941 20:18:15.572247 secure task start!
942 20:18:15.578609 high task start!
943 20:18:15.579112 low task start!
944 20:18:15.579458 run into bl31
945 20:18:15.585257 NOTICE: BL31: v1.3(release):4fc40b1
946 20:18:15.593209 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 20:18:15.593740 NOTICE: BL31: G12A normal boot!
948 20:18:15.618740 NOTICE: BL31: BL33 decompress pass
949 20:18:15.623353 ERROR: Error initializing runtime service opteed_fast
950 20:18:16.857157
951 20:18:16.857871
952 20:18:16.865568 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 20:18:16.865938
954 20:18:16.866214 Model: Libre Computer AML-A311D-CC Alta
955 20:18:17.076326 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 20:18:17.097532 DRAM: 2 GiB (effective 3.8 GiB)
957 20:18:17.240292 Core: 408 devices, 31 uclasses, devicetree: separate
958 20:18:17.246213 WDT: Not starting watchdog@f0d0
959 20:18:17.278547 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 20:18:17.290779 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 20:18:17.295840 ** Bad device specification mmc 0 **
962 20:18:17.306135 Card did not respond to voltage select! : -110
963 20:18:17.312792 ** Bad device specification mmc 0 **
964 20:18:17.313196 Couldn't find partition mmc 0
965 20:18:17.322186 Card did not respond to voltage select! : -110
966 20:18:17.327700 ** Bad device specification mmc 0 **
967 20:18:17.328398 Couldn't find partition mmc 0
968 20:18:17.332770 Error: could not access storage.
969 20:18:17.675391 Net: eth0: ethernet@ff3f0000
970 20:18:17.676064 starting USB...
971 20:18:17.926943 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 20:18:17.927586 Starting the controller
973 20:18:17.933874 USB XHCI 1.10
974 20:18:19.488138 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 20:18:19.496343 scanning usb for storage devices... 0 Storage Device(s) found
977 20:18:19.548067 Hit any key to stop autoboot: 1
978 20:18:19.549042 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 20:18:19.549745 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 20:18:19.550290 Setting prompt string to ['=>']
981 20:18:19.550834 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 20:18:19.562911 0
983 20:18:19.563915 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 20:18:19.564513 Sending with 10 millisecond of delay
986 20:18:20.699675 => setenv autoload no
987 20:18:20.710655 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 20:18:20.716263 setenv autoload no
989 20:18:20.717076 Sending with 10 millisecond of delay
991 20:18:22.520978 => setenv initrd_high 0xffffffff
992 20:18:22.531849 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 20:18:22.532831 setenv initrd_high 0xffffffff
994 20:18:22.533598 Sending with 10 millisecond of delay
996 20:18:24.153259 => setenv fdt_high 0xffffffff
997 20:18:24.166968 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 20:18:24.168211 setenv fdt_high 0xffffffff
999 20:18:24.168726 Sending with 10 millisecond of delay
1001 20:18:24.460521 => dhcp
1002 20:18:24.471455 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 20:18:24.472507 dhcp
1004 20:18:24.473030 Speed: 1000, full duplex
1005 20:18:24.473512 BOOTP broadcast 1
1006 20:18:24.482812 DHCP client bound to address 192.168.6.27 (11 ms)
1007 20:18:24.483635 Sending with 10 millisecond of delay
1009 20:18:26.161191 => setenv serverip 192.168.6.2
1010 20:18:26.171921 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 20:18:26.173049 setenv serverip 192.168.6.2
1012 20:18:26.173889 Sending with 10 millisecond of delay
1014 20:18:29.902034 => tftpboot 0x01080000 954430/tftp-deploy-o7y7fvma/kernel/uImage
1015 20:18:29.912880 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 20:18:29.913816 tftpboot 0x01080000 954430/tftp-deploy-o7y7fvma/kernel/uImage
1017 20:18:29.914302 Speed: 1000, full duplex
1018 20:18:29.914737 Using ethernet@ff3f0000 device
1019 20:18:29.915529 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 20:18:29.921035 Filename '954430/tftp-deploy-o7y7fvma/kernel/uImage'.
1021 20:18:29.924996 Load address: 0x1080000
1022 20:18:31.630415 Loading: *############################ UDP wrong checksum 000000ff 000022a4
1023 20:18:31.700141 # UDP wrong checksum 000000ff 0000bb96
1024 20:18:32.976766 ##################### 43.6 MiB
1025 20:18:32.977394 14.3 MiB/s
1026 20:18:32.977835 done
1027 20:18:32.981127 Bytes transferred = 45713984 (2b98a40 hex)
1028 20:18:32.981876 Sending with 10 millisecond of delay
1030 20:18:37.673483 => tftpboot 0x08000000 954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
1031 20:18:37.684140 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1032 20:18:37.685120 tftpboot 0x08000000 954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot
1033 20:18:37.685637 Speed: 1000, full duplex
1034 20:18:37.686118 Using ethernet@ff3f0000 device
1035 20:18:37.686963 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1036 20:18:37.695633 Filename '954430/tftp-deploy-o7y7fvma/ramdisk/ramdisk.cpio.gz.uboot'.
1037 20:18:37.696281 Load address: 0x8000000
1038 20:18:44.689316 Loading: *###############T ################################## UDP wrong checksum 00000005 00007b47
1039 20:18:49.689743 T UDP wrong checksum 00000005 00007b47
1040 20:18:59.691596 T T UDP wrong checksum 00000005 00007b47
1041 20:19:19.695657 T T T T UDP wrong checksum 00000005 00007b47
1042 20:19:23.294452 UDP wrong checksum 000000ff 00001860
1043 20:19:23.328677 UDP wrong checksum 000000ff 000070ea
1044 20:19:29.390506 T UDP wrong checksum 000000ff 00009783
1045 20:19:29.410719 UDP wrong checksum 000000ff 00002e76
1046 20:19:34.699863 T
1047 20:19:34.700524 Retry count exceeded; starting again
1049 20:19:34.701574 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1052 20:19:34.702784 end: 2.4 uboot-commands (duration 00:01:47) [common]
1054 20:19:34.703505 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 20:19:34.704077 end: 2 uboot-action (duration 00:01:47) [common]
1058 20:19:34.705036 Cleaning after the job
1059 20:19:34.705378 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/ramdisk
1060 20:19:34.706049 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/kernel
1061 20:19:34.732235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/dtb
1062 20:19:34.733261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/nfsrootfs
1063 20:19:34.771520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/954430/tftp-deploy-o7y7fvma/modules
1064 20:19:34.776436 start: 4.1 power-off (timeout 00:00:30) [common]
1065 20:19:34.777049 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 20:19:34.810069 >> OK - accepted request
1067 20:19:34.811891 Returned 0 in 0 seconds
1068 20:19:34.912844 end: 4.1 power-off (duration 00:00:00) [common]
1070 20:19:34.914715 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 20:19:34.915906 Listened to connection for namespace 'common' for up to 1s
1072 20:19:35.916117 Finalising connection for namespace 'common'
1073 20:19:35.916888 Disconnecting from shell: Finalise
1074 20:19:35.917439 =>
1075 20:19:36.018547 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 20:19:36.019296 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/954430
1077 20:19:39.091865 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/954430
1078 20:19:39.092454 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.