Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:40:12.648250 lava-dispatcher, installed at version: 2024.01
2 22:40:12.649053 start: 0 validate
3 22:40:12.649564 Start time: 2024-11-07 22:40:12.649534+00:00 (UTC)
4 22:40:12.650115 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:40:12.650663 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 22:40:12.690845 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:40:12.691423 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:40:12.719789 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:40:12.720505 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:40:12.756599 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:40:12.757178 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 22:40:12.798240 validate duration: 0.15
14 22:40:12.799069 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 22:40:12.799391 start: 1.1 download-retry (timeout 00:10:00) [common]
16 22:40:12.799681 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 22:40:12.800268 Not decompressing ramdisk as can be used compressed.
18 22:40:12.800697 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 22:40:12.800930 saving as /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/ramdisk/rootfs.cpio.gz
20 22:40:12.801175 total size: 47897469 (45 MB)
21 22:40:12.832182 progress 0 % (0 MB)
22 22:40:12.864676 progress 5 % (2 MB)
23 22:40:12.899615 progress 10 % (4 MB)
24 22:40:12.942081 progress 15 % (6 MB)
25 22:40:12.989968 progress 20 % (9 MB)
26 22:40:13.031765 progress 25 % (11 MB)
27 22:40:13.065666 progress 30 % (13 MB)
28 22:40:13.098215 progress 35 % (16 MB)
29 22:40:13.130880 progress 40 % (18 MB)
30 22:40:13.163235 progress 45 % (20 MB)
31 22:40:13.195611 progress 50 % (22 MB)
32 22:40:13.228193 progress 55 % (25 MB)
33 22:40:13.260397 progress 60 % (27 MB)
34 22:40:13.293267 progress 65 % (29 MB)
35 22:40:13.324652 progress 70 % (32 MB)
36 22:40:13.356316 progress 75 % (34 MB)
37 22:40:13.387786 progress 80 % (36 MB)
38 22:40:13.419676 progress 85 % (38 MB)
39 22:40:13.451535 progress 90 % (41 MB)
40 22:40:13.482905 progress 95 % (43 MB)
41 22:40:13.513480 progress 100 % (45 MB)
42 22:40:13.514245 45 MB downloaded in 0.71 s (64.06 MB/s)
43 22:40:13.514800 end: 1.1.1 http-download (duration 00:00:01) [common]
45 22:40:13.515691 end: 1.1 download-retry (duration 00:00:01) [common]
46 22:40:13.516006 start: 1.2 download-retry (timeout 00:09:59) [common]
47 22:40:13.516287 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 22:40:13.516765 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/kernel/Image
49 22:40:13.517029 saving as /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/kernel/Image
50 22:40:13.517240 total size: 45713920 (43 MB)
51 22:40:13.517452 No compression specified
52 22:40:13.555621 progress 0 % (0 MB)
53 22:40:13.593484 progress 5 % (2 MB)
54 22:40:13.625371 progress 10 % (4 MB)
55 22:40:13.659444 progress 15 % (6 MB)
56 22:40:13.695090 progress 20 % (8 MB)
57 22:40:13.730347 progress 25 % (10 MB)
58 22:40:13.766105 progress 30 % (13 MB)
59 22:40:13.802361 progress 35 % (15 MB)
60 22:40:13.838398 progress 40 % (17 MB)
61 22:40:13.873511 progress 45 % (19 MB)
62 22:40:13.909595 progress 50 % (21 MB)
63 22:40:13.945930 progress 55 % (24 MB)
64 22:40:13.982664 progress 60 % (26 MB)
65 22:40:14.018692 progress 65 % (28 MB)
66 22:40:14.054787 progress 70 % (30 MB)
67 22:40:14.090425 progress 75 % (32 MB)
68 22:40:14.126216 progress 80 % (34 MB)
69 22:40:14.162477 progress 85 % (37 MB)
70 22:40:14.198634 progress 90 % (39 MB)
71 22:40:14.234176 progress 95 % (41 MB)
72 22:40:14.269411 progress 100 % (43 MB)
73 22:40:14.270086 43 MB downloaded in 0.75 s (57.91 MB/s)
74 22:40:14.270708 end: 1.2.1 http-download (duration 00:00:01) [common]
76 22:40:14.271698 end: 1.2 download-retry (duration 00:00:01) [common]
77 22:40:14.272050 start: 1.3 download-retry (timeout 00:09:59) [common]
78 22:40:14.272390 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 22:40:14.272972 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 22:40:14.273300 saving as /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/dtb/meson-g12b-a311d-libretech-cc.dtb
81 22:40:14.273581 total size: 54703 (0 MB)
82 22:40:14.273865 No compression specified
83 22:40:14.310807 progress 59 % (0 MB)
84 22:40:14.311828 progress 100 % (0 MB)
85 22:40:14.312553 0 MB downloaded in 0.04 s (1.34 MB/s)
86 22:40:14.313116 end: 1.3.1 http-download (duration 00:00:00) [common]
88 22:40:14.314177 end: 1.3 download-retry (duration 00:00:00) [common]
89 22:40:14.314516 start: 1.4 download-retry (timeout 00:09:58) [common]
90 22:40:14.314844 start: 1.4.1 http-download (timeout 00:09:58) [common]
91 22:40:14.315443 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/modules.tar.xz
92 22:40:14.315772 saving as /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/modules/modules.tar
93 22:40:14.316079 total size: 11624536 (11 MB)
94 22:40:14.316356 Using unxz to decompress xz
95 22:40:14.351611 progress 0 % (0 MB)
96 22:40:14.432805 progress 5 % (0 MB)
97 22:40:14.525711 progress 10 % (1 MB)
98 22:40:14.644784 progress 15 % (1 MB)
99 22:40:14.753936 progress 20 % (2 MB)
100 22:40:14.839997 progress 25 % (2 MB)
101 22:40:14.916531 progress 30 % (3 MB)
102 22:40:15.004245 progress 35 % (3 MB)
103 22:40:15.086407 progress 40 % (4 MB)
104 22:40:15.164230 progress 45 % (5 MB)
105 22:40:15.249813 progress 50 % (5 MB)
106 22:40:15.332812 progress 55 % (6 MB)
107 22:40:15.415504 progress 60 % (6 MB)
108 22:40:15.497080 progress 65 % (7 MB)
109 22:40:15.580735 progress 70 % (7 MB)
110 22:40:15.664162 progress 75 % (8 MB)
111 22:40:15.745333 progress 80 % (8 MB)
112 22:40:15.827632 progress 85 % (9 MB)
113 22:40:15.911893 progress 90 % (10 MB)
114 22:40:15.992173 progress 95 % (10 MB)
115 22:40:16.070315 progress 100 % (11 MB)
116 22:40:16.087269 11 MB downloaded in 1.77 s (6.26 MB/s)
117 22:40:16.087880 end: 1.4.1 http-download (duration 00:00:02) [common]
119 22:40:16.088853 end: 1.4 download-retry (duration 00:00:02) [common]
120 22:40:16.089148 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 22:40:16.089440 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 22:40:16.089707 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 22:40:16.089977 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 22:40:16.090568 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw
125 22:40:16.091026 makedir: /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin
126 22:40:16.091386 makedir: /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/tests
127 22:40:16.091733 makedir: /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/results
128 22:40:16.092128 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-add-keys
129 22:40:16.092702 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-add-sources
130 22:40:16.093253 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-background-process-start
131 22:40:16.093815 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-background-process-stop
132 22:40:16.094393 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-common-functions
133 22:40:16.094928 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-echo-ipv4
134 22:40:16.095455 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-install-packages
135 22:40:16.095994 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-installed-packages
136 22:40:16.096543 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-os-build
137 22:40:16.097101 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-probe-channel
138 22:40:16.097626 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-probe-ip
139 22:40:16.098145 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-target-ip
140 22:40:16.098666 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-target-mac
141 22:40:16.099208 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-target-storage
142 22:40:16.099734 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-case
143 22:40:16.100520 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-event
144 22:40:16.101066 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-feedback
145 22:40:16.101591 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-raise
146 22:40:16.102112 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-reference
147 22:40:16.102634 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-runner
148 22:40:16.103159 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-set
149 22:40:16.103684 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-test-shell
150 22:40:16.104247 Updating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-install-packages (oe)
151 22:40:16.104838 Updating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/bin/lava-installed-packages (oe)
152 22:40:16.105323 Creating /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/environment
153 22:40:16.105743 LAVA metadata
154 22:40:16.106024 - LAVA_JOB_ID=955500
155 22:40:16.106254 - LAVA_DISPATCHER_IP=192.168.6.2
156 22:40:16.106631 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 22:40:16.107718 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 22:40:16.108114 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 22:40:16.108350 skipped lava-vland-overlay
160 22:40:16.108614 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 22:40:16.108890 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 22:40:16.109126 skipped lava-multinode-overlay
163 22:40:16.109389 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 22:40:16.109656 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 22:40:16.109922 Loading test definitions
166 22:40:16.110225 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 22:40:16.110465 Using /lava-955500 at stage 0
168 22:40:16.111668 uuid=955500_1.5.2.4.1 testdef=None
169 22:40:16.112029 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 22:40:16.112333 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 22:40:16.114253 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 22:40:16.115103 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 22:40:16.117492 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 22:40:16.118387 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 22:40:16.120615 runner path: /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/0/tests/0_igt-gpu-panfrost test_uuid 955500_1.5.2.4.1
178 22:40:16.121223 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 22:40:16.122063 Creating lava-test-runner.conf files
181 22:40:16.122278 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955500/lava-overlay-s8fzojtw/lava-955500/0 for stage 0
182 22:40:16.122634 - 0_igt-gpu-panfrost
183 22:40:16.123004 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 22:40:16.123308 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 22:40:16.147090 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 22:40:16.147487 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 22:40:16.147755 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 22:40:16.148056 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 22:40:16.148336 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 22:40:23.161585 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 22:40:23.162062 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 22:40:23.162311 extracting modules file /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk
193 22:40:24.715890 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 22:40:24.716515 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 22:40:24.716858 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955500/compress-overlay-ogpy63ju/overlay-1.5.2.5.tar.gz to ramdisk
196 22:40:24.717124 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955500/compress-overlay-ogpy63ju/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk
197 22:40:24.753788 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 22:40:24.754302 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 22:40:24.754645 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 22:40:24.754930 Converting downloaded kernel to a uImage
201 22:40:24.755304 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/kernel/Image /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/kernel/uImage
202 22:40:25.276059 output: Image Name:
203 22:40:25.276480 output: Created: Thu Nov 7 22:40:24 2024
204 22:40:25.276695 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 22:40:25.276903 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 22:40:25.277104 output: Load Address: 01080000
207 22:40:25.277306 output: Entry Point: 01080000
208 22:40:25.277507 output:
209 22:40:25.277836 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 22:40:25.278107 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 22:40:25.278378 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 22:40:25.278640 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 22:40:25.278899 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 22:40:25.279166 Building ramdisk /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk
215 22:40:31.974948 >> 502380 blocks
216 22:40:52.758889 Adding RAMdisk u-boot header.
217 22:40:52.759540 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk.cpio.gz.uboot
218 22:40:53.460558 output: Image Name:
219 22:40:53.460978 output: Created: Thu Nov 7 22:40:52 2024
220 22:40:53.461187 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 22:40:53.461392 output: Data Size: 65715327 Bytes = 64175.12 KiB = 62.67 MiB
222 22:40:53.461592 output: Load Address: 00000000
223 22:40:53.461789 output: Entry Point: 00000000
224 22:40:53.461987 output:
225 22:40:53.462566 rename /var/lib/lava/dispatcher/tmp/955500/extract-overlay-ramdisk-zv17hwkq/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
226 22:40:53.462974 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 22:40:53.463258 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 22:40:53.463533 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 22:40:53.463771 No LXC device requested
230 22:40:53.464104 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 22:40:53.464687 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 22:40:53.465232 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 22:40:53.465684 Checking files for TFTP limit of 4294967296 bytes.
234 22:40:53.468608 end: 1 tftp-deploy (duration 00:00:41) [common]
235 22:40:53.469231 start: 2 uboot-action (timeout 00:05:00) [common]
236 22:40:53.469804 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 22:40:53.470351 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 22:40:53.470919 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 22:40:53.471494 Using kernel file from prepare-kernel: 955500/tftp-deploy-k0akpmwd/kernel/uImage
240 22:40:53.472187 substitutions:
241 22:40:53.472644 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 22:40:53.473095 - {DTB_ADDR}: 0x01070000
243 22:40:53.473537 - {DTB}: 955500/tftp-deploy-k0akpmwd/dtb/meson-g12b-a311d-libretech-cc.dtb
244 22:40:53.473982 - {INITRD}: 955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
245 22:40:53.474418 - {KERNEL_ADDR}: 0x01080000
246 22:40:53.474852 - {KERNEL}: 955500/tftp-deploy-k0akpmwd/kernel/uImage
247 22:40:53.475287 - {LAVA_MAC}: None
248 22:40:53.475761 - {PRESEED_CONFIG}: None
249 22:40:53.476230 - {PRESEED_LOCAL}: None
250 22:40:53.476665 - {RAMDISK_ADDR}: 0x08000000
251 22:40:53.477094 - {RAMDISK}: 955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
252 22:40:53.477530 - {ROOT_PART}: None
253 22:40:53.477960 - {ROOT}: None
254 22:40:53.478394 - {SERVER_IP}: 192.168.6.2
255 22:40:53.478828 - {TEE_ADDR}: 0x83000000
256 22:40:53.479256 - {TEE}: None
257 22:40:53.479685 Parsed boot commands:
258 22:40:53.480123 - setenv autoload no
259 22:40:53.480556 - setenv initrd_high 0xffffffff
260 22:40:53.480982 - setenv fdt_high 0xffffffff
261 22:40:53.481408 - dhcp
262 22:40:53.481834 - setenv serverip 192.168.6.2
263 22:40:53.482257 - tftpboot 0x01080000 955500/tftp-deploy-k0akpmwd/kernel/uImage
264 22:40:53.482683 - tftpboot 0x08000000 955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
265 22:40:53.483110 - tftpboot 0x01070000 955500/tftp-deploy-k0akpmwd/dtb/meson-g12b-a311d-libretech-cc.dtb
266 22:40:53.483538 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 22:40:53.483973 - bootm 0x01080000 0x08000000 0x01070000
268 22:40:53.484548 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 22:40:53.486175 start: 2.3 connect-device (timeout 00:05:00) [common]
271 22:40:53.486660 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 22:40:53.502229 Setting prompt string to ['lava-test: # ']
273 22:40:53.503848 end: 2.3 connect-device (duration 00:00:00) [common]
274 22:40:53.504582 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 22:40:53.505179 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 22:40:53.505732 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 22:40:53.506967 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 22:40:53.551324 >> OK - accepted request
279 22:40:53.553368 Returned 0 in 0 seconds
280 22:40:53.654583 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 22:40:53.656344 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 22:40:53.656965 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 22:40:53.657516 Setting prompt string to ['Hit any key to stop autoboot']
285 22:40:53.658011 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 22:40:53.659692 Trying 192.168.56.21...
287 22:40:53.660238 Connected to conserv1.
288 22:40:53.660686 Escape character is '^]'.
289 22:40:53.661140
290 22:40:53.661602 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 22:40:53.662080
292 22:41:05.425000 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
293 22:41:05.425448 bl2_stage_init 0x81
294 22:41:05.430273 hw id: 0x0000 - pwm id 0x01
295 22:41:05.431063 bl2_stage_init 0xc1
296 22:41:05.431580 bl2_stage_init 0x02
297 22:41:05.431824
298 22:41:05.435927 L0:00000000
299 22:41:05.436225 L1:20000703
300 22:41:05.436462 L2:00008067
301 22:41:05.436691 L3:14000000
302 22:41:05.436906 B2:00402000
303 22:41:05.441379 B1:e0f83180
304 22:41:05.441629
305 22:41:05.441850 TE: 58150
306 22:41:05.442064
307 22:41:05.447072 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
308 22:41:05.447333
309 22:41:05.447554 Board ID = 1
310 22:41:05.452740 Set A53 clk to 24M
311 22:41:05.452992 Set A73 clk to 24M
312 22:41:05.453209 Set clk81 to 24M
313 22:41:05.458139 A53 clk: 1200 MHz
314 22:41:05.458512 A73 clk: 1200 MHz
315 22:41:05.458832 CLK81: 166.6M
316 22:41:05.459149 smccc: 00012aab
317 22:41:05.463776 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
318 22:41:05.469396 board id: 1
319 22:41:05.475490 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
320 22:41:05.485855 fw parse done
321 22:41:05.491768 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
322 22:41:05.534232 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
323 22:41:05.545192 PIEI prepare done
324 22:41:05.545491 fastboot data load
325 22:41:05.545718 fastboot data verify
326 22:41:05.550782 verify result: 266
327 22:41:05.556447 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
328 22:41:05.556868 LPDDR4 probe
329 22:41:05.557191 ddr clk to 1584MHz
330 22:41:05.564384 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
331 22:41:05.601781
332 22:41:05.602254 dmc_version 0001
333 22:41:05.608322 Check phy result
334 22:41:05.614228 INFO : End of CA training
335 22:41:05.614506 INFO : End of initialization
336 22:41:05.619749 INFO : Training has run successfully!
337 22:41:05.620054 Check phy result
338 22:41:05.625374 INFO : End of initialization
339 22:41:05.625654 INFO : End of read enable training
340 22:41:05.630994 INFO : End of fine write leveling
341 22:41:05.636654 INFO : End of Write leveling coarse delay
342 22:41:05.637035 INFO : Training has run successfully!
343 22:41:05.637349 Check phy result
344 22:41:05.642200 INFO : End of initialization
345 22:41:05.642591 INFO : End of read dq deskew training
346 22:41:05.647822 INFO : End of MPR read delay center optimization
347 22:41:05.653453 INFO : End of write delay center optimization
348 22:41:05.658981 INFO : End of read delay center optimization
349 22:41:05.659370 INFO : End of max read latency training
350 22:41:05.664700 INFO : Training has run successfully!
351 22:41:05.665080 1D training succeed
352 22:41:05.673809 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
353 22:41:05.720679 Check phy result
354 22:41:05.720987 INFO : End of initialization
355 22:41:05.743148 INFO : End of 2D read delay Voltage center optimization
356 22:41:05.763419 INFO : End of 2D read delay Voltage center optimization
357 22:41:05.815477 INFO : End of 2D write delay Voltage center optimization
358 22:41:05.864749 INFO : End of 2D write delay Voltage center optimization
359 22:41:05.870300 INFO : Training has run successfully!
360 22:41:05.870572
361 22:41:05.870813 channel==0
362 22:41:05.875871 RxClkDly_Margin_A0==88 ps 9
363 22:41:05.876154 TxDqDly_Margin_A0==98 ps 10
364 22:41:05.881583 RxClkDly_Margin_A1==88 ps 9
365 22:41:05.882241 TxDqDly_Margin_A1==98 ps 10
366 22:41:05.882785 TrainedVREFDQ_A0==74
367 22:41:05.887244 TrainedVREFDQ_A1==75
368 22:41:05.887838 VrefDac_Margin_A0==25
369 22:41:05.888402 DeviceVref_Margin_A0==40
370 22:41:05.892832 VrefDac_Margin_A1==25
371 22:41:05.893419 DeviceVref_Margin_A1==39
372 22:41:05.893938
373 22:41:05.894447
374 22:41:05.898464 channel==1
375 22:41:05.899081 RxClkDly_Margin_A0==98 ps 10
376 22:41:05.899610 TxDqDly_Margin_A0==98 ps 10
377 22:41:05.904052 RxClkDly_Margin_A1==88 ps 9
378 22:41:05.904655 TxDqDly_Margin_A1==88 ps 9
379 22:41:05.909638 TrainedVREFDQ_A0==77
380 22:41:05.910255 TrainedVREFDQ_A1==77
381 22:41:05.910791 VrefDac_Margin_A0==22
382 22:41:05.915238 DeviceVref_Margin_A0==37
383 22:41:05.915829 VrefDac_Margin_A1==24
384 22:41:05.920834 DeviceVref_Margin_A1==37
385 22:41:05.921424
386 22:41:05.921938 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
387 22:41:05.922445
388 22:41:05.954403 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
389 22:41:05.955114 2D training succeed
390 22:41:05.960065 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
391 22:41:05.965662 auto size-- 65535DDR cs0 size: 2048MB
392 22:41:05.966264 DDR cs1 size: 2048MB
393 22:41:05.971226 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
394 22:41:05.971823 cs0 DataBus test pass
395 22:41:05.976844 cs1 DataBus test pass
396 22:41:05.977458 cs0 AddrBus test pass
397 22:41:05.977971 cs1 AddrBus test pass
398 22:41:05.978480
399 22:41:05.982463 100bdlr_step_size ps== 420
400 22:41:05.983089 result report
401 22:41:05.988050 boot times 0Enable ddr reg access
402 22:41:05.993418 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
403 22:41:06.006890 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
404 22:41:06.580732 0.0;M3 CHK:0;cm4_sp_mode 0
405 22:41:06.581530 MVN_1=0x00000000
406 22:41:06.586092 MVN_2=0x00000000
407 22:41:06.591931 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
408 22:41:06.592604 OPS=0x10
409 22:41:06.593127 ring efuse init
410 22:41:06.593639 chipver efuse init
411 22:41:06.599949 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
412 22:41:06.600533 [0.018961 Inits done]
413 22:41:06.606696 secure task start!
414 22:41:06.607174 high task start!
415 22:41:06.607578 low task start!
416 22:41:06.607972 run into bl31
417 22:41:06.614194 NOTICE: BL31: v1.3(release):4fc40b1
418 22:41:06.621999 NOTICE: BL31: Built : 15:58:17, May 22 2019
419 22:41:06.622491 NOTICE: BL31: G12A normal boot!
420 22:41:06.647308 NOTICE: BL31: BL33 decompress pass
421 22:41:06.653003 ERROR: Error initializing runtime service opteed_fast
422 22:41:07.885910
423 22:41:07.886486
424 22:41:07.894336 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
425 22:41:07.894801
426 22:41:07.895200 Model: Libre Computer AML-A311D-CC Alta
427 22:41:08.102793 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
428 22:41:08.126128 DRAM: 2 GiB (effective 3.8 GiB)
429 22:41:08.269117 Core: 408 devices, 31 uclasses, devicetree: separate
430 22:41:08.275099 WDT: Not starting watchdog@f0d0
431 22:41:08.307212 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
432 22:41:08.319649 Loading Environment from FAT... Card did not respond to voltage select! : -110
433 22:41:08.324722 ** Bad device specification mmc 0 **
434 22:41:08.335024 Card did not respond to voltage select! : -110
435 22:41:08.342757 ** Bad device specification mmc 0 **
436 22:41:08.343228 Couldn't find partition mmc 0
437 22:41:08.351080 Card did not respond to voltage select! : -110
438 22:41:08.356519 ** Bad device specification mmc 0 **
439 22:41:08.356995 Couldn't find partition mmc 0
440 22:41:08.361533 Error: could not access storage.
441 22:41:09.624853 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
442 22:41:09.625464 bl2_stage_init 0x01
443 22:41:09.625889 bl2_stage_init 0x81
444 22:41:09.630406 hw id: 0x0000 - pwm id 0x01
445 22:41:09.630868 bl2_stage_init 0xc1
446 22:41:09.631278 bl2_stage_init 0x02
447 22:41:09.631682
448 22:41:09.636023 L0:00000000
449 22:41:09.636480 L1:20000703
450 22:41:09.636888 L2:00008067
451 22:41:09.637287 L3:14000000
452 22:41:09.638885 B2:00402000
453 22:41:09.639335 B1:e0f83180
454 22:41:09.639738
455 22:41:09.640176 TE: 58124
456 22:41:09.640581
457 22:41:09.649947 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
458 22:41:09.650408
459 22:41:09.650819 Board ID = 1
460 22:41:09.651214 Set A53 clk to 24M
461 22:41:09.651606 Set A73 clk to 24M
462 22:41:09.655579 Set clk81 to 24M
463 22:41:09.656063 A53 clk: 1200 MHz
464 22:41:09.656477 A73 clk: 1200 MHz
465 22:41:09.661226 CLK81: 166.6M
466 22:41:09.661679 smccc: 00012a91
467 22:41:09.666758 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
468 22:41:09.667216 board id: 1
469 22:41:09.672385 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
470 22:41:09.686235 fw parse done
471 22:41:09.692079 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
472 22:41:09.734641 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
473 22:41:09.745616 PIEI prepare done
474 22:41:09.746081 fastboot data load
475 22:41:09.746492 fastboot data verify
476 22:41:09.751316 verify result: 266
477 22:41:09.756946 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
478 22:41:09.757405 LPDDR4 probe
479 22:41:09.757812 ddr clk to 1584MHz
480 22:41:09.764771 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
481 22:41:09.801217
482 22:41:09.801683 dmc_version 0001
483 22:41:09.808799 Check phy result
484 22:41:09.814683 INFO : End of CA training
485 22:41:09.815138 INFO : End of initialization
486 22:41:09.820324 INFO : Training has run successfully!
487 22:41:09.820780 Check phy result
488 22:41:09.825925 INFO : End of initialization
489 22:41:09.826376 INFO : End of read enable training
490 22:41:09.831439 INFO : End of fine write leveling
491 22:41:09.837062 INFO : End of Write leveling coarse delay
492 22:41:09.837514 INFO : Training has run successfully!
493 22:41:09.837924 Check phy result
494 22:41:09.842641 INFO : End of initialization
495 22:41:09.843089 INFO : End of read dq deskew training
496 22:41:09.848346 INFO : End of MPR read delay center optimization
497 22:41:09.853869 INFO : End of write delay center optimization
498 22:41:09.859446 INFO : End of read delay center optimization
499 22:41:09.859899 INFO : End of max read latency training
500 22:41:09.865106 INFO : Training has run successfully!
501 22:41:09.865564 1D training succeed
502 22:41:09.874213 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
503 22:41:09.920856 Check phy result
504 22:41:09.921333 INFO : End of initialization
505 22:41:09.943596 INFO : End of 2D read delay Voltage center optimization
506 22:41:09.963826 INFO : End of 2D read delay Voltage center optimization
507 22:41:10.015851 INFO : End of 2D write delay Voltage center optimization
508 22:41:10.065263 INFO : End of 2D write delay Voltage center optimization
509 22:41:10.070750 INFO : Training has run successfully!
510 22:41:10.071216
511 22:41:10.071629 channel==0
512 22:41:10.076409 RxClkDly_Margin_A0==88 ps 9
513 22:41:10.076879 TxDqDly_Margin_A0==98 ps 10
514 22:41:10.081966 RxClkDly_Margin_A1==88 ps 9
515 22:41:10.082422 TxDqDly_Margin_A1==88 ps 9
516 22:41:10.082828 TrainedVREFDQ_A0==74
517 22:41:10.087609 TrainedVREFDQ_A1==74
518 22:41:10.088115 VrefDac_Margin_A0==25
519 22:41:10.088523 DeviceVref_Margin_A0==40
520 22:41:10.093173 VrefDac_Margin_A1==25
521 22:41:10.093623 DeviceVref_Margin_A1==40
522 22:41:10.094029
523 22:41:10.094430
524 22:41:10.094826 channel==1
525 22:41:10.098772 RxClkDly_Margin_A0==98 ps 10
526 22:41:10.099229 TxDqDly_Margin_A0==88 ps 9
527 22:41:10.104376 RxClkDly_Margin_A1==98 ps 10
528 22:41:10.104827 TxDqDly_Margin_A1==88 ps 9
529 22:41:10.109958 TrainedVREFDQ_A0==76
530 22:41:10.110412 TrainedVREFDQ_A1==77
531 22:41:10.110817 VrefDac_Margin_A0==22
532 22:41:10.115560 DeviceVref_Margin_A0==38
533 22:41:10.116038 VrefDac_Margin_A1==24
534 22:41:10.121190 DeviceVref_Margin_A1==37
535 22:41:10.121640
536 22:41:10.122045 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
537 22:41:10.122442
538 22:41:10.154694 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
539 22:41:10.155178 2D training succeed
540 22:41:10.160362 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
541 22:41:10.165998 auto size-- 65535DDR cs0 size: 2048MB
542 22:41:10.166453 DDR cs1 size: 2048MB
543 22:41:10.171553 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
544 22:41:10.172038 cs0 DataBus test pass
545 22:41:10.177158 cs1 DataBus test pass
546 22:41:10.177607 cs0 AddrBus test pass
547 22:41:10.178010 cs1 AddrBus test pass
548 22:41:10.178405
549 22:41:10.182768 100bdlr_step_size ps== 420
550 22:41:10.183228 result report
551 22:41:10.188377 boot times 0Enable ddr reg access
552 22:41:10.193621 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
553 22:41:10.207045 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
554 22:41:10.780331 0.0;M3 CHK:0;cm4_sp_mode 0
555 22:41:10.780924 MVN_1=0x00000000
556 22:41:10.785986 MVN_2=0x00000000
557 22:41:10.791588 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
558 22:41:10.792104 OPS=0x10
559 22:41:10.792520 ring efuse init
560 22:41:10.792925 chipver efuse init
561 22:41:10.799862 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
562 22:41:10.800399 [0.018960 Inits done]
563 22:41:10.800790 secure task start!
564 22:41:10.807433 high task start!
565 22:41:10.807877 low task start!
566 22:41:10.808305 run into bl31
567 22:41:10.814092 NOTICE: BL31: v1.3(release):4fc40b1
568 22:41:10.821097 NOTICE: BL31: Built : 15:58:17, May 22 2019
569 22:41:10.821547 NOTICE: BL31: G12A normal boot!
570 22:41:10.847147 NOTICE: BL31: BL33 decompress pass
571 22:41:10.852845 ERROR: Error initializing runtime service opteed_fast
572 22:41:12.085864
573 22:41:12.086482
574 22:41:12.094286 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
575 22:41:12.094782
576 22:41:12.095201 Model: Libre Computer AML-A311D-CC Alta
577 22:41:12.302725 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
578 22:41:12.326032 DRAM: 2 GiB (effective 3.8 GiB)
579 22:41:12.468963 Core: 408 devices, 31 uclasses, devicetree: separate
580 22:41:12.474913 WDT: Not starting watchdog@f0d0
581 22:41:12.507285 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
582 22:41:12.519611 Loading Environment from FAT... Card did not respond to voltage select! : -110
583 22:41:12.524711 ** Bad device specification mmc 0 **
584 22:41:12.534983 Card did not respond to voltage select! : -110
585 22:41:12.541762 ** Bad device specification mmc 0 **
586 22:41:12.542290 Couldn't find partition mmc 0
587 22:41:12.550988 Card did not respond to voltage select! : -110
588 22:41:12.556478 ** Bad device specification mmc 0 **
589 22:41:12.556986 Couldn't find partition mmc 0
590 22:41:12.561526 Error: could not access storage.
591 22:41:12.904043 Net: eth0: ethernet@ff3f0000
592 22:41:12.904660 starting USB...
593 22:41:13.155715 Bus usb@ff500000: Register 3000140 NbrPorts 3
594 22:41:13.156353 Starting the controller
595 22:41:13.162809 USB XHCI 1.10
596 22:41:14.875062 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
597 22:41:14.875730 bl2_stage_init 0x01
598 22:41:14.876271 bl2_stage_init 0x81
599 22:41:14.880406 hw id: 0x0000 - pwm id 0x01
600 22:41:14.880903 bl2_stage_init 0xc1
601 22:41:14.881357 bl2_stage_init 0x02
602 22:41:14.881808
603 22:41:14.886108 L0:00000000
604 22:41:14.886597 L1:20000703
605 22:41:14.887049 L2:00008067
606 22:41:14.887494 L3:14000000
607 22:41:14.891772 B2:00402000
608 22:41:14.892301 B1:e0f83180
609 22:41:14.892757
610 22:41:14.893202 TE: 58159
611 22:41:14.893643
612 22:41:14.897302 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
613 22:41:14.897806
614 22:41:14.898259 Board ID = 1
615 22:41:14.903009 Set A53 clk to 24M
616 22:41:14.903491 Set A73 clk to 24M
617 22:41:14.903940 Set clk81 to 24M
618 22:41:14.908412 A53 clk: 1200 MHz
619 22:41:14.908892 A73 clk: 1200 MHz
620 22:41:14.909336 CLK81: 166.6M
621 22:41:14.909773 smccc: 00012ab4
622 22:41:14.914025 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
623 22:41:14.919674 board id: 1
624 22:41:14.924856 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
625 22:41:14.936230 fw parse done
626 22:41:14.942109 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
627 22:41:14.983821 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
628 22:41:14.995671 PIEI prepare done
629 22:41:14.996236 fastboot data load
630 22:41:14.996732 fastboot data verify
631 22:41:15.001273 verify result: 266
632 22:41:15.006915 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
633 22:41:15.007426 LPDDR4 probe
634 22:41:15.007879 ddr clk to 1584MHz
635 22:41:15.014844 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
636 22:41:15.052237
637 22:41:15.052791 dmc_version 0001
638 22:41:15.058807 Check phy result
639 22:41:15.064678 INFO : End of CA training
640 22:41:15.065163 INFO : End of initialization
641 22:41:15.070292 INFO : Training has run successfully!
642 22:41:15.070764 Check phy result
643 22:41:15.075970 INFO : End of initialization
644 22:41:15.076478 INFO : End of read enable training
645 22:41:15.081410 INFO : End of fine write leveling
646 22:41:15.087047 INFO : End of Write leveling coarse delay
647 22:41:15.087534 INFO : Training has run successfully!
648 22:41:15.088026 Check phy result
649 22:41:15.092737 INFO : End of initialization
650 22:41:15.093236 INFO : End of read dq deskew training
651 22:41:15.098343 INFO : End of MPR read delay center optimization
652 22:41:15.103953 INFO : End of write delay center optimization
653 22:41:15.109568 INFO : End of read delay center optimization
654 22:41:15.110047 INFO : End of max read latency training
655 22:41:15.115048 INFO : Training has run successfully!
656 22:41:15.115522 1D training succeed
657 22:41:15.124307 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
658 22:41:15.171889 Check phy result
659 22:41:15.172512 INFO : End of initialization
660 22:41:15.193603 INFO : End of 2D read delay Voltage center optimization
661 22:41:15.213847 INFO : End of 2D read delay Voltage center optimization
662 22:41:15.265996 INFO : End of 2D write delay Voltage center optimization
663 22:41:15.315418 INFO : End of 2D write delay Voltage center optimization
664 22:41:15.320748 INFO : Training has run successfully!
665 22:41:15.321270
666 22:41:15.321734 channel==0
667 22:41:15.326341 RxClkDly_Margin_A0==88 ps 9
668 22:41:15.326835 TxDqDly_Margin_A0==98 ps 10
669 22:41:15.332049 RxClkDly_Margin_A1==78 ps 8
670 22:41:15.332538 TxDqDly_Margin_A1==88 ps 9
671 22:41:15.332990 TrainedVREFDQ_A0==74
672 22:41:15.337558 TrainedVREFDQ_A1==74
673 22:41:15.338066 VrefDac_Margin_A0==25
674 22:41:15.338522 DeviceVref_Margin_A0==40
675 22:41:15.343197 VrefDac_Margin_A1==25
676 22:41:15.343687 DeviceVref_Margin_A1==40
677 22:41:15.344166
678 22:41:15.344616
679 22:41:15.345057 channel==1
680 22:41:15.348819 RxClkDly_Margin_A0==98 ps 10
681 22:41:15.349308 TxDqDly_Margin_A0==98 ps 10
682 22:41:15.354421 RxClkDly_Margin_A1==98 ps 10
683 22:41:15.354917 TxDqDly_Margin_A1==88 ps 9
684 22:41:15.360171 TrainedVREFDQ_A0==77
685 22:41:15.360662 TrainedVREFDQ_A1==77
686 22:41:15.361112 VrefDac_Margin_A0==22
687 22:41:15.365479 DeviceVref_Margin_A0==37
688 22:41:15.365965 VrefDac_Margin_A1==24
689 22:41:15.371133 DeviceVref_Margin_A1==37
690 22:41:15.371619
691 22:41:15.372102 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
692 22:41:15.372552
693 22:41:15.404719 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
694 22:41:15.405282 2D training succeed
695 22:41:15.410301 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
696 22:41:15.416096 auto size-- 65535DDR cs0 size: 2048MB
697 22:41:15.416609 DDR cs1 size: 2048MB
698 22:41:15.421513 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
699 22:41:15.421779 cs0 DataBus test pass
700 22:41:15.427115 cs1 DataBus test pass
701 22:41:15.427612 cs0 AddrBus test pass
702 22:41:15.428092 cs1 AddrBus test pass
703 22:41:15.428539
704 22:41:15.432668 100bdlr_step_size ps== 420
705 22:41:15.433158 result report
706 22:41:15.438321 boot times 0Enable ddr reg access
707 22:41:15.443706 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
708 22:41:15.457169 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
709 22:41:16.030832 0.0;M3 CHK:0;cm4_sp_mode 0
710 22:41:16.031490 MVN_1=0x00000000
711 22:41:16.036356 MVN_2=0x00000000
712 22:41:16.042127 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
713 22:41:16.042681 OPS=0x10
714 22:41:16.043119 ring efuse init
715 22:41:16.043542 chipver efuse init
716 22:41:16.047702 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
717 22:41:16.053319 [0.018961 Inits done]
718 22:41:16.053785 secure task start!
719 22:41:16.054218 high task start!
720 22:41:16.057877 low task start!
721 22:41:16.058340 run into bl31
722 22:41:16.064547 NOTICE: BL31: v1.3(release):4fc40b1
723 22:41:16.072492 NOTICE: BL31: Built : 15:58:17, May 22 2019
724 22:41:16.072968 NOTICE: BL31: G12A normal boot!
725 22:41:16.097784 NOTICE: BL31: BL33 decompress pass
726 22:41:16.103378 ERROR: Error initializing runtime service opteed_fast
727 22:41:17.336351
728 22:41:17.337001
729 22:41:17.344656 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
730 22:41:17.345156
731 22:41:17.345614 Model: Libre Computer AML-A311D-CC Alta
732 22:41:17.553186 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
733 22:41:17.575600 DRAM: 2 GiB (effective 3.8 GiB)
734 22:41:17.719592 Core: 408 devices, 31 uclasses, devicetree: separate
735 22:41:17.725377 WDT: Not starting watchdog@f0d0
736 22:41:17.757668 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
737 22:41:17.770113 Loading Environment from FAT... Card did not respond to voltage select! : -110
738 22:41:17.774175 ** Bad device specification mmc 0 **
739 22:41:17.785500 Card did not respond to voltage select! : -110
740 22:41:17.793162 ** Bad device specification mmc 0 **
741 22:41:17.793755 Couldn't find partition mmc 0
742 22:41:17.802441 Card did not respond to voltage select! : -110
743 22:41:17.807418 ** Bad device specification mmc 0 **
744 22:41:17.807936 Couldn't find partition mmc 0
745 22:41:17.812245 Error: could not access storage.
746 22:41:18.153588 Net: eth0: ethernet@ff3f0000
747 22:41:18.154250 starting USB...
748 22:41:18.406339 Bus usb@ff500000: Register 3000140 NbrPorts 3
749 22:41:18.407001 Starting the controller
750 22:41:18.413364 USB XHCI 1.10
751 22:41:20.575242 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
752 22:41:20.575880 bl2_stage_init 0x01
753 22:41:20.576377 bl2_stage_init 0x81
754 22:41:20.580854 hw id: 0x0000 - pwm id 0x01
755 22:41:20.581342 bl2_stage_init 0xc1
756 22:41:20.581765 bl2_stage_init 0x02
757 22:41:20.582169
758 22:41:20.586473 L0:00000000
759 22:41:20.586953 L1:20000703
760 22:41:20.587368 L2:00008067
761 22:41:20.587773 L3:14000000
762 22:41:20.591960 B2:00402000
763 22:41:20.592476 B1:e0f83180
764 22:41:20.592884
765 22:41:20.593288 TE: 58124
766 22:41:20.593690
767 22:41:20.597501 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 22:41:20.597979
769 22:41:20.598389 Board ID = 1
770 22:41:20.603074 Set A53 clk to 24M
771 22:41:20.603539 Set A73 clk to 24M
772 22:41:20.603949 Set clk81 to 24M
773 22:41:20.608874 A53 clk: 1200 MHz
774 22:41:20.609353 A73 clk: 1200 MHz
775 22:41:20.609763 CLK81: 166.6M
776 22:41:20.610159 smccc: 00012a92
777 22:41:20.614338 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 22:41:20.619948 board id: 1
779 22:41:20.625938 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 22:41:20.636483 fw parse done
781 22:41:20.642475 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 22:41:20.684915 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 22:41:20.695841 PIEI prepare done
784 22:41:20.696359 fastboot data load
785 22:41:20.696775 fastboot data verify
786 22:41:20.701511 verify result: 266
787 22:41:20.707155 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 22:41:20.707627 LPDDR4 probe
789 22:41:20.708074 ddr clk to 1584MHz
790 22:41:20.715066 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 22:41:20.751428
792 22:41:20.751958 dmc_version 0001
793 22:41:20.759062 Check phy result
794 22:41:20.764930 INFO : End of CA training
795 22:41:20.765411 INFO : End of initialization
796 22:41:20.770539 INFO : Training has run successfully!
797 22:41:20.771014 Check phy result
798 22:41:20.776238 INFO : End of initialization
799 22:41:20.776907 INFO : End of read enable training
800 22:41:20.779507 INFO : End of fine write leveling
801 22:41:20.785055 INFO : End of Write leveling coarse delay
802 22:41:20.790612 INFO : Training has run successfully!
803 22:41:20.791080 Check phy result
804 22:41:20.791488 INFO : End of initialization
805 22:41:20.796263 INFO : End of read dq deskew training
806 22:41:20.801851 INFO : End of MPR read delay center optimization
807 22:41:20.802322 INFO : End of write delay center optimization
808 22:41:20.807488 INFO : End of read delay center optimization
809 22:41:20.813077 INFO : End of max read latency training
810 22:41:20.813577 INFO : Training has run successfully!
811 22:41:20.818770 1D training succeed
812 22:41:20.823681 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 22:41:20.871190 Check phy result
814 22:41:20.871845 INFO : End of initialization
815 22:41:20.893782 INFO : End of 2D read delay Voltage center optimization
816 22:41:20.913998 INFO : End of 2D read delay Voltage center optimization
817 22:41:20.966162 INFO : End of 2D write delay Voltage center optimization
818 22:41:21.015543 INFO : End of 2D write delay Voltage center optimization
819 22:41:21.021081 INFO : Training has run successfully!
820 22:41:21.021704
821 22:41:21.022267 channel==0
822 22:41:21.026757 RxClkDly_Margin_A0==88 ps 9
823 22:41:21.027372 TxDqDly_Margin_A0==98 ps 10
824 22:41:21.032290 RxClkDly_Margin_A1==88 ps 9
825 22:41:21.032800 TxDqDly_Margin_A1==88 ps 9
826 22:41:21.033280 TrainedVREFDQ_A0==74
827 22:41:21.037907 TrainedVREFDQ_A1==74
828 22:41:21.038487 VrefDac_Margin_A0==25
829 22:41:21.038948 DeviceVref_Margin_A0==40
830 22:41:21.043457 VrefDac_Margin_A1==25
831 22:41:21.044036 DeviceVref_Margin_A1==40
832 22:41:21.044483
833 22:41:21.044918
834 22:41:21.045345 channel==1
835 22:41:21.048935 RxClkDly_Margin_A0==98 ps 10
836 22:41:21.049403 TxDqDly_Margin_A0==98 ps 10
837 22:41:21.054599 RxClkDly_Margin_A1==88 ps 9
838 22:41:21.055084 TxDqDly_Margin_A1==88 ps 9
839 22:41:21.060194 TrainedVREFDQ_A0==77
840 22:41:21.060688 TrainedVREFDQ_A1==77
841 22:41:21.061129 VrefDac_Margin_A0==22
842 22:41:21.065802 DeviceVref_Margin_A0==37
843 22:41:21.066281 VrefDac_Margin_A1==24
844 22:41:21.071422 DeviceVref_Margin_A1==37
845 22:41:21.071887
846 22:41:21.072362 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 22:41:21.072795
848 22:41:21.104944 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
849 22:41:21.105456 2D training succeed
850 22:41:21.110655 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 22:41:21.116175 auto size-- 65535DDR cs0 size: 2048MB
852 22:41:21.116636 DDR cs1 size: 2048MB
853 22:41:21.121795 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 22:41:21.122255 cs0 DataBus test pass
855 22:41:21.127412 cs1 DataBus test pass
856 22:41:21.127886 cs0 AddrBus test pass
857 22:41:21.128373 cs1 AddrBus test pass
858 22:41:21.128799
859 22:41:21.132959 100bdlr_step_size ps== 420
860 22:41:21.133433 result report
861 22:41:21.138666 boot times 0Enable ddr reg access
862 22:41:21.142870 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 22:41:21.156429 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 22:41:21.731066 0.0;M3 CHK:0;cm4_sp_mode 0
865 22:41:21.731713 MVN_1=0x00000000
866 22:41:21.736467 MVN_2=0x00000000
867 22:41:21.742176 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 22:41:21.742680 OPS=0x10
869 22:41:21.743145 ring efuse init
870 22:41:21.743596 chipver efuse init
871 22:41:21.750512 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 22:41:21.751016 [0.018961 Inits done]
873 22:41:21.757737 secure task start!
874 22:41:21.758216 high task start!
875 22:41:21.758662 low task start!
876 22:41:21.759105 run into bl31
877 22:41:21.764629 NOTICE: BL31: v1.3(release):4fc40b1
878 22:41:21.772463 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 22:41:21.773030 NOTICE: BL31: G12A normal boot!
880 22:41:21.797892 NOTICE: BL31: BL33 decompress pass
881 22:41:21.803553 ERROR: Error initializing runtime service opteed_fast
882 22:41:23.036484
883 22:41:23.037136
884 22:41:23.044840 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 22:41:23.045357
886 22:41:23.045784 Model: Libre Computer AML-A311D-CC Alta
887 22:41:23.253323 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 22:41:23.276731 DRAM: 2 GiB (effective 3.8 GiB)
889 22:41:23.419716 Core: 408 devices, 31 uclasses, devicetree: separate
890 22:41:23.425562 WDT: Not starting watchdog@f0d0
891 22:41:23.457823 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 22:41:23.470223 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 22:41:23.475273 ** Bad device specification mmc 0 **
894 22:41:23.485609 Card did not respond to voltage select! : -110
895 22:41:23.493281 ** Bad device specification mmc 0 **
896 22:41:23.493794 Couldn't find partition mmc 0
897 22:41:23.501615 Card did not respond to voltage select! : -110
898 22:41:23.507210 ** Bad device specification mmc 0 **
899 22:41:23.507708 Couldn't find partition mmc 0
900 22:41:23.512242 Error: could not access storage.
901 22:41:23.854590 Net: eth0: ethernet@ff3f0000
902 22:41:23.855187 starting USB...
903 22:41:24.106444 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 22:41:24.107057 Starting the controller
905 22:41:24.113399 USB XHCI 1.10
906 22:41:25.667242 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
907 22:41:25.675760 scanning usb for storage devices... 0 Storage Device(s) found
909 22:41:25.727409 Hit any key to stop autoboot: 1
910 22:41:25.728526 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
911 22:41:25.729168 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
912 22:41:25.729649 Setting prompt string to ['=>']
913 22:41:25.730136 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
914 22:41:25.743203 0
915 22:41:25.744162 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
916 22:41:25.744676 Sending with 10 millisecond of delay
918 22:41:26.879535 => setenv autoload no
919 22:41:26.890412 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
920 22:41:26.895438 setenv autoload no
921 22:41:26.896172 Sending with 10 millisecond of delay
923 22:41:28.693952 => setenv initrd_high 0xffffffff
924 22:41:28.704953 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
925 22:41:28.706079 setenv initrd_high 0xffffffff
926 22:41:28.706954 Sending with 10 millisecond of delay
928 22:41:30.324716 => setenv fdt_high 0xffffffff
929 22:41:30.335689 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
930 22:41:30.336787 setenv fdt_high 0xffffffff
931 22:41:30.337662 Sending with 10 millisecond of delay
933 22:41:30.629895 => dhcp
934 22:41:30.640903 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
935 22:41:30.641986 dhcp
936 22:41:30.642556 Speed: 1000, full duplex
937 22:41:30.643082 BOOTP broadcast 1
938 22:41:30.659392 DHCP client bound to address 192.168.6.27 (18 ms)
939 22:41:30.660450 Sending with 10 millisecond of delay
941 22:41:32.338105 => setenv serverip 192.168.6.2
942 22:41:32.348905 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
943 22:41:32.349822 setenv serverip 192.168.6.2
944 22:41:32.350521 Sending with 10 millisecond of delay
946 22:41:36.075773 => tftpboot 0x01080000 955500/tftp-deploy-k0akpmwd/kernel/uImage
947 22:41:36.086573 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
948 22:41:36.087421 tftpboot 0x01080000 955500/tftp-deploy-k0akpmwd/kernel/uImage
949 22:41:36.087885 Speed: 1000, full duplex
950 22:41:36.088347 Using ethernet@ff3f0000 device
951 22:41:36.089421 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
952 22:41:36.095072 Filename '955500/tftp-deploy-k0akpmwd/kernel/uImage'.
953 22:41:36.098759 Load address: 0x1080000
954 22:41:38.875542 Loading: *################################################## 43.6 MiB
955 22:41:38.876349 15.7 MiB/s
956 22:41:38.876913 done
957 22:41:38.880081 Bytes transferred = 45713984 (2b98a40 hex)
958 22:41:38.881156 Sending with 10 millisecond of delay
960 22:41:43.571199 => tftpboot 0x08000000 955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
961 22:41:43.582055 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
962 22:41:43.583028 tftpboot 0x08000000 955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot
963 22:41:43.583503 Speed: 1000, full duplex
964 22:41:43.583926 Using ethernet@ff3f0000 device
965 22:41:43.585135 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
966 22:41:43.596752 Filename '955500/tftp-deploy-k0akpmwd/ramdisk/ramdisk.cpio.gz.uboot'.
967 22:41:43.597343 Load address: 0x8000000
968 22:41:49.327863 Loading: *######### UDP wrong checksum 000000ff 00007700
969 22:41:49.344238 UDP wrong checksum 000000ff 00000df3
970 22:41:52.872858 T ######################################## UDP wrong checksum 0000000f 00000de6
971 22:41:58.112666 T UDP wrong checksum 0000000f 00000de6
972 22:42:00.607252 UDP wrong checksum 000000ff 0000af5b
973 22:42:00.646293 UDP wrong checksum 000000ff 00003f4e
974 22:42:07.876424 T T UDP wrong checksum 0000000f 00000de6
975 22:42:10.587513 UDP wrong checksum 000000ff 00001ba6
976 22:42:10.626615 UDP wrong checksum 000000ff 0000a598
977 22:42:23.166882 T T T UDP wrong checksum 000000ff 00000149
978 22:42:23.206944 UDP wrong checksum 000000ff 00009b3b
979 22:42:27.881513 T UDP wrong checksum 0000000f 00000de6
980 22:42:42.885640 T T
981 22:42:42.886069 Retry count exceeded; starting again
983 22:42:42.886967 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
986 22:42:42.888791 end: 2.4 uboot-commands (duration 00:01:49) [common]
988 22:42:42.890109 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
990 22:42:42.891089 end: 2 uboot-action (duration 00:01:49) [common]
992 22:42:42.892734 Cleaning after the job
993 22:42:42.893340 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/ramdisk
994 22:42:42.894513 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/kernel
995 22:42:42.901955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/dtb
996 22:42:42.903230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955500/tftp-deploy-k0akpmwd/modules
997 22:42:42.909400 start: 4.1 power-off (timeout 00:00:30) [common]
998 22:42:42.910398 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
999 22:42:42.947248 >> OK - accepted request
1000 22:42:42.949413 Returned 0 in 0 seconds
1001 22:42:43.050563 end: 4.1 power-off (duration 00:00:00) [common]
1003 22:42:43.052330 start: 4.2 read-feedback (timeout 00:10:00) [common]
1004 22:42:43.053528 Listened to connection for namespace 'common' for up to 1s
1005 22:42:44.053883 Finalising connection for namespace 'common'
1006 22:42:44.054664 Disconnecting from shell: Finalise
1007 22:42:44.055187 =>
1008 22:42:44.156309 end: 4.2 read-feedback (duration 00:00:01) [common]
1009 22:42:44.157027 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955500
1010 22:42:44.847691 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955500
1011 22:42:44.848290 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.