Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:43:12.566643 lava-dispatcher, installed at version: 2024.01
2 22:43:12.567480 start: 0 validate
3 22:43:12.568016 Start time: 2024-11-07 22:43:12.567962+00:00 (UTC)
4 22:43:12.568595 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:43:12.569155 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:43:12.608926 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:43:12.609477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:43:12.640326 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:43:12.640977 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:43:12.675692 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:43:12.676240 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:43:12.709091 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:43:12.709589 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-245-g6f5f585ff3e63%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:43:12.752024 validate duration: 0.18
16 22:43:12.753506 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:43:12.754119 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:43:12.754715 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:43:12.755682 Not decompressing ramdisk as can be used compressed.
20 22:43:12.756492 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:43:12.757008 saving as /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/ramdisk/initrd.cpio.gz
22 22:43:12.757507 total size: 5628169 (5 MB)
23 22:43:12.798728 progress 0 % (0 MB)
24 22:43:12.807000 progress 5 % (0 MB)
25 22:43:12.815628 progress 10 % (0 MB)
26 22:43:12.823177 progress 15 % (0 MB)
27 22:43:12.831239 progress 20 % (1 MB)
28 22:43:12.837151 progress 25 % (1 MB)
29 22:43:12.841217 progress 30 % (1 MB)
30 22:43:12.845501 progress 35 % (1 MB)
31 22:43:12.849178 progress 40 % (2 MB)
32 22:43:12.853265 progress 45 % (2 MB)
33 22:43:12.856809 progress 50 % (2 MB)
34 22:43:12.860809 progress 55 % (2 MB)
35 22:43:12.864761 progress 60 % (3 MB)
36 22:43:12.868253 progress 65 % (3 MB)
37 22:43:12.872221 progress 70 % (3 MB)
38 22:43:12.875726 progress 75 % (4 MB)
39 22:43:12.879828 progress 80 % (4 MB)
40 22:43:12.883406 progress 85 % (4 MB)
41 22:43:12.887305 progress 90 % (4 MB)
42 22:43:12.891123 progress 95 % (5 MB)
43 22:43:12.894333 progress 100 % (5 MB)
44 22:43:12.894964 5 MB downloaded in 0.14 s (39.05 MB/s)
45 22:43:12.895480 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:43:12.896392 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:43:12.896693 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:43:12.896962 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:43:12.897429 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/kernel/Image
51 22:43:12.897690 saving as /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/kernel/Image
52 22:43:12.897899 total size: 45713920 (43 MB)
53 22:43:12.898107 No compression specified
54 22:43:12.937714 progress 0 % (0 MB)
55 22:43:12.967506 progress 5 % (2 MB)
56 22:43:12.997656 progress 10 % (4 MB)
57 22:43:13.027824 progress 15 % (6 MB)
58 22:43:13.057731 progress 20 % (8 MB)
59 22:43:13.087430 progress 25 % (10 MB)
60 22:43:13.117746 progress 30 % (13 MB)
61 22:43:13.148118 progress 35 % (15 MB)
62 22:43:13.178324 progress 40 % (17 MB)
63 22:43:13.208499 progress 45 % (19 MB)
64 22:43:13.239008 progress 50 % (21 MB)
65 22:43:13.269023 progress 55 % (24 MB)
66 22:43:13.299283 progress 60 % (26 MB)
67 22:43:13.329607 progress 65 % (28 MB)
68 22:43:13.359948 progress 70 % (30 MB)
69 22:43:13.390441 progress 75 % (32 MB)
70 22:43:13.421053 progress 80 % (34 MB)
71 22:43:13.450646 progress 85 % (37 MB)
72 22:43:13.480976 progress 90 % (39 MB)
73 22:43:13.511609 progress 95 % (41 MB)
74 22:43:13.541444 progress 100 % (43 MB)
75 22:43:13.542072 43 MB downloaded in 0.64 s (67.68 MB/s)
76 22:43:13.542554 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:43:13.543382 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:43:13.543661 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:43:13.543932 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:43:13.544444 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:43:13.544731 saving as /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:43:13.544940 total size: 54703 (0 MB)
84 22:43:13.545150 No compression specified
85 22:43:13.595839 progress 59 % (0 MB)
86 22:43:13.596737 progress 100 % (0 MB)
87 22:43:13.597304 0 MB downloaded in 0.05 s (1.00 MB/s)
88 22:43:13.597827 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:43:13.598658 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:43:13.598924 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:43:13.599192 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:43:13.599675 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:43:13.599931 saving as /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/nfsrootfs/full.rootfs.tar
95 22:43:13.600169 total size: 120894716 (115 MB)
96 22:43:13.600385 Using unxz to decompress xz
97 22:43:13.639283 progress 0 % (0 MB)
98 22:43:14.570521 progress 5 % (5 MB)
99 22:43:15.412345 progress 10 % (11 MB)
100 22:43:16.206830 progress 15 % (17 MB)
101 22:43:16.947684 progress 20 % (23 MB)
102 22:43:17.538909 progress 25 % (28 MB)
103 22:43:18.366170 progress 30 % (34 MB)
104 22:43:19.166409 progress 35 % (40 MB)
105 22:43:19.538734 progress 40 % (46 MB)
106 22:43:19.945768 progress 45 % (51 MB)
107 22:43:20.678563 progress 50 % (57 MB)
108 22:43:21.576144 progress 55 % (63 MB)
109 22:43:22.364049 progress 60 % (69 MB)
110 22:43:23.128465 progress 65 % (74 MB)
111 22:43:23.913342 progress 70 % (80 MB)
112 22:43:24.741617 progress 75 % (86 MB)
113 22:43:25.537501 progress 80 % (92 MB)
114 22:43:26.306602 progress 85 % (98 MB)
115 22:43:27.170830 progress 90 % (103 MB)
116 22:43:27.966575 progress 95 % (109 MB)
117 22:43:28.978858 progress 100 % (115 MB)
118 22:43:28.995072 115 MB downloaded in 15.39 s (7.49 MB/s)
119 22:43:28.995747 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:43:28.997231 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:43:28.997752 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:43:28.998269 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:43:28.999154 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/modules.tar.xz
125 22:43:28.999656 saving as /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/modules/modules.tar
126 22:43:29.000102 total size: 11624536 (11 MB)
127 22:43:29.000526 Using unxz to decompress xz
128 22:43:29.046546 progress 0 % (0 MB)
129 22:43:29.117573 progress 5 % (0 MB)
130 22:43:29.198667 progress 10 % (1 MB)
131 22:43:29.298015 progress 15 % (1 MB)
132 22:43:29.390061 progress 20 % (2 MB)
133 22:43:29.477737 progress 25 % (2 MB)
134 22:43:29.560742 progress 30 % (3 MB)
135 22:43:29.648900 progress 35 % (3 MB)
136 22:43:29.723274 progress 40 % (4 MB)
137 22:43:29.799660 progress 45 % (5 MB)
138 22:43:29.885361 progress 50 % (5 MB)
139 22:43:29.968728 progress 55 % (6 MB)
140 22:43:30.050710 progress 60 % (6 MB)
141 22:43:30.131787 progress 65 % (7 MB)
142 22:43:30.213610 progress 70 % (7 MB)
143 22:43:30.295543 progress 75 % (8 MB)
144 22:43:30.374656 progress 80 % (8 MB)
145 22:43:30.455891 progress 85 % (9 MB)
146 22:43:30.540094 progress 90 % (10 MB)
147 22:43:30.618499 progress 95 % (10 MB)
148 22:43:30.692414 progress 100 % (11 MB)
149 22:43:30.707105 11 MB downloaded in 1.71 s (6.49 MB/s)
150 22:43:30.707743 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:43:30.709519 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:43:30.710236 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 22:43:30.710825 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 22:43:48.075589 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/955511/extract-nfsrootfs-bh4qzraj
156 22:43:48.076233 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 22:43:48.076530 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 22:43:48.077233 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z
159 22:43:48.077687 makedir: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin
160 22:43:48.078013 makedir: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/tests
161 22:43:48.078326 makedir: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/results
162 22:43:48.078660 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-add-keys
163 22:43:48.079201 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-add-sources
164 22:43:48.079727 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-background-process-start
165 22:43:48.080271 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-background-process-stop
166 22:43:48.080816 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-common-functions
167 22:43:48.081315 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-echo-ipv4
168 22:43:48.081843 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-install-packages
169 22:43:48.082393 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-installed-packages
170 22:43:48.082880 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-os-build
171 22:43:48.083360 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-probe-channel
172 22:43:48.083841 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-probe-ip
173 22:43:48.084438 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-target-ip
174 22:43:48.084929 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-target-mac
175 22:43:48.085410 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-target-storage
176 22:43:48.085900 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-case
177 22:43:48.086408 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-event
178 22:43:48.086900 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-feedback
179 22:43:48.087412 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-raise
180 22:43:48.087916 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-reference
181 22:43:48.088462 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-runner
182 22:43:48.088952 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-set
183 22:43:48.089434 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-test-shell
184 22:43:48.089977 Updating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-add-keys (debian)
185 22:43:48.090609 Updating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-add-sources (debian)
186 22:43:48.091134 Updating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-install-packages (debian)
187 22:43:48.091643 Updating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-installed-packages (debian)
188 22:43:48.092180 Updating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/bin/lava-os-build (debian)
189 22:43:48.092653 Creating /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/environment
190 22:43:48.093050 LAVA metadata
191 22:43:48.093317 - LAVA_JOB_ID=955511
192 22:43:48.093534 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:43:48.093919 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 22:43:48.094938 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:43:48.095272 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 22:43:48.095483 skipped lava-vland-overlay
197 22:43:48.095724 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:43:48.096022 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 22:43:48.096258 skipped lava-multinode-overlay
200 22:43:48.096506 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:43:48.096758 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 22:43:48.097011 Loading test definitions
203 22:43:48.097294 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 22:43:48.097516 Using /lava-955511 at stage 0
205 22:43:48.098653 uuid=955511_1.6.2.4.1 testdef=None
206 22:43:48.098976 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:43:48.099242 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 22:43:48.101056 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:43:48.101873 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 22:43:48.103974 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:43:48.104873 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 22:43:48.106902 runner path: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/0/tests/0_timesync-off test_uuid 955511_1.6.2.4.1
215 22:43:48.107510 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:43:48.108370 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 22:43:48.108600 Using /lava-955511 at stage 0
219 22:43:48.109066 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:43:48.109365 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/0/tests/1_kselftest-alsa'
221 22:43:51.596303 Running '/usr/bin/git checkout kernelci.org
222 22:43:52.042424 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 22:43:52.043876 uuid=955511_1.6.2.4.5 testdef=None
224 22:43:52.044258 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:43:52.045006 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 22:43:52.047810 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:43:52.048651 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 22:43:52.052361 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:43:52.053251 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 22:43:52.057019 runner path: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/0/tests/1_kselftest-alsa test_uuid 955511_1.6.2.4.5
234 22:43:52.057334 BOARD='meson-g12b-a311d-libretech-cc'
235 22:43:52.057541 BRANCH='broonie-sound'
236 22:43:52.057740 SKIPFILE='/dev/null'
237 22:43:52.057939 SKIP_INSTALL='True'
238 22:43:52.058133 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-245-g6f5f585ff3e63/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:43:52.058334 TST_CASENAME=''
240 22:43:52.058530 TST_CMDFILES='alsa'
241 22:43:52.059184 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:43:52.060017 Creating lava-test-runner.conf files
244 22:43:52.060232 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955511/lava-overlay-2jlp4n0z/lava-955511/0 for stage 0
245 22:43:52.060621 - 0_timesync-off
246 22:43:52.060892 - 1_kselftest-alsa
247 22:43:52.061258 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:43:52.061560 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 22:44:16.139128 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 22:44:16.139597 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 22:44:16.139900 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:44:16.140256 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 22:44:16.140559 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 22:44:16.854255 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:44:16.854750 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 22:44:16.855006 extracting modules file /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955511/extract-nfsrootfs-bh4qzraj
257 22:44:18.439687 extracting modules file /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk
258 22:44:19.984982 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:44:19.985454 start: 1.6.5 apply-overlay-tftp (timeout 00:08:53) [common]
260 22:44:19.985734 [common] Applying overlay to NFS
261 22:44:19.985949 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955511/compress-overlay-mlzptaow/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955511/extract-nfsrootfs-bh4qzraj
262 22:44:22.753480 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:44:22.753962 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
264 22:44:22.754239 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
265 22:44:22.754474 Converting downloaded kernel to a uImage
266 22:44:22.754786 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/kernel/Image /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/kernel/uImage
267 22:44:23.287954 output: Image Name:
268 22:44:23.288405 output: Created: Thu Nov 7 22:44:22 2024
269 22:44:23.288615 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:44:23.288823 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:44:23.289024 output: Load Address: 01080000
272 22:44:23.289240 output: Entry Point: 01080000
273 22:44:23.289444 output:
274 22:44:23.289779 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 22:44:23.290048 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 22:44:23.290316 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 22:44:23.290570 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:44:23.290827 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 22:44:23.291084 Building ramdisk /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk
280 22:44:25.446006 >> 166792 blocks
281 22:44:33.200667 Adding RAMdisk u-boot header.
282 22:44:33.201097 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk.cpio.gz.uboot
283 22:44:33.448208 output: Image Name:
284 22:44:33.448622 output: Created: Thu Nov 7 22:44:33 2024
285 22:44:33.448835 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:44:33.449039 output: Data Size: 23431351 Bytes = 22882.18 KiB = 22.35 MiB
287 22:44:33.449241 output: Load Address: 00000000
288 22:44:33.449439 output: Entry Point: 00000000
289 22:44:33.449637 output:
290 22:44:33.450271 rename /var/lib/lava/dispatcher/tmp/955511/extract-overlay-ramdisk-051ihy38/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
291 22:44:33.450701 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:44:33.450988 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 22:44:33.451260 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 22:44:33.451501 No LXC device requested
295 22:44:33.451755 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:44:33.452076 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 22:44:33.452594 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:44:33.453004 Checking files for TFTP limit of 4294967296 bytes.
299 22:44:33.455701 end: 1 tftp-deploy (duration 00:01:21) [common]
300 22:44:33.456341 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:44:33.456872 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:44:33.457371 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:44:33.457878 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:44:33.458407 Using kernel file from prepare-kernel: 955511/tftp-deploy-cahnjw5j/kernel/uImage
305 22:44:33.459036 substitutions:
306 22:44:33.459445 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:44:33.459848 - {DTB_ADDR}: 0x01070000
308 22:44:33.460287 - {DTB}: 955511/tftp-deploy-cahnjw5j/dtb/meson-g12b-a311d-libretech-cc.dtb
309 22:44:33.460696 - {INITRD}: 955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
310 22:44:33.461093 - {KERNEL_ADDR}: 0x01080000
311 22:44:33.461485 - {KERNEL}: 955511/tftp-deploy-cahnjw5j/kernel/uImage
312 22:44:33.461875 - {LAVA_MAC}: None
313 22:44:33.462305 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/955511/extract-nfsrootfs-bh4qzraj
314 22:44:33.462704 - {NFS_SERVER_IP}: 192.168.6.2
315 22:44:33.463095 - {PRESEED_CONFIG}: None
316 22:44:33.463483 - {PRESEED_LOCAL}: None
317 22:44:33.463873 - {RAMDISK_ADDR}: 0x08000000
318 22:44:33.464294 - {RAMDISK}: 955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
319 22:44:33.464688 - {ROOT_PART}: None
320 22:44:33.465077 - {ROOT}: None
321 22:44:33.465466 - {SERVER_IP}: 192.168.6.2
322 22:44:33.465854 - {TEE_ADDR}: 0x83000000
323 22:44:33.466242 - {TEE}: None
324 22:44:33.466630 Parsed boot commands:
325 22:44:33.467008 - setenv autoload no
326 22:44:33.467390 - setenv initrd_high 0xffffffff
327 22:44:33.467775 - setenv fdt_high 0xffffffff
328 22:44:33.468186 - dhcp
329 22:44:33.468658 - setenv serverip 192.168.6.2
330 22:44:33.469084 - tftpboot 0x01080000 955511/tftp-deploy-cahnjw5j/kernel/uImage
331 22:44:33.469485 - tftpboot 0x08000000 955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
332 22:44:33.469880 - tftpboot 0x01070000 955511/tftp-deploy-cahnjw5j/dtb/meson-g12b-a311d-libretech-cc.dtb
333 22:44:33.470275 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/955511/extract-nfsrootfs-bh4qzraj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:44:33.470679 - bootm 0x01080000 0x08000000 0x01070000
335 22:44:33.471188 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:44:33.472756 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:44:33.473182 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 22:44:33.488526 Setting prompt string to ['lava-test: # ']
340 22:44:33.490098 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:44:33.490712 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:44:33.491273 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:44:33.491807 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:44:33.492991 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 22:44:33.530075 >> OK - accepted request
346 22:44:33.532124 Returned 0 in 0 seconds
347 22:44:33.633186 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:44:33.634295 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:44:33.634658 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:44:33.634978 Setting prompt string to ['Hit any key to stop autoboot']
352 22:44:33.635257 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:44:33.636272 Trying 192.168.56.21...
354 22:44:33.636587 Connected to conserv1.
355 22:44:33.636975 Escape character is '^]'.
356 22:44:33.637205
357 22:44:33.637439 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:44:33.637685
359 22:44:45.345442 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 22:44:45.345884 bl2_stage_init 0x01
361 22:44:45.346230 bl2_stage_init 0x81
362 22:44:45.350999 hw id: 0x0000 - pwm id 0x01
363 22:44:45.351398 bl2_stage_init 0xc1
364 22:44:45.351666 bl2_stage_init 0x02
365 22:44:45.351921
366 22:44:45.356663 L0:00000000
367 22:44:45.357069 L1:20000703
368 22:44:45.357326 L2:00008067
369 22:44:45.357644 L3:14000000
370 22:44:45.362196 B2:00402000
371 22:44:45.362595 B1:e0f83180
372 22:44:45.362847
373 22:44:45.363082 TE: 58158
374 22:44:45.363312
375 22:44:45.367856 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 22:44:45.368204
377 22:44:45.368443 Board ID = 1
378 22:44:45.373397 Set A53 clk to 24M
379 22:44:45.373797 Set A73 clk to 24M
380 22:44:45.374044 Set clk81 to 24M
381 22:44:45.378996 A53 clk: 1200 MHz
382 22:44:45.379385 A73 clk: 1200 MHz
383 22:44:45.379624 CLK81: 166.6M
384 22:44:45.379854 smccc: 00012ab5
385 22:44:45.384666 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 22:44:45.390186 board id: 1
387 22:44:45.396174 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:44:45.406792 fw parse done
389 22:44:45.412729 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:44:45.455429 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:44:45.466282 PIEI prepare done
392 22:44:45.466923 fastboot data load
393 22:44:45.467144 fastboot data verify
394 22:44:45.471909 verify result: 266
395 22:44:45.477407 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 22:44:45.477955 LPDDR4 probe
397 22:44:45.478405 ddr clk to 1584MHz
398 22:44:45.485422 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:44:45.522743
400 22:44:45.523406 dmc_version 0001
401 22:44:45.529366 Check phy result
402 22:44:45.535244 INFO : End of CA training
403 22:44:45.535630 INFO : End of initialization
404 22:44:45.540956 INFO : Training has run successfully!
405 22:44:45.541337 Check phy result
406 22:44:45.546473 INFO : End of initialization
407 22:44:45.546862 INFO : End of read enable training
408 22:44:45.552048 INFO : End of fine write leveling
409 22:44:45.557697 INFO : End of Write leveling coarse delay
410 22:44:45.558060 INFO : Training has run successfully!
411 22:44:45.558294 Check phy result
412 22:44:45.563237 INFO : End of initialization
413 22:44:45.563595 INFO : End of read dq deskew training
414 22:44:45.569040 INFO : End of MPR read delay center optimization
415 22:44:45.574409 INFO : End of write delay center optimization
416 22:44:45.579948 INFO : End of read delay center optimization
417 22:44:45.580284 INFO : End of max read latency training
418 22:44:45.585529 INFO : Training has run successfully!
419 22:44:45.585837 1D training succeed
420 22:44:45.594694 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:44:45.642442 Check phy result
422 22:44:45.643002 INFO : End of initialization
423 22:44:45.664309 INFO : End of 2D read delay Voltage center optimization
424 22:44:45.684546 INFO : End of 2D read delay Voltage center optimization
425 22:44:45.736088 INFO : End of 2D write delay Voltage center optimization
426 22:44:45.785921 INFO : End of 2D write delay Voltage center optimization
427 22:44:45.791537 INFO : Training has run successfully!
428 22:44:45.792143
429 22:44:45.792621 channel==0
430 22:44:45.797128 RxClkDly_Margin_A0==88 ps 9
431 22:44:45.797663 TxDqDly_Margin_A0==98 ps 10
432 22:44:45.802713 RxClkDly_Margin_A1==88 ps 9
433 22:44:45.803239 TxDqDly_Margin_A1==98 ps 10
434 22:44:45.803702 TrainedVREFDQ_A0==74
435 22:44:45.808314 TrainedVREFDQ_A1==74
436 22:44:45.808856 VrefDac_Margin_A0==25
437 22:44:45.809318 DeviceVref_Margin_A0==40
438 22:44:45.813896 VrefDac_Margin_A1==25
439 22:44:45.814442 DeviceVref_Margin_A1==40
440 22:44:45.814899
441 22:44:45.815349
442 22:44:45.819497 channel==1
443 22:44:45.820065 RxClkDly_Margin_A0==98 ps 10
444 22:44:45.820533 TxDqDly_Margin_A0==88 ps 9
445 22:44:45.825098 RxClkDly_Margin_A1==88 ps 9
446 22:44:45.825633 TxDqDly_Margin_A1==88 ps 9
447 22:44:45.830699 TrainedVREFDQ_A0==76
448 22:44:45.831231 TrainedVREFDQ_A1==77
449 22:44:45.831692 VrefDac_Margin_A0==22
450 22:44:45.836280 DeviceVref_Margin_A0==38
451 22:44:45.836830 VrefDac_Margin_A1==24
452 22:44:45.841884 DeviceVref_Margin_A1==37
453 22:44:45.842425
454 22:44:45.842887 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:44:45.843339
456 22:44:45.875423 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 22:44:45.876136 2D training succeed
458 22:44:45.881103 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:44:45.886728 auto size-- 65535DDR cs0 size: 2048MB
460 22:44:45.887297 DDR cs1 size: 2048MB
461 22:44:45.892329 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:44:45.892889 cs0 DataBus test pass
463 22:44:45.897945 cs1 DataBus test pass
464 22:44:45.898513 cs0 AddrBus test pass
465 22:44:45.898981 cs1 AddrBus test pass
466 22:44:45.899432
467 22:44:45.903509 100bdlr_step_size ps== 420
468 22:44:45.904106 result report
469 22:44:45.909140 boot times 0Enable ddr reg access
470 22:44:45.914375 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:44:45.927849 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 22:44:46.501883 0.0;M3 CHK:0;cm4_sp_mode 0
473 22:44:46.502594 MVN_1=0x00000000
474 22:44:46.507052 MVN_2=0x00000000
475 22:44:46.512753 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 22:44:46.513371 OPS=0x10
477 22:44:46.513896 ring efuse init
478 22:44:46.514400 chipver efuse init
479 22:44:46.521179 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 22:44:46.521784 [0.018960 Inits done]
481 22:44:46.522257 secure task start!
482 22:44:46.528558 high task start!
483 22:44:46.529119 low task start!
484 22:44:46.529614 run into bl31
485 22:44:46.535192 NOTICE: BL31: v1.3(release):4fc40b1
486 22:44:46.542304 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 22:44:46.542938 NOTICE: BL31: G12A normal boot!
488 22:44:46.568547 NOTICE: BL31: BL33 decompress pass
489 22:44:46.574088 ERROR: Error initializing runtime service opteed_fast
490 22:44:47.807010
491 22:44:47.807682
492 22:44:47.816356 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 22:44:47.816924
494 22:44:47.817395 Model: Libre Computer AML-A311D-CC Alta
495 22:44:48.023795 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 22:44:48.046281 DRAM: 2 GiB (effective 3.8 GiB)
497 22:44:48.190087 Core: 408 devices, 31 uclasses, devicetree: separate
498 22:44:48.195955 WDT: Not starting watchdog@f0d0
499 22:44:48.228199 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 22:44:48.240578 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 22:44:48.245609 ** Bad device specification mmc 0 **
502 22:44:48.255938 Card did not respond to voltage select! : -110
503 22:44:48.263626 ** Bad device specification mmc 0 **
504 22:44:48.264176 Couldn't find partition mmc 0
505 22:44:48.271970 Card did not respond to voltage select! : -110
506 22:44:48.277490 ** Bad device specification mmc 0 **
507 22:44:48.278046 Couldn't find partition mmc 0
508 22:44:48.282444 Error: could not access storage.
509 22:44:49.545971 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 22:44:49.546688 bl2_stage_init 0x01
511 22:44:49.547177 bl2_stage_init 0x81
512 22:44:49.551676 hw id: 0x0000 - pwm id 0x01
513 22:44:49.552467 bl2_stage_init 0xc1
514 22:44:49.552919 bl2_stage_init 0x02
515 22:44:49.553326
516 22:44:49.557107 L0:00000000
517 22:44:49.557692 L1:20000703
518 22:44:49.558037 L2:00008067
519 22:44:49.558281 L3:14000000
520 22:44:49.560029 B2:00402000
521 22:44:49.560505 B1:e0f83180
522 22:44:49.560737
523 22:44:49.561009 TE: 58167
524 22:44:49.561483
525 22:44:49.571139 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 22:44:49.571760
527 22:44:49.572244 Board ID = 1
528 22:44:49.572668 Set A53 clk to 24M
529 22:44:49.573081 Set A73 clk to 24M
530 22:44:49.576572 Set clk81 to 24M
531 22:44:49.576948 A53 clk: 1200 MHz
532 22:44:49.577202 A73 clk: 1200 MHz
533 22:44:49.582283 CLK81: 166.6M
534 22:44:49.582673 smccc: 00012abd
535 22:44:49.587923 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 22:44:49.588510 board id: 1
537 22:44:49.596708 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 22:44:49.607186 fw parse done
539 22:44:49.613099 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:44:49.655726 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 22:44:49.666671 PIEI prepare done
542 22:44:49.667272 fastboot data load
543 22:44:49.667717 fastboot data verify
544 22:44:49.672370 verify result: 266
545 22:44:49.677909 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 22:44:49.678475 LPDDR4 probe
547 22:44:49.678904 ddr clk to 1584MHz
548 22:44:49.686213 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 22:44:49.723163
550 22:44:49.723807 dmc_version 0001
551 22:44:49.730126 Check phy result
552 22:44:49.735794 INFO : End of CA training
553 22:44:49.736389 INFO : End of initialization
554 22:44:49.741391 INFO : Training has run successfully!
555 22:44:49.741991 Check phy result
556 22:44:49.748263 INFO : End of initialization
557 22:44:49.748873 INFO : End of read enable training
558 22:44:49.752808 INFO : End of fine write leveling
559 22:44:49.758144 INFO : End of Write leveling coarse delay
560 22:44:49.758605 INFO : Training has run successfully!
561 22:44:49.759292 Check phy result
562 22:44:49.763777 INFO : End of initialization
563 22:44:49.764220 INFO : End of read dq deskew training
564 22:44:49.769254 INFO : End of MPR read delay center optimization
565 22:44:49.774863 INFO : End of write delay center optimization
566 22:44:49.780384 INFO : End of read delay center optimization
567 22:44:49.780729 INFO : End of max read latency training
568 22:44:49.786163 INFO : Training has run successfully!
569 22:44:49.786575 1D training succeed
570 22:44:49.795241 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 22:44:49.842917 Check phy result
572 22:44:49.843553 INFO : End of initialization
573 22:44:49.865427 INFO : End of 2D read delay Voltage center optimization
574 22:44:49.884726 INFO : End of 2D read delay Voltage center optimization
575 22:44:49.936662 INFO : End of 2D write delay Voltage center optimization
576 22:44:49.985969 INFO : End of 2D write delay Voltage center optimization
577 22:44:49.991440 INFO : Training has run successfully!
578 22:44:49.992132
579 22:44:49.992585 channel==0
580 22:44:49.997004 RxClkDly_Margin_A0==88 ps 9
581 22:44:49.997552 TxDqDly_Margin_A0==98 ps 10
582 22:44:50.000265 RxClkDly_Margin_A1==88 ps 9
583 22:44:50.000799 TxDqDly_Margin_A1==98 ps 10
584 22:44:50.005806 TrainedVREFDQ_A0==74
585 22:44:50.006934 TrainedVREFDQ_A1==75
586 22:44:50.011522 VrefDac_Margin_A0==24
587 22:44:50.012223 DeviceVref_Margin_A0==40
588 22:44:50.012677 VrefDac_Margin_A1==25
589 22:44:50.017063 DeviceVref_Margin_A1==39
590 22:44:50.017655
591 22:44:50.018094
592 22:44:50.018512 channel==1
593 22:44:50.018918 RxClkDly_Margin_A0==98 ps 10
594 22:44:50.022628 TxDqDly_Margin_A0==98 ps 10
595 22:44:50.023198 RxClkDly_Margin_A1==88 ps 9
596 22:44:50.028167 TxDqDly_Margin_A1==88 ps 9
597 22:44:50.028720 TrainedVREFDQ_A0==77
598 22:44:50.029144 TrainedVREFDQ_A1==77
599 22:44:50.033780 VrefDac_Margin_A0==23
600 22:44:50.034335 DeviceVref_Margin_A0==37
601 22:44:50.039469 VrefDac_Margin_A1==24
602 22:44:50.040096 DeviceVref_Margin_A1==37
603 22:44:50.040618
604 22:44:50.045077 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 22:44:50.045678
606 22:44:50.072993 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 22:44:50.079177 2D training succeed
608 22:44:50.084192 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 22:44:50.084640 auto size-- 65535DDR cs0 size: 2048MB
610 22:44:50.089842 DDR cs1 size: 2048MB
611 22:44:50.090477 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 22:44:50.095484 cs0 DataBus test pass
613 22:44:50.096173 cs1 DataBus test pass
614 22:44:50.096476 cs0 AddrBus test pass
615 22:44:50.101008 cs1 AddrBus test pass
616 22:44:50.101636
617 22:44:50.102067 100bdlr_step_size ps== 420
618 22:44:50.102492 result report
619 22:44:50.106868 boot times 0Enable ddr reg access
620 22:44:50.114294 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 22:44:50.127962 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 22:44:50.699624 0.0;M3 CHK:0;cm4_sp_mode 0
623 22:44:50.700329 MVN_1=0x00000000
624 22:44:50.705290 MVN_2=0x00000000
625 22:44:50.710883 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 22:44:50.711316 OPS=0x10
627 22:44:50.711601 ring efuse init
628 22:44:50.711859 chipver efuse init
629 22:44:50.716428 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 22:44:50.722026 [0.018961 Inits done]
631 22:44:50.722439 secure task start!
632 22:44:50.722701 high task start!
633 22:44:50.726687 low task start!
634 22:44:50.727096 run into bl31
635 22:44:50.733256 NOTICE: BL31: v1.3(release):4fc40b1
636 22:44:50.741085 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 22:44:50.741455 NOTICE: BL31: G12A normal boot!
638 22:44:50.766461 NOTICE: BL31: BL33 decompress pass
639 22:44:50.772151 ERROR: Error initializing runtime service opteed_fast
640 22:44:52.005020
641 22:44:52.005639
642 22:44:52.012420 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 22:44:52.012898
644 22:44:52.013319 Model: Libre Computer AML-A311D-CC Alta
645 22:44:52.221936 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 22:44:52.245186 DRAM: 2 GiB (effective 3.8 GiB)
647 22:44:52.388249 Core: 408 devices, 31 uclasses, devicetree: separate
648 22:44:52.394056 WDT: Not starting watchdog@f0d0
649 22:44:52.426440 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 22:44:52.438797 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 22:44:52.443901 ** Bad device specification mmc 0 **
652 22:44:52.454240 Card did not respond to voltage select! : -110
653 22:44:52.461905 ** Bad device specification mmc 0 **
654 22:44:52.462438 Couldn't find partition mmc 0
655 22:44:52.470123 Card did not respond to voltage select! : -110
656 22:44:52.475620 ** Bad device specification mmc 0 **
657 22:44:52.476136 Couldn't find partition mmc 0
658 22:44:52.480692 Error: could not access storage.
659 22:44:52.823217 Net: eth0: ethernet@ff3f0000
660 22:44:52.823835 starting USB...
661 22:44:53.074998 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 22:44:53.075536 Starting the controller
663 22:44:53.081978 USB XHCI 1.10
664 22:44:54.676769 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 22:44:54.677421 bl2_stage_init 0x01
666 22:44:54.677898 bl2_stage_init 0x81
667 22:44:54.682276 hw id: 0x0000 - pwm id 0x01
668 22:44:54.682786 bl2_stage_init 0xc1
669 22:44:54.683237 bl2_stage_init 0x02
670 22:44:54.683662
671 22:44:54.687838 L0:00000000
672 22:44:54.688389 L1:20000703
673 22:44:54.688827 L2:00008067
674 22:44:54.689286 L3:14000000
675 22:44:54.693574 B2:00402000
676 22:44:54.694082 B1:e0f83180
677 22:44:54.694527
678 22:44:54.694963 TE: 58124
679 22:44:54.695403
680 22:44:54.699158 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 22:44:54.699843
682 22:44:54.700359 Board ID = 1
683 22:44:54.704653 Set A53 clk to 24M
684 22:44:54.705152 Set A73 clk to 24M
685 22:44:54.705587 Set clk81 to 24M
686 22:44:54.710304 A53 clk: 1200 MHz
687 22:44:54.710867 A73 clk: 1200 MHz
688 22:44:54.711315 CLK81: 166.6M
689 22:44:54.711746 smccc: 00012a92
690 22:44:54.715938 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 22:44:54.721444 board id: 1
692 22:44:54.727397 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 22:44:54.738231 fw parse done
694 22:44:54.744018 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:44:54.786675 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 22:44:54.797635 PIEI prepare done
697 22:44:54.798081 fastboot data load
698 22:44:54.798323 fastboot data verify
699 22:44:54.803314 verify result: 266
700 22:44:54.808945 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 22:44:54.809357 LPDDR4 probe
702 22:44:54.809590 ddr clk to 1584MHz
703 22:44:54.816773 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 22:44:54.854128
705 22:44:54.854782 dmc_version 0001
706 22:44:54.860732 Check phy result
707 22:44:54.866592 INFO : End of CA training
708 22:44:54.867212 INFO : End of initialization
709 22:44:54.872309 INFO : Training has run successfully!
710 22:44:54.872922 Check phy result
711 22:44:54.877772 INFO : End of initialization
712 22:44:54.878364 INFO : End of read enable training
713 22:44:54.883317 INFO : End of fine write leveling
714 22:44:54.888925 INFO : End of Write leveling coarse delay
715 22:44:54.889415 INFO : Training has run successfully!
716 22:44:54.889833 Check phy result
717 22:44:54.894479 INFO : End of initialization
718 22:44:54.894979 INFO : End of read dq deskew training
719 22:44:54.900209 INFO : End of MPR read delay center optimization
720 22:44:54.905703 INFO : End of write delay center optimization
721 22:44:54.911314 INFO : End of read delay center optimization
722 22:44:54.911792 INFO : End of max read latency training
723 22:44:54.916935 INFO : Training has run successfully!
724 22:44:54.917422 1D training succeed
725 22:44:54.926135 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 22:44:54.973785 Check phy result
727 22:44:54.974419 INFO : End of initialization
728 22:44:54.996385 INFO : End of 2D read delay Voltage center optimization
729 22:44:55.016984 INFO : End of 2D read delay Voltage center optimization
730 22:44:55.068662 INFO : End of 2D write delay Voltage center optimization
731 22:44:55.118152 INFO : End of 2D write delay Voltage center optimization
732 22:44:55.123679 INFO : Training has run successfully!
733 22:44:55.124228
734 22:44:55.124651 channel==0
735 22:44:55.129456 RxClkDly_Margin_A0==88 ps 9
736 22:44:55.129926 TxDqDly_Margin_A0==98 ps 10
737 22:44:55.132624 RxClkDly_Margin_A1==88 ps 9
738 22:44:55.133080 TxDqDly_Margin_A1==88 ps 9
739 22:44:55.138196 TrainedVREFDQ_A0==74
740 22:44:55.138674 TrainedVREFDQ_A1==74
741 22:44:55.139087 VrefDac_Margin_A0==24
742 22:44:55.143793 DeviceVref_Margin_A0==40
743 22:44:55.144284 VrefDac_Margin_A1==25
744 22:44:55.149407 DeviceVref_Margin_A1==40
745 22:44:55.149888
746 22:44:55.150305
747 22:44:55.150709 channel==1
748 22:44:55.151100 RxClkDly_Margin_A0==98 ps 10
749 22:44:55.154979 TxDqDly_Margin_A0==98 ps 10
750 22:44:55.155472 RxClkDly_Margin_A1==98 ps 10
751 22:44:55.160608 TxDqDly_Margin_A1==88 ps 9
752 22:44:55.161165 TrainedVREFDQ_A0==77
753 22:44:55.161581 TrainedVREFDQ_A1==77
754 22:44:55.166137 VrefDac_Margin_A0==22
755 22:44:55.166598 DeviceVref_Margin_A0==37
756 22:44:55.171768 VrefDac_Margin_A1==22
757 22:44:55.172261 DeviceVref_Margin_A1==37
758 22:44:55.172669
759 22:44:55.177420 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 22:44:55.177894
761 22:44:55.205312 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 22:44:55.210843 2D training succeed
763 22:44:55.216457 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 22:44:55.216948 auto size-- 65535DDR cs0 size: 2048MB
765 22:44:55.222058 DDR cs1 size: 2048MB
766 22:44:55.222538 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 22:44:55.227641 cs0 DataBus test pass
768 22:44:55.228472 cs1 DataBus test pass
769 22:44:55.228916 cs0 AddrBus test pass
770 22:44:55.233233 cs1 AddrBus test pass
771 22:44:55.233707
772 22:44:55.234121 100bdlr_step_size ps== 420
773 22:44:55.234538 result report
774 22:44:55.238864 boot times 0Enable ddr reg access
775 22:44:55.246453 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 22:44:55.260025 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 22:44:55.833640 0.0;M3 CHK:0;cm4_sp_mode 0
778 22:44:55.834255 MVN_1=0x00000000
779 22:44:55.839237 MVN_2=0x00000000
780 22:44:55.844880 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 22:44:55.845415 OPS=0x10
782 22:44:55.845821 ring efuse init
783 22:44:55.846211 chipver efuse init
784 22:44:55.853290 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 22:44:55.853752 [0.018961 Inits done]
786 22:44:55.854143 secure task start!
787 22:44:55.860679 high task start!
788 22:44:55.861207 low task start!
789 22:44:55.861603 run into bl31
790 22:44:55.867298 NOTICE: BL31: v1.3(release):4fc40b1
791 22:44:55.875119 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 22:44:55.875598 NOTICE: BL31: G12A normal boot!
793 22:44:55.900545 NOTICE: BL31: BL33 decompress pass
794 22:44:55.906191 ERROR: Error initializing runtime service opteed_fast
795 22:44:57.247559
796 22:44:57.248204
797 22:44:57.250621 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 22:44:57.251089
799 22:44:57.251511 Model: Libre Computer AML-A311D-CC Alta
800 22:44:57.355937 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 22:44:57.379371 DRAM: 2 GiB (effective 3.8 GiB)
802 22:44:57.522391 Core: 408 devices, 31 uclasses, devicetree: separate
803 22:44:57.528161 WDT: Not starting watchdog@f0d0
804 22:44:57.560427 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 22:44:57.572896 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 22:44:57.577836 ** Bad device specification mmc 0 **
807 22:44:57.588184 Card did not respond to voltage select! : -110
808 22:44:57.595839 ** Bad device specification mmc 0 **
809 22:44:57.596374 Couldn't find partition mmc 0
810 22:44:57.604176 Card did not respond to voltage select! : -110
811 22:44:57.609673 ** Bad device specification mmc 0 **
812 22:44:57.610147 Couldn't find partition mmc 0
813 22:44:57.614732 Error: could not access storage.
814 22:44:57.957222 Net: eth0: ethernet@ff3f0000
815 22:44:57.957841 starting USB...
816 22:44:58.209101 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 22:44:58.209736 Starting the controller
818 22:44:58.216028 USB XHCI 1.10
819 22:45:00.376428 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 22:45:00.376834 bl2_stage_init 0x01
821 22:45:00.377081 bl2_stage_init 0x81
822 22:45:00.381654 hw id: 0x0000 - pwm id 0x01
823 22:45:00.381984 bl2_stage_init 0xc1
824 22:45:00.382225 bl2_stage_init 0x02
825 22:45:00.382457
826 22:45:00.387286 L0:00000000
827 22:45:00.387611 L1:20000703
828 22:45:00.387854 L2:00008067
829 22:45:00.388135 L3:14000000
830 22:45:00.393023 B2:00402000
831 22:45:00.393362 B1:e0f83180
832 22:45:00.393596
833 22:45:00.393822 TE: 58124
834 22:45:00.394052
835 22:45:00.398521 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 22:45:00.398835
837 22:45:00.399072 Board ID = 1
838 22:45:00.404179 Set A53 clk to 24M
839 22:45:00.404491 Set A73 clk to 24M
840 22:45:00.404730 Set clk81 to 24M
841 22:45:00.412124 A53 clk: 1200 MHz
842 22:45:00.412495 A73 clk: 1200 MHz
843 22:45:00.412742 CLK81: 166.6M
844 22:45:00.412978 smccc: 00012a92
845 22:45:00.415297 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 22:45:00.420998 board id: 1
847 22:45:00.426886 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 22:45:00.437295 fw parse done
849 22:45:00.443264 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:45:00.485900 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 22:45:00.496810 PIEI prepare done
852 22:45:00.497334 fastboot data load
853 22:45:00.497623 fastboot data verify
854 22:45:00.502512 verify result: 266
855 22:45:00.508093 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 22:45:00.508482 LPDDR4 probe
857 22:45:00.508727 ddr clk to 1584MHz
858 22:45:00.516108 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 22:45:00.553334
860 22:45:00.553935 dmc_version 0001
861 22:45:00.560036 Check phy result
862 22:45:00.565875 INFO : End of CA training
863 22:45:00.566260 INFO : End of initialization
864 22:45:00.571432 INFO : Training has run successfully!
865 22:45:00.571811 Check phy result
866 22:45:00.577016 INFO : End of initialization
867 22:45:00.577368 INFO : End of read enable training
868 22:45:00.582643 INFO : End of fine write leveling
869 22:45:00.588208 INFO : End of Write leveling coarse delay
870 22:45:00.588687 INFO : Training has run successfully!
871 22:45:00.588964 Check phy result
872 22:45:00.593856 INFO : End of initialization
873 22:45:00.594334 INFO : End of read dq deskew training
874 22:45:00.599420 INFO : End of MPR read delay center optimization
875 22:45:00.605028 INFO : End of write delay center optimization
876 22:45:00.610626 INFO : End of read delay center optimization
877 22:45:00.610985 INFO : End of max read latency training
878 22:45:00.616247 INFO : Training has run successfully!
879 22:45:00.616788 1D training succeed
880 22:45:00.625429 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 22:45:00.673071 Check phy result
882 22:45:00.673510 INFO : End of initialization
883 22:45:00.695573 INFO : End of 2D read delay Voltage center optimization
884 22:45:00.715856 INFO : End of 2D read delay Voltage center optimization
885 22:45:00.767879 INFO : End of 2D write delay Voltage center optimization
886 22:45:00.817187 INFO : End of 2D write delay Voltage center optimization
887 22:45:00.822800 INFO : Training has run successfully!
888 22:45:00.823137
889 22:45:00.823382 channel==0
890 22:45:00.828358 RxClkDly_Margin_A0==88 ps 9
891 22:45:00.828890 TxDqDly_Margin_A0==98 ps 10
892 22:45:00.833934 RxClkDly_Margin_A1==88 ps 9
893 22:45:00.834386 TxDqDly_Margin_A1==88 ps 9
894 22:45:00.834814 TrainedVREFDQ_A0==74
895 22:45:00.839573 TrainedVREFDQ_A1==74
896 22:45:00.840124 VrefDac_Margin_A0==25
897 22:45:00.840533 DeviceVref_Margin_A0==40
898 22:45:00.845174 VrefDac_Margin_A1==24
899 22:45:00.845622 DeviceVref_Margin_A1==40
900 22:45:00.846010
901 22:45:00.846398
902 22:45:00.846784 channel==1
903 22:45:00.850780 RxClkDly_Margin_A0==98 ps 10
904 22:45:00.851211 TxDqDly_Margin_A0==98 ps 10
905 22:45:00.856345 RxClkDly_Margin_A1==98 ps 10
906 22:45:00.856775 TxDqDly_Margin_A1==88 ps 9
907 22:45:00.861928 TrainedVREFDQ_A0==77
908 22:45:00.862376 TrainedVREFDQ_A1==77
909 22:45:00.862768 VrefDac_Margin_A0==22
910 22:45:00.867531 DeviceVref_Margin_A0==37
911 22:45:00.867960 VrefDac_Margin_A1==22
912 22:45:00.873110 DeviceVref_Margin_A1==37
913 22:45:00.873530
914 22:45:00.873921 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 22:45:00.874310
916 22:45:00.906807 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000018 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
917 22:45:00.907389 2D training succeed
918 22:45:00.912343 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 22:45:00.917956 auto size-- 65535DDR cs0 size: 2048MB
920 22:45:00.918387 DDR cs1 size: 2048MB
921 22:45:00.923516 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 22:45:00.923934 cs0 DataBus test pass
923 22:45:00.929137 cs1 DataBus test pass
924 22:45:00.929555 cs0 AddrBus test pass
925 22:45:00.929941 cs1 AddrBus test pass
926 22:45:00.930321
927 22:45:00.934780 100bdlr_step_size ps== 420
928 22:45:00.935208 result report
929 22:45:00.940334 boot times 0Enable ddr reg access
930 22:45:00.945675 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 22:45:00.959182 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 22:45:01.533029 0.0;M3 CHK:0;cm4_sp_mode 0
933 22:45:01.533651 MVN_1=0x00000000
934 22:45:01.538333 MVN_2=0x00000000
935 22:45:01.544087 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 22:45:01.544540 OPS=0x10
937 22:45:01.544937 ring efuse init
938 22:45:01.545321 chipver efuse init
939 22:45:01.549689 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 22:45:01.555306 [0.018961 Inits done]
941 22:45:01.555736 secure task start!
942 22:45:01.556222 high task start!
943 22:45:01.559867 low task start!
944 22:45:01.560328 run into bl31
945 22:45:01.566564 NOTICE: BL31: v1.3(release):4fc40b1
946 22:45:01.574349 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 22:45:01.574847 NOTICE: BL31: G12A normal boot!
948 22:45:01.599846 NOTICE: BL31: BL33 decompress pass
949 22:45:01.605475 ERROR: Error initializing runtime service opteed_fast
950 22:45:02.838435
951 22:45:02.838888
952 22:45:02.846796 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 22:45:02.847220
954 22:45:02.847438 Model: Libre Computer AML-A311D-CC Alta
955 22:45:03.055347 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 22:45:03.078645 DRAM: 2 GiB (effective 3.8 GiB)
957 22:45:03.221561 Core: 408 devices, 31 uclasses, devicetree: separate
958 22:45:03.227453 WDT: Not starting watchdog@f0d0
959 22:45:03.259745 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 22:45:03.272267 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 22:45:03.277160 ** Bad device specification mmc 0 **
962 22:45:03.287531 Card did not respond to voltage select! : -110
963 22:45:03.295183 ** Bad device specification mmc 0 **
964 22:45:03.295695 Couldn't find partition mmc 0
965 22:45:03.303504 Card did not respond to voltage select! : -110
966 22:45:03.309028 ** Bad device specification mmc 0 **
967 22:45:03.309521 Couldn't find partition mmc 0
968 22:45:03.314061 Error: could not access storage.
969 22:45:03.656514 Net: eth0: ethernet@ff3f0000
970 22:45:03.657101 starting USB...
971 22:45:03.908352 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 22:45:03.908876 Starting the controller
973 22:45:03.915363 USB XHCI 1.10
974 22:45:05.469510 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 22:45:05.477822 scanning usb for storage devices... 0 Storage Device(s) found
977 22:45:05.529043 Hit any key to stop autoboot: 1
978 22:45:05.529940 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 22:45:05.530328 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 22:45:05.530615 Setting prompt string to ['=>']
981 22:45:05.530900 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 22:45:05.545429 0
983 22:45:05.546185 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 22:45:05.546512 Sending with 10 millisecond of delay
986 22:45:06.684294 => setenv autoload no
987 22:45:06.695224 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 22:45:06.698081 setenv autoload no
989 22:45:06.698816 Sending with 10 millisecond of delay
991 22:45:08.497643 => setenv initrd_high 0xffffffff
992 22:45:08.508477 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 22:45:08.509205 setenv initrd_high 0xffffffff
994 22:45:08.509800 Sending with 10 millisecond of delay
996 22:45:10.126503 => setenv fdt_high 0xffffffff
997 22:45:10.137350 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 22:45:10.138268 setenv fdt_high 0xffffffff
999 22:45:10.139035 Sending with 10 millisecond of delay
1001 22:45:10.430990 => dhcp
1002 22:45:10.441846 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 22:45:10.442768 dhcp
1004 22:45:10.443250 Speed: 1000, full duplex
1005 22:45:10.443712 BOOTP broadcast 1
1006 22:45:10.451900 DHCP client bound to address 192.168.6.27 (9 ms)
1007 22:45:10.452750 Sending with 10 millisecond of delay
1009 22:45:12.129731 => setenv serverip 192.168.6.2
1010 22:45:12.140581 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 22:45:12.141541 setenv serverip 192.168.6.2
1012 22:45:12.142290 Sending with 10 millisecond of delay
1014 22:45:15.866196 => tftpboot 0x01080000 955511/tftp-deploy-cahnjw5j/kernel/uImage
1015 22:45:15.877047 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 22:45:15.877953 tftpboot 0x01080000 955511/tftp-deploy-cahnjw5j/kernel/uImage
1017 22:45:15.878445 Speed: 1000, full duplex
1018 22:45:15.878909 Using ethernet@ff3f0000 device
1019 22:45:15.880138 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 22:45:15.885462 Filename '955511/tftp-deploy-cahnjw5j/kernel/uImage'.
1021 22:45:15.889436 Load address: 0x1080000
1022 22:45:18.745642 Loading: *################################################## 43.6 MiB
1023 22:45:18.746060 15.2 MiB/s
1024 22:45:18.746288 done
1025 22:45:18.750056 Bytes transferred = 45713984 (2b98a40 hex)
1026 22:45:18.750566 Sending with 10 millisecond of delay
1028 22:45:23.436345 => tftpboot 0x08000000 955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
1029 22:45:23.447306 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 22:45:23.448353 tftpboot 0x08000000 955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot
1031 22:45:23.448939 Speed: 1000, full duplex
1032 22:45:23.449471 Using ethernet@ff3f0000 device
1033 22:45:23.450351 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 22:45:23.458731 Filename '955511/tftp-deploy-cahnjw5j/ramdisk/ramdisk.cpio.gz.uboot'.
1035 22:45:23.459323 Load address: 0x8000000
1036 22:45:28.206273 Loading: *################## UDP wrong checksum 000000ff 0000e59e
1037 22:45:28.270433 UDP wrong checksum 000000ff 00006f91
1038 22:45:29.963174 T ############################### UDP wrong checksum 00000005 00000eb7
1039 22:45:34.965362 T UDP wrong checksum 00000005 00000eb7
1040 22:45:44.967180 T T UDP wrong checksum 00000005 00000eb7
1041 22:46:04.971251 T T T T UDP wrong checksum 00000005 00000eb7
1042 22:46:15.872735 T T UDP wrong checksum 000000ff 0000f430
1043 22:46:15.883049 UDP wrong checksum 000000ff 00008b23
1044 22:46:16.520615 UDP wrong checksum 000000ff 00006cd6
1045 22:46:16.560641 UDP wrong checksum 000000ff 0000fcc8
1046 22:46:19.975652
1047 22:46:19.976333 Retry count exceeded; starting again
1049 22:46:19.977780 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1052 22:46:19.979581 end: 2.4 uboot-commands (duration 00:01:46) [common]
1054 22:46:19.980979 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 22:46:19.982002 end: 2 uboot-action (duration 00:01:47) [common]
1058 22:46:19.983530 Cleaning after the job
1059 22:46:19.984110 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/ramdisk
1060 22:46:19.985435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/kernel
1061 22:46:20.031847 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/dtb
1062 22:46:20.032790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/nfsrootfs
1063 22:46:20.061655 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955511/tftp-deploy-cahnjw5j/modules
1064 22:46:20.065349 start: 4.1 power-off (timeout 00:00:30) [common]
1065 22:46:20.065940 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 22:46:20.100394 >> OK - accepted request
1067 22:46:20.102519 Returned 0 in 0 seconds
1068 22:46:20.203222 end: 4.1 power-off (duration 00:00:00) [common]
1070 22:46:20.204175 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 22:46:20.204821 Listened to connection for namespace 'common' for up to 1s
1072 22:46:21.205803 Finalising connection for namespace 'common'
1073 22:46:21.206532 Disconnecting from shell: Finalise
1074 22:46:21.207058 =>
1075 22:46:21.308163 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 22:46:21.308809 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955511
1077 22:46:24.173237 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955511
1078 22:46:24.173835 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.