Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:56:39.955928 lava-dispatcher, installed at version: 2024.01
2 01:56:39.956768 start: 0 validate
3 01:56:39.957248 Start time: 2024-11-08 01:56:39.957217+00:00 (UTC)
4 01:56:39.957803 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:56:39.958339 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 01:56:40.000470 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:56:40.001013 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:56:40.033036 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:56:40.033691 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:56:40.065816 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:56:40.066612 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 01:56:40.103055 validate duration: 0.15
14 01:56:40.103894 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:56:40.104260 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:56:40.104575 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:56:40.105150 Not decompressing ramdisk as can be used compressed.
18 01:56:40.105577 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 01:56:40.105821 saving as /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/ramdisk/rootfs.cpio.gz
20 01:56:40.106079 total size: 47897469 (45 MB)
21 01:56:40.145206 progress 0 % (0 MB)
22 01:56:40.177641 progress 5 % (2 MB)
23 01:56:40.208958 progress 10 % (4 MB)
24 01:56:40.239441 progress 15 % (6 MB)
25 01:56:40.270476 progress 20 % (9 MB)
26 01:56:40.300948 progress 25 % (11 MB)
27 01:56:40.331449 progress 30 % (13 MB)
28 01:56:40.362070 progress 35 % (16 MB)
29 01:56:40.394466 progress 40 % (18 MB)
30 01:56:40.425402 progress 45 % (20 MB)
31 01:56:40.455840 progress 50 % (22 MB)
32 01:56:40.486230 progress 55 % (25 MB)
33 01:56:40.517294 progress 60 % (27 MB)
34 01:56:40.547835 progress 65 % (29 MB)
35 01:56:40.578925 progress 70 % (32 MB)
36 01:56:40.609402 progress 75 % (34 MB)
37 01:56:40.639583 progress 80 % (36 MB)
38 01:56:40.673308 progress 85 % (38 MB)
39 01:56:40.704010 progress 90 % (41 MB)
40 01:56:40.734867 progress 95 % (43 MB)
41 01:56:40.764881 progress 100 % (45 MB)
42 01:56:40.765671 45 MB downloaded in 0.66 s (69.25 MB/s)
43 01:56:40.766290 end: 1.1.1 http-download (duration 00:00:01) [common]
45 01:56:40.767257 end: 1.1 download-retry (duration 00:00:01) [common]
46 01:56:40.767578 start: 1.2 download-retry (timeout 00:09:59) [common]
47 01:56:40.767870 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 01:56:40.768397 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/kernel/Image
49 01:56:40.768666 saving as /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/kernel/Image
50 01:56:40.768893 total size: 45713920 (43 MB)
51 01:56:40.769120 No compression specified
52 01:56:40.810013 progress 0 % (0 MB)
53 01:56:40.848719 progress 5 % (2 MB)
54 01:56:40.887797 progress 10 % (4 MB)
55 01:56:40.921858 progress 15 % (6 MB)
56 01:56:40.958285 progress 20 % (8 MB)
57 01:56:40.990137 progress 25 % (10 MB)
58 01:56:41.021241 progress 30 % (13 MB)
59 01:56:41.053574 progress 35 % (15 MB)
60 01:56:41.082762 progress 40 % (17 MB)
61 01:56:41.111308 progress 45 % (19 MB)
62 01:56:41.141156 progress 50 % (21 MB)
63 01:56:41.171442 progress 55 % (24 MB)
64 01:56:41.200666 progress 60 % (26 MB)
65 01:56:41.231416 progress 65 % (28 MB)
66 01:56:41.260965 progress 70 % (30 MB)
67 01:56:41.291351 progress 75 % (32 MB)
68 01:56:41.322949 progress 80 % (34 MB)
69 01:56:41.361013 progress 85 % (37 MB)
70 01:56:41.409395 progress 90 % (39 MB)
71 01:56:41.460537 progress 95 % (41 MB)
72 01:56:41.498588 progress 100 % (43 MB)
73 01:56:41.504178 43 MB downloaded in 0.74 s (59.29 MB/s)
74 01:56:41.504774 end: 1.2.1 http-download (duration 00:00:01) [common]
76 01:56:41.506052 end: 1.2 download-retry (duration 00:00:01) [common]
77 01:56:41.506433 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:56:41.506797 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:56:41.507587 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 01:56:41.507930 saving as /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/dtb/meson-g12b-a311d-libretech-cc.dtb
81 01:56:41.508273 total size: 54703 (0 MB)
82 01:56:41.508553 No compression specified
83 01:56:41.553202 progress 59 % (0 MB)
84 01:56:41.554263 progress 100 % (0 MB)
85 01:56:41.554993 0 MB downloaded in 0.05 s (1.12 MB/s)
86 01:56:41.555613 end: 1.3.1 http-download (duration 00:00:00) [common]
88 01:56:41.556694 end: 1.3 download-retry (duration 00:00:00) [common]
89 01:56:41.557050 start: 1.4 download-retry (timeout 00:09:59) [common]
90 01:56:41.557383 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 01:56:41.557985 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/modules.tar.xz
92 01:56:41.558340 saving as /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/modules/modules.tar
93 01:56:41.558604 total size: 11616160 (11 MB)
94 01:56:41.558874 Using unxz to decompress xz
95 01:56:41.594677 progress 0 % (0 MB)
96 01:56:41.662807 progress 5 % (0 MB)
97 01:56:41.739034 progress 10 % (1 MB)
98 01:56:41.837913 progress 15 % (1 MB)
99 01:56:41.930162 progress 20 % (2 MB)
100 01:56:42.011237 progress 25 % (2 MB)
101 01:56:42.088330 progress 30 % (3 MB)
102 01:56:42.166753 progress 35 % (3 MB)
103 01:56:42.239687 progress 40 % (4 MB)
104 01:56:42.316604 progress 45 % (5 MB)
105 01:56:42.401734 progress 50 % (5 MB)
106 01:56:42.479314 progress 55 % (6 MB)
107 01:56:42.565599 progress 60 % (6 MB)
108 01:56:42.647214 progress 65 % (7 MB)
109 01:56:42.727535 progress 70 % (7 MB)
110 01:56:42.805764 progress 75 % (8 MB)
111 01:56:42.889480 progress 80 % (8 MB)
112 01:56:42.969945 progress 85 % (9 MB)
113 01:56:43.053386 progress 90 % (10 MB)
114 01:56:43.127598 progress 95 % (10 MB)
115 01:56:43.205325 progress 100 % (11 MB)
116 01:56:43.218459 11 MB downloaded in 1.66 s (6.67 MB/s)
117 01:56:43.219200 end: 1.4.1 http-download (duration 00:00:02) [common]
119 01:56:43.220733 end: 1.4 download-retry (duration 00:00:02) [common]
120 01:56:43.221588 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 01:56:43.222348 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 01:56:43.223156 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 01:56:43.223900 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 01:56:43.225461 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n
125 01:56:43.226686 makedir: /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin
126 01:56:43.227659 makedir: /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/tests
127 01:56:43.228616 makedir: /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/results
128 01:56:43.229516 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-add-keys
129 01:56:43.230850 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-add-sources
130 01:56:43.232195 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-background-process-start
131 01:56:43.233513 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-background-process-stop
132 01:56:43.234929 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-common-functions
133 01:56:43.236262 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-echo-ipv4
134 01:56:43.237422 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-install-packages
135 01:56:43.238465 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-installed-packages
136 01:56:43.239565 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-os-build
137 01:56:43.240928 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-probe-channel
138 01:56:43.242328 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-probe-ip
139 01:56:43.243680 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-target-ip
140 01:56:43.245088 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-target-mac
141 01:56:43.246422 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-target-storage
142 01:56:43.247855 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-case
143 01:56:43.249353 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-event
144 01:56:43.250713 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-feedback
145 01:56:43.252133 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-raise
146 01:56:43.252902 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-reference
147 01:56:43.253586 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-runner
148 01:56:43.254253 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-set
149 01:56:43.254918 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-test-shell
150 01:56:43.255586 Updating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-install-packages (oe)
151 01:56:43.256263 Updating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/bin/lava-installed-packages (oe)
152 01:56:43.256883 Creating /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/environment
153 01:56:43.257410 LAVA metadata
154 01:56:43.257745 - LAVA_JOB_ID=956735
155 01:56:43.258025 - LAVA_DISPATCHER_IP=192.168.6.2
156 01:56:43.258503 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 01:56:43.259870 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 01:56:43.260316 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 01:56:43.260591 skipped lava-vland-overlay
160 01:56:43.260899 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 01:56:43.261237 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 01:56:43.261520 skipped lava-multinode-overlay
163 01:56:43.261831 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 01:56:43.262152 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 01:56:43.262490 Loading test definitions
166 01:56:43.262859 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 01:56:43.263148 Using /lava-956735 at stage 0
168 01:56:43.264633 uuid=956735_1.5.2.4.1 testdef=None
169 01:56:43.265008 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 01:56:43.265384 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 01:56:43.267648 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 01:56:43.268703 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 01:56:43.271534 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 01:56:43.272696 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 01:56:43.275436 runner path: /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/0/tests/0_igt-gpu-panfrost test_uuid 956735_1.5.2.4.1
178 01:56:43.276186 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 01:56:43.277230 Creating lava-test-runner.conf files
181 01:56:43.277504 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956735/lava-overlay-jwfoxx9n/lava-956735/0 for stage 0
182 01:56:43.277961 - 0_igt-gpu-panfrost
183 01:56:43.278429 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 01:56:43.278820 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 01:56:43.309425 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 01:56:43.309927 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 01:56:43.310283 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 01:56:43.310634 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 01:56:43.310960 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 01:56:50.588039 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 01:56:50.588481 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 01:56:50.588729 extracting modules file /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk
193 01:56:51.999480 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 01:56:51.999932 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 01:56:52.000248 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956735/compress-overlay-hmhy3o9v/overlay-1.5.2.5.tar.gz to ramdisk
196 01:56:52.000469 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956735/compress-overlay-hmhy3o9v/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk
197 01:56:52.030772 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 01:56:52.031187 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 01:56:52.031464 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 01:56:52.031693 Converting downloaded kernel to a uImage
201 01:56:52.032034 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/kernel/Image /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/kernel/uImage
202 01:56:52.508465 output: Image Name:
203 01:56:52.508887 output: Created: Fri Nov 8 01:56:52 2024
204 01:56:52.509097 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 01:56:52.509302 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 01:56:52.509504 output: Load Address: 01080000
207 01:56:52.509702 output: Entry Point: 01080000
208 01:56:52.509902 output:
209 01:56:52.510234 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 01:56:52.510501 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 01:56:52.510768 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 01:56:52.511021 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 01:56:52.511280 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 01:56:52.511538 Building ramdisk /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk
215 01:56:59.522677 >> 502380 blocks
216 01:57:20.054249 Adding RAMdisk u-boot header.
217 01:57:20.054706 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk.cpio.gz.uboot
218 01:57:20.749930 output: Image Name:
219 01:57:20.750355 output: Created: Fri Nov 8 01:57:20 2024
220 01:57:20.750564 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 01:57:20.750766 output: Data Size: 65716643 Bytes = 64176.41 KiB = 62.67 MiB
222 01:57:20.750963 output: Load Address: 00000000
223 01:57:20.751161 output: Entry Point: 00000000
224 01:57:20.751356 output:
225 01:57:20.752083 rename /var/lib/lava/dispatcher/tmp/956735/extract-overlay-ramdisk-bj6946eq/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
226 01:57:20.752889 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 01:57:20.753511 end: 1.5 prepare-tftp-overlay (duration 00:00:38) [common]
228 01:57:20.754133 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 01:57:20.754636 No LXC device requested
230 01:57:20.755181 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 01:57:20.755737 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 01:57:20.756315 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 01:57:20.756768 Checking files for TFTP limit of 4294967296 bytes.
234 01:57:20.759691 end: 1 tftp-deploy (duration 00:00:41) [common]
235 01:57:20.760353 start: 2 uboot-action (timeout 00:05:00) [common]
236 01:57:20.760925 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 01:57:20.761469 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 01:57:20.762016 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 01:57:20.762594 Using kernel file from prepare-kernel: 956735/tftp-deploy-krcppgym/kernel/uImage
240 01:57:20.763259 substitutions:
241 01:57:20.763704 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 01:57:20.764178 - {DTB_ADDR}: 0x01070000
243 01:57:20.764617 - {DTB}: 956735/tftp-deploy-krcppgym/dtb/meson-g12b-a311d-libretech-cc.dtb
244 01:57:20.765060 - {INITRD}: 956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
245 01:57:20.765494 - {KERNEL_ADDR}: 0x01080000
246 01:57:20.765924 - {KERNEL}: 956735/tftp-deploy-krcppgym/kernel/uImage
247 01:57:20.766354 - {LAVA_MAC}: None
248 01:57:20.766829 - {PRESEED_CONFIG}: None
249 01:57:20.767267 - {PRESEED_LOCAL}: None
250 01:57:20.767697 - {RAMDISK_ADDR}: 0x08000000
251 01:57:20.768150 - {RAMDISK}: 956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
252 01:57:20.768588 - {ROOT_PART}: None
253 01:57:20.769017 - {ROOT}: None
254 01:57:20.769448 - {SERVER_IP}: 192.168.6.2
255 01:57:20.769880 - {TEE_ADDR}: 0x83000000
256 01:57:20.770307 - {TEE}: None
257 01:57:20.770736 Parsed boot commands:
258 01:57:20.771152 - setenv autoload no
259 01:57:20.771577 - setenv initrd_high 0xffffffff
260 01:57:20.772020 - setenv fdt_high 0xffffffff
261 01:57:20.772452 - dhcp
262 01:57:20.772879 - setenv serverip 192.168.6.2
263 01:57:20.773305 - tftpboot 0x01080000 956735/tftp-deploy-krcppgym/kernel/uImage
264 01:57:20.773733 - tftpboot 0x08000000 956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
265 01:57:20.774163 - tftpboot 0x01070000 956735/tftp-deploy-krcppgym/dtb/meson-g12b-a311d-libretech-cc.dtb
266 01:57:20.774590 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 01:57:20.775022 - bootm 0x01080000 0x08000000 0x01070000
268 01:57:20.775571 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 01:57:20.777233 start: 2.3 connect-device (timeout 00:05:00) [common]
271 01:57:20.777720 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 01:57:20.792534 Setting prompt string to ['lava-test: # ']
273 01:57:20.794166 end: 2.3 connect-device (duration 00:00:00) [common]
274 01:57:20.794810 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 01:57:20.795407 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 01:57:20.796012 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 01:57:20.797265 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 01:57:20.834547 >> OK - accepted request
279 01:57:20.836717 Returned 0 in 0 seconds
280 01:57:20.937930 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 01:57:20.939736 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 01:57:20.940412 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 01:57:20.940970 Setting prompt string to ['Hit any key to stop autoboot']
285 01:57:20.941465 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 01:57:20.943166 Trying 192.168.56.21...
287 01:57:20.943681 Connected to conserv1.
288 01:57:20.944159 Escape character is '^]'.
289 01:57:20.944611
290 01:57:20.945059 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 01:57:20.945518
292 01:57:32.306770 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 01:57:32.307434 bl2_stage_init 0x01
294 01:57:32.307898 bl2_stage_init 0x81
295 01:57:32.312193 hw id: 0x0000 - pwm id 0x01
296 01:57:32.312735 bl2_stage_init 0xc1
297 01:57:32.313190 bl2_stage_init 0x02
298 01:57:32.313641
299 01:57:32.317696 L0:00000000
300 01:57:32.318197 L1:20000703
301 01:57:32.318634 L2:00008067
302 01:57:32.319059 L3:14000000
303 01:57:32.320653 B2:00402000
304 01:57:32.321156 B1:e0f83180
305 01:57:32.321582
306 01:57:32.322007 TE: 58124
307 01:57:32.322429
308 01:57:32.331843 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 01:57:32.332194
310 01:57:32.332412 Board ID = 1
311 01:57:32.332614 Set A53 clk to 24M
312 01:57:32.332815 Set A73 clk to 24M
313 01:57:32.337377 Set clk81 to 24M
314 01:57:32.337654 A53 clk: 1200 MHz
315 01:57:32.337857 A73 clk: 1200 MHz
316 01:57:32.340836 CLK81: 166.6M
317 01:57:32.341095 smccc: 00012a92
318 01:57:32.346425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 01:57:32.351960 board id: 1
320 01:57:32.357188 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 01:57:32.367802 fw parse done
322 01:57:32.373855 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 01:57:32.416407 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 01:57:32.427311 PIEI prepare done
325 01:57:32.427853 fastboot data load
326 01:57:32.428355 fastboot data verify
327 01:57:32.432867 verify result: 266
328 01:57:32.438551 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 01:57:32.439096 LPDDR4 probe
330 01:57:32.439552 ddr clk to 1584MHz
331 01:57:32.446521 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 01:57:32.483739
333 01:57:32.484348 dmc_version 0001
334 01:57:32.490537 Check phy result
335 01:57:32.496343 INFO : End of CA training
336 01:57:32.497000 INFO : End of initialization
337 01:57:32.501817 INFO : Training has run successfully!
338 01:57:32.502220 Check phy result
339 01:57:32.507505 INFO : End of initialization
340 01:57:32.507836 INFO : End of read enable training
341 01:57:32.513009 INFO : End of fine write leveling
342 01:57:32.518690 INFO : End of Write leveling coarse delay
343 01:57:32.519056 INFO : Training has run successfully!
344 01:57:32.519383 Check phy result
345 01:57:32.524280 INFO : End of initialization
346 01:57:32.524629 INFO : End of read dq deskew training
347 01:57:32.529849 INFO : End of MPR read delay center optimization
348 01:57:32.535549 INFO : End of write delay center optimization
349 01:57:32.541034 INFO : End of read delay center optimization
350 01:57:32.541464 INFO : End of max read latency training
351 01:57:32.546630 INFO : Training has run successfully!
352 01:57:32.546978 1D training succeed
353 01:57:32.555804 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 01:57:32.603400 Check phy result
355 01:57:32.603807 INFO : End of initialization
356 01:57:32.625149 INFO : End of 2D read delay Voltage center optimization
357 01:57:32.645510 INFO : End of 2D read delay Voltage center optimization
358 01:57:32.697522 INFO : End of 2D write delay Voltage center optimization
359 01:57:32.746895 INFO : End of 2D write delay Voltage center optimization
360 01:57:32.752449 INFO : Training has run successfully!
361 01:57:32.753047
362 01:57:32.753568 channel==0
363 01:57:32.758048 RxClkDly_Margin_A0==88 ps 9
364 01:57:32.758644 TxDqDly_Margin_A0==98 ps 10
365 01:57:32.761420 RxClkDly_Margin_A1==88 ps 9
366 01:57:32.761941 TxDqDly_Margin_A1==88 ps 9
367 01:57:32.766889 TrainedVREFDQ_A0==74
368 01:57:32.767491 TrainedVREFDQ_A1==74
369 01:57:32.767941 VrefDac_Margin_A0==24
370 01:57:32.772692 DeviceVref_Margin_A0==40
371 01:57:32.773303 VrefDac_Margin_A1==25
372 01:57:32.778096 DeviceVref_Margin_A1==40
373 01:57:32.778715
374 01:57:32.779213
375 01:57:32.779743 channel==1
376 01:57:32.780324 RxClkDly_Margin_A0==98 ps 10
377 01:57:32.783638 TxDqDly_Margin_A0==98 ps 10
378 01:57:32.784195 RxClkDly_Margin_A1==88 ps 9
379 01:57:32.789417 TxDqDly_Margin_A1==88 ps 9
380 01:57:32.789956 TrainedVREFDQ_A0==77
381 01:57:32.790460 TrainedVREFDQ_A1==77
382 01:57:32.795051 VrefDac_Margin_A0==22
383 01:57:32.796031 DeviceVref_Margin_A0==37
384 01:57:32.800698 VrefDac_Margin_A1==24
385 01:57:32.801262 DeviceVref_Margin_A1==37
386 01:57:32.801736
387 01:57:32.806072 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 01:57:32.806678
389 01:57:32.834021 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
390 01:57:32.839683 2D training succeed
391 01:57:32.845258 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 01:57:32.845849 auto size-- 65535DDR cs0 size: 2048MB
393 01:57:32.850854 DDR cs1 size: 2048MB
394 01:57:32.851472 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 01:57:32.856592 cs0 DataBus test pass
396 01:57:32.857139 cs1 DataBus test pass
397 01:57:32.857576 cs0 AddrBus test pass
398 01:57:32.862084 cs1 AddrBus test pass
399 01:57:32.862606
400 01:57:32.863119 100bdlr_step_size ps== 420
401 01:57:32.863579 result report
402 01:57:32.867683 boot times 0Enable ddr reg access
403 01:57:32.874378 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 01:57:32.887818 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 01:57:33.462464 0.0;M3 CHK:0;cm4_sp_mode 0
406 01:57:33.463211 MVN_1=0x00000000
407 01:57:33.467840 MVN_2=0x00000000
408 01:57:33.473630 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 01:57:33.474132 OPS=0x10
410 01:57:33.474580 ring efuse init
411 01:57:33.475009 chipver efuse init
412 01:57:33.479201 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 01:57:33.484796 [0.018961 Inits done]
414 01:57:33.485273 secure task start!
415 01:57:33.485708 high task start!
416 01:57:33.489420 low task start!
417 01:57:33.489960 run into bl31
418 01:57:33.496037 NOTICE: BL31: v1.3(release):4fc40b1
419 01:57:33.503824 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 01:57:33.504199 NOTICE: BL31: G12A normal boot!
421 01:57:33.529735 NOTICE: BL31: BL33 decompress pass
422 01:57:33.535440 ERROR: Error initializing runtime service opteed_fast
423 01:57:34.768392
424 01:57:34.769046
425 01:57:34.776850 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 01:57:34.777358
427 01:57:34.777800 Model: Libre Computer AML-A311D-CC Alta
428 01:57:34.985149 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 01:57:35.008651 DRAM: 2 GiB (effective 3.8 GiB)
430 01:57:35.151634 Core: 408 devices, 31 uclasses, devicetree: separate
431 01:57:35.157392 WDT: Not starting watchdog@f0d0
432 01:57:35.189688 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 01:57:35.202125 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 01:57:35.207092 ** Bad device specification mmc 0 **
435 01:57:35.217458 Card did not respond to voltage select! : -110
436 01:57:35.225105 ** Bad device specification mmc 0 **
437 01:57:35.225578 Couldn't find partition mmc 0
438 01:57:35.233447 Card did not respond to voltage select! : -110
439 01:57:35.238970 ** Bad device specification mmc 0 **
440 01:57:35.239454 Couldn't find partition mmc 0
441 01:57:35.244043 Error: could not access storage.
442 01:57:36.506828 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 01:57:36.507255 bl2_stage_init 0x01
444 01:57:36.507497 bl2_stage_init 0x81
445 01:57:36.512362 hw id: 0x0000 - pwm id 0x01
446 01:57:36.512656 bl2_stage_init 0xc1
447 01:57:36.512879 bl2_stage_init 0x02
448 01:57:36.513098
449 01:57:36.517998 L0:00000000
450 01:57:36.518283 L1:20000703
451 01:57:36.518504 L2:00008067
452 01:57:36.518718 L3:14000000
453 01:57:36.523578 B2:00402000
454 01:57:36.523867 B1:e0f83180
455 01:57:36.524127
456 01:57:36.524346 TE: 58124
457 01:57:36.524558
458 01:57:36.529159 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 01:57:36.529447
460 01:57:36.529666 Board ID = 1
461 01:57:36.534779 Set A53 clk to 24M
462 01:57:36.535090 Set A73 clk to 24M
463 01:57:36.535311 Set clk81 to 24M
464 01:57:36.540379 A53 clk: 1200 MHz
465 01:57:36.540708 A73 clk: 1200 MHz
466 01:57:36.540934 CLK81: 166.6M
467 01:57:36.541146 smccc: 00012a92
468 01:57:36.546026 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 01:57:36.551583 board id: 1
470 01:57:36.557430 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 01:57:36.568293 fw parse done
472 01:57:36.574293 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 01:57:36.616913 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 01:57:36.627778 PIEI prepare done
475 01:57:36.628323 fastboot data load
476 01:57:36.628772 fastboot data verify
477 01:57:36.633402 verify result: 266
478 01:57:36.638968 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 01:57:36.639467 LPDDR4 probe
480 01:57:36.639905 ddr clk to 1584MHz
481 01:57:36.646982 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 01:57:36.684292
483 01:57:36.684811 dmc_version 0001
484 01:57:36.690903 Check phy result
485 01:57:36.696780 INFO : End of CA training
486 01:57:36.697274 INFO : End of initialization
487 01:57:36.702394 INFO : Training has run successfully!
488 01:57:36.702892 Check phy result
489 01:57:36.707972 INFO : End of initialization
490 01:57:36.708503 INFO : End of read enable training
491 01:57:36.713567 INFO : End of fine write leveling
492 01:57:36.719161 INFO : End of Write leveling coarse delay
493 01:57:36.719653 INFO : Training has run successfully!
494 01:57:36.720120 Check phy result
495 01:57:36.724796 INFO : End of initialization
496 01:57:36.725289 INFO : End of read dq deskew training
497 01:57:36.730377 INFO : End of MPR read delay center optimization
498 01:57:36.735964 INFO : End of write delay center optimization
499 01:57:36.741560 INFO : End of read delay center optimization
500 01:57:36.742057 INFO : End of max read latency training
501 01:57:36.747168 INFO : Training has run successfully!
502 01:57:36.747665 1D training succeed
503 01:57:36.756328 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 01:57:36.803926 Check phy result
505 01:57:36.804453 INFO : End of initialization
506 01:57:36.825689 INFO : End of 2D read delay Voltage center optimization
507 01:57:36.845943 INFO : End of 2D read delay Voltage center optimization
508 01:57:36.898032 INFO : End of 2D write delay Voltage center optimization
509 01:57:36.947334 INFO : End of 2D write delay Voltage center optimization
510 01:57:36.952937 INFO : Training has run successfully!
511 01:57:36.953439
512 01:57:36.953878 channel==0
513 01:57:36.958561 RxClkDly_Margin_A0==88 ps 9
514 01:57:36.959071 TxDqDly_Margin_A0==98 ps 10
515 01:57:36.964229 RxClkDly_Margin_A1==88 ps 9
516 01:57:36.964739 TxDqDly_Margin_A1==88 ps 9
517 01:57:36.965177 TrainedVREFDQ_A0==74
518 01:57:36.969718 TrainedVREFDQ_A1==74
519 01:57:36.970235 VrefDac_Margin_A0==25
520 01:57:36.970665 DeviceVref_Margin_A0==40
521 01:57:36.975355 VrefDac_Margin_A1==25
522 01:57:36.975856 DeviceVref_Margin_A1==40
523 01:57:36.976339
524 01:57:36.976767
525 01:57:36.977191 channel==1
526 01:57:36.980959 RxClkDly_Margin_A0==98 ps 10
527 01:57:36.981458 TxDqDly_Margin_A0==88 ps 9
528 01:57:36.986520 RxClkDly_Margin_A1==98 ps 10
529 01:57:36.987039 TxDqDly_Margin_A1==88 ps 9
530 01:57:36.992237 TrainedVREFDQ_A0==76
531 01:57:36.992773 TrainedVREFDQ_A1==77
532 01:57:36.993226 VrefDac_Margin_A0==22
533 01:57:36.997733 DeviceVref_Margin_A0==38
534 01:57:36.998237 VrefDac_Margin_A1==22
535 01:57:37.003362 DeviceVref_Margin_A1==37
536 01:57:37.003869
537 01:57:37.004347 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 01:57:37.004780
539 01:57:37.036927 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
540 01:57:37.037508 2D training succeed
541 01:57:37.042564 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 01:57:37.048245 auto size-- 65535DDR cs0 size: 2048MB
543 01:57:37.048770 DDR cs1 size: 2048MB
544 01:57:37.053737 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 01:57:37.054256 cs0 DataBus test pass
546 01:57:37.059355 cs1 DataBus test pass
547 01:57:37.059863 cs0 AddrBus test pass
548 01:57:37.060338 cs1 AddrBus test pass
549 01:57:37.060769
550 01:57:37.064955 100bdlr_step_size ps== 420
551 01:57:37.065489 result report
552 01:57:37.070548 boot times 0Enable ddr reg access
553 01:57:37.075801 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 01:57:37.089302 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 01:57:37.663026 0.0;M3 CHK:0;cm4_sp_mode 0
556 01:57:37.663651 MVN_1=0x00000000
557 01:57:37.668653 MVN_2=0x00000000
558 01:57:37.674578 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 01:57:37.675104 OPS=0x10
560 01:57:37.675541 ring efuse init
561 01:57:37.675969 chipver efuse init
562 01:57:37.680030 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 01:57:37.685631 [0.018961 Inits done]
564 01:57:37.686145 secure task start!
565 01:57:37.686618 high task start!
566 01:57:37.690308 low task start!
567 01:57:37.690820 run into bl31
568 01:57:37.696873 NOTICE: BL31: v1.3(release):4fc40b1
569 01:57:37.704579 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 01:57:37.705097 NOTICE: BL31: G12A normal boot!
571 01:57:37.729904 NOTICE: BL31: BL33 decompress pass
572 01:57:37.735616 ERROR: Error initializing runtime service opteed_fast
573 01:57:38.968451
574 01:57:38.969103
575 01:57:38.977076 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 01:57:38.977603
577 01:57:38.978048 Model: Libre Computer AML-A311D-CC Alta
578 01:57:39.185406 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 01:57:39.208776 DRAM: 2 GiB (effective 3.8 GiB)
580 01:57:39.351721 Core: 408 devices, 31 uclasses, devicetree: separate
581 01:57:39.357795 WDT: Not starting watchdog@f0d0
582 01:57:39.389824 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 01:57:39.402394 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 01:57:39.407332 ** Bad device specification mmc 0 **
585 01:57:39.417657 Card did not respond to voltage select! : -110
586 01:57:39.425325 ** Bad device specification mmc 0 **
587 01:57:39.425863 Couldn't find partition mmc 0
588 01:57:39.433653 Card did not respond to voltage select! : -110
589 01:57:39.439087 ** Bad device specification mmc 0 **
590 01:57:39.439631 Couldn't find partition mmc 0
591 01:57:39.444242 Error: could not access storage.
592 01:57:39.787870 Net: eth0: ethernet@ff3f0000
593 01:57:39.788523 starting USB...
594 01:57:40.039514 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 01:57:40.040210 Starting the controller
596 01:57:40.046682 USB XHCI 1.10
597 01:57:41.758795 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 01:57:41.759455 bl2_stage_init 0x01
599 01:57:41.759925 bl2_stage_init 0x81
600 01:57:41.764339 hw id: 0x0000 - pwm id 0x01
601 01:57:41.764858 bl2_stage_init 0xc1
602 01:57:41.765315 bl2_stage_init 0x02
603 01:57:41.765758
604 01:57:41.770074 L0:00000000
605 01:57:41.770593 L1:20000703
606 01:57:41.771045 L2:00008067
607 01:57:41.771488 L3:14000000
608 01:57:41.775708 B2:00402000
609 01:57:41.776273 B1:e0f83180
610 01:57:41.776739
611 01:57:41.777191 TE: 58124
612 01:57:41.777642
613 01:57:41.781205 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 01:57:41.781758
615 01:57:41.782248 Board ID = 1
616 01:57:41.786758 Set A53 clk to 24M
617 01:57:41.787278 Set A73 clk to 24M
618 01:57:41.787730 Set clk81 to 24M
619 01:57:41.792418 A53 clk: 1200 MHz
620 01:57:41.792950 A73 clk: 1200 MHz
621 01:57:41.793410 CLK81: 166.6M
622 01:57:41.793856 smccc: 00012a92
623 01:57:41.797955 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 01:57:41.803477 board id: 1
625 01:57:41.809339 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 01:57:41.820042 fw parse done
627 01:57:41.826026 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 01:57:41.868626 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 01:57:41.879524 PIEI prepare done
630 01:57:41.880091 fastboot data load
631 01:57:41.880556 fastboot data verify
632 01:57:41.885137 verify result: 266
633 01:57:41.890749 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 01:57:41.891266 LPDDR4 probe
635 01:57:41.891713 ddr clk to 1584MHz
636 01:57:41.898795 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 01:57:41.936089
638 01:57:41.936676 dmc_version 0001
639 01:57:41.942691 Check phy result
640 01:57:41.948553 INFO : End of CA training
641 01:57:41.949068 INFO : End of initialization
642 01:57:41.954155 INFO : Training has run successfully!
643 01:57:41.954665 Check phy result
644 01:57:41.959738 INFO : End of initialization
645 01:57:41.960284 INFO : End of read enable training
646 01:57:41.963072 INFO : End of fine write leveling
647 01:57:41.968517 INFO : End of Write leveling coarse delay
648 01:57:41.974168 INFO : Training has run successfully!
649 01:57:41.974686 Check phy result
650 01:57:41.975135 INFO : End of initialization
651 01:57:41.979728 INFO : End of read dq deskew training
652 01:57:41.983353 INFO : End of MPR read delay center optimization
653 01:57:41.989007 INFO : End of write delay center optimization
654 01:57:41.994483 INFO : End of read delay center optimization
655 01:57:41.995017 INFO : End of max read latency training
656 01:57:42.000112 INFO : Training has run successfully!
657 01:57:42.000640 1D training succeed
658 01:57:42.008156 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 01:57:42.055657 Check phy result
660 01:57:42.056300 INFO : End of initialization
661 01:57:42.077448 INFO : End of 2D read delay Voltage center optimization
662 01:57:42.096941 INFO : End of 2D read delay Voltage center optimization
663 01:57:42.148106 INFO : End of 2D write delay Voltage center optimization
664 01:57:42.198272 INFO : End of 2D write delay Voltage center optimization
665 01:57:42.203867 INFO : Training has run successfully!
666 01:57:42.204440
667 01:57:42.204896 channel==0
668 01:57:42.209346 RxClkDly_Margin_A0==88 ps 9
669 01:57:42.209867 TxDqDly_Margin_A0==98 ps 10
670 01:57:42.215156 RxClkDly_Margin_A1==88 ps 9
671 01:57:42.215671 TxDqDly_Margin_A1==98 ps 10
672 01:57:42.216168 TrainedVREFDQ_A0==74
673 01:57:42.220647 TrainedVREFDQ_A1==74
674 01:57:42.221163 VrefDac_Margin_A0==25
675 01:57:42.221608 DeviceVref_Margin_A0==40
676 01:57:42.226205 VrefDac_Margin_A1==25
677 01:57:42.226720 DeviceVref_Margin_A1==40
678 01:57:42.227165
679 01:57:42.227606
680 01:57:42.231812 channel==1
681 01:57:42.232383 RxClkDly_Margin_A0==98 ps 10
682 01:57:42.232836 TxDqDly_Margin_A0==88 ps 9
683 01:57:42.237430 RxClkDly_Margin_A1==88 ps 9
684 01:57:42.237956 TxDqDly_Margin_A1==98 ps 10
685 01:57:42.243120 TrainedVREFDQ_A0==77
686 01:57:42.243648 TrainedVREFDQ_A1==77
687 01:57:42.244137 VrefDac_Margin_A0==23
688 01:57:42.248598 DeviceVref_Margin_A0==37
689 01:57:42.249106 VrefDac_Margin_A1==24
690 01:57:42.254178 DeviceVref_Margin_A1==37
691 01:57:42.254688
692 01:57:42.255133 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 01:57:42.255570
694 01:57:42.287774 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
695 01:57:42.288409 2D training succeed
696 01:57:42.293361 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 01:57:42.298970 auto size-- 65535DDR cs0 size: 2048MB
698 01:57:42.299484 DDR cs1 size: 2048MB
699 01:57:42.304454 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 01:57:42.304968 cs0 DataBus test pass
701 01:57:42.310071 cs1 DataBus test pass
702 01:57:42.310584 cs0 AddrBus test pass
703 01:57:42.311029 cs1 AddrBus test pass
704 01:57:42.311463
705 01:57:42.315691 100bdlr_step_size ps== 415
706 01:57:42.316251 result report
707 01:57:42.321280 boot times 0Enable ddr reg access
708 01:57:42.326243 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 01:57:42.340097 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 01:57:42.913808 0.0;M3 CHK:0;cm4_sp_mode 0
711 01:57:42.914445 MVN_1=0x00000000
712 01:57:42.919335 MVN_2=0x00000000
713 01:57:42.925077 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 01:57:42.925637 OPS=0x10
715 01:57:42.926079 ring efuse init
716 01:57:42.926505 chipver efuse init
717 01:57:42.933197 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 01:57:42.933742 [0.018961 Inits done]
719 01:57:42.940829 secure task start!
720 01:57:42.941327 high task start!
721 01:57:42.941757 low task start!
722 01:57:42.942180 run into bl31
723 01:57:42.947493 NOTICE: BL31: v1.3(release):4fc40b1
724 01:57:42.955280 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 01:57:42.955811 NOTICE: BL31: G12A normal boot!
726 01:57:42.980634 NOTICE: BL31: BL33 decompress pass
727 01:57:42.986398 ERROR: Error initializing runtime service opteed_fast
728 01:57:44.219139
729 01:57:44.219693
730 01:57:44.227462 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 01:57:44.227772
732 01:57:44.228047 Model: Libre Computer AML-A311D-CC Alta
733 01:57:44.435103 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 01:57:44.459395 DRAM: 2 GiB (effective 3.8 GiB)
735 01:57:44.602248 Core: 408 devices, 31 uclasses, devicetree: separate
736 01:57:44.608192 WDT: Not starting watchdog@f0d0
737 01:57:44.640420 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 01:57:44.652876 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 01:57:44.657873 ** Bad device specification mmc 0 **
740 01:57:44.668191 Card did not respond to voltage select! : -110
741 01:57:44.675845 ** Bad device specification mmc 0 **
742 01:57:44.676223 Couldn't find partition mmc 0
743 01:57:44.684177 Card did not respond to voltage select! : -110
744 01:57:44.689731 ** Bad device specification mmc 0 **
745 01:57:44.690076 Couldn't find partition mmc 0
746 01:57:44.694731 Error: could not access storage.
747 01:57:45.037306 Net: eth0: ethernet@ff3f0000
748 01:57:45.037962 starting USB...
749 01:57:45.289151 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 01:57:45.289784 Starting the controller
751 01:57:45.296097 USB XHCI 1.10
752 01:57:47.457339 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
753 01:57:47.457768 bl2_stage_init 0x01
754 01:57:47.457990 bl2_stage_init 0x81
755 01:57:47.462933 hw id: 0x0000 - pwm id 0x01
756 01:57:47.463242 bl2_stage_init 0xc1
757 01:57:47.463455 bl2_stage_init 0x02
758 01:57:47.463660
759 01:57:47.468473 L0:00000000
760 01:57:47.468790 L1:20000703
761 01:57:47.469014 L2:00008067
762 01:57:47.469231 L3:14000000
763 01:57:47.474088 B2:00402000
764 01:57:47.474525 B1:e0f83180
765 01:57:47.474875
766 01:57:47.475218 TE: 58167
767 01:57:47.475561
768 01:57:47.479664 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
769 01:57:47.480117
770 01:57:47.480380 Board ID = 1
771 01:57:47.485343 Set A53 clk to 24M
772 01:57:47.485664 Set A73 clk to 24M
773 01:57:47.485889 Set clk81 to 24M
774 01:57:47.490973 A53 clk: 1200 MHz
775 01:57:47.491448 A73 clk: 1200 MHz
776 01:57:47.491816 CLK81: 166.6M
777 01:57:47.492215 smccc: 00012abd
778 01:57:47.496622 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
779 01:57:47.502143 board id: 1
780 01:57:47.507121 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
781 01:57:47.518674 fw parse done
782 01:57:47.524780 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
783 01:57:47.567189 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
784 01:57:47.578049 PIEI prepare done
785 01:57:47.578434 fastboot data load
786 01:57:47.578683 fastboot data verify
787 01:57:47.583639 verify result: 266
788 01:57:47.589235 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
789 01:57:47.589594 LPDDR4 probe
790 01:57:47.589822 ddr clk to 1584MHz
791 01:57:47.597187 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
792 01:57:47.634506
793 01:57:47.635066 dmc_version 0001
794 01:57:47.641149 Check phy result
795 01:57:47.647015 INFO : End of CA training
796 01:57:47.647364 INFO : End of initialization
797 01:57:47.652629 INFO : Training has run successfully!
798 01:57:47.652980 Check phy result
799 01:57:47.658218 INFO : End of initialization
800 01:57:47.658565 INFO : End of read enable training
801 01:57:47.661605 INFO : End of fine write leveling
802 01:57:47.667152 INFO : End of Write leveling coarse delay
803 01:57:47.672739 INFO : Training has run successfully!
804 01:57:47.673080 Check phy result
805 01:57:47.673300 INFO : End of initialization
806 01:57:47.678329 INFO : End of read dq deskew training
807 01:57:47.683952 INFO : End of MPR read delay center optimization
808 01:57:47.684464 INFO : End of write delay center optimization
809 01:57:47.689584 INFO : End of read delay center optimization
810 01:57:47.695164 INFO : End of max read latency training
811 01:57:47.695521 INFO : Training has run successfully!
812 01:57:47.700742 1D training succeed
813 01:57:47.706646 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
814 01:57:47.754221 Check phy result
815 01:57:47.754644 INFO : End of initialization
816 01:57:47.775924 INFO : End of 2D read delay Voltage center optimization
817 01:57:47.795278 INFO : End of 2D read delay Voltage center optimization
818 01:57:47.848219 INFO : End of 2D write delay Voltage center optimization
819 01:57:47.897710 INFO : End of 2D write delay Voltage center optimization
820 01:57:47.903138 INFO : Training has run successfully!
821 01:57:47.903495
822 01:57:47.903723 channel==0
823 01:57:47.908730 RxClkDly_Margin_A0==88 ps 9
824 01:57:47.909068 TxDqDly_Margin_A0==98 ps 10
825 01:57:47.914355 RxClkDly_Margin_A1==88 ps 9
826 01:57:47.914692 TxDqDly_Margin_A1==98 ps 10
827 01:57:47.914920 TrainedVREFDQ_A0==74
828 01:57:47.919916 TrainedVREFDQ_A1==74
829 01:57:47.920294 VrefDac_Margin_A0==25
830 01:57:47.920525 DeviceVref_Margin_A0==40
831 01:57:47.925636 VrefDac_Margin_A1==25
832 01:57:47.925973 DeviceVref_Margin_A1==40
833 01:57:47.926185
834 01:57:47.926391
835 01:57:47.931129 channel==1
836 01:57:47.931468 RxClkDly_Margin_A0==98 ps 10
837 01:57:47.931693 TxDqDly_Margin_A0==98 ps 10
838 01:57:47.936724 RxClkDly_Margin_A1==88 ps 9
839 01:57:47.937062 TxDqDly_Margin_A1==88 ps 9
840 01:57:47.942380 TrainedVREFDQ_A0==77
841 01:57:47.942730 TrainedVREFDQ_A1==77
842 01:57:47.942943 VrefDac_Margin_A0==22
843 01:57:47.947949 DeviceVref_Margin_A0==37
844 01:57:47.948364 VrefDac_Margin_A1==24
845 01:57:47.953638 DeviceVref_Margin_A1==37
846 01:57:47.953991
847 01:57:47.954215 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
848 01:57:47.954427
849 01:57:47.987092 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
850 01:57:47.987503 2D training succeed
851 01:57:47.992705 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
852 01:57:47.998327 auto size-- 65535DDR cs0 size: 2048MB
853 01:57:47.998597 DDR cs1 size: 2048MB
854 01:57:48.003875 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
855 01:57:48.004146 cs0 DataBus test pass
856 01:57:48.009570 cs1 DataBus test pass
857 01:57:48.009835 cs0 AddrBus test pass
858 01:57:48.010034 cs1 AddrBus test pass
859 01:57:48.010230
860 01:57:48.015071 100bdlr_step_size ps== 420
861 01:57:48.015345 result report
862 01:57:48.020765 boot times 0Enable ddr reg access
863 01:57:48.026108 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
864 01:57:48.039720 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
865 01:57:48.613206 0.0;M3 CHK:0;cm4_sp_mode 0
866 01:57:48.613640 MVN_1=0x00000000
867 01:57:48.618736 MVN_2=0x00000000
868 01:57:48.624470 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
869 01:57:48.624894 OPS=0x10
870 01:57:48.625131 ring efuse init
871 01:57:48.625337 chipver efuse init
872 01:57:48.630065 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
873 01:57:48.635844 [0.018961 Inits done]
874 01:57:48.636342 secure task start!
875 01:57:48.636656 high task start!
876 01:57:48.640225 low task start!
877 01:57:48.640517 run into bl31
878 01:57:48.646901 NOTICE: BL31: v1.3(release):4fc40b1
879 01:57:48.653786 NOTICE: BL31: Built : 15:58:17, May 22 2019
880 01:57:48.654252 NOTICE: BL31: G12A normal boot!
881 01:57:48.680135 NOTICE: BL31: BL33 decompress pass
882 01:57:48.685774 ERROR: Error initializing runtime service opteed_fast
883 01:57:49.918707
884 01:57:49.919336
885 01:57:49.927025 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
886 01:57:49.927500
887 01:57:49.927920 Model: Libre Computer AML-A311D-CC Alta
888 01:57:50.134748 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
889 01:57:50.158891 DRAM: 2 GiB (effective 3.8 GiB)
890 01:57:50.302037 Core: 408 devices, 31 uclasses, devicetree: separate
891 01:57:50.307746 WDT: Not starting watchdog@f0d0
892 01:57:50.340006 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
893 01:57:50.352406 Loading Environment from FAT... Card did not respond to voltage select! : -110
894 01:57:50.357472 ** Bad device specification mmc 0 **
895 01:57:50.367742 Card did not respond to voltage select! : -110
896 01:57:50.375415 ** Bad device specification mmc 0 **
897 01:57:50.375896 Couldn't find partition mmc 0
898 01:57:50.383730 Card did not respond to voltage select! : -110
899 01:57:50.389238 ** Bad device specification mmc 0 **
900 01:57:50.389686 Couldn't find partition mmc 0
901 01:57:50.394284 Error: could not access storage.
902 01:57:50.736878 Net: eth0: ethernet@ff3f0000
903 01:57:50.737305 starting USB...
904 01:57:50.988638 Bus usb@ff500000: Register 3000140 NbrPorts 3
905 01:57:50.989060 Starting the controller
906 01:57:50.995575 USB XHCI 1.10
907 01:57:52.549667 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
908 01:57:52.557921 scanning usb for storage devices... 0 Storage Device(s) found
910 01:57:52.609640 Hit any key to stop autoboot: 1
911 01:57:52.610658 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
912 01:57:52.611463 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
913 01:57:52.612047 Setting prompt string to ['=>']
914 01:57:52.612619 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
915 01:57:52.625515 0
916 01:57:52.626636 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
917 01:57:52.627191 Sending with 10 millisecond of delay
919 01:57:53.762054 => setenv autoload no
920 01:57:53.772848 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
921 01:57:53.777751 setenv autoload no
922 01:57:53.778475 Sending with 10 millisecond of delay
924 01:57:55.575184 => setenv initrd_high 0xffffffff
925 01:57:55.585945 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
926 01:57:55.586770 setenv initrd_high 0xffffffff
927 01:57:55.587482 Sending with 10 millisecond of delay
929 01:57:57.204179 => setenv fdt_high 0xffffffff
930 01:57:57.215018 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
931 01:57:57.216037 setenv fdt_high 0xffffffff
932 01:57:57.216791 Sending with 10 millisecond of delay
934 01:57:57.508853 => dhcp
935 01:57:57.519642 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
936 01:57:57.520575 dhcp
937 01:57:57.521057 Speed: 1000, full duplex
938 01:57:57.521491 BOOTP broadcast 1
939 01:57:57.536530 DHCP client bound to address 192.168.6.27 (17 ms)
940 01:57:57.537981 Sending with 10 millisecond of delay
942 01:57:59.216372 => setenv serverip 192.168.6.2
943 01:57:59.227219 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
944 01:57:59.228266 setenv serverip 192.168.6.2
945 01:57:59.229032 Sending with 10 millisecond of delay
947 01:58:02.955975 => tftpboot 0x01080000 956735/tftp-deploy-krcppgym/kernel/uImage
948 01:58:02.967216 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
949 01:58:02.968236 tftpboot 0x01080000 956735/tftp-deploy-krcppgym/kernel/uImage
950 01:58:02.968737 Speed: 1000, full duplex
951 01:58:02.969205 Using ethernet@ff3f0000 device
952 01:58:02.969787 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
953 01:58:02.975113 Filename '956735/tftp-deploy-krcppgym/kernel/uImage'.
954 01:58:02.979170 Load address: 0x1080000
955 01:58:05.873461 Loading: *################################################## 43.6 MiB
956 01:58:05.873859 15 MiB/s
957 01:58:05.874095 done
958 01:58:05.877699 Bytes transferred = 45713984 (2b98a40 hex)
959 01:58:05.878249 Sending with 10 millisecond of delay
961 01:58:10.566310 => tftpboot 0x08000000 956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
962 01:58:10.577275 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
963 01:58:10.577849 tftpboot 0x08000000 956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot
964 01:58:10.578109 Speed: 1000, full duplex
965 01:58:10.578338 Using ethernet@ff3f0000 device
966 01:58:10.580202 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
967 01:58:10.588439 Filename '956735/tftp-deploy-krcppgym/ramdisk/ramdisk.cpio.gz.uboot'.
968 01:58:10.588961 Load address: 0x8000000
969 01:58:20.221921 Loading: *#####T ############################################ UDP wrong checksum 0000000f 00003005
970 01:58:25.222594 T UDP wrong checksum 0000000f 00003005
971 01:58:35.225736 T T UDP wrong checksum 0000000f 00003005
972 01:58:49.735700 T T UDP wrong checksum 000000ff 0000ebe5
973 01:58:49.775806 UDP wrong checksum 000000ff 000077d8
974 01:58:55.229087 T UDP wrong checksum 0000000f 00003005
975 01:59:10.234665 T T T
976 01:59:10.235090 Retry count exceeded; starting again
978 01:59:10.236940 end: 2.4.3 bootloader-commands (duration 00:01:18) [common]
981 01:59:10.238747 end: 2.4 uboot-commands (duration 00:01:49) [common]
983 01:59:10.240158 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
985 01:59:10.241186 end: 2 uboot-action (duration 00:01:49) [common]
987 01:59:10.242668 Cleaning after the job
988 01:59:10.243210 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/ramdisk
989 01:59:10.244461 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/kernel
990 01:59:10.290332 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/dtb
991 01:59:10.291113 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956735/tftp-deploy-krcppgym/modules
992 01:59:10.310908 start: 4.1 power-off (timeout 00:00:30) [common]
993 01:59:10.311578 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
994 01:59:10.345297 >> OK - accepted request
995 01:59:10.347193 Returned 0 in 0 seconds
996 01:59:10.448159 end: 4.1 power-off (duration 00:00:00) [common]
998 01:59:10.449909 start: 4.2 read-feedback (timeout 00:10:00) [common]
999 01:59:10.451056 Listened to connection for namespace 'common' for up to 1s
1000 01:59:11.451862 Finalising connection for namespace 'common'
1001 01:59:11.452632 Disconnecting from shell: Finalise
1002 01:59:11.453153 =>
1003 01:59:11.554142 end: 4.2 read-feedback (duration 00:00:01) [common]
1004 01:59:11.554766 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956735
1005 01:59:12.225245 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956735
1006 01:59:12.225865 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.