Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:08:40.272814 lava-dispatcher, installed at version: 2024.01
2 02:08:40.273572 start: 0 validate
3 02:08:40.274043 Start time: 2024-11-08 02:08:40.274012+00:00 (UTC)
4 02:08:40.274573 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:08:40.275123 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:08:40.320345 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:08:40.320927 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:08:40.353248 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:08:40.353944 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:08:40.384735 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:08:40.385260 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:08:40.419486 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:08:40.420043 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-244-g80b3d72150d5%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:08:40.460550 validate duration: 0.19
16 02:08:40.461514 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:08:40.461903 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:08:40.462286 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:08:40.462928 Not decompressing ramdisk as can be used compressed.
20 02:08:40.463436 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:08:40.463775 saving as /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/ramdisk/initrd.cpio.gz
22 02:08:40.464119 total size: 5628140 (5 MB)
23 02:08:40.502147 progress 0 % (0 MB)
24 02:08:40.509243 progress 5 % (0 MB)
25 02:08:40.517046 progress 10 % (0 MB)
26 02:08:40.523816 progress 15 % (0 MB)
27 02:08:40.528095 progress 20 % (1 MB)
28 02:08:40.531701 progress 25 % (1 MB)
29 02:08:40.535708 progress 30 % (1 MB)
30 02:08:40.539741 progress 35 % (1 MB)
31 02:08:40.543401 progress 40 % (2 MB)
32 02:08:40.547375 progress 45 % (2 MB)
33 02:08:40.550982 progress 50 % (2 MB)
34 02:08:40.554943 progress 55 % (2 MB)
35 02:08:40.558968 progress 60 % (3 MB)
36 02:08:40.562566 progress 65 % (3 MB)
37 02:08:40.566535 progress 70 % (3 MB)
38 02:08:40.570144 progress 75 % (4 MB)
39 02:08:40.574142 progress 80 % (4 MB)
40 02:08:40.577790 progress 85 % (4 MB)
41 02:08:40.581602 progress 90 % (4 MB)
42 02:08:40.585227 progress 95 % (5 MB)
43 02:08:40.588486 progress 100 % (5 MB)
44 02:08:40.589145 5 MB downloaded in 0.13 s (42.93 MB/s)
45 02:08:40.589711 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:08:40.590630 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:08:40.590942 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:08:40.591235 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:08:40.591707 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/kernel/Image
51 02:08:40.591954 saving as /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/kernel/Image
52 02:08:40.592189 total size: 45713920 (43 MB)
53 02:08:40.592411 No compression specified
54 02:08:40.631446 progress 0 % (0 MB)
55 02:08:40.659668 progress 5 % (2 MB)
56 02:08:40.688039 progress 10 % (4 MB)
57 02:08:40.716320 progress 15 % (6 MB)
58 02:08:40.744539 progress 20 % (8 MB)
59 02:08:40.772478 progress 25 % (10 MB)
60 02:08:40.800680 progress 30 % (13 MB)
61 02:08:40.828953 progress 35 % (15 MB)
62 02:08:40.857289 progress 40 % (17 MB)
63 02:08:40.885108 progress 45 % (19 MB)
64 02:08:40.913253 progress 50 % (21 MB)
65 02:08:40.941451 progress 55 % (24 MB)
66 02:08:40.969717 progress 60 % (26 MB)
67 02:08:40.997588 progress 65 % (28 MB)
68 02:08:41.025750 progress 70 % (30 MB)
69 02:08:41.053906 progress 75 % (32 MB)
70 02:08:41.082188 progress 80 % (34 MB)
71 02:08:41.109863 progress 85 % (37 MB)
72 02:08:41.137949 progress 90 % (39 MB)
73 02:08:41.166140 progress 95 % (41 MB)
74 02:08:41.193252 progress 100 % (43 MB)
75 02:08:41.193778 43 MB downloaded in 0.60 s (72.47 MB/s)
76 02:08:41.194264 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:08:41.195094 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:08:41.195378 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:08:41.195652 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:08:41.196146 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:08:41.196435 saving as /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:08:41.196651 total size: 54703 (0 MB)
84 02:08:41.196862 No compression specified
85 02:08:41.239078 progress 59 % (0 MB)
86 02:08:41.239944 progress 100 % (0 MB)
87 02:08:41.240593 0 MB downloaded in 0.04 s (1.19 MB/s)
88 02:08:41.241104 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:08:41.241999 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:08:41.242297 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:08:41.242598 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:08:41.243081 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:08:41.243356 saving as /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/nfsrootfs/full.rootfs.tar
95 02:08:41.243585 total size: 474398908 (452 MB)
96 02:08:41.243816 Using unxz to decompress xz
97 02:08:41.277040 progress 0 % (0 MB)
98 02:08:42.395815 progress 5 % (22 MB)
99 02:08:43.902389 progress 10 % (45 MB)
100 02:08:44.379811 progress 15 % (67 MB)
101 02:08:45.240970 progress 20 % (90 MB)
102 02:08:45.785506 progress 25 % (113 MB)
103 02:08:46.149669 progress 30 % (135 MB)
104 02:08:46.760522 progress 35 % (158 MB)
105 02:08:47.703399 progress 40 % (181 MB)
106 02:08:48.583038 progress 45 % (203 MB)
107 02:08:49.331144 progress 50 % (226 MB)
108 02:08:50.117664 progress 55 % (248 MB)
109 02:08:51.341635 progress 60 % (271 MB)
110 02:08:52.826865 progress 65 % (294 MB)
111 02:08:54.473341 progress 70 % (316 MB)
112 02:08:57.552569 progress 75 % (339 MB)
113 02:08:59.963428 progress 80 % (361 MB)
114 02:09:02.867520 progress 85 % (384 MB)
115 02:09:06.331560 progress 90 % (407 MB)
116 02:09:09.907405 progress 95 % (429 MB)
117 02:09:13.049937 progress 100 % (452 MB)
118 02:09:13.062839 452 MB downloaded in 31.82 s (14.22 MB/s)
119 02:09:13.063727 end: 1.4.1 http-download (duration 00:00:32) [common]
121 02:09:13.065404 end: 1.4 download-retry (duration 00:00:32) [common]
122 02:09:13.065939 start: 1.5 download-retry (timeout 00:09:27) [common]
123 02:09:13.066465 start: 1.5.1 http-download (timeout 00:09:27) [common]
124 02:09:13.067268 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-244-g80b3d72150d5/arm64/defconfig/gcc-12/modules.tar.xz
125 02:09:13.067766 saving as /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/modules/modules.tar
126 02:09:13.068225 total size: 11616160 (11 MB)
127 02:09:13.068656 Using unxz to decompress xz
128 02:09:13.111668 progress 0 % (0 MB)
129 02:09:13.177578 progress 5 % (0 MB)
130 02:09:13.250674 progress 10 % (1 MB)
131 02:09:13.345813 progress 15 % (1 MB)
132 02:09:13.436272 progress 20 % (2 MB)
133 02:09:13.516569 progress 25 % (2 MB)
134 02:09:13.591549 progress 30 % (3 MB)
135 02:09:13.669936 progress 35 % (3 MB)
136 02:09:13.744527 progress 40 % (4 MB)
137 02:09:13.823679 progress 45 % (5 MB)
138 02:09:13.908142 progress 50 % (5 MB)
139 02:09:13.986540 progress 55 % (6 MB)
140 02:09:14.072945 progress 60 % (6 MB)
141 02:09:14.155003 progress 65 % (7 MB)
142 02:09:14.237073 progress 70 % (7 MB)
143 02:09:14.315842 progress 75 % (8 MB)
144 02:09:14.400303 progress 80 % (8 MB)
145 02:09:14.481632 progress 85 % (9 MB)
146 02:09:14.565071 progress 90 % (10 MB)
147 02:09:14.637736 progress 95 % (10 MB)
148 02:09:14.713660 progress 100 % (11 MB)
149 02:09:14.725726 11 MB downloaded in 1.66 s (6.68 MB/s)
150 02:09:14.726590 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:09:14.728217 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:09:14.728733 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 02:09:14.729241 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 02:09:30.046028 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956783/extract-nfsrootfs-2m9y5mca
156 02:09:30.046634 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 02:09:30.046921 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 02:09:30.047666 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh
159 02:09:30.048166 makedir: /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin
160 02:09:30.048509 makedir: /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/tests
161 02:09:30.048821 makedir: /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/results
162 02:09:30.049152 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-add-keys
163 02:09:30.049670 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-add-sources
164 02:09:30.050172 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-background-process-start
165 02:09:30.050710 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-background-process-stop
166 02:09:30.051296 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-common-functions
167 02:09:30.051796 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-echo-ipv4
168 02:09:30.052327 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-install-packages
169 02:09:30.052822 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-installed-packages
170 02:09:30.053292 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-os-build
171 02:09:30.053764 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-probe-channel
172 02:09:30.054237 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-probe-ip
173 02:09:30.054746 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-target-ip
174 02:09:30.055250 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-target-mac
175 02:09:30.055732 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-target-storage
176 02:09:30.056271 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-case
177 02:09:30.056762 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-event
178 02:09:30.057234 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-feedback
179 02:09:30.057703 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-raise
180 02:09:30.058167 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-reference
181 02:09:30.058674 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-runner
182 02:09:30.059199 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-set
183 02:09:30.059716 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-test-shell
184 02:09:30.060236 Updating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-install-packages (oe)
185 02:09:30.060774 Updating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/bin/lava-installed-packages (oe)
186 02:09:30.061218 Creating /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/environment
187 02:09:30.061582 LAVA metadata
188 02:09:30.061839 - LAVA_JOB_ID=956783
189 02:09:30.062051 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:09:30.062404 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 02:09:30.063336 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:09:30.063646 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 02:09:30.063854 skipped lava-vland-overlay
194 02:09:30.064122 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:09:30.064379 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 02:09:30.064597 skipped lava-multinode-overlay
197 02:09:30.064836 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:09:30.065083 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 02:09:30.065328 Loading test definitions
200 02:09:30.065601 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 02:09:30.065817 Using /lava-956783 at stage 0
202 02:09:30.066971 uuid=956783_1.6.2.4.1 testdef=None
203 02:09:30.067272 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:09:30.067534 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 02:09:30.069288 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:09:30.070072 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 02:09:30.072239 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:09:30.073066 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 02:09:30.075106 runner path: /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 956783_1.6.2.4.1
212 02:09:30.075641 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:09:30.076435 Creating lava-test-runner.conf files
215 02:09:30.076636 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956783/lava-overlay-j68j6wnh/lava-956783/0 for stage 0
216 02:09:30.076964 - 0_v4l2-decoder-conformance-h264
217 02:09:30.077305 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:09:30.077575 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 02:09:30.098838 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:09:30.099189 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 02:09:30.099451 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:09:30.099714 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:09:30.099973 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 02:09:30.716036 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:09:30.716509 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 02:09:30.716758 extracting modules file /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956783/extract-nfsrootfs-2m9y5mca
227 02:09:32.073229 extracting modules file /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk
228 02:09:33.477491 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:09:33.477976 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 02:09:33.478253 [common] Applying overlay to NFS
231 02:09:33.478465 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956783/compress-overlay-fi2dunot/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956783/extract-nfsrootfs-2m9y5mca
232 02:09:33.507686 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:09:33.508114 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 02:09:33.508392 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 02:09:33.508622 Converting downloaded kernel to a uImage
236 02:09:33.508930 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/kernel/Image /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/kernel/uImage
237 02:09:33.998875 output: Image Name:
238 02:09:33.999270 output: Created: Fri Nov 8 02:09:33 2024
239 02:09:33.999477 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:09:33.999681 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 02:09:33.999880 output: Load Address: 01080000
242 02:09:34.000120 output: Entry Point: 01080000
243 02:09:34.000321 output:
244 02:09:34.000655 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:09:34.000921 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:09:34.001192 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 02:09:34.001443 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:09:34.001696 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 02:09:34.001949 Building ramdisk /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk
250 02:09:36.233053 >> 166792 blocks
251 02:09:43.920316 Adding RAMdisk u-boot header.
252 02:09:43.920957 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk.cpio.gz.uboot
253 02:09:44.164730 output: Image Name:
254 02:09:44.165140 output: Created: Fri Nov 8 02:09:43 2024
255 02:09:44.165351 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:09:44.165558 output: Data Size: 23431725 Bytes = 22882.54 KiB = 22.35 MiB
257 02:09:44.165759 output: Load Address: 00000000
258 02:09:44.165957 output: Entry Point: 00000000
259 02:09:44.166155 output:
260 02:09:44.166814 rename /var/lib/lava/dispatcher/tmp/956783/extract-overlay-ramdisk-4b1w8me0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
261 02:09:44.167251 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:09:44.167540 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 02:09:44.167814 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 02:09:44.168178 No LXC device requested
265 02:09:44.168769 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:09:44.169338 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 02:09:44.169883 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:09:44.170334 Checking files for TFTP limit of 4294967296 bytes.
269 02:09:44.173291 end: 1 tftp-deploy (duration 00:01:04) [common]
270 02:09:44.173924 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:09:44.174501 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:09:44.175043 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:09:44.175590 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:09:44.176203 Using kernel file from prepare-kernel: 956783/tftp-deploy-aof0_3ch/kernel/uImage
275 02:09:44.176894 substitutions:
276 02:09:44.177345 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:09:44.177786 - {DTB_ADDR}: 0x01070000
278 02:09:44.178225 - {DTB}: 956783/tftp-deploy-aof0_3ch/dtb/meson-g12b-a311d-libretech-cc.dtb
279 02:09:44.178663 - {INITRD}: 956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
280 02:09:44.179100 - {KERNEL_ADDR}: 0x01080000
281 02:09:44.179534 - {KERNEL}: 956783/tftp-deploy-aof0_3ch/kernel/uImage
282 02:09:44.179968 - {LAVA_MAC}: None
283 02:09:44.180483 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956783/extract-nfsrootfs-2m9y5mca
284 02:09:44.180925 - {NFS_SERVER_IP}: 192.168.6.2
285 02:09:44.181354 - {PRESEED_CONFIG}: None
286 02:09:44.181781 - {PRESEED_LOCAL}: None
287 02:09:44.182211 - {RAMDISK_ADDR}: 0x08000000
288 02:09:44.182636 - {RAMDISK}: 956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
289 02:09:44.183063 - {ROOT_PART}: None
290 02:09:44.183487 - {ROOT}: None
291 02:09:44.183912 - {SERVER_IP}: 192.168.6.2
292 02:09:44.184368 - {TEE_ADDR}: 0x83000000
293 02:09:44.184795 - {TEE}: None
294 02:09:44.185224 Parsed boot commands:
295 02:09:44.185641 - setenv autoload no
296 02:09:44.186067 - setenv initrd_high 0xffffffff
297 02:09:44.186495 - setenv fdt_high 0xffffffff
298 02:09:44.186922 - dhcp
299 02:09:44.187346 - setenv serverip 192.168.6.2
300 02:09:44.187772 - tftpboot 0x01080000 956783/tftp-deploy-aof0_3ch/kernel/uImage
301 02:09:44.188271 - tftpboot 0x08000000 956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
302 02:09:44.188708 - tftpboot 0x01070000 956783/tftp-deploy-aof0_3ch/dtb/meson-g12b-a311d-libretech-cc.dtb
303 02:09:44.189137 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956783/extract-nfsrootfs-2m9y5mca,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:09:44.189576 - bootm 0x01080000 0x08000000 0x01070000
305 02:09:44.190130 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:09:44.191759 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:09:44.192259 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 02:09:44.207605 Setting prompt string to ['lava-test: # ']
310 02:09:44.209234 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:09:44.209883 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:09:44.210479 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:09:44.211057 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:09:44.212330 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 02:09:44.247568 >> OK - accepted request
316 02:09:44.249642 Returned 0 in 0 seconds
317 02:09:44.350846 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:09:44.352674 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:09:44.353323 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:09:44.353899 Setting prompt string to ['Hit any key to stop autoboot']
322 02:09:44.354411 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:09:44.356212 Trying 192.168.56.21...
324 02:09:44.356757 Connected to conserv1.
325 02:09:44.357218 Escape character is '^]'.
326 02:09:44.357676
327 02:09:44.358140 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 02:09:44.358598
329 02:09:56.192036 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 02:09:56.192488 bl2_stage_init 0x01
331 02:09:56.192704 bl2_stage_init 0x81
332 02:09:56.197589 hw id: 0x0000 - pwm id 0x01
333 02:09:56.198143 bl2_stage_init 0xc1
334 02:09:56.198605 bl2_stage_init 0x02
335 02:09:56.199039
336 02:09:56.203211 L0:00000000
337 02:09:56.203750 L1:20000703
338 02:09:56.204224 L2:00008067
339 02:09:56.204653 L3:14000000
340 02:09:56.205929 B2:00402000
341 02:09:56.206215 B1:e0f83180
342 02:09:56.206434
343 02:09:56.206637 TE: 58159
344 02:09:56.206834
345 02:09:56.216944 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 02:09:56.217304
347 02:09:56.217506 Board ID = 1
348 02:09:56.217875 Set A53 clk to 24M
349 02:09:56.218315 Set A73 clk to 24M
350 02:09:56.222786 Set clk81 to 24M
351 02:09:56.223348 A53 clk: 1200 MHz
352 02:09:56.223786 A73 clk: 1200 MHz
353 02:09:56.228300 CLK81: 166.6M
354 02:09:56.228826 smccc: 00012ab5
355 02:09:56.233850 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 02:09:56.234412 board id: 1
357 02:09:56.239572 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:09:56.253251 fw parse done
359 02:09:56.259044 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:09:56.301789 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:09:56.316227 PIEI prepare done
362 02:09:56.316803 fastboot data load
363 02:09:56.317255 fastboot data verify
364 02:09:56.318574 verify result: 266
365 02:09:56.324026 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 02:09:56.324625 LPDDR4 probe
367 02:09:56.325070 ddr clk to 1584MHz
368 02:09:56.332526 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:09:56.369223
370 02:09:56.369658 dmc_version 0001
371 02:09:56.375845 Check phy result
372 02:09:56.381946 INFO : End of CA training
373 02:09:56.382482 INFO : End of initialization
374 02:09:56.387449 INFO : Training has run successfully!
375 02:09:56.387955 Check phy result
376 02:09:56.393032 INFO : End of initialization
377 02:09:56.393498 INFO : End of read enable training
378 02:09:56.396364 INFO : End of fine write leveling
379 02:09:56.401966 INFO : End of Write leveling coarse delay
380 02:09:56.407634 INFO : Training has run successfully!
381 02:09:56.408154 Check phy result
382 02:09:56.408501 INFO : End of initialization
383 02:09:56.413203 INFO : End of read dq deskew training
384 02:09:56.418748 INFO : End of MPR read delay center optimization
385 02:09:56.419272 INFO : End of write delay center optimization
386 02:09:56.424434 INFO : End of read delay center optimization
387 02:09:56.430091 INFO : End of max read latency training
388 02:09:56.430690 INFO : Training has run successfully!
389 02:09:56.435532 1D training succeed
390 02:09:56.441481 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:09:56.488915 Check phy result
392 02:09:56.489345 INFO : End of initialization
393 02:09:56.510633 INFO : End of 2D read delay Voltage center optimization
394 02:09:56.530878 INFO : End of 2D read delay Voltage center optimization
395 02:09:56.582903 INFO : End of 2D write delay Voltage center optimization
396 02:09:56.632362 INFO : End of 2D write delay Voltage center optimization
397 02:09:56.637895 INFO : Training has run successfully!
398 02:09:56.638265
399 02:09:56.638506 channel==0
400 02:09:56.643487 RxClkDly_Margin_A0==88 ps 9
401 02:09:56.643866 TxDqDly_Margin_A0==98 ps 10
402 02:09:56.649113 RxClkDly_Margin_A1==88 ps 9
403 02:09:56.649492 TxDqDly_Margin_A1==98 ps 10
404 02:09:56.649719 TrainedVREFDQ_A0==74
405 02:09:56.654678 TrainedVREFDQ_A1==74
406 02:09:56.655057 VrefDac_Margin_A0==25
407 02:09:56.655373 DeviceVref_Margin_A0==40
408 02:09:56.660310 VrefDac_Margin_A1==25
409 02:09:56.660712 DeviceVref_Margin_A1==40
410 02:09:56.660933
411 02:09:56.661146
412 02:09:56.665881 channel==1
413 02:09:56.666231 RxClkDly_Margin_A0==98 ps 10
414 02:09:56.666456 TxDqDly_Margin_A0==88 ps 9
415 02:09:56.671401 RxClkDly_Margin_A1==98 ps 10
416 02:09:56.671763 TxDqDly_Margin_A1==88 ps 9
417 02:09:56.677114 TrainedVREFDQ_A0==77
418 02:09:56.677508 TrainedVREFDQ_A1==77
419 02:09:56.677737 VrefDac_Margin_A0==22
420 02:09:56.682672 DeviceVref_Margin_A0==37
421 02:09:56.683029 VrefDac_Margin_A1==22
422 02:09:56.688305 DeviceVref_Margin_A1==37
423 02:09:56.688691
424 02:09:56.688923 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:09:56.689141
426 02:09:56.721802 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 02:09:56.722290 2D training succeed
428 02:09:56.727476 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:09:56.732992 auto size-- 65535DDR cs0 size: 2048MB
430 02:09:56.733410 DDR cs1 size: 2048MB
431 02:09:56.738786 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:09:56.739179 cs0 DataBus test pass
433 02:09:56.744180 cs1 DataBus test pass
434 02:09:56.744549 cs0 AddrBus test pass
435 02:09:56.744786 cs1 AddrBus test pass
436 02:09:56.745003
437 02:09:56.749657 100bdlr_step_size ps== 420
438 02:09:56.749945 result report
439 02:09:56.755229 boot times 0Enable ddr reg access
440 02:09:56.760686 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:09:56.774274 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 02:09:57.347904 0.0;M3 CHK:0;cm4_sp_mode 0
443 02:09:57.348608 MVN_1=0x00000000
444 02:09:57.353425 MVN_2=0x00000000
445 02:09:57.359146 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 02:09:57.359632 OPS=0x10
447 02:09:57.360110 ring efuse init
448 02:09:57.360548 chipver efuse init
449 02:09:57.364770 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 02:09:57.370368 [0.018960 Inits done]
451 02:09:57.370848 secure task start!
452 02:09:57.371284 high task start!
453 02:09:57.374971 low task start!
454 02:09:57.375451 run into bl31
455 02:09:57.381577 NOTICE: BL31: v1.3(release):4fc40b1
456 02:09:57.389428 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 02:09:57.389907 NOTICE: BL31: G12A normal boot!
458 02:09:57.415415 NOTICE: BL31: BL33 decompress pass
459 02:09:57.420957 ERROR: Error initializing runtime service opteed_fast
460 02:09:58.653780
461 02:09:58.654431
462 02:09:58.662112 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 02:09:58.662630
464 02:09:58.663085 Model: Libre Computer AML-A311D-CC Alta
465 02:09:58.870692 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 02:09:58.893947 DRAM: 2 GiB (effective 3.8 GiB)
467 02:09:59.036971 Core: 408 devices, 31 uclasses, devicetree: separate
468 02:09:59.042779 WDT: Not starting watchdog@f0d0
469 02:09:59.075057 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 02:09:59.087551 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 02:09:59.092169 ** Bad device specification mmc 0 **
472 02:09:59.102845 Card did not respond to voltage select! : -110
473 02:09:59.109676 ** Bad device specification mmc 0 **
474 02:09:59.110227 Couldn't find partition mmc 0
475 02:09:59.118834 Card did not respond to voltage select! : -110
476 02:09:59.124359 ** Bad device specification mmc 0 **
477 02:09:59.124906 Couldn't find partition mmc 0
478 02:09:59.129489 Error: could not access storage.
479 02:10:00.391278 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 02:10:00.391933 bl2_stage_init 0x01
481 02:10:00.392476 bl2_stage_init 0x81
482 02:10:00.396808 hw id: 0x0000 - pwm id 0x01
483 02:10:00.397296 bl2_stage_init 0xc1
484 02:10:00.397750 bl2_stage_init 0x02
485 02:10:00.398192
486 02:10:00.402463 L0:00000000
487 02:10:00.403041 L1:20000703
488 02:10:00.403495 L2:00008067
489 02:10:00.403937 L3:14000000
490 02:10:00.408034 B2:00402000
491 02:10:00.408509 B1:e0f83180
492 02:10:00.408951
493 02:10:00.409388 TE: 58159
494 02:10:00.409826
495 02:10:00.413711 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 02:10:00.414221
497 02:10:00.414683 Board ID = 1
498 02:10:00.419204 Set A53 clk to 24M
499 02:10:00.419688 Set A73 clk to 24M
500 02:10:00.420170 Set clk81 to 24M
501 02:10:00.424802 A53 clk: 1200 MHz
502 02:10:00.425291 A73 clk: 1200 MHz
503 02:10:00.425735 CLK81: 166.6M
504 02:10:00.426172 smccc: 00012ab5
505 02:10:00.430408 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 02:10:00.436076 board id: 1
507 02:10:00.441955 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 02:10:00.452842 fw parse done
509 02:10:00.458575 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 02:10:00.501169 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 02:10:00.512095 PIEI prepare done
512 02:10:00.512611 fastboot data load
513 02:10:00.513070 fastboot data verify
514 02:10:00.517720 verify result: 266
515 02:10:00.523253 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 02:10:00.523760 LPDDR4 probe
517 02:10:00.524260 ddr clk to 1584MHz
518 02:10:00.531237 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 02:10:00.568626
520 02:10:00.569224 dmc_version 0001
521 02:10:00.575143 Check phy result
522 02:10:00.580990 INFO : End of CA training
523 02:10:00.581460 INFO : End of initialization
524 02:10:00.586664 INFO : Training has run successfully!
525 02:10:00.587129 Check phy result
526 02:10:00.592177 INFO : End of initialization
527 02:10:00.592645 INFO : End of read enable training
528 02:10:00.597778 INFO : End of fine write leveling
529 02:10:00.603409 INFO : End of Write leveling coarse delay
530 02:10:00.603892 INFO : Training has run successfully!
531 02:10:00.604385 Check phy result
532 02:10:00.609422 INFO : End of initialization
533 02:10:00.609895 INFO : End of read dq deskew training
534 02:10:00.614700 INFO : End of MPR read delay center optimization
535 02:10:00.620305 INFO : End of write delay center optimization
536 02:10:00.625775 INFO : End of read delay center optimization
537 02:10:00.626290 INFO : End of max read latency training
538 02:10:00.631491 INFO : Training has run successfully!
539 02:10:00.632050 1D training succeed
540 02:10:00.640595 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 02:10:00.688263 Check phy result
542 02:10:00.688804 INFO : End of initialization
543 02:10:00.710635 INFO : End of 2D read delay Voltage center optimization
544 02:10:00.730805 INFO : End of 2D read delay Voltage center optimization
545 02:10:00.782666 INFO : End of 2D write delay Voltage center optimization
546 02:10:00.831862 INFO : End of 2D write delay Voltage center optimization
547 02:10:00.837481 INFO : Training has run successfully!
548 02:10:00.837958
549 02:10:00.838422 channel==0
550 02:10:00.843012 RxClkDly_Margin_A0==88 ps 9
551 02:10:00.843506 TxDqDly_Margin_A0==98 ps 10
552 02:10:00.848700 RxClkDly_Margin_A1==88 ps 9
553 02:10:00.849209 TxDqDly_Margin_A1==98 ps 10
554 02:10:00.849662 TrainedVREFDQ_A0==74
555 02:10:00.854220 TrainedVREFDQ_A1==74
556 02:10:00.854693 VrefDac_Margin_A0==24
557 02:10:00.855133 DeviceVref_Margin_A0==40
558 02:10:00.859804 VrefDac_Margin_A1==24
559 02:10:00.860304 DeviceVref_Margin_A1==40
560 02:10:00.860742
561 02:10:00.861178
562 02:10:00.865445 channel==1
563 02:10:00.865905 RxClkDly_Margin_A0==98 ps 10
564 02:10:00.866342 TxDqDly_Margin_A0==98 ps 10
565 02:10:00.870975 RxClkDly_Margin_A1==98 ps 10
566 02:10:00.871448 TxDqDly_Margin_A1==88 ps 9
567 02:10:00.876708 TrainedVREFDQ_A0==77
568 02:10:00.877180 TrainedVREFDQ_A1==77
569 02:10:00.877623 VrefDac_Margin_A0==22
570 02:10:00.882196 DeviceVref_Margin_A0==37
571 02:10:00.882662 VrefDac_Margin_A1==24
572 02:10:00.887817 DeviceVref_Margin_A1==37
573 02:10:00.888312
574 02:10:00.888757 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 02:10:00.893473
576 02:10:00.921494 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 02:10:00.922026 2D training succeed
578 02:10:00.926992 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 02:10:00.932701 auto size-- 65535DDR cs0 size: 2048MB
580 02:10:00.933173 DDR cs1 size: 2048MB
581 02:10:00.938201 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 02:10:00.938672 cs0 DataBus test pass
583 02:10:00.943904 cs1 DataBus test pass
584 02:10:00.944426 cs0 AddrBus test pass
585 02:10:00.944867 cs1 AddrBus test pass
586 02:10:00.945299
587 02:10:00.949506 100bdlr_step_size ps== 420
588 02:10:00.950029 result report
589 02:10:00.955032 boot times 0Enable ddr reg access
590 02:10:00.960446 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 02:10:00.973900 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 02:10:01.546136 0.0;M3 CHK:0;cm4_sp_mode 0
593 02:10:01.546833 MVN_1=0x00000000
594 02:10:01.551561 MVN_2=0x00000000
595 02:10:01.557300 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 02:10:01.557832 OPS=0x10
597 02:10:01.558293 ring efuse init
598 02:10:01.558761 chipver efuse init
599 02:10:01.565698 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 02:10:01.566246 [0.018961 Inits done]
601 02:10:01.566687 secure task start!
602 02:10:01.573120 high task start!
603 02:10:01.573605 low task start!
604 02:10:01.574035 run into bl31
605 02:10:01.579692 NOTICE: BL31: v1.3(release):4fc40b1
606 02:10:01.587515 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 02:10:01.588014 NOTICE: BL31: G12A normal boot!
608 02:10:01.612917 NOTICE: BL31: BL33 decompress pass
609 02:10:01.618578 ERROR: Error initializing runtime service opteed_fast
610 02:10:02.851527
611 02:10:02.852260
612 02:10:02.859835 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 02:10:02.860430
614 02:10:02.860898 Model: Libre Computer AML-A311D-CC Alta
615 02:10:03.068258 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 02:10:03.091607 DRAM: 2 GiB (effective 3.8 GiB)
617 02:10:03.234855 Core: 408 devices, 31 uclasses, devicetree: separate
618 02:10:03.240523 WDT: Not starting watchdog@f0d0
619 02:10:03.272950 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 02:10:03.285351 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 02:10:03.290306 ** Bad device specification mmc 0 **
622 02:10:03.300632 Card did not respond to voltage select! : -110
623 02:10:03.308288 ** Bad device specification mmc 0 **
624 02:10:03.308797 Couldn't find partition mmc 0
625 02:10:03.316591 Card did not respond to voltage select! : -110
626 02:10:03.322104 ** Bad device specification mmc 0 **
627 02:10:03.322598 Couldn't find partition mmc 0
628 02:10:03.327205 Error: could not access storage.
629 02:10:03.669673 Net: eth0: ethernet@ff3f0000
630 02:10:03.670340 starting USB...
631 02:10:03.921629 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 02:10:03.922282 Starting the controller
633 02:10:03.928576 USB XHCI 1.10
634 02:10:05.643744 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 02:10:05.644419 bl2_stage_init 0x01
636 02:10:05.644889 bl2_stage_init 0x81
637 02:10:05.648359 hw id: 0x0000 - pwm id 0x01
638 02:10:05.649056 bl2_stage_init 0xc1
639 02:10:05.649544 bl2_stage_init 0x02
640 02:10:05.650012
641 02:10:05.653976 L0:00000000
642 02:10:05.654482 L1:20000703
643 02:10:05.654934 L2:00008067
644 02:10:05.655375 L3:14000000
645 02:10:05.656820 B2:00402000
646 02:10:05.657323 B1:e0f83180
647 02:10:05.657769
648 02:10:05.658227 TE: 58124
649 02:10:05.658671
650 02:10:05.667936 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 02:10:05.668497
652 02:10:05.668959 Board ID = 1
653 02:10:05.669401 Set A53 clk to 24M
654 02:10:05.669838 Set A73 clk to 24M
655 02:10:05.673534 Set clk81 to 24M
656 02:10:05.674038 A53 clk: 1200 MHz
657 02:10:05.674485 A73 clk: 1200 MHz
658 02:10:05.679131 CLK81: 166.6M
659 02:10:05.679622 smccc: 00012a92
660 02:10:05.684738 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 02:10:05.685224 board id: 1
662 02:10:05.690389 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 02:10:05.704191 fw parse done
664 02:10:05.710104 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 02:10:05.751729 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 02:10:05.763600 PIEI prepare done
667 02:10:05.764115 fastboot data load
668 02:10:05.764569 fastboot data verify
669 02:10:05.769153 verify result: 266
670 02:10:05.774809 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 02:10:05.775331 LPDDR4 probe
672 02:10:05.775789 ddr clk to 1584MHz
673 02:10:05.782777 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 02:10:05.820083
675 02:10:05.820612 dmc_version 0001
676 02:10:05.826698 Check phy result
677 02:10:05.832583 INFO : End of CA training
678 02:10:05.833080 INFO : End of initialization
679 02:10:05.838211 INFO : Training has run successfully!
680 02:10:05.838698 Check phy result
681 02:10:05.843782 INFO : End of initialization
682 02:10:05.844314 INFO : End of read enable training
683 02:10:05.849376 INFO : End of fine write leveling
684 02:10:05.854998 INFO : End of Write leveling coarse delay
685 02:10:05.855519 INFO : Training has run successfully!
686 02:10:05.855970 Check phy result
687 02:10:05.860592 INFO : End of initialization
688 02:10:05.861089 INFO : End of read dq deskew training
689 02:10:05.866197 INFO : End of MPR read delay center optimization
690 02:10:05.871820 INFO : End of write delay center optimization
691 02:10:05.877488 INFO : End of read delay center optimization
692 02:10:05.878081 INFO : End of max read latency training
693 02:10:05.882970 INFO : Training has run successfully!
694 02:10:05.883475 1D training succeed
695 02:10:05.892218 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 02:10:05.939789 Check phy result
697 02:10:05.940366 INFO : End of initialization
698 02:10:05.961558 INFO : End of 2D read delay Voltage center optimization
699 02:10:05.981753 INFO : End of 2D read delay Voltage center optimization
700 02:10:06.033789 INFO : End of 2D write delay Voltage center optimization
701 02:10:06.083187 INFO : End of 2D write delay Voltage center optimization
702 02:10:06.088686 INFO : Training has run successfully!
703 02:10:06.089175
704 02:10:06.089626 channel==0
705 02:10:06.094263 RxClkDly_Margin_A0==88 ps 9
706 02:10:06.094742 TxDqDly_Margin_A0==98 ps 10
707 02:10:06.099856 RxClkDly_Margin_A1==88 ps 9
708 02:10:06.100366 TxDqDly_Margin_A1==98 ps 10
709 02:10:06.100821 TrainedVREFDQ_A0==74
710 02:10:06.105469 TrainedVREFDQ_A1==76
711 02:10:06.105946 VrefDac_Margin_A0==25
712 02:10:06.106389 DeviceVref_Margin_A0==40
713 02:10:06.111030 VrefDac_Margin_A1==23
714 02:10:06.111502 DeviceVref_Margin_A1==38
715 02:10:06.111945
716 02:10:06.112431
717 02:10:06.116687 channel==1
718 02:10:06.117158 RxClkDly_Margin_A0==98 ps 10
719 02:10:06.117601 TxDqDly_Margin_A0==88 ps 9
720 02:10:06.122243 RxClkDly_Margin_A1==98 ps 10
721 02:10:06.122722 TxDqDly_Margin_A1==88 ps 9
722 02:10:06.127847 TrainedVREFDQ_A0==77
723 02:10:06.128362 TrainedVREFDQ_A1==77
724 02:10:06.128809 VrefDac_Margin_A0==22
725 02:10:06.133498 DeviceVref_Margin_A0==37
726 02:10:06.133976 VrefDac_Margin_A1==22
727 02:10:06.139073 DeviceVref_Margin_A1==37
728 02:10:06.139556
729 02:10:06.140034 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 02:10:06.140478
731 02:10:06.172661 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000019 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 02:10:06.173208 2D training succeed
733 02:10:06.178318 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 02:10:06.183810 auto size-- 65535DDR cs0 size: 2048MB
735 02:10:06.184362 DDR cs1 size: 2048MB
736 02:10:06.189508 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 02:10:06.189994 cs0 DataBus test pass
738 02:10:06.195074 cs1 DataBus test pass
739 02:10:06.195561 cs0 AddrBus test pass
740 02:10:06.196038 cs1 AddrBus test pass
741 02:10:06.196484
742 02:10:06.200646 100bdlr_step_size ps== 420
743 02:10:06.201140 result report
744 02:10:06.206236 boot times 0Enable ddr reg access
745 02:10:06.211575 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 02:10:06.225073 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 02:10:06.798846 0.0;M3 CHK:0;cm4_sp_mode 0
748 02:10:06.799502 MVN_1=0x00000000
749 02:10:06.804341 MVN_2=0x00000000
750 02:10:06.810081 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 02:10:06.810656 OPS=0x10
752 02:10:06.811099 ring efuse init
753 02:10:06.811528 chipver efuse init
754 02:10:06.815711 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 02:10:06.821300 [0.018960 Inits done]
756 02:10:06.821787 secure task start!
757 02:10:06.822218 high task start!
758 02:10:06.824888 low task start!
759 02:10:06.825380 run into bl31
760 02:10:06.832549 NOTICE: BL31: v1.3(release):4fc40b1
761 02:10:06.839460 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 02:10:06.840033 NOTICE: BL31: G12A normal boot!
763 02:10:06.865909 NOTICE: BL31: BL33 decompress pass
764 02:10:06.871499 ERROR: Error initializing runtime service opteed_fast
765 02:10:08.104369
766 02:10:08.105031
767 02:10:08.112816 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 02:10:08.113352
769 02:10:08.113840 Model: Libre Computer AML-A311D-CC Alta
770 02:10:08.321226 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 02:10:08.344565 DRAM: 2 GiB (effective 3.8 GiB)
772 02:10:08.487556 Core: 408 devices, 31 uclasses, devicetree: separate
773 02:10:08.493409 WDT: Not starting watchdog@f0d0
774 02:10:08.525808 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 02:10:08.538126 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 02:10:08.543124 ** Bad device specification mmc 0 **
777 02:10:08.553576 Card did not respond to voltage select! : -110
778 02:10:08.561110 ** Bad device specification mmc 0 **
779 02:10:08.561435 Couldn't find partition mmc 0
780 02:10:08.569472 Card did not respond to voltage select! : -110
781 02:10:08.575030 ** Bad device specification mmc 0 **
782 02:10:08.575619 Couldn't find partition mmc 0
783 02:10:08.580027 Error: could not access storage.
784 02:10:08.921598 Net: eth0: ethernet@ff3f0000
785 02:10:08.922293 starting USB...
786 02:10:09.174282 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 02:10:09.174849 Starting the controller
788 02:10:09.180330 USB XHCI 1.10
789 02:10:11.341672 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 02:10:11.342350 bl2_stage_init 0x01
791 02:10:11.342827 bl2_stage_init 0x81
792 02:10:11.347332 hw id: 0x0000 - pwm id 0x01
793 02:10:11.347887 bl2_stage_init 0xc1
794 02:10:11.348403 bl2_stage_init 0x02
795 02:10:11.348858
796 02:10:11.352929 L0:00000000
797 02:10:11.353486 L1:20000703
798 02:10:11.353959 L2:00008067
799 02:10:11.354415 L3:14000000
800 02:10:11.355736 B2:00402000
801 02:10:11.356290 B1:e0f83180
802 02:10:11.356750
803 02:10:11.357200 TE: 58167
804 02:10:11.357644
805 02:10:11.366827 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 02:10:11.367350
807 02:10:11.367808 Board ID = 1
808 02:10:11.368295 Set A53 clk to 24M
809 02:10:11.368742 Set A73 clk to 24M
810 02:10:11.372504 Set clk81 to 24M
811 02:10:11.373017 A53 clk: 1200 MHz
812 02:10:11.373471 A73 clk: 1200 MHz
813 02:10:11.378028 CLK81: 166.6M
814 02:10:11.378539 smccc: 00012abe
815 02:10:11.383684 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 02:10:11.384241 board id: 1
817 02:10:11.389228 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 02:10:11.402889 fw parse done
819 02:10:11.408865 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 02:10:11.451468 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 02:10:11.462461 PIEI prepare done
822 02:10:11.463024 fastboot data load
823 02:10:11.463487 fastboot data verify
824 02:10:11.468067 verify result: 266
825 02:10:11.473653 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 02:10:11.474196 LPDDR4 probe
827 02:10:11.474653 ddr clk to 1584MHz
828 02:10:11.481635 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 02:10:11.518954
830 02:10:11.519588 dmc_version 0001
831 02:10:11.525645 Check phy result
832 02:10:11.531408 INFO : End of CA training
833 02:10:11.531946 INFO : End of initialization
834 02:10:11.537209 INFO : Training has run successfully!
835 02:10:11.537758 Check phy result
836 02:10:11.542883 INFO : End of initialization
837 02:10:11.543446 INFO : End of read enable training
838 02:10:11.548328 INFO : End of fine write leveling
839 02:10:11.553913 INFO : End of Write leveling coarse delay
840 02:10:11.554514 INFO : Training has run successfully!
841 02:10:11.554973 Check phy result
842 02:10:11.559435 INFO : End of initialization
843 02:10:11.559961 INFO : End of read dq deskew training
844 02:10:11.565085 INFO : End of MPR read delay center optimization
845 02:10:11.570756 INFO : End of write delay center optimization
846 02:10:11.576287 INFO : End of read delay center optimization
847 02:10:11.576827 INFO : End of max read latency training
848 02:10:11.581863 INFO : Training has run successfully!
849 02:10:11.582380 1D training succeed
850 02:10:11.591044 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 02:10:11.638629 Check phy result
852 02:10:11.639233 INFO : End of initialization
853 02:10:11.661261 INFO : End of 2D read delay Voltage center optimization
854 02:10:11.680361 INFO : End of 2D read delay Voltage center optimization
855 02:10:11.732408 INFO : End of 2D write delay Voltage center optimization
856 02:10:11.781525 INFO : End of 2D write delay Voltage center optimization
857 02:10:11.787229 INFO : Training has run successfully!
858 02:10:11.787755
859 02:10:11.788267 channel==0
860 02:10:11.792772 RxClkDly_Margin_A0==88 ps 9
861 02:10:11.793304 TxDqDly_Margin_A0==98 ps 10
862 02:10:11.798329 RxClkDly_Margin_A1==88 ps 9
863 02:10:11.798852 TxDqDly_Margin_A1==88 ps 9
864 02:10:11.799308 TrainedVREFDQ_A0==74
865 02:10:11.804005 TrainedVREFDQ_A1==74
866 02:10:11.804554 VrefDac_Margin_A0==25
867 02:10:11.804994 DeviceVref_Margin_A0==40
868 02:10:11.809565 VrefDac_Margin_A1==25
869 02:10:11.810101 DeviceVref_Margin_A1==40
870 02:10:11.810528
871 02:10:11.810955
872 02:10:11.811379 channel==1
873 02:10:11.815208 RxClkDly_Margin_A0==98 ps 10
874 02:10:11.815717 TxDqDly_Margin_A0==98 ps 10
875 02:10:11.820711 RxClkDly_Margin_A1==98 ps 10
876 02:10:11.821221 TxDqDly_Margin_A1==88 ps 9
877 02:10:11.826458 TrainedVREFDQ_A0==77
878 02:10:11.826972 TrainedVREFDQ_A1==77
879 02:10:11.827407 VrefDac_Margin_A0==22
880 02:10:11.831830 DeviceVref_Margin_A0==37
881 02:10:11.832380 VrefDac_Margin_A1==24
882 02:10:11.837428 DeviceVref_Margin_A1==37
883 02:10:11.837946
884 02:10:11.838378 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 02:10:11.838805
886 02:10:11.871005 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
887 02:10:11.871612 2D training succeed
888 02:10:11.876641 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 02:10:11.882203 auto size-- 65535DDR cs0 size: 2048MB
890 02:10:11.882709 DDR cs1 size: 2048MB
891 02:10:11.887837 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 02:10:11.888392 cs0 DataBus test pass
893 02:10:11.893424 cs1 DataBus test pass
894 02:10:11.893949 cs0 AddrBus test pass
895 02:10:11.894412 cs1 AddrBus test pass
896 02:10:11.894834
897 02:10:11.899063 100bdlr_step_size ps== 420
898 02:10:11.899594 result report
899 02:10:11.904608 boot times 0Enable ddr reg access
900 02:10:11.910003 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 02:10:11.923469 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 02:10:12.495562 0.0;M3 CHK:0;cm4_sp_mode 0
903 02:10:12.496289 MVN_1=0x00000000
904 02:10:12.500971 MVN_2=0x00000000
905 02:10:12.506721 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 02:10:12.507251 OPS=0x10
907 02:10:12.507706 ring efuse init
908 02:10:12.508193 chipver efuse init
909 02:10:12.514978 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 02:10:12.515550 [0.018961 Inits done]
911 02:10:12.516043 secure task start!
912 02:10:12.522580 high task start!
913 02:10:12.523127 low task start!
914 02:10:12.523583 run into bl31
915 02:10:12.529241 NOTICE: BL31: v1.3(release):4fc40b1
916 02:10:12.536974 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 02:10:12.537522 NOTICE: BL31: G12A normal boot!
918 02:10:12.562306 NOTICE: BL31: BL33 decompress pass
919 02:10:12.568019 ERROR: Error initializing runtime service opteed_fast
920 02:10:13.800894
921 02:10:13.801521
922 02:10:13.809294 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 02:10:13.809828
924 02:10:13.810297 Model: Libre Computer AML-A311D-CC Alta
925 02:10:14.017802 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 02:10:14.041116 DRAM: 2 GiB (effective 3.8 GiB)
927 02:10:14.184100 Core: 408 devices, 31 uclasses, devicetree: separate
928 02:10:14.189991 WDT: Not starting watchdog@f0d0
929 02:10:14.222245 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 02:10:14.234673 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 02:10:14.239808 ** Bad device specification mmc 0 **
932 02:10:14.249985 Card did not respond to voltage select! : -110
933 02:10:14.257801 ** Bad device specification mmc 0 **
934 02:10:14.258363 Couldn't find partition mmc 0
935 02:10:14.266010 Card did not respond to voltage select! : -110
936 02:10:14.271520 ** Bad device specification mmc 0 **
937 02:10:14.272109 Couldn't find partition mmc 0
938 02:10:14.276564 Error: could not access storage.
939 02:10:14.619001 Net: eth0: ethernet@ff3f0000
940 02:10:14.619651 starting USB...
941 02:10:14.870659 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 02:10:14.871095 Starting the controller
943 02:10:14.877695 USB XHCI 1.10
944 02:10:16.741319 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
945 02:10:16.741966 bl2_stage_init 0x01
946 02:10:16.742437 bl2_stage_init 0x81
947 02:10:16.746945 hw id: 0x0000 - pwm id 0x01
948 02:10:16.747466 bl2_stage_init 0xc1
949 02:10:16.747928 bl2_stage_init 0x02
950 02:10:16.748446
951 02:10:16.752462 L0:00000000
952 02:10:16.752976 L1:20000703
953 02:10:16.753429 L2:00008067
954 02:10:16.753873 L3:14000000
955 02:10:16.758056 B2:00402000
956 02:10:16.758570 B1:e0f83180
957 02:10:16.759018
958 02:10:16.759462 TE: 58124
959 02:10:16.759904
960 02:10:16.763684 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
961 02:10:16.764228
962 02:10:16.764682 Board ID = 1
963 02:10:16.769220 Set A53 clk to 24M
964 02:10:16.769724 Set A73 clk to 24M
965 02:10:16.770172 Set clk81 to 24M
966 02:10:16.774923 A53 clk: 1200 MHz
967 02:10:16.775429 A73 clk: 1200 MHz
968 02:10:16.775873 CLK81: 166.6M
969 02:10:16.776353 smccc: 00012a92
970 02:10:16.780421 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
971 02:10:16.786055 board id: 1
972 02:10:16.792067 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
973 02:10:16.802573 fw parse done
974 02:10:16.809212 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
975 02:10:16.851197 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
976 02:10:16.862120 PIEI prepare done
977 02:10:16.862801 fastboot data load
978 02:10:16.863231 fastboot data verify
979 02:10:16.867747 verify result: 266
980 02:10:16.873278 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
981 02:10:16.873926 LPDDR4 probe
982 02:10:16.874441 ddr clk to 1584MHz
983 02:10:16.881331 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
984 02:10:16.918638
985 02:10:16.919393 dmc_version 0001
986 02:10:16.925212 Check phy result
987 02:10:16.931065 INFO : End of CA training
988 02:10:16.931586 INFO : End of initialization
989 02:10:16.936745 INFO : Training has run successfully!
990 02:10:16.937277 Check phy result
991 02:10:16.942335 INFO : End of initialization
992 02:10:16.942843 INFO : End of read enable training
993 02:10:16.948276 INFO : End of fine write leveling
994 02:10:16.953616 INFO : End of Write leveling coarse delay
995 02:10:16.954108 INFO : Training has run successfully!
996 02:10:16.954526 Check phy result
997 02:10:16.959115 INFO : End of initialization
998 02:10:16.959583 INFO : End of read dq deskew training
999 02:10:16.964894 INFO : End of MPR read delay center optimization
1000 02:10:16.970404 INFO : End of write delay center optimization
1001 02:10:16.976112 INFO : End of read delay center optimization
1002 02:10:16.976583 INFO : End of max read latency training
1003 02:10:16.981638 INFO : Training has run successfully!
1004 02:10:16.982111 1D training succeed
1005 02:10:16.990845 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1006 02:10:17.038702 Check phy result
1007 02:10:17.039314 INFO : End of initialization
1008 02:10:17.059932 INFO : End of 2D read delay Voltage center optimization
1009 02:10:17.080057 INFO : End of 2D read delay Voltage center optimization
1010 02:10:17.131971 INFO : End of 2D write delay Voltage center optimization
1011 02:10:17.181402 INFO : End of 2D write delay Voltage center optimization
1012 02:10:17.186783 INFO : Training has run successfully!
1013 02:10:17.187233
1014 02:10:17.187601 channel==0
1015 02:10:17.192359 RxClkDly_Margin_A0==88 ps 9
1016 02:10:17.192794 TxDqDly_Margin_A0==98 ps 10
1017 02:10:17.198090 RxClkDly_Margin_A1==88 ps 9
1018 02:10:17.198515 TxDqDly_Margin_A1==98 ps 10
1019 02:10:17.198886 TrainedVREFDQ_A0==74
1020 02:10:17.203656 TrainedVREFDQ_A1==74
1021 02:10:17.204329 VrefDac_Margin_A0==25
1022 02:10:17.204794 DeviceVref_Margin_A0==40
1023 02:10:17.209274 VrefDac_Margin_A1==25
1024 02:10:17.209824 DeviceVref_Margin_A1==40
1025 02:10:17.210270
1026 02:10:17.210707
1027 02:10:17.214881 channel==1
1028 02:10:17.215446 RxClkDly_Margin_A0==98 ps 10
1029 02:10:17.215893 TxDqDly_Margin_A0==88 ps 9
1030 02:10:17.220466 RxClkDly_Margin_A1==98 ps 10
1031 02:10:17.221033 TxDqDly_Margin_A1==88 ps 9
1032 02:10:17.226084 TrainedVREFDQ_A0==77
1033 02:10:17.226659 TrainedVREFDQ_A1==77
1034 02:10:17.227106 VrefDac_Margin_A0==22
1035 02:10:17.231713 DeviceVref_Margin_A0==37
1036 02:10:17.232306 VrefDac_Margin_A1==22
1037 02:10:17.237221 DeviceVref_Margin_A1==37
1038 02:10:17.237782
1039 02:10:17.238225 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1040 02:10:17.238658
1041 02:10:17.270803 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
1042 02:10:17.271420 2D training succeed
1043 02:10:17.276437 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1044 02:10:17.281955 auto size-- 65535DDR cs0 size: 2048MB
1045 02:10:17.282502 DDR cs1 size: 2048MB
1046 02:10:17.287558 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1047 02:10:17.288154 cs0 DataBus test pass
1048 02:10:17.293157 cs1 DataBus test pass
1049 02:10:17.293695 cs0 AddrBus test pass
1050 02:10:17.294135 cs1 AddrBus test pass
1051 02:10:17.294566
1052 02:10:17.298794 100bdlr_step_size ps== 420
1053 02:10:17.299371 result report
1054 02:10:17.304421 boot times 0Enable ddr reg access
1055 02:10:17.309724 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1056 02:10:17.323153 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1057 02:10:17.895312 0.0;M3 CHK:0;cm4_sp_mode 0
1058 02:10:17.896028 MVN_1=0x00000000
1059 02:10:17.900714 MVN_2=0x00000000
1060 02:10:17.906440 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1061 02:10:17.907003 OPS=0x10
1062 02:10:17.907453 ring efuse init
1063 02:10:17.907887 chipver efuse init
1064 02:10:17.912205 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1065 02:10:17.917655 [0.018961 Inits done]
1066 02:10:17.918180 secure task start!
1067 02:10:17.918617 high task start!
1068 02:10:17.922269 low task start!
1069 02:10:17.922822 run into bl31
1070 02:10:17.928946 NOTICE: BL31: v1.3(release):4fc40b1
1071 02:10:17.936705 NOTICE: BL31: Built : 15:58:17, May 22 2019
1072 02:10:17.937245 NOTICE: BL31: G12A normal boot!
1073 02:10:17.962033 NOTICE: BL31: BL33 decompress pass
1074 02:10:17.967784 ERROR: Error initializing runtime service opteed_fast
1075 02:10:19.200629
1076 02:10:19.201270
1077 02:10:19.209045 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1078 02:10:19.209587
1079 02:10:19.210068 Model: Libre Computer AML-A311D-CC Alta
1080 02:10:19.417555 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1081 02:10:19.440833 DRAM: 2 GiB (effective 3.8 GiB)
1082 02:10:19.583908 Core: 408 devices, 31 uclasses, devicetree: separate
1083 02:10:19.589712 WDT: Not starting watchdog@f0d0
1084 02:10:19.621965 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1085 02:10:19.634381 Loading Environment from FAT... Card did not respond to voltage select! : -110
1086 02:10:19.639538 ** Bad device specification mmc 0 **
1087 02:10:19.649697 Card did not respond to voltage select! : -110
1088 02:10:19.657354 ** Bad device specification mmc 0 **
1089 02:10:19.657894 Couldn't find partition mmc 0
1090 02:10:19.665706 Card did not respond to voltage select! : -110
1091 02:10:19.671279 ** Bad device specification mmc 0 **
1092 02:10:19.671833 Couldn't find partition mmc 0
1093 02:10:19.676292 Error: could not access storage.
1094 02:10:20.019811 Net: eth0: ethernet@ff3f0000
1095 02:10:20.020312 starting USB...
1096 02:10:20.271617 Bus usb@ff500000: Register 3000140 NbrPorts 3
1097 02:10:20.272345 Starting the controller
1098 02:10:20.278563 USB XHCI 1.10
1099 02:10:21.832617 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1100 02:10:21.840952 scanning usb for storage devices... 0 Storage Device(s) found
1102 02:10:21.892650 Hit any key to stop autoboot: 1
1103 02:10:21.893619 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1104 02:10:21.894331 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1105 02:10:21.894846 Setting prompt string to ['=>']
1106 02:10:21.895367 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1107 02:10:21.908394 0
1108 02:10:21.909529 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1109 02:10:21.910185 Sending with 10 millisecond of delay
1111 02:10:23.046977 => setenv autoload no
1112 02:10:23.058053 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1113 02:10:23.060816 setenv autoload no
1114 02:10:23.061298 Sending with 10 millisecond of delay
1116 02:10:24.858105 => setenv initrd_high 0xffffffff
1117 02:10:24.868948 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1118 02:10:24.869871 setenv initrd_high 0xffffffff
1119 02:10:24.870629 Sending with 10 millisecond of delay
1121 02:10:26.487195 => setenv fdt_high 0xffffffff
1122 02:10:26.498055 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1123 02:10:26.498981 setenv fdt_high 0xffffffff
1124 02:10:26.499750 Sending with 10 millisecond of delay
1126 02:10:26.791722 => dhcp
1127 02:10:26.802535 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1128 02:10:26.803418 dhcp
1129 02:10:26.803889 Speed: 1000, full duplex
1130 02:10:26.804390 BOOTP broadcast 1
1131 02:10:27.025116 DHCP client bound to address 192.168.6.27 (222 ms)
1132 02:10:27.026006 Sending with 10 millisecond of delay
1134 02:10:28.702941 => setenv serverip 192.168.6.2
1135 02:10:28.713775 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1136 02:10:28.714693 setenv serverip 192.168.6.2
1137 02:10:28.715447 Sending with 10 millisecond of delay
1139 02:10:32.439513 => tftpboot 0x01080000 956783/tftp-deploy-aof0_3ch/kernel/uImage
1140 02:10:32.450414 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1141 02:10:32.451366 tftpboot 0x01080000 956783/tftp-deploy-aof0_3ch/kernel/uImage
1142 02:10:32.451853 Speed: 1000, full duplex
1143 02:10:32.452351 Using ethernet@ff3f0000 device
1144 02:10:32.453026 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1145 02:10:32.458509 Filename '956783/tftp-deploy-aof0_3ch/kernel/uImage'.
1146 02:10:32.461691 Load address: 0x1080000
1147 02:10:35.270001 Loading: *################################################## 43.6 MiB
1148 02:10:35.270650 15.5 MiB/s
1149 02:10:35.271074 done
1150 02:10:35.274388 Bytes transferred = 45713984 (2b98a40 hex)
1151 02:10:35.275184 Sending with 10 millisecond of delay
1153 02:10:39.964140 => tftpboot 0x08000000 956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
1154 02:10:39.974928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1155 02:10:39.975759 tftpboot 0x08000000 956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot
1156 02:10:39.976291 Speed: 1000, full duplex
1157 02:10:39.976710 Using ethernet@ff3f0000 device
1158 02:10:39.977719 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1159 02:10:39.986232 Filename '956783/tftp-deploy-aof0_3ch/ramdisk/ramdisk.cpio.gz.uboot'.
1160 02:10:39.986743 Load address: 0x8000000
1161 02:10:46.902604 Loading: *########################T ######################### UDP wrong checksum 00000005 0000f434
1162 02:10:51.903516 T UDP wrong checksum 00000005 0000f434
1163 02:11:01.906214 T UDP wrong checksum 00000005 0000f434
1164 02:11:21.909073 T T T T UDP wrong checksum 00000005 0000f434
1165 02:11:36.915896 T T T
1166 02:11:36.916607 Retry count exceeded; starting again
1168 02:11:36.918071 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1171 02:11:36.920040 end: 2.4 uboot-commands (duration 00:01:53) [common]
1173 02:11:36.921513 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1175 02:11:36.922610 end: 2 uboot-action (duration 00:01:53) [common]
1177 02:11:36.924273 Cleaning after the job
1178 02:11:36.924865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/ramdisk
1179 02:11:36.926428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/kernel
1180 02:11:36.975699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/dtb
1181 02:11:36.976546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/nfsrootfs
1182 02:11:37.293129 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956783/tftp-deploy-aof0_3ch/modules
1183 02:11:37.316883 start: 4.1 power-off (timeout 00:00:30) [common]
1184 02:11:37.317577 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1185 02:11:37.351465 >> OK - accepted request
1186 02:11:37.353683 Returned 0 in 0 seconds
1187 02:11:37.454493 end: 4.1 power-off (duration 00:00:00) [common]
1189 02:11:37.455509 start: 4.2 read-feedback (timeout 00:10:00) [common]
1190 02:11:37.456204 Listened to connection for namespace 'common' for up to 1s
1191 02:11:38.456232 Finalising connection for namespace 'common'
1192 02:11:38.456929 Disconnecting from shell: Finalise
1193 02:11:38.457431 =>
1194 02:11:38.558452 end: 4.2 read-feedback (duration 00:00:01) [common]
1195 02:11:38.559137 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956783
1196 02:11:41.197536 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956783
1197 02:11:41.198123 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.