Boot log: meson-sm1-s905d3-libretech-cc

    1 01:59:56.623213  lava-dispatcher, installed at version: 2024.01
    2 01:59:56.624119  start: 0 validate
    3 01:59:56.624615  Start time: 2024-11-09 01:59:56.624584+00:00 (UTC)
    4 01:59:56.625163  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 01:59:56.625750  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
    6 01:59:56.664321  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 01:59:56.665003  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 01:59:56.708615  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 01:59:56.709373  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 01:59:57.757536  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 01:59:57.758060  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   12 01:59:57.796956  validate duration: 1.17
   14 01:59:57.797939  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 01:59:57.798310  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 01:59:57.798635  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 01:59:57.799502  Not decompressing ramdisk as can be used compressed.
   18 01:59:57.800037  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
   19 01:59:57.800338  saving as /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/ramdisk/rootfs.cpio.gz
   20 01:59:57.800722  total size: 8181887 (7 MB)
   21 01:59:57.846753  progress   0 % (0 MB)
   22 01:59:57.853027  progress   5 % (0 MB)
   23 01:59:57.858664  progress  10 % (0 MB)
   24 01:59:57.864976  progress  15 % (1 MB)
   25 01:59:57.870461  progress  20 % (1 MB)
   26 01:59:57.876448  progress  25 % (1 MB)
   27 01:59:57.882027  progress  30 % (2 MB)
   28 01:59:57.887885  progress  35 % (2 MB)
   29 01:59:57.893764  progress  40 % (3 MB)
   30 01:59:57.899685  progress  45 % (3 MB)
   31 01:59:57.905718  progress  50 % (3 MB)
   32 01:59:57.912435  progress  55 % (4 MB)
   33 01:59:57.919345  progress  60 % (4 MB)
   34 01:59:57.926935  progress  65 % (5 MB)
   35 01:59:57.933574  progress  70 % (5 MB)
   36 01:59:57.940713  progress  75 % (5 MB)
   37 01:59:57.947560  progress  80 % (6 MB)
   38 01:59:57.954772  progress  85 % (6 MB)
   39 01:59:57.961041  progress  90 % (7 MB)
   40 01:59:57.967555  progress  95 % (7 MB)
   41 01:59:57.973342  progress 100 % (7 MB)
   42 01:59:57.974264  7 MB downloaded in 0.17 s (44.97 MB/s)
   43 01:59:57.975026  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 01:59:57.976390  end: 1.1 download-retry (duration 00:00:00) [common]
   46 01:59:57.976890  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 01:59:57.977340  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 01:59:57.978040  downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/kernel/Image
   49 01:59:57.978479  saving as /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/kernel/Image
   50 01:59:57.978861  total size: 45713920 (43 MB)
   51 01:59:57.979232  No compression specified
   52 01:59:58.017332  progress   0 % (0 MB)
   53 01:59:58.048554  progress   5 % (2 MB)
   54 01:59:58.076019  progress  10 % (4 MB)
   55 01:59:58.103195  progress  15 % (6 MB)
   56 01:59:58.130211  progress  20 % (8 MB)
   57 01:59:58.157229  progress  25 % (10 MB)
   58 01:59:58.184112  progress  30 % (13 MB)
   59 01:59:58.210948  progress  35 % (15 MB)
   60 01:59:58.238318  progress  40 % (17 MB)
   61 01:59:58.265011  progress  45 % (19 MB)
   62 01:59:58.292104  progress  50 % (21 MB)
   63 01:59:58.319312  progress  55 % (24 MB)
   64 01:59:58.346946  progress  60 % (26 MB)
   65 01:59:58.373639  progress  65 % (28 MB)
   66 01:59:58.401502  progress  70 % (30 MB)
   67 01:59:58.428720  progress  75 % (32 MB)
   68 01:59:58.456122  progress  80 % (34 MB)
   69 01:59:58.483768  progress  85 % (37 MB)
   70 01:59:58.511877  progress  90 % (39 MB)
   71 01:59:58.539781  progress  95 % (41 MB)
   72 01:59:58.566541  progress 100 % (43 MB)
   73 01:59:58.567103  43 MB downloaded in 0.59 s (74.11 MB/s)
   74 01:59:58.567590  end: 1.2.1 http-download (duration 00:00:01) [common]
   76 01:59:58.568496  end: 1.2 download-retry (duration 00:00:01) [common]
   77 01:59:58.568811  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 01:59:58.569109  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 01:59:58.569631  downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   80 01:59:58.569933  saving as /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/dtb/meson-sm1-s905d3-libretech-cc.dtb
   81 01:59:58.570145  total size: 53209 (0 MB)
   82 01:59:58.570363  No compression specified
   83 01:59:58.603729  progress  61 % (0 MB)
   84 01:59:58.604615  progress 100 % (0 MB)
   85 01:59:58.605185  0 MB downloaded in 0.04 s (1.45 MB/s)
   86 01:59:58.605656  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 01:59:58.606508  end: 1.3 download-retry (duration 00:00:00) [common]
   89 01:59:58.606796  start: 1.4 download-retry (timeout 00:09:59) [common]
   90 01:59:58.607080  start: 1.4.1 http-download (timeout 00:09:59) [common]
   91 01:59:58.607640  downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/modules.tar.xz
   92 01:59:58.607928  saving as /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/modules/modules.tar
   93 01:59:58.608167  total size: 11610740 (11 MB)
   94 01:59:58.608390  Using unxz to decompress xz
   95 01:59:58.642255  progress   0 % (0 MB)
   96 01:59:58.711726  progress   5 % (0 MB)
   97 01:59:58.791914  progress  10 % (1 MB)
   98 01:59:58.892236  progress  15 % (1 MB)
   99 01:59:58.999941  progress  20 % (2 MB)
  100 01:59:59.095498  progress  25 % (2 MB)
  101 01:59:59.186187  progress  30 % (3 MB)
  102 01:59:59.280604  progress  35 % (3 MB)
  103 01:59:59.368296  progress  40 % (4 MB)
  104 01:59:59.459599  progress  45 % (5 MB)
  105 01:59:59.561903  progress  50 % (5 MB)
  106 01:59:59.654607  progress  55 % (6 MB)
  107 01:59:59.757011  progress  60 % (6 MB)
  108 01:59:59.853592  progress  65 % (7 MB)
  109 01:59:59.951205  progress  70 % (7 MB)
  110 02:00:00.043894  progress  75 % (8 MB)
  111 02:00:00.144609  progress  80 % (8 MB)
  112 02:00:00.241419  progress  85 % (9 MB)
  113 02:00:00.335706  progress  90 % (9 MB)
  114 02:00:00.429850  progress  95 % (10 MB)
  115 02:00:00.522538  progress 100 % (11 MB)
  116 02:00:00.536340  11 MB downloaded in 1.93 s (5.74 MB/s)
  117 02:00:00.536985  end: 1.4.1 http-download (duration 00:00:02) [common]
  119 02:00:00.537820  end: 1.4 download-retry (duration 00:00:02) [common]
  120 02:00:00.538096  start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
  121 02:00:00.538362  start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
  122 02:00:00.538611  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 02:00:00.538867  start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
  124 02:00:00.539481  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux
  125 02:00:00.539972  makedir: /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin
  126 02:00:00.540660  makedir: /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/tests
  127 02:00:00.541282  makedir: /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/results
  128 02:00:00.541888  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-add-keys
  129 02:00:00.542828  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-add-sources
  130 02:00:00.543770  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-background-process-start
  131 02:00:00.544790  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-background-process-stop
  132 02:00:00.545816  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-common-functions
  133 02:00:00.546777  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-echo-ipv4
  134 02:00:00.547753  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-install-packages
  135 02:00:00.548862  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-installed-packages
  136 02:00:00.549782  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-os-build
  137 02:00:00.550686  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-probe-channel
  138 02:00:00.551587  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-probe-ip
  139 02:00:00.552536  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-target-ip
  140 02:00:00.553437  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-target-mac
  141 02:00:00.554275  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-target-storage
  142 02:00:00.554838  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-case
  143 02:00:00.555362  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-event
  144 02:00:00.555874  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-feedback
  145 02:00:00.556757  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-raise
  146 02:00:00.557657  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-reference
  147 02:00:00.558602  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-runner
  148 02:00:00.559626  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-set
  149 02:00:00.560630  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-test-shell
  150 02:00:00.561610  Updating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-install-packages (oe)
  151 02:00:00.562573  Updating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/bin/lava-installed-packages (oe)
  152 02:00:00.563403  Creating /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/environment
  153 02:00:00.564171  LAVA metadata
  154 02:00:00.564665  - LAVA_JOB_ID=964262
  155 02:00:00.565092  - LAVA_DISPATCHER_IP=192.168.6.2
  156 02:00:00.565766  start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
  157 02:00:00.567631  end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
  158 02:00:00.568280  start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
  159 02:00:00.568694  skipped lava-vland-overlay
  160 02:00:00.569178  end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
  161 02:00:00.569684  start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
  162 02:00:00.570112  skipped lava-multinode-overlay
  163 02:00:00.570589  end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  164 02:00:00.571083  start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
  165 02:00:00.571562  Loading test definitions
  166 02:00:00.572115  start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
  167 02:00:00.572394  Using /lava-964262 at stage 0
  168 02:00:00.573735  uuid=964262_1.5.2.4.1 testdef=None
  169 02:00:00.574066  end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
  170 02:00:00.574339  start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
  171 02:00:00.576239  end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
  173 02:00:00.577061  start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
  174 02:00:00.579396  end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
  176 02:00:00.580268  start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
  177 02:00:00.582554  runner path: /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/0/tests/0_dmesg test_uuid 964262_1.5.2.4.1
  178 02:00:00.583197  end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  180 02:00:00.584000  Creating lava-test-runner.conf files
  181 02:00:00.584218  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964262/lava-overlay-e26zcrux/lava-964262/0 for stage 0
  182 02:00:00.584614  - 0_dmesg
  183 02:00:00.584985  end: 1.5.2.4 test-definition (duration 00:00:00) [common]
  184 02:00:00.585274  start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
  185 02:00:00.609912  end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
  186 02:00:00.610361  start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
  187 02:00:00.610629  end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  188 02:00:00.610900  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  189 02:00:00.611163  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  190 02:00:01.590479  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  191 02:00:01.590950  start: 1.5.4 extract-modules (timeout 00:09:56) [common]
  192 02:00:01.591221  extracting modules file /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk
  193 02:00:02.938551  end: 1.5.4 extract-modules (duration 00:00:01) [common]
  194 02:00:02.939035  start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
  195 02:00:02.939324  [common] Applying overlay /var/lib/lava/dispatcher/tmp/964262/compress-overlay-bl1rleq3/overlay-1.5.2.5.tar.gz to ramdisk
  196 02:00:02.939548  [common] Applying overlay /var/lib/lava/dispatcher/tmp/964262/compress-overlay-bl1rleq3/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk
  197 02:00:02.970071  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  198 02:00:02.970521  start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
  199 02:00:02.970815  start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
  200 02:00:02.971055  Converting downloaded kernel to a uImage
  201 02:00:02.971366  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/kernel/Image /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/kernel/uImage
  202 02:00:03.424329  output: Image Name:   
  203 02:00:03.424744  output: Created:      Sat Nov  9 02:00:02 2024
  204 02:00:03.424956  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  205 02:00:03.425160  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  206 02:00:03.425362  output: Load Address: 01080000
  207 02:00:03.425561  output: Entry Point:  01080000
  208 02:00:03.425759  output: 
  209 02:00:03.426089  end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  210 02:00:03.426355  end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
  211 02:00:03.426623  start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
  212 02:00:03.426874  end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
  213 02:00:03.427129  start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
  214 02:00:03.427381  Building ramdisk /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk
  215 02:00:05.985173  >> 181575 blocks

  216 02:00:14.976091  Adding RAMdisk u-boot header.
  217 02:00:14.976819  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk.cpio.gz.uboot
  218 02:00:15.279393  output: Image Name:   
  219 02:00:15.279802  output: Created:      Sat Nov  9 02:00:14 2024
  220 02:00:15.280060  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  221 02:00:15.280480  output: Data Size:    26052729 Bytes = 25442.12 KiB = 24.85 MiB
  222 02:00:15.280876  output: Load Address: 00000000
  223 02:00:15.281267  output: Entry Point:  00000000
  224 02:00:15.281658  output: 
  225 02:00:15.282679  rename /var/lib/lava/dispatcher/tmp/964262/extract-overlay-ramdisk-qqm_x33g/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  226 02:00:15.283381  end: 1.5.8 compress-ramdisk (duration 00:00:12) [common]
  227 02:00:15.283917  end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
  228 02:00:15.284527  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
  229 02:00:15.284976  No LXC device requested
  230 02:00:15.285469  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  231 02:00:15.285970  start: 1.7 deploy-device-env (timeout 00:09:43) [common]
  232 02:00:15.286456  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  233 02:00:15.286863  Checking files for TFTP limit of 4294967296 bytes.
  234 02:00:15.289555  end: 1 tftp-deploy (duration 00:00:17) [common]
  235 02:00:15.290129  start: 2 uboot-action (timeout 00:05:00) [common]
  236 02:00:15.290647  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  237 02:00:15.291139  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  238 02:00:15.291636  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  239 02:00:15.292188  Using kernel file from prepare-kernel: 964262/tftp-deploy-nbhue23h/kernel/uImage
  240 02:00:15.292791  substitutions:
  241 02:00:15.293193  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  242 02:00:15.293587  - {DTB_ADDR}: 0x01070000
  243 02:00:15.293977  - {DTB}: 964262/tftp-deploy-nbhue23h/dtb/meson-sm1-s905d3-libretech-cc.dtb
  244 02:00:15.294370  - {INITRD}: 964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  245 02:00:15.294763  - {KERNEL_ADDR}: 0x01080000
  246 02:00:15.295151  - {KERNEL}: 964262/tftp-deploy-nbhue23h/kernel/uImage
  247 02:00:15.295541  - {LAVA_MAC}: None
  248 02:00:15.295965  - {PRESEED_CONFIG}: None
  249 02:00:15.296384  - {PRESEED_LOCAL}: None
  250 02:00:15.296771  - {RAMDISK_ADDR}: 0x08000000
  251 02:00:15.297156  - {RAMDISK}: 964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  252 02:00:15.297543  - {ROOT_PART}: None
  253 02:00:15.297928  - {ROOT}: None
  254 02:00:15.298310  - {SERVER_IP}: 192.168.6.2
  255 02:00:15.298699  - {TEE_ADDR}: 0x83000000
  256 02:00:15.299079  - {TEE}: None
  257 02:00:15.299460  Parsed boot commands:
  258 02:00:15.299833  - setenv autoload no
  259 02:00:15.300239  - setenv initrd_high 0xffffffff
  260 02:00:15.300624  - setenv fdt_high 0xffffffff
  261 02:00:15.301006  - dhcp
  262 02:00:15.301389  - setenv serverip 192.168.6.2
  263 02:00:15.301769  - tftpboot 0x01080000 964262/tftp-deploy-nbhue23h/kernel/uImage
  264 02:00:15.302152  - tftpboot 0x08000000 964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  265 02:00:15.302532  - tftpboot 0x01070000 964262/tftp-deploy-nbhue23h/dtb/meson-sm1-s905d3-libretech-cc.dtb
  266 02:00:15.302915  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  267 02:00:15.303303  - bootm 0x01080000 0x08000000 0x01070000
  268 02:00:15.303790  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  270 02:00:15.305291  start: 2.3 connect-device (timeout 00:05:00) [common]
  271 02:00:15.305726  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  272 02:00:15.320415  Setting prompt string to ['lava-test: # ']
  273 02:00:15.321891  end: 2.3 connect-device (duration 00:00:00) [common]
  274 02:00:15.322485  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  275 02:00:15.323049  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  276 02:00:15.323671  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  277 02:00:15.324881  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  278 02:00:15.361164  >> OK - accepted request

  279 02:00:15.362954  Returned 0 in 0 seconds
  280 02:00:15.464070  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  282 02:00:15.465690  end: 2.4.1 reset-device (duration 00:00:00) [common]
  283 02:00:15.466230  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  284 02:00:15.466732  Setting prompt string to ['Hit any key to stop autoboot']
  285 02:00:15.467180  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  286 02:00:15.468749  Trying 192.168.56.21...
  287 02:00:15.469219  Connected to conserv1.
  288 02:00:15.469638  Escape character is '^]'.
  289 02:00:15.470055  
  290 02:00:15.470469  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  291 02:00:15.470892  
  292 02:00:22.810011  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  293 02:00:22.810613  bl2_stage_init 0x01
  294 02:00:22.811048  bl2_stage_init 0x81
  295 02:00:22.815503  hw id: 0x0000 - pwm id 0x01
  296 02:00:22.815965  bl2_stage_init 0xc1
  297 02:00:22.821105  bl2_stage_init 0x02
  298 02:00:22.821581  
  299 02:00:22.821988  L0:00000000
  300 02:00:22.822380  L1:00000703
  301 02:00:22.822765  L2:00008067
  302 02:00:22.823160  L3:15000000
  303 02:00:22.826689  S1:00000000
  304 02:00:22.827133  B2:20282000
  305 02:00:22.827525  B1:a0f83180
  306 02:00:22.827912  
  307 02:00:22.828342  TE: 67298
  308 02:00:22.828735  
  309 02:00:22.832418  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  310 02:00:22.832868  
  311 02:00:22.837886  Board ID = 1
  312 02:00:22.838312  Set cpu clk to 24M
  313 02:00:22.838702  Set clk81 to 24M
  314 02:00:22.843493  Use GP1_pll as DSU clk.
  315 02:00:22.843913  DSU clk: 1200 Mhz
  316 02:00:22.844336  CPU clk: 1200 MHz
  317 02:00:22.849138  Set clk81 to 166.6M
  318 02:00:22.854703  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  319 02:00:22.855140  board id: 1
  320 02:00:22.861921  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  321 02:00:22.872573  fw parse done
  322 02:00:22.878638  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  323 02:00:22.921073  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  324 02:00:22.931936  PIEI prepare done
  325 02:00:22.932434  fastboot data load
  326 02:00:22.932831  fastboot data verify
  327 02:00:22.937611  verify result: 266
  328 02:00:22.943146  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  329 02:00:22.943617  LPDDR4 probe
  330 02:00:22.944054  ddr clk to 1584MHz
  331 02:00:22.951135  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  332 02:00:22.988403  
  333 02:00:22.988882  dmc_version 0001
  334 02:00:22.995076  Check phy result
  335 02:00:23.000985  INFO : End of CA training
  336 02:00:23.001455  INFO : End of initialization
  337 02:00:23.006613  INFO : Training has run successfully!
  338 02:00:23.007055  Check phy result
  339 02:00:23.012171  INFO : End of initialization
  340 02:00:23.012593  INFO : End of read enable training
  341 02:00:23.017796  INFO : End of fine write leveling
  342 02:00:23.023394  INFO : End of Write leveling coarse delay
  343 02:00:23.023828  INFO : Training has run successfully!
  344 02:00:23.024260  Check phy result
  345 02:00:23.029060  INFO : End of initialization
  346 02:00:23.029552  INFO : End of read dq deskew training
  347 02:00:23.034643  INFO : End of MPR read delay center optimization
  348 02:00:23.040188  INFO : End of write delay center optimization
  349 02:00:23.045821  INFO : End of read delay center optimization
  350 02:00:23.046246  INFO : End of max read latency training
  351 02:00:23.051398  INFO : Training has run successfully!
  352 02:00:23.051862  1D training succeed
  353 02:00:23.060614  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  354 02:00:23.108250  Check phy result
  355 02:00:23.108781  INFO : End of initialization
  356 02:00:23.130541  INFO : End of 2D read delay Voltage center optimization
  357 02:00:23.149777  INFO : End of 2D read delay Voltage center optimization
  358 02:00:23.201612  INFO : End of 2D write delay Voltage center optimization
  359 02:00:23.250838  INFO : End of 2D write delay Voltage center optimization
  360 02:00:23.256486  INFO : Training has run successfully!
  361 02:00:23.256934  
  362 02:00:23.257331  channel==0
  363 02:00:23.261998  RxClkDly_Margin_A0==88 ps 9
  364 02:00:23.262426  TxDqDly_Margin_A0==88 ps 9
  365 02:00:23.267495  RxClkDly_Margin_A1==88 ps 9
  366 02:00:23.267927  TxDqDly_Margin_A1==88 ps 9
  367 02:00:23.268373  TrainedVREFDQ_A0==74
  368 02:00:23.273283  TrainedVREFDQ_A1==75
  369 02:00:23.273706  VrefDac_Margin_A0==23
  370 02:00:23.274095  DeviceVref_Margin_A0==40
  371 02:00:23.278745  VrefDac_Margin_A1==23
  372 02:00:23.279164  DeviceVref_Margin_A1==39
  373 02:00:23.279555  
  374 02:00:23.279942  
  375 02:00:23.280371  channel==1
  376 02:00:23.284372  RxClkDly_Margin_A0==88 ps 9
  377 02:00:23.284826  TxDqDly_Margin_A0==88 ps 9
  378 02:00:23.289940  RxClkDly_Margin_A1==88 ps 9
  379 02:00:23.290417  TxDqDly_Margin_A1==88 ps 9
  380 02:00:23.295584  TrainedVREFDQ_A0==75
  381 02:00:23.296073  TrainedVREFDQ_A1==75
  382 02:00:23.296484  VrefDac_Margin_A0==22
  383 02:00:23.301261  DeviceVref_Margin_A0==39
  384 02:00:23.301687  VrefDac_Margin_A1==21
  385 02:00:23.302077  DeviceVref_Margin_A1==39
  386 02:00:23.306777  
  387 02:00:23.307199   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  388 02:00:23.307597  
  389 02:00:23.340432  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  390 02:00:23.340996  2D training succeed
  391 02:00:23.345960  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  392 02:00:23.351439  auto size-- 65535DDR cs0 size: 2048MB
  393 02:00:23.352087  DDR cs1 size: 2048MB
  394 02:00:23.357060  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  395 02:00:23.357678  cs0 DataBus test pass
  396 02:00:23.362672  cs1 DataBus test pass
  397 02:00:23.363279  cs0 AddrBus test pass
  398 02:00:23.363807  cs1 AddrBus test pass
  399 02:00:23.364370  
  400 02:00:23.368231  100bdlr_step_size ps== 464
  401 02:00:23.368808  result report
  402 02:00:23.373841  boot times 0Enable ddr reg access
  403 02:00:23.378840  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  404 02:00:23.392729  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  405 02:00:24.048152  bl2z: ptr: 05129330, size: 00001e40
  406 02:00:24.055938  0.0;M3 CHK:0;cm4_sp_mode 0
  407 02:00:24.056595  MVN_1=0x00000000
  408 02:00:24.057114  MVN_2=0x00000000
  409 02:00:24.067372  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  410 02:00:24.067946  OPS=0x04
  411 02:00:24.068525  ring efuse init
  412 02:00:24.072996  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  413 02:00:24.073558  [0.017320 Inits done]
  414 02:00:24.074070  secure task start!
  415 02:00:24.080871  high task start!
  416 02:00:24.081425  low task start!
  417 02:00:24.081935  run into bl31
  418 02:00:24.089469  NOTICE:  BL31: v1.3(release):4fc40b1
  419 02:00:24.097284  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  420 02:00:24.097862  NOTICE:  BL31: G12A normal boot!
  421 02:00:24.112937  NOTICE:  BL31: BL33 decompress pass
  422 02:00:24.118599  ERROR:   Error initializing runtime service opteed_fast
  423 02:00:26.864444  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  424 02:00:26.865296  bl2_stage_init 0x01
  425 02:00:26.865902  bl2_stage_init 0x81
  426 02:00:26.869935  hw id: 0x0000 - pwm id 0x01
  427 02:00:26.870681  bl2_stage_init 0xc1
  428 02:00:26.875627  bl2_stage_init 0x02
  429 02:00:26.876413  
  430 02:00:26.876946  L0:00000000
  431 02:00:26.877454  L1:00000703
  432 02:00:26.877958  L2:00008067
  433 02:00:26.878455  L3:15000000
  434 02:00:26.881202  S1:00000000
  435 02:00:26.881765  B2:20282000
  436 02:00:26.882277  B1:a0f83180
  437 02:00:26.882779  
  438 02:00:26.883282  TE: 70427
  439 02:00:26.883782  
  440 02:00:26.888157  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  441 02:00:26.888727  
  442 02:00:26.892423  Board ID = 1
  443 02:00:26.892970  Set cpu clk to 24M
  444 02:00:26.893473  Set clk81 to 24M
  445 02:00:26.897936  Use GP1_pll as DSU clk.
  446 02:00:26.898493  DSU clk: 1200 Mhz
  447 02:00:26.899003  CPU clk: 1200 MHz
  448 02:00:26.903550  Set clk81 to 166.6M
  449 02:00:26.909253  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  450 02:00:26.909815  board id: 1
  451 02:00:26.915487  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  452 02:00:26.927363  fw parse done
  453 02:00:26.934092  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  454 02:00:26.976003  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  455 02:00:26.987661  PIEI prepare done
  456 02:00:26.988076  fastboot data load
  457 02:00:26.988331  fastboot data verify
  458 02:00:26.993088  verify result: 266
  459 02:00:26.998713  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  460 02:00:26.999224  LPDDR4 probe
  461 02:00:26.999583  ddr clk to 1584MHz
  462 02:00:27.005664  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  463 02:00:27.044459  
  464 02:00:27.045112  dmc_version 0001
  465 02:00:27.052155  Check phy result
  466 02:00:27.057386  INFO : End of CA training
  467 02:00:27.057763  INFO : End of initialization
  468 02:00:27.062986  INFO : Training has run successfully!
  469 02:00:27.063368  Check phy result
  470 02:00:27.068567  INFO : End of initialization
  471 02:00:27.069105  INFO : End of read enable training
  472 02:00:27.074222  INFO : End of fine write leveling
  473 02:00:27.079736  INFO : End of Write leveling coarse delay
  474 02:00:27.080277  INFO : Training has run successfully!
  475 02:00:27.080541  Check phy result
  476 02:00:27.085580  INFO : End of initialization
  477 02:00:27.085924  INFO : End of read dq deskew training
  478 02:00:27.090996  INFO : End of MPR read delay center optimization
  479 02:00:27.096584  INFO : End of write delay center optimization
  480 02:00:27.102279  INFO : End of read delay center optimization
  481 02:00:27.102693  INFO : End of max read latency training
  482 02:00:27.107844  INFO : Training has run successfully!
  483 02:00:27.108253  1D training succeed
  484 02:00:27.116992  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  485 02:00:27.164750  Check phy result
  486 02:00:27.165553  INFO : End of initialization
  487 02:00:27.191806  INFO : End of 2D read delay Voltage center optimization
  488 02:00:27.216741  INFO : End of 2D read delay Voltage center optimization
  489 02:00:27.273089  INFO : End of 2D write delay Voltage center optimization
  490 02:00:27.327453  INFO : End of 2D write delay Voltage center optimization
  491 02:00:27.333064  INFO : Training has run successfully!
  492 02:00:27.333444  
  493 02:00:27.333694  channel==0
  494 02:00:27.339041  RxClkDly_Margin_A0==78 ps 8
  495 02:00:27.339417  TxDqDly_Margin_A0==98 ps 10
  496 02:00:27.344267  RxClkDly_Margin_A1==69 ps 7
  497 02:00:27.344564  TxDqDly_Margin_A1==98 ps 10
  498 02:00:27.344785  TrainedVREFDQ_A0==74
  499 02:00:27.349839  TrainedVREFDQ_A1==75
  500 02:00:27.350156  VrefDac_Margin_A0==24
  501 02:00:27.350374  DeviceVref_Margin_A0==40
  502 02:00:27.355391  VrefDac_Margin_A1==23
  503 02:00:27.355695  DeviceVref_Margin_A1==39
  504 02:00:27.355918  
  505 02:00:27.356156  
  506 02:00:27.361013  channel==1
  507 02:00:27.361448  RxClkDly_Margin_A0==88 ps 9
  508 02:00:27.361738  TxDqDly_Margin_A0==88 ps 9
  509 02:00:27.366622  RxClkDly_Margin_A1==88 ps 9
  510 02:00:27.366973  TxDqDly_Margin_A1==88 ps 9
  511 02:00:27.372345  TrainedVREFDQ_A0==75
  512 02:00:27.372891  TrainedVREFDQ_A1==77
  513 02:00:27.373323  VrefDac_Margin_A0==23
  514 02:00:27.377813  DeviceVref_Margin_A0==39
  515 02:00:27.378405  VrefDac_Margin_A1==22
  516 02:00:27.383483  DeviceVref_Margin_A1==37
  517 02:00:27.384108  
  518 02:00:27.384605   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  519 02:00:27.385069  
  520 02:00:27.417214  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  521 02:00:27.417644  2D training succeed
  522 02:00:27.422642  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  523 02:00:27.428295  auto size-- 65535DDR cs0 size: 2048MB
  524 02:00:27.428620  DDR cs1 size: 2048MB
  525 02:00:27.433919  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  526 02:00:27.434353  cs0 DataBus test pass
  527 02:00:27.439525  cs1 DataBus test pass
  528 02:00:27.439960  cs0 AddrBus test pass
  529 02:00:27.440274  cs1 AddrBus test pass
  530 02:00:27.440544  
  531 02:00:27.445127  100bdlr_step_size ps== 471
  532 02:00:27.445567  result report
  533 02:00:27.450673  boot times 0Enable ddr reg access
  534 02:00:27.455027  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  535 02:00:27.469796  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  536 02:00:28.129006  bl2z: ptr: 05129330, size: 00001e40
  537 02:00:28.138285  0.0;M3 CHK:0;cm4_sp_mode 0
  538 02:00:28.138738  MVN_1=0x00000000
  539 02:00:28.139140  MVN_2=0x00000000
  540 02:00:28.149723  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  541 02:00:28.150164  OPS=0x04
  542 02:00:28.150423  ring efuse init
  543 02:00:28.152643  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  544 02:00:28.159015  [0.017354 Inits done]
  545 02:00:28.159422  secure task start!
  546 02:00:28.159682  high task start!
  547 02:00:28.160113  low task start!
  548 02:00:28.162632  run into bl31
  549 02:00:28.171937  NOTICE:  BL31: v1.3(release):4fc40b1
  550 02:00:28.178819  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  551 02:00:28.179253  NOTICE:  BL31: G12A normal boot!
  552 02:00:28.195319  NOTICE:  BL31: BL33 decompress pass
  553 02:00:28.200068  ERROR:   Error initializing runtime service opteed_fast
  554 02:00:29.563931  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  555 02:00:29.564384  bl2_stage_init 0x01
  556 02:00:29.564602  bl2_stage_init 0x81
  557 02:00:29.569608  hw id: 0x0000 - pwm id 0x01
  558 02:00:29.569964  bl2_stage_init 0xc1
  559 02:00:29.570175  bl2_stage_init 0x02
  560 02:00:29.570385  
  561 02:00:29.575257  L0:00000000
  562 02:00:29.575602  L1:00000703
  563 02:00:29.575833  L2:00008067
  564 02:00:29.576062  L3:15000000
  565 02:00:29.576264  S1:00000000
  566 02:00:29.576971  B2:20282000
  567 02:00:29.582591  B1:a0f83180
  568 02:00:29.582916  
  569 02:00:29.583136  TE: 70458
  570 02:00:29.583338  
  571 02:00:29.588241  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  572 02:00:29.588622  
  573 02:00:29.588848  Board ID = 1
  574 02:00:29.593836  Set cpu clk to 24M
  575 02:00:29.594185  Set clk81 to 24M
  576 02:00:29.594413  Use GP1_pll as DSU clk.
  577 02:00:29.594628  DSU clk: 1200 Mhz
  578 02:00:29.597286  CPU clk: 1200 MHz
  579 02:00:29.597611  Set clk81 to 166.6M
  580 02:00:29.608439  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  581 02:00:29.608820  board id: 1
  582 02:00:29.614154  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  583 02:00:29.626028  fw parse done
  584 02:00:29.631158  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  585 02:00:29.674419  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  586 02:00:29.685411  PIEI prepare done
  587 02:00:29.685806  fastboot data load
  588 02:00:29.686087  fastboot data verify
  589 02:00:29.690969  verify result: 266
  590 02:00:29.696631  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  591 02:00:29.697073  LPDDR4 probe
  592 02:00:29.697389  ddr clk to 1584MHz
  593 02:00:29.703811  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  594 02:00:29.741067  
  595 02:00:29.741660  dmc_version 0001
  596 02:00:29.747949  Check phy result
  597 02:00:29.754514  INFO : End of CA training
  598 02:00:29.755071  INFO : End of initialization
  599 02:00:29.760121  INFO : Training has run successfully!
  600 02:00:29.760676  Check phy result
  601 02:00:29.765730  INFO : End of initialization
  602 02:00:29.766269  INFO : End of read enable training
  603 02:00:29.771287  INFO : End of fine write leveling
  604 02:00:29.776955  INFO : End of Write leveling coarse delay
  605 02:00:29.777319  INFO : Training has run successfully!
  606 02:00:29.777560  Check phy result
  607 02:00:29.782547  INFO : End of initialization
  608 02:00:29.783116  INFO : End of read dq deskew training
  609 02:00:29.788125  INFO : End of MPR read delay center optimization
  610 02:00:29.793882  INFO : End of write delay center optimization
  611 02:00:29.799312  INFO : End of read delay center optimization
  612 02:00:29.799847  INFO : End of max read latency training
  613 02:00:29.804894  INFO : Training has run successfully!
  614 02:00:29.805417  1D training succeed
  615 02:00:29.813076  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  616 02:00:29.861480  Check phy result
  617 02:00:29.862074  INFO : End of initialization
  618 02:00:29.883975  INFO : End of 2D read delay Voltage center optimization
  619 02:00:29.902207  INFO : End of 2D read delay Voltage center optimization
  620 02:00:29.954091  INFO : End of 2D write delay Voltage center optimization
  621 02:00:30.005672  INFO : End of 2D write delay Voltage center optimization
  622 02:00:30.010316  INFO : Training has run successfully!
  623 02:00:30.010761  
  624 02:00:30.011004  channel==0
  625 02:00:30.015261  RxClkDly_Margin_A0==69 ps 7
  626 02:00:30.015620  TxDqDly_Margin_A0==98 ps 10
  627 02:00:30.020894  RxClkDly_Margin_A1==69 ps 7
  628 02:00:30.021291  TxDqDly_Margin_A1==98 ps 10
  629 02:00:30.021526  TrainedVREFDQ_A0==74
  630 02:00:30.026587  TrainedVREFDQ_A1==74
  631 02:00:30.027023  VrefDac_Margin_A0==25
  632 02:00:30.027288  DeviceVref_Margin_A0==40
  633 02:00:30.032142  VrefDac_Margin_A1==23
  634 02:00:30.032609  DeviceVref_Margin_A1==40
  635 02:00:30.032876  
  636 02:00:30.033134  
  637 02:00:30.037765  channel==1
  638 02:00:30.038160  RxClkDly_Margin_A0==88 ps 9
  639 02:00:30.038465  TxDqDly_Margin_A0==88 ps 9
  640 02:00:30.043410  RxClkDly_Margin_A1==78 ps 8
  641 02:00:30.043869  TxDqDly_Margin_A1==88 ps 9
  642 02:00:30.048907  TrainedVREFDQ_A0==75
  643 02:00:30.049271  TrainedVREFDQ_A1==75
  644 02:00:30.049540  VrefDac_Margin_A0==23
  645 02:00:30.054663  DeviceVref_Margin_A0==39
  646 02:00:30.055011  VrefDac_Margin_A1==22
  647 02:00:30.060397  DeviceVref_Margin_A1==38
  648 02:00:30.060817  
  649 02:00:30.061108   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  650 02:00:30.061384  
  651 02:00:30.093685  soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  652 02:00:30.094098  2D training succeed
  653 02:00:30.099432  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  654 02:00:30.104983  auto size-- 65535DDR cs0 size: 2048MB
  655 02:00:30.105553  DDR cs1 size: 2048MB
  656 02:00:30.110606  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  657 02:00:30.111141  cs0 DataBus test pass
  658 02:00:30.116288  cs1 DataBus test pass
  659 02:00:30.116821  cs0 AddrBus test pass
  660 02:00:30.117264  cs1 AddrBus test pass
  661 02:00:30.117690  
  662 02:00:30.121884  100bdlr_step_size ps== 478
  663 02:00:30.122411  result report
  664 02:00:30.127351  boot times 0Enable ddr reg access
  665 02:00:30.131622  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  666 02:00:30.145407  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  667 02:00:30.801183  bl2z: ptr: 05129330, size: 00001e40
  668 02:00:30.807710  0.0;M3 CHK:0;cm4_sp_mode 0
  669 02:00:30.808233  MVN_1=0x00000000
  670 02:00:30.808496  MVN_2=0x00000000
  671 02:00:30.819196  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  672 02:00:30.819621  OPS=0x04
  673 02:00:30.819887  ring efuse init
  674 02:00:30.824905  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  675 02:00:30.825283  [0.017319 Inits done]
  676 02:00:30.825547  secure task start!
  677 02:00:30.832309  high task start!
  678 02:00:30.832704  low task start!
  679 02:00:30.832973  run into bl31
  680 02:00:30.841081  NOTICE:  BL31: v1.3(release):4fc40b1
  681 02:00:30.847912  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  682 02:00:30.848320  NOTICE:  BL31: G12A normal boot!
  683 02:00:30.864731  NOTICE:  BL31: BL33 decompress pass
  684 02:00:30.869342  ERROR:   Error initializing runtime service opteed_fast
  685 02:00:31.665630  
  686 02:00:31.666753  
  687 02:00:31.670888  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  688 02:00:31.671856  
  689 02:00:31.673752  Model: Libre Computer AML-S905D3-CC Solitude
  690 02:00:31.821373  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  691 02:00:31.836726  DRAM:  2 GiB (effective 3.8 GiB)
  692 02:00:31.937733  Core:  406 devices, 33 uclasses, devicetree: separate
  693 02:00:31.943633  WDT:   Not starting watchdog@f0d0
  694 02:00:31.968705  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  695 02:00:31.980877  Loading Environment from FAT... Card did not respond to voltage select! : -110
  696 02:00:31.985880  ** Bad device specification mmc 0 **
  697 02:00:31.995915  Card did not respond to voltage select! : -110
  698 02:00:32.003583  ** Bad device specification mmc 0 **
  699 02:00:32.004055  Couldn't find partition mmc 0
  700 02:00:32.011885  Card did not respond to voltage select! : -110
  701 02:00:32.017417  ** Bad device specification mmc 0 **
  702 02:00:32.017818  Couldn't find partition mmc 0
  703 02:00:32.022484  Error: could not access storage.
  704 02:00:32.319168  Net:   eth0: ethernet@ff3f0000
  705 02:00:32.319809  starting USB...
  706 02:00:32.563694  Bus usb@ff500000: Register 3000140 NbrPorts 3
  707 02:00:32.564150  Starting the controller
  708 02:00:32.570588  USB XHCI 1.10
  709 02:00:34.127007  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  710 02:00:34.135261         scanning usb for storage devices... 0 Storage Device(s) found
  712 02:00:34.186856  Hit any key to stop autoboot:  1 
  713 02:00:34.187715  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  714 02:00:34.188479  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  715 02:00:34.189009  Setting prompt string to ['=>']
  716 02:00:34.189543  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  717 02:00:34.201298   0 
  718 02:00:34.202270  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  720 02:00:34.303599  => setenv autoload no
  721 02:00:34.304421  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  722 02:00:34.309691  setenv autoload no
  724 02:00:34.411322  => setenv initrd_high 0xffffffff
  725 02:00:34.412430  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  726 02:00:34.416631  setenv initrd_high 0xffffffff
  728 02:00:34.518245  => setenv fdt_high 0xffffffff
  729 02:00:34.519113  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  730 02:00:34.523291  setenv fdt_high 0xffffffff
  732 02:00:34.624522  => dhcp
  733 02:00:34.625585  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  734 02:00:34.629616  dhcp
  735 02:00:35.135127  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
  736 02:00:35.135794  Speed: 1000, full duplex
  737 02:00:35.136323  BOOTP broadcast 1
  738 02:00:35.382365  BOOTP broadcast 2
  739 02:00:35.394427  DHCP client bound to address 192.168.6.21 (259 ms)
  741 02:00:35.495656  => setenv serverip 192.168.6.2
  742 02:00:35.496386  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  743 02:00:35.499664  setenv serverip 192.168.6.2
  745 02:00:35.600865  => tftpboot 0x01080000 964262/tftp-deploy-nbhue23h/kernel/uImage
  746 02:00:35.601566  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  747 02:00:35.608044  tftpboot 0x01080000 964262/tftp-deploy-nbhue23h/kernel/uImage
  748 02:00:35.608409  Speed: 1000, full duplex
  749 02:00:35.608651  Using ethernet@ff3f0000 device
  750 02:00:35.613778  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  751 02:00:35.619053  Filename '964262/tftp-deploy-nbhue23h/kernel/uImage'.
  752 02:00:35.622913  Load address: 0x1080000
  753 02:00:39.244229  Loading: *##################################################  43.6 MiB
  754 02:00:39.244650  	 12 MiB/s
  755 02:00:39.244860  done
  756 02:00:39.248346  Bytes transferred = 45713984 (2b98a40 hex)
  758 02:00:39.349725  => tftpboot 0x08000000 964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  759 02:00:39.350273  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  760 02:00:39.357199  tftpboot 0x08000000 964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot
  761 02:00:39.357557  Speed: 1000, full duplex
  762 02:00:39.357800  Using ethernet@ff3f0000 device
  763 02:00:39.362625  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  764 02:00:39.372553  Filename '964262/tftp-deploy-nbhue23h/ramdisk/ramdisk.cpio.gz.uboot'.
  765 02:00:39.372960  Load address: 0x8000000
  766 02:00:41.884745  Loading: *################################################# UDP wrong checksum 00000005 00006eb7
  767 02:00:46.884288  T  UDP wrong checksum 00000005 00006eb7
  768 02:00:56.887402  T T  UDP wrong checksum 00000005 00006eb7
  769 02:01:03.697389  T  UDP wrong checksum 000000ff 0000482a
  770 02:01:03.703917   UDP wrong checksum 000000ff 0000cd1c
  771 02:01:16.890856  T T T  UDP wrong checksum 00000005 00006eb7
  772 02:01:34.036118  T T T  UDP wrong checksum 000000ff 000046a8
  773 02:01:34.056350   UDP wrong checksum 000000ff 0000db9a
  774 02:01:36.896267  
  775 02:01:36.896885  Retry count exceeded; starting again
  777 02:01:36.898260  end: 2.4.3 bootloader-commands (duration 00:01:03) [common]
  780 02:01:36.900104  end: 2.4 uboot-commands (duration 00:01:22) [common]
  782 02:01:36.901466  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  784 02:01:36.902527  end: 2 uboot-action (duration 00:01:22) [common]
  786 02:01:36.903602  Cleaning after the job
  787 02:01:36.903927  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/ramdisk
  788 02:01:36.904819  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/kernel
  789 02:01:36.919798  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/dtb
  790 02:01:36.920672  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964262/tftp-deploy-nbhue23h/modules
  791 02:01:36.926414  start: 4.1 power-off (timeout 00:00:30) [common]
  792 02:01:36.927039  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  793 02:01:36.961765  >> OK - accepted request

  794 02:01:36.963976  Returned 0 in 0 seconds
  795 02:01:37.065254  end: 4.1 power-off (duration 00:00:00) [common]
  797 02:01:37.067241  start: 4.2 read-feedback (timeout 00:10:00) [common]
  798 02:01:37.068146  Listened to connection for namespace 'common' for up to 1s
  799 02:01:38.068088  Finalising connection for namespace 'common'
  800 02:01:38.068869  Disconnecting from shell: Finalise
  801 02:01:38.069423  => 
  802 02:01:38.170554  end: 4.2 read-feedback (duration 00:00:01) [common]
  803 02:01:38.171274  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964262
  804 02:01:38.482097  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964262
  805 02:01:38.482699  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.