Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:09:16.678891 lava-dispatcher, installed at version: 2024.01
2 02:09:16.679638 start: 0 validate
3 02:09:16.680150 Start time: 2024-11-09 02:09:16.680119+00:00 (UTC)
4 02:09:16.680686 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:09:16.681213 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 02:09:16.719702 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:09:16.720285 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:09:16.750090 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:09:16.750686 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:09:16.781412 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:09:16.781892 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 02:09:16.820589 validate duration: 0.14
14 02:09:16.821434 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 02:09:16.821885 start: 1.1 download-retry (timeout 00:10:00) [common]
16 02:09:16.822204 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 02:09:16.822771 Not decompressing ramdisk as can be used compressed.
18 02:09:16.823189 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 02:09:16.823430 saving as /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/ramdisk/rootfs.cpio.gz
20 02:09:16.823683 total size: 47897469 (45 MB)
21 02:09:16.859468 progress 0 % (0 MB)
22 02:09:16.891184 progress 5 % (2 MB)
23 02:09:16.921855 progress 10 % (4 MB)
24 02:09:16.952829 progress 15 % (6 MB)
25 02:09:16.983311 progress 20 % (9 MB)
26 02:09:17.014105 progress 25 % (11 MB)
27 02:09:17.045585 progress 30 % (13 MB)
28 02:09:17.076432 progress 35 % (16 MB)
29 02:09:17.107388 progress 40 % (18 MB)
30 02:09:17.138025 progress 45 % (20 MB)
31 02:09:17.168883 progress 50 % (22 MB)
32 02:09:17.199407 progress 55 % (25 MB)
33 02:09:17.230264 progress 60 % (27 MB)
34 02:09:17.260695 progress 65 % (29 MB)
35 02:09:17.291002 progress 70 % (32 MB)
36 02:09:17.321500 progress 75 % (34 MB)
37 02:09:17.352045 progress 80 % (36 MB)
38 02:09:17.382388 progress 85 % (38 MB)
39 02:09:17.412826 progress 90 % (41 MB)
40 02:09:17.442958 progress 95 % (43 MB)
41 02:09:17.473192 progress 100 % (45 MB)
42 02:09:17.473944 45 MB downloaded in 0.65 s (70.25 MB/s)
43 02:09:17.474513 end: 1.1.1 http-download (duration 00:00:01) [common]
45 02:09:17.475401 end: 1.1 download-retry (duration 00:00:01) [common]
46 02:09:17.475712 start: 1.2 download-retry (timeout 00:09:59) [common]
47 02:09:17.476018 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 02:09:17.476509 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/kernel/Image
49 02:09:17.476762 saving as /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/kernel/Image
50 02:09:17.476977 total size: 45713920 (43 MB)
51 02:09:17.477192 No compression specified
52 02:09:17.516168 progress 0 % (0 MB)
53 02:09:17.544993 progress 5 % (2 MB)
54 02:09:17.575396 progress 10 % (4 MB)
55 02:09:17.604956 progress 15 % (6 MB)
56 02:09:17.633943 progress 20 % (8 MB)
57 02:09:17.662978 progress 25 % (10 MB)
58 02:09:17.691492 progress 30 % (13 MB)
59 02:09:17.720036 progress 35 % (15 MB)
60 02:09:17.748166 progress 40 % (17 MB)
61 02:09:17.775933 progress 45 % (19 MB)
62 02:09:17.804349 progress 50 % (21 MB)
63 02:09:17.832445 progress 55 % (24 MB)
64 02:09:17.861144 progress 60 % (26 MB)
65 02:09:17.889017 progress 65 % (28 MB)
66 02:09:17.917162 progress 70 % (30 MB)
67 02:09:17.945273 progress 75 % (32 MB)
68 02:09:17.973215 progress 80 % (34 MB)
69 02:09:18.002081 progress 85 % (37 MB)
70 02:09:18.030566 progress 90 % (39 MB)
71 02:09:18.059216 progress 95 % (41 MB)
72 02:09:18.087330 progress 100 % (43 MB)
73 02:09:18.087860 43 MB downloaded in 0.61 s (71.37 MB/s)
74 02:09:18.088372 end: 1.2.1 http-download (duration 00:00:01) [common]
76 02:09:18.089188 end: 1.2 download-retry (duration 00:00:01) [common]
77 02:09:18.089461 start: 1.3 download-retry (timeout 00:09:59) [common]
78 02:09:18.089722 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 02:09:18.090188 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 02:09:18.090432 saving as /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/dtb/meson-g12b-a311d-libretech-cc.dtb
81 02:09:18.090635 total size: 54703 (0 MB)
82 02:09:18.090842 No compression specified
83 02:09:18.131003 progress 59 % (0 MB)
84 02:09:18.131843 progress 100 % (0 MB)
85 02:09:18.132431 0 MB downloaded in 0.04 s (1.25 MB/s)
86 02:09:18.132891 end: 1.3.1 http-download (duration 00:00:00) [common]
88 02:09:18.133690 end: 1.3 download-retry (duration 00:00:00) [common]
89 02:09:18.133948 start: 1.4 download-retry (timeout 00:09:59) [common]
90 02:09:18.134208 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 02:09:18.134663 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/modules.tar.xz
92 02:09:18.134927 saving as /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/modules/modules.tar
93 02:09:18.135132 total size: 11610740 (11 MB)
94 02:09:18.135341 Using unxz to decompress xz
95 02:09:18.168233 progress 0 % (0 MB)
96 02:09:18.233726 progress 5 % (0 MB)
97 02:09:18.309391 progress 10 % (1 MB)
98 02:09:18.408480 progress 15 % (1 MB)
99 02:09:18.500152 progress 20 % (2 MB)
100 02:09:18.580601 progress 25 % (2 MB)
101 02:09:18.656362 progress 30 % (3 MB)
102 02:09:18.734744 progress 35 % (3 MB)
103 02:09:18.807040 progress 40 % (4 MB)
104 02:09:18.882756 progress 45 % (5 MB)
105 02:09:18.966295 progress 50 % (5 MB)
106 02:09:19.043062 progress 55 % (6 MB)
107 02:09:19.128151 progress 60 % (6 MB)
108 02:09:19.207892 progress 65 % (7 MB)
109 02:09:19.288731 progress 70 % (7 MB)
110 02:09:19.366936 progress 75 % (8 MB)
111 02:09:19.454137 progress 80 % (8 MB)
112 02:09:19.535724 progress 85 % (9 MB)
113 02:09:19.614983 progress 90 % (9 MB)
114 02:09:19.694085 progress 95 % (10 MB)
115 02:09:19.770973 progress 100 % (11 MB)
116 02:09:19.783267 11 MB downloaded in 1.65 s (6.72 MB/s)
117 02:09:19.784035 end: 1.4.1 http-download (duration 00:00:02) [common]
119 02:09:19.785706 end: 1.4 download-retry (duration 00:00:02) [common]
120 02:09:19.786262 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 02:09:19.786803 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 02:09:19.787318 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 02:09:19.787836 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 02:09:19.788837 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs
125 02:09:19.789681 makedir: /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin
126 02:09:19.790341 makedir: /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/tests
127 02:09:19.790978 makedir: /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/results
128 02:09:19.791602 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-add-keys
129 02:09:19.792604 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-add-sources
130 02:09:19.793558 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-background-process-start
131 02:09:19.794533 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-background-process-stop
132 02:09:19.795582 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-common-functions
133 02:09:19.796851 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-echo-ipv4
134 02:09:19.797872 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-install-packages
135 02:09:19.799156 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-installed-packages
136 02:09:19.800168 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-os-build
137 02:09:19.801127 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-probe-channel
138 02:09:19.802059 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-probe-ip
139 02:09:19.802988 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-target-ip
140 02:09:19.803955 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-target-mac
141 02:09:19.804991 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-target-storage
142 02:09:19.805988 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-case
143 02:09:19.806955 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-event
144 02:09:19.807890 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-feedback
145 02:09:19.808958 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-raise
146 02:09:19.809904 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-reference
147 02:09:19.810860 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-runner
148 02:09:19.811832 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-set
149 02:09:19.812820 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-test-shell
150 02:09:19.813763 Updating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-install-packages (oe)
151 02:09:19.814776 Updating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/bin/lava-installed-packages (oe)
152 02:09:19.815632 Creating /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/environment
153 02:09:19.816415 LAVA metadata
154 02:09:19.816929 - LAVA_JOB_ID=964251
155 02:09:19.817374 - LAVA_DISPATCHER_IP=192.168.6.2
156 02:09:19.818052 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 02:09:19.819855 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 02:09:19.820516 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 02:09:19.820946 skipped lava-vland-overlay
160 02:09:19.821443 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 02:09:19.821959 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 02:09:19.822394 skipped lava-multinode-overlay
163 02:09:19.822888 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 02:09:19.823394 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 02:09:19.823882 Loading test definitions
166 02:09:19.824302 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 02:09:19.824553 Using /lava-964251 at stage 0
168 02:09:19.826287 uuid=964251_1.5.2.4.1 testdef=None
169 02:09:19.826887 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 02:09:19.827427 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 02:09:19.830807 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 02:09:19.832519 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 02:09:19.836722 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 02:09:19.838353 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 02:09:19.842387 runner path: /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/0/tests/0_igt-gpu-panfrost test_uuid 964251_1.5.2.4.1
178 02:09:19.843416 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 02:09:19.845034 Creating lava-test-runner.conf files
181 02:09:19.845459 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964251/lava-overlay-o8d52jhs/lava-964251/0 for stage 0
182 02:09:19.846120 - 0_igt-gpu-panfrost
183 02:09:19.846797 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 02:09:19.847360 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 02:09:19.871464 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 02:09:19.871891 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 02:09:19.872217 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 02:09:19.872517 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 02:09:19.872805 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 02:09:26.845264 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 02:09:26.845735 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 02:09:26.845981 extracting modules file /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk
193 02:09:28.268920 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 02:09:28.269382 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 02:09:28.269657 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964251/compress-overlay-edddw5p0/overlay-1.5.2.5.tar.gz to ramdisk
196 02:09:28.269870 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964251/compress-overlay-edddw5p0/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk
197 02:09:28.299902 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 02:09:28.300325 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 02:09:28.300595 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 02:09:28.300822 Converting downloaded kernel to a uImage
201 02:09:28.301126 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/kernel/Image /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/kernel/uImage
202 02:09:28.791397 output: Image Name:
203 02:09:28.791800 output: Created: Sat Nov 9 02:09:28 2024
204 02:09:28.792050 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 02:09:28.792261 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 02:09:28.792465 output: Load Address: 01080000
207 02:09:28.792665 output: Entry Point: 01080000
208 02:09:28.792863 output:
209 02:09:28.793193 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 02:09:28.793455 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 02:09:28.793722 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 02:09:28.793976 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 02:09:28.794232 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 02:09:28.794487 Building ramdisk /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk
215 02:09:35.416218 >> 502380 blocks
216 02:09:55.992434 Adding RAMdisk u-boot header.
217 02:09:55.993147 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk.cpio.gz.uboot
218 02:09:56.685338 output: Image Name:
219 02:09:56.686022 output: Created: Sat Nov 9 02:09:55 2024
220 02:09:56.686509 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 02:09:56.686978 output: Data Size: 65714401 Bytes = 64174.22 KiB = 62.67 MiB
222 02:09:56.687435 output: Load Address: 00000000
223 02:09:56.687887 output: Entry Point: 00000000
224 02:09:56.688399 output:
225 02:09:56.689642 rename /var/lib/lava/dispatcher/tmp/964251/extract-overlay-ramdisk-8tw2x8_n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
226 02:09:56.690491 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 02:09:56.691199 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 02:09:56.691836 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 02:09:56.692388 No LXC device requested
230 02:09:56.693013 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 02:09:56.693597 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 02:09:56.694144 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 02:09:56.694598 Checking files for TFTP limit of 4294967296 bytes.
234 02:09:56.697699 end: 1 tftp-deploy (duration 00:00:40) [common]
235 02:09:56.698416 start: 2 uboot-action (timeout 00:05:00) [common]
236 02:09:56.698992 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 02:09:56.699536 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 02:09:56.700175 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 02:09:56.700866 Using kernel file from prepare-kernel: 964251/tftp-deploy-r_8g8b01/kernel/uImage
240 02:09:56.701645 substitutions:
241 02:09:56.702183 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 02:09:56.702678 - {DTB_ADDR}: 0x01070000
243 02:09:56.703175 - {DTB}: 964251/tftp-deploy-r_8g8b01/dtb/meson-g12b-a311d-libretech-cc.dtb
244 02:09:56.703678 - {INITRD}: 964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
245 02:09:56.704217 - {KERNEL_ADDR}: 0x01080000
246 02:09:56.704713 - {KERNEL}: 964251/tftp-deploy-r_8g8b01/kernel/uImage
247 02:09:56.705199 - {LAVA_MAC}: None
248 02:09:56.705768 - {PRESEED_CONFIG}: None
249 02:09:56.706302 - {PRESEED_LOCAL}: None
250 02:09:56.706816 - {RAMDISK_ADDR}: 0x08000000
251 02:09:56.707298 - {RAMDISK}: 964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
252 02:09:56.707788 - {ROOT_PART}: None
253 02:09:56.708280 - {ROOT}: None
254 02:09:56.708736 - {SERVER_IP}: 192.168.6.2
255 02:09:56.709172 - {TEE_ADDR}: 0x83000000
256 02:09:56.709604 - {TEE}: None
257 02:09:56.710054 Parsed boot commands:
258 02:09:56.710478 - setenv autoload no
259 02:09:56.710906 - setenv initrd_high 0xffffffff
260 02:09:56.711334 - setenv fdt_high 0xffffffff
261 02:09:56.711767 - dhcp
262 02:09:56.712298 - setenv serverip 192.168.6.2
263 02:09:56.712765 - tftpboot 0x01080000 964251/tftp-deploy-r_8g8b01/kernel/uImage
264 02:09:56.713201 - tftpboot 0x08000000 964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
265 02:09:56.713630 - tftpboot 0x01070000 964251/tftp-deploy-r_8g8b01/dtb/meson-g12b-a311d-libretech-cc.dtb
266 02:09:56.714056 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 02:09:56.714489 - bootm 0x01080000 0x08000000 0x01070000
268 02:09:56.715084 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 02:09:56.717005 start: 2.3 connect-device (timeout 00:05:00) [common]
271 02:09:56.717607 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 02:09:56.734349 Setting prompt string to ['lava-test: # ']
273 02:09:56.736151 end: 2.3 connect-device (duration 00:00:00) [common]
274 02:09:56.736846 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 02:09:56.737436 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 02:09:56.738003 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 02:09:56.739275 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 02:09:56.778243 >> OK - accepted request
279 02:09:56.780557 Returned 0 in 0 seconds
280 02:09:56.882011 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 02:09:56.883903 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 02:09:56.884590 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 02:09:56.885168 Setting prompt string to ['Hit any key to stop autoboot']
285 02:09:56.885667 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 02:09:56.887427 Trying 192.168.56.21...
287 02:09:56.887948 Connected to conserv1.
288 02:09:56.888444 Escape character is '^]'.
289 02:09:56.888887
290 02:09:56.889353 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 02:09:56.889831
292 02:10:07.910378 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 02:10:07.911039 bl2_stage_init 0x01
294 02:10:07.911519 bl2_stage_init 0x81
295 02:10:07.915929 hw id: 0x0000 - pwm id 0x01
296 02:10:07.916465 bl2_stage_init 0xc1
297 02:10:07.916922 bl2_stage_init 0x02
298 02:10:07.917377
299 02:10:07.921587 L0:00000000
300 02:10:07.922066 L1:20000703
301 02:10:07.922509 L2:00008067
302 02:10:07.922937 L3:14000000
303 02:10:07.926979 B2:00402000
304 02:10:07.927437 B1:e0f83180
305 02:10:07.927869
306 02:10:07.928345 TE: 58124
307 02:10:07.928777
308 02:10:07.932642 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 02:10:07.933110
310 02:10:07.933540 Board ID = 1
311 02:10:07.938244 Set A53 clk to 24M
312 02:10:07.938703 Set A73 clk to 24M
313 02:10:07.939130 Set clk81 to 24M
314 02:10:07.943909 A53 clk: 1200 MHz
315 02:10:07.944398 A73 clk: 1200 MHz
316 02:10:07.944827 CLK81: 166.6M
317 02:10:07.945254 smccc: 00012a92
318 02:10:07.949437 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 02:10:07.954994 board id: 1
320 02:10:07.960965 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 02:10:07.971564 fw parse done
322 02:10:07.977572 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 02:10:08.020238 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 02:10:08.030994 PIEI prepare done
325 02:10:08.031471 fastboot data load
326 02:10:08.031906 fastboot data verify
327 02:10:08.036630 verify result: 266
328 02:10:08.042213 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 02:10:08.042679 LPDDR4 probe
330 02:10:08.043112 ddr clk to 1584MHz
331 02:10:08.050260 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 02:10:08.087462
333 02:10:08.087938 dmc_version 0001
334 02:10:08.094144 Check phy result
335 02:10:08.100047 INFO : End of CA training
336 02:10:08.100518 INFO : End of initialization
337 02:10:08.105665 INFO : Training has run successfully!
338 02:10:08.106130 Check phy result
339 02:10:08.111199 INFO : End of initialization
340 02:10:08.111656 INFO : End of read enable training
341 02:10:08.116788 INFO : End of fine write leveling
342 02:10:08.122374 INFO : End of Write leveling coarse delay
343 02:10:08.122829 INFO : Training has run successfully!
344 02:10:08.123262 Check phy result
345 02:10:08.127973 INFO : End of initialization
346 02:10:08.128466 INFO : End of read dq deskew training
347 02:10:08.133586 INFO : End of MPR read delay center optimization
348 02:10:08.139196 INFO : End of write delay center optimization
349 02:10:08.144778 INFO : End of read delay center optimization
350 02:10:08.145241 INFO : End of max read latency training
351 02:10:08.150367 INFO : Training has run successfully!
352 02:10:08.150838 1D training succeed
353 02:10:08.159582 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 02:10:08.207145 Check phy result
355 02:10:08.207617 INFO : End of initialization
356 02:10:08.228912 INFO : End of 2D read delay Voltage center optimization
357 02:10:08.248203 INFO : End of 2D read delay Voltage center optimization
358 02:10:08.301210 INFO : End of 2D write delay Voltage center optimization
359 02:10:08.350530 INFO : End of 2D write delay Voltage center optimization
360 02:10:08.356090 INFO : Training has run successfully!
361 02:10:08.356552
362 02:10:08.356993 channel==0
363 02:10:08.361669 RxClkDly_Margin_A0==88 ps 9
364 02:10:08.362137 TxDqDly_Margin_A0==98 ps 10
365 02:10:08.364996 RxClkDly_Margin_A1==88 ps 9
366 02:10:08.365451 TxDqDly_Margin_A1==98 ps 10
367 02:10:08.370505 TrainedVREFDQ_A0==74
368 02:10:08.370963 TrainedVREFDQ_A1==74
369 02:10:08.376240 VrefDac_Margin_A0==25
370 02:10:08.376695 DeviceVref_Margin_A0==40
371 02:10:08.377126 VrefDac_Margin_A1==25
372 02:10:08.381703 DeviceVref_Margin_A1==40
373 02:10:08.382160
374 02:10:08.382597
375 02:10:08.383031 channel==1
376 02:10:08.383462 RxClkDly_Margin_A0==98 ps 10
377 02:10:08.387311 TxDqDly_Margin_A0==88 ps 9
378 02:10:08.387773 RxClkDly_Margin_A1==98 ps 10
379 02:10:08.392899 TxDqDly_Margin_A1==88 ps 9
380 02:10:08.393365 TrainedVREFDQ_A0==76
381 02:10:08.393804 TrainedVREFDQ_A1==77
382 02:10:08.398523 VrefDac_Margin_A0==22
383 02:10:08.398976 DeviceVref_Margin_A0==38
384 02:10:08.404294 VrefDac_Margin_A1==22
385 02:10:08.404746 DeviceVref_Margin_A1==37
386 02:10:08.405176
387 02:10:08.409692 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 02:10:08.410154
389 02:10:08.437697 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000016 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
390 02:10:08.443302 2D training succeed
391 02:10:08.448892 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 02:10:08.449355 auto size-- 65535DDR cs0 size: 2048MB
393 02:10:08.454478 DDR cs1 size: 2048MB
394 02:10:08.454935 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 02:10:08.460246 cs0 DataBus test pass
396 02:10:08.460702 cs1 DataBus test pass
397 02:10:08.461136 cs0 AddrBus test pass
398 02:10:08.465722 cs1 AddrBus test pass
399 02:10:08.466186
400 02:10:08.466618 100bdlr_step_size ps== 420
401 02:10:08.467058 result report
402 02:10:08.471313 boot times 0Enable ddr reg access
403 02:10:08.479079 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 02:10:08.491662 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 02:10:09.066240 0.0;M3 CHK:0;cm4_sp_mode 0
406 02:10:09.066906 MVN_1=0x00000000
407 02:10:09.071642 MVN_2=0x00000000
408 02:10:09.077422 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 02:10:09.077920 OPS=0x10
410 02:10:09.078373 ring efuse init
411 02:10:09.078818 chipver efuse init
412 02:10:09.082978 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 02:10:09.088609 [0.018961 Inits done]
414 02:10:09.089073 secure task start!
415 02:10:09.089515 high task start!
416 02:10:09.093184 low task start!
417 02:10:09.093651 run into bl31
418 02:10:09.099862 NOTICE: BL31: v1.3(release):4fc40b1
419 02:10:09.107666 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 02:10:09.108170 NOTICE: BL31: G12A normal boot!
421 02:10:09.133024 NOTICE: BL31: BL33 decompress pass
422 02:10:09.137700 ERROR: Error initializing runtime service opteed_fast
423 02:10:10.371577
424 02:10:10.372275
425 02:10:10.379886 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 02:10:10.380426
427 02:10:10.380884 Model: Libre Computer AML-A311D-CC Alta
428 02:10:10.588397 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 02:10:10.611436 DRAM: 2 GiB (effective 3.8 GiB)
430 02:10:10.754720 Core: 408 devices, 31 uclasses, devicetree: separate
431 02:10:10.760616 WDT: Not starting watchdog@f0d0
432 02:10:10.792866 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 02:10:10.805289 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 02:10:10.810320 ** Bad device specification mmc 0 **
435 02:10:10.820613 Card did not respond to voltage select! : -110
436 02:10:10.827657 ** Bad device specification mmc 0 **
437 02:10:10.828170 Couldn't find partition mmc 0
438 02:10:10.836605 Card did not respond to voltage select! : -110
439 02:10:10.842132 ** Bad device specification mmc 0 **
440 02:10:10.842604 Couldn't find partition mmc 0
441 02:10:10.847206 Error: could not access storage.
442 02:10:12.110870 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 02:10:12.111520 bl2_stage_init 0x01
444 02:10:12.112025 bl2_stage_init 0x81
445 02:10:12.116406 hw id: 0x0000 - pwm id 0x01
446 02:10:12.116886 bl2_stage_init 0xc1
447 02:10:12.117333 bl2_stage_init 0x02
448 02:10:12.117771
449 02:10:12.121867 L0:00000000
450 02:10:12.122336 L1:20000703
451 02:10:12.122778 L2:00008067
452 02:10:12.123214 L3:14000000
453 02:10:12.124791 B2:00402000
454 02:10:12.125251 B1:e0f83180
455 02:10:12.125688
456 02:10:12.126130 TE: 58167
457 02:10:12.126571
458 02:10:12.135939 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 02:10:12.136453
460 02:10:12.136904 Board ID = 1
461 02:10:12.137345 Set A53 clk to 24M
462 02:10:12.137784 Set A73 clk to 24M
463 02:10:12.141504 Set clk81 to 24M
464 02:10:12.141974 A53 clk: 1200 MHz
465 02:10:12.142421 A73 clk: 1200 MHz
466 02:10:12.147144 CLK81: 166.6M
467 02:10:12.147619 smccc: 00012abe
468 02:10:12.152724 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 02:10:12.153197 board id: 1
470 02:10:12.161331 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 02:10:12.172021 fw parse done
472 02:10:12.178006 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 02:10:12.220644 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 02:10:12.231519 PIEI prepare done
475 02:10:12.232042 fastboot data load
476 02:10:12.232504 fastboot data verify
477 02:10:12.237198 verify result: 266
478 02:10:12.242754 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 02:10:12.243224 LPDDR4 probe
480 02:10:12.243668 ddr clk to 1584MHz
481 02:10:12.249789 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 02:10:12.287969
483 02:10:12.288487 dmc_version 0001
484 02:10:12.294451 Check phy result
485 02:10:12.300502 INFO : End of CA training
486 02:10:12.300970 INFO : End of initialization
487 02:10:12.306087 INFO : Training has run successfully!
488 02:10:12.306554 Check phy result
489 02:10:12.311783 INFO : End of initialization
490 02:10:12.312281 INFO : End of read enable training
491 02:10:12.317282 INFO : End of fine write leveling
492 02:10:12.322891 INFO : End of Write leveling coarse delay
493 02:10:12.323375 INFO : Training has run successfully!
494 02:10:12.323826 Check phy result
495 02:10:12.328490 INFO : End of initialization
496 02:10:12.328958 INFO : End of read dq deskew training
497 02:10:12.334169 INFO : End of MPR read delay center optimization
498 02:10:12.339729 INFO : End of write delay center optimization
499 02:10:12.345273 INFO : End of read delay center optimization
500 02:10:12.345746 INFO : End of max read latency training
501 02:10:12.350917 INFO : Training has run successfully!
502 02:10:12.351382 1D training succeed
503 02:10:12.360073 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 02:10:12.407772 Check phy result
505 02:10:12.408306 INFO : End of initialization
506 02:10:12.429389 INFO : End of 2D read delay Voltage center optimization
507 02:10:12.449595 INFO : End of 2D read delay Voltage center optimization
508 02:10:12.501668 INFO : End of 2D write delay Voltage center optimization
509 02:10:12.551094 INFO : End of 2D write delay Voltage center optimization
510 02:10:12.556603 INFO : Training has run successfully!
511 02:10:12.557081
512 02:10:12.557532 channel==0
513 02:10:12.562192 RxClkDly_Margin_A0==88 ps 9
514 02:10:12.562662 TxDqDly_Margin_A0==98 ps 10
515 02:10:12.567851 RxClkDly_Margin_A1==88 ps 9
516 02:10:12.568375 TxDqDly_Margin_A1==98 ps 10
517 02:10:12.568830 TrainedVREFDQ_A0==74
518 02:10:12.573426 TrainedVREFDQ_A1==74
519 02:10:12.573919 VrefDac_Margin_A0==25
520 02:10:12.574374 DeviceVref_Margin_A0==40
521 02:10:12.578938 VrefDac_Margin_A1==25
522 02:10:12.579407 DeviceVref_Margin_A1==40
523 02:10:12.579850
524 02:10:12.580325
525 02:10:12.584535 channel==1
526 02:10:12.584998 RxClkDly_Margin_A0==98 ps 10
527 02:10:12.585437 TxDqDly_Margin_A0==98 ps 10
528 02:10:12.590090 RxClkDly_Margin_A1==88 ps 9
529 02:10:12.590562 TxDqDly_Margin_A1==88 ps 9
530 02:10:12.595803 TrainedVREFDQ_A0==77
531 02:10:12.596315 TrainedVREFDQ_A1==77
532 02:10:12.596767 VrefDac_Margin_A0==22
533 02:10:12.601376 DeviceVref_Margin_A0==37
534 02:10:12.601848 VrefDac_Margin_A1==24
535 02:10:12.606994 DeviceVref_Margin_A1==37
536 02:10:12.607460
537 02:10:12.607906 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 02:10:12.608380
539 02:10:12.640593 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
540 02:10:12.641120 2D training succeed
541 02:10:12.646197 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 02:10:12.651786 auto size-- 65535DDR cs0 size: 2048MB
543 02:10:12.652291 DDR cs1 size: 2048MB
544 02:10:12.657384 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 02:10:12.657857 cs0 DataBus test pass
546 02:10:12.663014 cs1 DataBus test pass
547 02:10:12.663483 cs0 AddrBus test pass
548 02:10:12.663926 cs1 AddrBus test pass
549 02:10:12.664406
550 02:10:12.668604 100bdlr_step_size ps== 420
551 02:10:12.669085 result report
552 02:10:12.674183 boot times 0Enable ddr reg access
553 02:10:12.679526 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 02:10:12.693031 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 02:10:13.266900 0.0;M3 CHK:0;cm4_sp_mode 0
556 02:10:13.267554 MVN_1=0x00000000
557 02:10:13.272565 MVN_2=0x00000000
558 02:10:13.278351 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 02:10:13.278876 OPS=0x10
560 02:10:13.279334 ring efuse init
561 02:10:13.279808 chipver efuse init
562 02:10:13.286453 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 02:10:13.287000 [0.018961 Inits done]
564 02:10:13.293903 secure task start!
565 02:10:13.294370 high task start!
566 02:10:13.294799 low task start!
567 02:10:13.295221 run into bl31
568 02:10:13.300496 NOTICE: BL31: v1.3(release):4fc40b1
569 02:10:13.308325 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 02:10:13.308799 NOTICE: BL31: G12A normal boot!
571 02:10:13.333676 NOTICE: BL31: BL33 decompress pass
572 02:10:13.338574 ERROR: Error initializing runtime service opteed_fast
573 02:10:14.572484
574 02:10:14.573118
575 02:10:14.580701 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 02:10:14.581195
577 02:10:14.581651 Model: Libre Computer AML-A311D-CC Alta
578 02:10:14.789259 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 02:10:14.812553 DRAM: 2 GiB (effective 3.8 GiB)
580 02:10:14.955534 Core: 408 devices, 31 uclasses, devicetree: separate
581 02:10:14.961435 WDT: Not starting watchdog@f0d0
582 02:10:14.993680 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 02:10:15.006328 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 02:10:15.011072 ** Bad device specification mmc 0 **
585 02:10:15.021432 Card did not respond to voltage select! : -110
586 02:10:15.028267 ** Bad device specification mmc 0 **
587 02:10:15.028756 Couldn't find partition mmc 0
588 02:10:15.037338 Card did not respond to voltage select! : -110
589 02:10:15.042871 ** Bad device specification mmc 0 **
590 02:10:15.043353 Couldn't find partition mmc 0
591 02:10:15.047999 Error: could not access storage.
592 02:10:15.389814 Net: eth0: ethernet@ff3f0000
593 02:10:15.390336 starting USB...
594 02:10:15.642367 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 02:10:15.642960 Starting the controller
596 02:10:15.649380 USB XHCI 1.10
597 02:10:17.360938 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 02:10:17.361617 bl2_stage_init 0x01
599 02:10:17.362096 bl2_stage_init 0x81
600 02:10:17.366610 hw id: 0x0000 - pwm id 0x01
601 02:10:17.367112 bl2_stage_init 0xc1
602 02:10:17.367572 bl2_stage_init 0x02
603 02:10:17.368072
604 02:10:17.372035 L0:00000000
605 02:10:17.372528 L1:20000703
606 02:10:17.372986 L2:00008067
607 02:10:17.373434 L3:14000000
608 02:10:17.377637 B2:00402000
609 02:10:17.378136 B1:e0f83180
610 02:10:17.378584
611 02:10:17.379029 TE: 58124
612 02:10:17.379476
613 02:10:17.383292 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 02:10:17.383797
615 02:10:17.384286 Board ID = 1
616 02:10:17.388886 Set A53 clk to 24M
617 02:10:17.389377 Set A73 clk to 24M
618 02:10:17.389823 Set clk81 to 24M
619 02:10:17.394648 A53 clk: 1200 MHz
620 02:10:17.395138 A73 clk: 1200 MHz
621 02:10:17.395588 CLK81: 166.6M
622 02:10:17.396057 smccc: 00012a92
623 02:10:17.399972 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 02:10:17.405566 board id: 1
625 02:10:17.411559 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 02:10:17.422101 fw parse done
627 02:10:17.428090 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 02:10:17.470760 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 02:10:17.481668 PIEI prepare done
630 02:10:17.482253 fastboot data load
631 02:10:17.482732 fastboot data verify
632 02:10:17.487258 verify result: 266
633 02:10:17.492738 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 02:10:17.493275 LPDDR4 probe
635 02:10:17.493740 ddr clk to 1584MHz
636 02:10:17.500862 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 02:10:17.538239
638 02:10:17.538898 dmc_version 0001
639 02:10:17.544800 Check phy result
640 02:10:17.550689 INFO : End of CA training
641 02:10:17.551190 INFO : End of initialization
642 02:10:17.556302 INFO : Training has run successfully!
643 02:10:17.556856 Check phy result
644 02:10:17.561824 INFO : End of initialization
645 02:10:17.562353 INFO : End of read enable training
646 02:10:17.567496 INFO : End of fine write leveling
647 02:10:17.573117 INFO : End of Write leveling coarse delay
648 02:10:17.573624 INFO : Training has run successfully!
649 02:10:17.574083 Check phy result
650 02:10:17.578647 INFO : End of initialization
651 02:10:17.579172 INFO : End of read dq deskew training
652 02:10:17.584257 INFO : End of MPR read delay center optimization
653 02:10:17.589791 INFO : End of write delay center optimization
654 02:10:17.595477 INFO : End of read delay center optimization
655 02:10:17.595954 INFO : End of max read latency training
656 02:10:17.600914 INFO : Training has run successfully!
657 02:10:17.601411 1D training succeed
658 02:10:17.610261 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 02:10:17.657822 Check phy result
660 02:10:17.658390 INFO : End of initialization
661 02:10:17.680404 INFO : End of 2D read delay Voltage center optimization
662 02:10:17.700708 INFO : End of 2D read delay Voltage center optimization
663 02:10:17.752769 INFO : End of 2D write delay Voltage center optimization
664 02:10:17.802039 INFO : End of 2D write delay Voltage center optimization
665 02:10:17.807632 INFO : Training has run successfully!
666 02:10:17.808185
667 02:10:17.808650 channel==0
668 02:10:17.813252 RxClkDly_Margin_A0==88 ps 9
669 02:10:17.813761 TxDqDly_Margin_A0==98 ps 10
670 02:10:17.818069 RxClkDly_Margin_A1==88 ps 9
671 02:10:17.818574 TxDqDly_Margin_A1==98 ps 10
672 02:10:17.823729 TrainedVREFDQ_A0==74
673 02:10:17.824284 TrainedVREFDQ_A1==74
674 02:10:17.824746 VrefDac_Margin_A0==25
675 02:10:17.829266 DeviceVref_Margin_A0==40
676 02:10:17.829792 VrefDac_Margin_A1==24
677 02:10:17.830249 DeviceVref_Margin_A1==40
678 02:10:17.830692
679 02:10:17.831132
680 02:10:17.834846 channel==1
681 02:10:17.835362 RxClkDly_Margin_A0==98 ps 10
682 02:10:17.838263 TxDqDly_Margin_A0==98 ps 10
683 02:10:17.838767 RxClkDly_Margin_A1==88 ps 9
684 02:10:17.843830 TxDqDly_Margin_A1==88 ps 9
685 02:10:17.844377 TrainedVREFDQ_A0==77
686 02:10:17.849486 TrainedVREFDQ_A1==77
687 02:10:17.850060 VrefDac_Margin_A0==22
688 02:10:17.850517 DeviceVref_Margin_A0==37
689 02:10:17.855105 VrefDac_Margin_A1==24
690 02:10:17.855627 DeviceVref_Margin_A1==37
691 02:10:17.856123
692 02:10:17.858498 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 02:10:17.858996
694 02:10:17.889996 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
695 02:10:17.890583 2D training succeed
696 02:10:17.899016 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 02:10:17.904634 auto size-- 65535DDR cs0 size: 2048MB
698 02:10:17.905185 DDR cs1 size: 2048MB
699 02:10:17.910104 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 02:10:17.910630 cs0 DataBus test pass
701 02:10:17.911084 cs1 DataBus test pass
702 02:10:17.915739 cs0 AddrBus test pass
703 02:10:17.916303 cs1 AddrBus test pass
704 02:10:17.916760
705 02:10:17.917209 100bdlr_step_size ps== 420
706 02:10:17.921294 result report
707 02:10:17.921783 boot times 0Enable ddr reg access
708 02:10:17.930466 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 02:10:17.943922 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 02:10:18.517705 0.0;M3 CHK:0;cm4_sp_mode 0
711 02:10:18.518349 MVN_1=0x00000000
712 02:10:18.523125 MVN_2=0x00000000
713 02:10:18.528830 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 02:10:18.529173 OPS=0x10
715 02:10:18.529403 ring efuse init
716 02:10:18.529622 chipver efuse init
717 02:10:18.537172 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 02:10:18.537501 [0.018961 Inits done]
719 02:10:18.537734 secure task start!
720 02:10:18.544652 high task start!
721 02:10:18.544984 low task start!
722 02:10:18.545204 run into bl31
723 02:10:18.551343 NOTICE: BL31: v1.3(release):4fc40b1
724 02:10:18.559128 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 02:10:18.559478 NOTICE: BL31: G12A normal boot!
726 02:10:18.585055 NOTICE: BL31: BL33 decompress pass
727 02:10:18.590663 ERROR: Error initializing runtime service opteed_fast
728 02:10:19.823651
729 02:10:19.824296
730 02:10:19.831185 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 02:10:19.831701
732 02:10:19.832165 Model: Libre Computer AML-A311D-CC Alta
733 02:10:20.040397 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 02:10:20.063925 DRAM: 2 GiB (effective 3.8 GiB)
735 02:10:20.206920 Core: 408 devices, 31 uclasses, devicetree: separate
736 02:10:20.212758 WDT: Not starting watchdog@f0d0
737 02:10:20.245064 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 02:10:20.257438 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 02:10:20.262432 ** Bad device specification mmc 0 **
740 02:10:20.272863 Card did not respond to voltage select! : -110
741 02:10:20.280449 ** Bad device specification mmc 0 **
742 02:10:20.280933 Couldn't find partition mmc 0
743 02:10:20.288867 Card did not respond to voltage select! : -110
744 02:10:20.294307 ** Bad device specification mmc 0 **
745 02:10:20.294785 Couldn't find partition mmc 0
746 02:10:20.299358 Error: could not access storage.
747 02:10:20.642787 Net: eth0: ethernet@ff3f0000
748 02:10:20.643410 starting USB...
749 02:10:20.894640 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 02:10:20.895181 Starting the controller
751 02:10:20.901602 USB XHCI 1.10
752 02:10:23.061210 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
753 02:10:23.061862 bl2_stage_init 0x81
754 02:10:23.066749 hw id: 0x0000 - pwm id 0x01
755 02:10:23.067242 bl2_stage_init 0xc1
756 02:10:23.067669 bl2_stage_init 0x02
757 02:10:23.068125
758 02:10:23.072396 L0:00000000
759 02:10:23.072872 L1:20000703
760 02:10:23.073284 L2:00008067
761 02:10:23.073688 L3:14000000
762 02:10:23.074086 B2:00402000
763 02:10:23.075013 B1:e0f83180
764 02:10:23.075476
765 02:10:23.075888 TE: 58150
766 02:10:23.076396
767 02:10:23.086126 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 02:10:23.086659
769 02:10:23.087086 Board ID = 1
770 02:10:23.087494 Set A53 clk to 24M
771 02:10:23.087893 Set A73 clk to 24M
772 02:10:23.091604 Set clk81 to 24M
773 02:10:23.092111 A53 clk: 1200 MHz
774 02:10:23.092530 A73 clk: 1200 MHz
775 02:10:23.097367 CLK81: 166.6M
776 02:10:23.097852 smccc: 00012aac
777 02:10:23.102776 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 02:10:23.103277 board id: 1
779 02:10:23.111549 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 02:10:23.122339 fw parse done
781 02:10:23.128227 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 02:10:23.170811 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 02:10:23.181841 PIEI prepare done
784 02:10:23.182370 fastboot data load
785 02:10:23.182794 fastboot data verify
786 02:10:23.187463 verify result: 266
787 02:10:23.192990 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 02:10:23.193480 LPDDR4 probe
789 02:10:23.193897 ddr clk to 1584MHz
790 02:10:23.199945 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 02:10:23.238307
792 02:10:23.238849 dmc_version 0001
793 02:10:23.244964 Check phy result
794 02:10:23.250847 INFO : End of CA training
795 02:10:23.251349 INFO : End of initialization
796 02:10:23.256467 INFO : Training has run successfully!
797 02:10:23.256962 Check phy result
798 02:10:23.262038 INFO : End of initialization
799 02:10:23.262528 INFO : End of read enable training
800 02:10:23.265484 INFO : End of fine write leveling
801 02:10:23.271067 INFO : End of Write leveling coarse delay
802 02:10:23.276643 INFO : Training has run successfully!
803 02:10:23.277139 Check phy result
804 02:10:23.277554 INFO : End of initialization
805 02:10:23.282217 INFO : End of read dq deskew training
806 02:10:23.287841 INFO : End of MPR read delay center optimization
807 02:10:23.288426 INFO : End of write delay center optimization
808 02:10:23.293467 INFO : End of read delay center optimization
809 02:10:23.299073 INFO : End of max read latency training
810 02:10:23.299558 INFO : Training has run successfully!
811 02:10:23.304604 1D training succeed
812 02:10:23.310522 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 02:10:23.357980 Check phy result
814 02:10:23.358514 INFO : End of initialization
815 02:10:23.379746 INFO : End of 2D read delay Voltage center optimization
816 02:10:23.400043 INFO : End of 2D read delay Voltage center optimization
817 02:10:23.452172 INFO : End of 2D write delay Voltage center optimization
818 02:10:23.501447 INFO : End of 2D write delay Voltage center optimization
819 02:10:23.507173 INFO : Training has run successfully!
820 02:10:23.507503
821 02:10:23.507728 channel==0
822 02:10:23.512528 RxClkDly_Margin_A0==88 ps 9
823 02:10:23.512957 TxDqDly_Margin_A0==98 ps 10
824 02:10:23.515819 RxClkDly_Margin_A1==88 ps 9
825 02:10:23.516273 TxDqDly_Margin_A1==98 ps 10
826 02:10:23.521446 TrainedVREFDQ_A0==74
827 02:10:23.521764 TrainedVREFDQ_A1==74
828 02:10:23.527012 VrefDac_Margin_A0==25
829 02:10:23.527338 DeviceVref_Margin_A0==40
830 02:10:23.527557 VrefDac_Margin_A1==25
831 02:10:23.532664 DeviceVref_Margin_A1==40
832 02:10:23.532984
833 02:10:23.533204
834 02:10:23.533417 channel==1
835 02:10:23.533629 RxClkDly_Margin_A0==98 ps 10
836 02:10:23.536085 TxDqDly_Margin_A0==88 ps 9
837 02:10:23.541629 RxClkDly_Margin_A1==98 ps 10
838 02:10:23.541980 TxDqDly_Margin_A1==88 ps 9
839 02:10:23.542207 TrainedVREFDQ_A0==76
840 02:10:23.547236 TrainedVREFDQ_A1==77
841 02:10:23.547559 VrefDac_Margin_A0==22
842 02:10:23.552708 DeviceVref_Margin_A0==38
843 02:10:23.553031 VrefDac_Margin_A1==22
844 02:10:23.553249 DeviceVref_Margin_A1==37
845 02:10:23.553458
846 02:10:23.561774 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 02:10:23.562106
848 02:10:23.587670 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
849 02:10:23.593222 2D training succeed
850 02:10:23.598806 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 02:10:23.604342 auto size-- 65535DDR cs0 size: 2048MB
852 02:10:23.604634 DDR cs1 size: 2048MB
853 02:10:23.604839 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 02:10:23.609915 cs0 DataBus test pass
855 02:10:23.610189 cs1 DataBus test pass
856 02:10:23.615545 cs0 AddrBus test pass
857 02:10:23.615844 cs1 AddrBus test pass
858 02:10:23.616090
859 02:10:23.616296 100bdlr_step_size ps== 420
860 02:10:23.621127 result report
861 02:10:23.621402 boot times 0Enable ddr reg access
862 02:10:23.629712 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 02:10:23.643274 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 02:10:24.216219 0.0;M3 CHK:0;cm4_sp_mode 0
865 02:10:24.216650 MVN_1=0x00000000
866 02:10:24.221875 MVN_2=0x00000000
867 02:10:24.227554 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 02:10:24.228137 OPS=0x10
869 02:10:24.228614 ring efuse init
870 02:10:24.229109 chipver efuse init
871 02:10:24.233123 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 02:10:24.238727 [0.018960 Inits done]
873 02:10:24.239268 secure task start!
874 02:10:24.239722 high task start!
875 02:10:24.243439 low task start!
876 02:10:24.243950 run into bl31
877 02:10:24.249926 NOTICE: BL31: v1.3(release):4fc40b1
878 02:10:24.257741 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 02:10:24.258284 NOTICE: BL31: G12A normal boot!
880 02:10:24.283052 NOTICE: BL31: BL33 decompress pass
881 02:10:24.287830 ERROR: Error initializing runtime service opteed_fast
882 02:10:25.521746
883 02:10:25.522415
884 02:10:25.530046 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 02:10:25.530584
886 02:10:25.531049 Model: Libre Computer AML-A311D-CC Alta
887 02:10:25.738517 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 02:10:25.761921 DRAM: 2 GiB (effective 3.8 GiB)
889 02:10:25.904866 Core: 408 devices, 31 uclasses, devicetree: separate
890 02:10:25.909911 WDT: Not starting watchdog@f0d0
891 02:10:25.942971 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 02:10:25.955396 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 02:10:25.960423 ** Bad device specification mmc 0 **
894 02:10:25.970732 Card did not respond to voltage select! : -110
895 02:10:25.978351 ** Bad device specification mmc 0 **
896 02:10:25.978847 Couldn't find partition mmc 0
897 02:10:25.986725 Card did not respond to voltage select! : -110
898 02:10:25.992244 ** Bad device specification mmc 0 **
899 02:10:25.992752 Couldn't find partition mmc 0
900 02:10:25.997307 Error: could not access storage.
901 02:10:26.339850 Net: eth0: ethernet@ff3f0000
902 02:10:26.340533 starting USB...
903 02:10:26.591671 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 02:10:26.592351 Starting the controller
905 02:10:26.598565 USB XHCI 1.10
906 02:10:28.152627 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
907 02:10:28.161032 scanning usb for storage devices... 0 Storage Device(s) found
909 02:10:28.212764 Hit any key to stop autoboot: 1
910 02:10:28.213654 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
911 02:10:28.214319 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
912 02:10:28.214851 Setting prompt string to ['=>']
913 02:10:28.215389 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
914 02:10:28.228366 0
915 02:10:28.229342 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
916 02:10:28.229890 Sending with 10 millisecond of delay
918 02:10:29.364814 => setenv autoload no
919 02:10:29.375707 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
920 02:10:29.381276 setenv autoload no
921 02:10:29.382080 Sending with 10 millisecond of delay
923 02:10:31.179656 => setenv initrd_high 0xffffffff
924 02:10:31.190610 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
925 02:10:31.191634 setenv initrd_high 0xffffffff
926 02:10:31.192509 Sending with 10 millisecond of delay
928 02:10:32.809563 => setenv fdt_high 0xffffffff
929 02:10:32.820468 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
930 02:10:32.821487 setenv fdt_high 0xffffffff
931 02:10:32.822273 Sending with 10 millisecond of delay
933 02:10:33.114392 => dhcp
934 02:10:33.125401 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
935 02:10:33.126032 dhcp
936 02:10:33.126288 Speed: 1000, full duplex
937 02:10:33.126513 BOOTP broadcast 1
938 02:10:33.133517 DHCP client bound to address 192.168.6.27 (8 ms)
939 02:10:33.134031 Sending with 10 millisecond of delay
941 02:10:34.810585 => setenv serverip 192.168.6.2
942 02:10:34.821406 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
943 02:10:34.822348 setenv serverip 192.168.6.2
944 02:10:34.823085 Sending with 10 millisecond of delay
946 02:10:38.548171 => tftpboot 0x01080000 964251/tftp-deploy-r_8g8b01/kernel/uImage
947 02:10:38.558960 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
948 02:10:38.559797 tftpboot 0x01080000 964251/tftp-deploy-r_8g8b01/kernel/uImage
949 02:10:38.560299 Speed: 1000, full duplex
950 02:10:38.560721 Using ethernet@ff3f0000 device
951 02:10:38.561643 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
952 02:10:38.567139 Filename '964251/tftp-deploy-r_8g8b01/kernel/uImage'.
953 02:10:38.571089 Load address: 0x1080000
954 02:10:41.375934 Loading: *################################################## 43.6 MiB
955 02:10:41.376594 15.5 MiB/s
956 02:10:41.377020 done
957 02:10:41.380387 Bytes transferred = 45713984 (2b98a40 hex)
958 02:10:41.381166 Sending with 10 millisecond of delay
960 02:10:46.068017 => tftpboot 0x08000000 964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
961 02:10:46.078799 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
962 02:10:46.079591 tftpboot 0x08000000 964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot
963 02:10:46.080071 Speed: 1000, full duplex
964 02:10:46.080493 Using ethernet@ff3f0000 device
965 02:10:46.081377 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
966 02:10:46.093289 Filename '964251/tftp-deploy-r_8g8b01/ramdisk/ramdisk.cpio.gz.uboot'.
967 02:10:46.093796 Load address: 0x8000000
968 02:10:56.032548 Loading: *#######T ########################################## UDP wrong checksum 0000000f 0000ea7a
969 02:11:01.033785 T UDP wrong checksum 0000000f 0000ea7a
970 02:11:11.036918 T T UDP wrong checksum 0000000f 0000ea7a
971 02:11:12.696173 UDP wrong checksum 000000ff 0000e362
972 02:11:12.724861 UDP wrong checksum 000000ff 00003be8
973 02:11:31.040708 T T T T UDP wrong checksum 0000000f 0000ea7a
974 02:11:46.044612 T T
975 02:11:46.045222 Retry count exceeded; starting again
977 02:11:46.046643 end: 2.4.3 bootloader-commands (duration 00:01:18) [common]
980 02:11:46.048573 end: 2.4 uboot-commands (duration 00:01:49) [common]
982 02:11:46.050032 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
984 02:11:46.051034 end: 2 uboot-action (duration 00:01:49) [common]
986 02:11:46.052589 Cleaning after the job
987 02:11:46.053124 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/ramdisk
988 02:11:46.054317 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/kernel
989 02:11:46.097665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/dtb
990 02:11:46.098518 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964251/tftp-deploy-r_8g8b01/modules
991 02:11:46.117408 start: 4.1 power-off (timeout 00:00:30) [common]
992 02:11:46.118041 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
993 02:11:46.149746 >> OK - accepted request
994 02:11:46.151655 Returned 0 in 0 seconds
995 02:11:46.252782 end: 4.1 power-off (duration 00:00:00) [common]
997 02:11:46.254454 start: 4.2 read-feedback (timeout 00:10:00) [common]
998 02:11:46.255583 Listened to connection for namespace 'common' for up to 1s
999 02:11:47.256384 Finalising connection for namespace 'common'
1000 02:11:47.257115 Disconnecting from shell: Finalise
1001 02:11:47.257628 =>
1002 02:11:47.358639 end: 4.2 read-feedback (duration 00:00:01) [common]
1003 02:11:47.359278 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964251
1004 02:11:48.024969 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964251
1005 02:11:48.025594 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.