Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:05:36.568392 lava-dispatcher, installed at version: 2024.01
2 02:05:36.569262 start: 0 validate
3 02:05:36.569767 Start time: 2024-11-09 02:05:36.569734+00:00 (UTC)
4 02:05:36.570350 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:05:36.570938 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:05:36.606647 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:05:36.607180 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:05:36.638745 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:05:36.639358 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:05:36.672944 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:05:36.673466 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:05:36.702463 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:05:36.702994 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:05:36.744720 validate duration: 0.18
16 02:05:36.745528 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:05:36.745857 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:05:36.746164 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:05:36.746733 Not decompressing ramdisk as can be used compressed.
20 02:05:36.747159 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:05:36.747429 saving as /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/ramdisk/initrd.cpio.gz
22 02:05:36.747686 total size: 5628169 (5 MB)
23 02:05:36.787575 progress 0 % (0 MB)
24 02:05:36.795083 progress 5 % (0 MB)
25 02:05:36.802891 progress 10 % (0 MB)
26 02:05:36.809863 progress 15 % (0 MB)
27 02:05:36.816869 progress 20 % (1 MB)
28 02:05:36.820566 progress 25 % (1 MB)
29 02:05:36.824702 progress 30 % (1 MB)
30 02:05:36.828848 progress 35 % (1 MB)
31 02:05:36.832536 progress 40 % (2 MB)
32 02:05:36.836569 progress 45 % (2 MB)
33 02:05:36.840165 progress 50 % (2 MB)
34 02:05:36.844189 progress 55 % (2 MB)
35 02:05:36.848169 progress 60 % (3 MB)
36 02:05:36.851667 progress 65 % (3 MB)
37 02:05:36.855555 progress 70 % (3 MB)
38 02:05:36.859071 progress 75 % (4 MB)
39 02:05:36.863012 progress 80 % (4 MB)
40 02:05:36.866664 progress 85 % (4 MB)
41 02:05:36.870597 progress 90 % (4 MB)
42 02:05:36.874425 progress 95 % (5 MB)
43 02:05:36.877720 progress 100 % (5 MB)
44 02:05:36.878374 5 MB downloaded in 0.13 s (41.08 MB/s)
45 02:05:36.878896 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:05:36.879785 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:05:36.880106 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:05:36.880391 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:05:36.880867 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/kernel/Image
51 02:05:36.881119 saving as /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/kernel/Image
52 02:05:36.881329 total size: 45713920 (43 MB)
53 02:05:36.881542 No compression specified
54 02:05:36.918601 progress 0 % (0 MB)
55 02:05:36.947801 progress 5 % (2 MB)
56 02:05:36.976560 progress 10 % (4 MB)
57 02:05:37.005171 progress 15 % (6 MB)
58 02:05:37.033815 progress 20 % (8 MB)
59 02:05:37.061638 progress 25 % (10 MB)
60 02:05:37.089447 progress 30 % (13 MB)
61 02:05:37.117863 progress 35 % (15 MB)
62 02:05:37.145969 progress 40 % (17 MB)
63 02:05:37.173614 progress 45 % (19 MB)
64 02:05:37.201461 progress 50 % (21 MB)
65 02:05:37.229590 progress 55 % (24 MB)
66 02:05:37.257939 progress 60 % (26 MB)
67 02:05:37.285328 progress 65 % (28 MB)
68 02:05:37.313397 progress 70 % (30 MB)
69 02:05:37.342391 progress 75 % (32 MB)
70 02:05:37.370128 progress 80 % (34 MB)
71 02:05:37.397819 progress 85 % (37 MB)
72 02:05:37.425728 progress 90 % (39 MB)
73 02:05:37.458040 progress 95 % (41 MB)
74 02:05:37.485740 progress 100 % (43 MB)
75 02:05:37.486283 43 MB downloaded in 0.60 s (72.07 MB/s)
76 02:05:37.486762 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:05:37.487586 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:05:37.487861 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:05:37.488161 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:05:37.488642 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:05:37.488924 saving as /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:05:37.489135 total size: 54703 (0 MB)
84 02:05:37.489346 No compression specified
85 02:05:37.535181 progress 59 % (0 MB)
86 02:05:37.536081 progress 100 % (0 MB)
87 02:05:37.536652 0 MB downloaded in 0.05 s (1.10 MB/s)
88 02:05:37.537125 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:05:37.537949 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:05:37.538213 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:05:37.538477 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:05:37.538944 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:05:37.539187 saving as /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/nfsrootfs/full.rootfs.tar
95 02:05:37.539394 total size: 120894716 (115 MB)
96 02:05:37.539609 Using unxz to decompress xz
97 02:05:37.572527 progress 0 % (0 MB)
98 02:05:38.463253 progress 5 % (5 MB)
99 02:05:39.309121 progress 10 % (11 MB)
100 02:05:40.102521 progress 15 % (17 MB)
101 02:05:40.874931 progress 20 % (23 MB)
102 02:05:41.572192 progress 25 % (28 MB)
103 02:05:42.402291 progress 30 % (34 MB)
104 02:05:43.280162 progress 35 % (40 MB)
105 02:05:43.652670 progress 40 % (46 MB)
106 02:05:44.043266 progress 45 % (51 MB)
107 02:05:44.762587 progress 50 % (57 MB)
108 02:05:45.646587 progress 55 % (63 MB)
109 02:05:46.423967 progress 60 % (69 MB)
110 02:05:47.180022 progress 65 % (74 MB)
111 02:05:47.960461 progress 70 % (80 MB)
112 02:05:48.796483 progress 75 % (86 MB)
113 02:05:49.592052 progress 80 % (92 MB)
114 02:05:50.356850 progress 85 % (98 MB)
115 02:05:51.214254 progress 90 % (103 MB)
116 02:05:51.994273 progress 95 % (109 MB)
117 02:05:52.853753 progress 100 % (115 MB)
118 02:05:52.866516 115 MB downloaded in 15.33 s (7.52 MB/s)
119 02:05:52.867500 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:05:52.869303 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:05:52.869866 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:05:52.870423 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:05:52.871263 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/modules.tar.xz
125 02:05:52.871784 saving as /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/modules/modules.tar
126 02:05:52.872268 total size: 11610740 (11 MB)
127 02:05:52.872724 Using unxz to decompress xz
128 02:05:52.916608 progress 0 % (0 MB)
129 02:05:52.997179 progress 5 % (0 MB)
130 02:05:53.072992 progress 10 % (1 MB)
131 02:05:53.172078 progress 15 % (1 MB)
132 02:05:53.263268 progress 20 % (2 MB)
133 02:05:53.343206 progress 25 % (2 MB)
134 02:05:53.419261 progress 30 % (3 MB)
135 02:05:53.498900 progress 35 % (3 MB)
136 02:05:53.572268 progress 40 % (4 MB)
137 02:05:53.648228 progress 45 % (5 MB)
138 02:05:53.732236 progress 50 % (5 MB)
139 02:05:53.810226 progress 55 % (6 MB)
140 02:05:53.898095 progress 60 % (6 MB)
141 02:05:53.980301 progress 65 % (7 MB)
142 02:05:54.062479 progress 70 % (7 MB)
143 02:05:54.140197 progress 75 % (8 MB)
144 02:05:54.224366 progress 80 % (8 MB)
145 02:05:54.304587 progress 85 % (9 MB)
146 02:05:54.386129 progress 90 % (9 MB)
147 02:05:54.464910 progress 95 % (10 MB)
148 02:05:54.542503 progress 100 % (11 MB)
149 02:05:54.554914 11 MB downloaded in 1.68 s (6.58 MB/s)
150 02:05:54.555553 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:05:54.556886 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:05:54.557463 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 02:05:54.558034 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 02:06:11.421292 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964248/extract-nfsrootfs-ztq67prq
156 02:06:11.421910 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:06:11.422233 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 02:06:11.423071 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53
159 02:06:11.423568 makedir: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin
160 02:06:11.423971 makedir: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/tests
161 02:06:11.424392 makedir: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/results
162 02:06:11.424740 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-add-keys
163 02:06:11.425266 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-add-sources
164 02:06:11.425767 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-background-process-start
165 02:06:11.426273 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-background-process-stop
166 02:06:11.426840 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-common-functions
167 02:06:11.427333 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-echo-ipv4
168 02:06:11.427817 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-install-packages
169 02:06:11.428341 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-installed-packages
170 02:06:11.428822 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-os-build
171 02:06:11.429297 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-probe-channel
172 02:06:11.429786 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-probe-ip
173 02:06:11.430302 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-target-ip
174 02:06:11.430782 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-target-mac
175 02:06:11.431253 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-target-storage
176 02:06:11.431730 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-case
177 02:06:11.432268 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-event
178 02:06:11.432756 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-feedback
179 02:06:11.433243 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-raise
180 02:06:11.433724 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-reference
181 02:06:11.434202 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-runner
182 02:06:11.434742 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-set
183 02:06:11.435221 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-test-shell
184 02:06:11.435697 Updating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-add-keys (debian)
185 02:06:11.436247 Updating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-add-sources (debian)
186 02:06:11.436757 Updating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-install-packages (debian)
187 02:06:11.437244 Updating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-installed-packages (debian)
188 02:06:11.437728 Updating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/bin/lava-os-build (debian)
189 02:06:11.438155 Creating /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/environment
190 02:06:11.438518 LAVA metadata
191 02:06:11.438776 - LAVA_JOB_ID=964248
192 02:06:11.438992 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:06:11.439356 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 02:06:11.440384 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:06:11.440716 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 02:06:11.440922 skipped lava-vland-overlay
197 02:06:11.441163 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:06:11.441416 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 02:06:11.441636 skipped lava-multinode-overlay
200 02:06:11.441877 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:06:11.442128 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 02:06:11.442369 Loading test definitions
203 02:06:11.442646 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 02:06:11.442868 Using /lava-964248 at stage 0
205 02:06:11.443943 uuid=964248_1.6.2.4.1 testdef=None
206 02:06:11.444288 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:06:11.444554 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 02:06:11.446116 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:06:11.446899 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 02:06:11.448857 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:06:11.449677 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 02:06:11.451479 runner path: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/0/tests/0_timesync-off test_uuid 964248_1.6.2.4.1
215 02:06:11.452028 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:06:11.452844 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 02:06:11.453067 Using /lava-964248 at stage 0
219 02:06:11.453417 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:06:11.453707 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/0/tests/1_kselftest-dt'
221 02:06:14.838255 Running '/usr/bin/git checkout kernelci.org
222 02:06:15.286880 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 02:06:15.288360 uuid=964248_1.6.2.4.5 testdef=None
224 02:06:15.288709 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:06:15.289459 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 02:06:15.292310 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:06:15.293135 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 02:06:15.296831 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:06:15.297694 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 02:06:15.301295 runner path: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/0/tests/1_kselftest-dt test_uuid 964248_1.6.2.4.5
234 02:06:15.301581 BOARD='meson-g12b-a311d-libretech-cc'
235 02:06:15.301788 BRANCH='broonie-sound'
236 02:06:15.301988 SKIPFILE='/dev/null'
237 02:06:15.302187 SKIP_INSTALL='True'
238 02:06:15.302381 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:06:15.302581 TST_CASENAME=''
240 02:06:15.302778 TST_CMDFILES='dt'
241 02:06:15.303337 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:06:15.304157 Creating lava-test-runner.conf files
244 02:06:15.304367 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964248/lava-overlay-zxlh3z53/lava-964248/0 for stage 0
245 02:06:15.304744 - 0_timesync-off
246 02:06:15.304995 - 1_kselftest-dt
247 02:06:15.305329 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:06:15.305612 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 02:06:38.477835 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 02:06:38.478272 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 02:06:38.478569 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:06:38.478880 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:06:38.479180 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 02:06:39.092896 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:06:39.093352 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 02:06:39.093623 extracting modules file /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964248/extract-nfsrootfs-ztq67prq
257 02:06:40.646276 extracting modules file /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk
258 02:06:42.066831 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:06:42.067328 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 02:06:42.067610 [common] Applying overlay to NFS
261 02:06:42.067830 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964248/compress-overlay-62gokqkj/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964248/extract-nfsrootfs-ztq67prq
262 02:06:44.913967 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:06:44.914438 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 02:06:44.914714 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 02:06:44.914945 Converting downloaded kernel to a uImage
266 02:06:44.915259 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/kernel/Image /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/kernel/uImage
267 02:06:45.408149 output: Image Name:
268 02:06:45.408582 output: Created: Sat Nov 9 02:06:44 2024
269 02:06:45.408793 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:06:45.409000 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 02:06:45.409206 output: Load Address: 01080000
272 02:06:45.409412 output: Entry Point: 01080000
273 02:06:45.409614 output:
274 02:06:45.409953 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 02:06:45.410225 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 02:06:45.410495 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 02:06:45.410752 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:06:45.411009 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 02:06:45.411269 Building ramdisk /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk
280 02:06:47.619835 >> 166792 blocks
281 02:06:55.552520 Adding RAMdisk u-boot header.
282 02:06:55.552982 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk.cpio.gz.uboot
283 02:06:55.799430 output: Image Name:
284 02:06:55.799868 output: Created: Sat Nov 9 02:06:55 2024
285 02:06:55.800400 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:06:55.800870 output: Data Size: 23432597 Bytes = 22883.40 KiB = 22.35 MiB
287 02:06:55.801334 output: Load Address: 00000000
288 02:06:55.801788 output: Entry Point: 00000000
289 02:06:55.802242 output:
290 02:06:55.803435 rename /var/lib/lava/dispatcher/tmp/964248/extract-overlay-ramdisk-yuflwja0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
291 02:06:55.804259 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:06:55.804882 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 02:06:55.805475 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 02:06:55.805987 No LXC device requested
295 02:06:55.806552 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:06:55.807128 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 02:06:55.807690 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:06:55.808191 Checking files for TFTP limit of 4294967296 bytes.
299 02:06:55.811130 end: 1 tftp-deploy (duration 00:01:19) [common]
300 02:06:55.811770 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:06:55.812407 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:06:55.812974 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:06:55.813543 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:06:55.814134 Using kernel file from prepare-kernel: 964248/tftp-deploy-u8zwvfdf/kernel/uImage
305 02:06:55.814839 substitutions:
306 02:06:55.815304 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:06:55.815768 - {DTB_ADDR}: 0x01070000
308 02:06:55.816263 - {DTB}: 964248/tftp-deploy-u8zwvfdf/dtb/meson-g12b-a311d-libretech-cc.dtb
309 02:06:55.816725 - {INITRD}: 964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
310 02:06:55.817179 - {KERNEL_ADDR}: 0x01080000
311 02:06:55.817627 - {KERNEL}: 964248/tftp-deploy-u8zwvfdf/kernel/uImage
312 02:06:55.818077 - {LAVA_MAC}: None
313 02:06:55.818568 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964248/extract-nfsrootfs-ztq67prq
314 02:06:55.819027 - {NFS_SERVER_IP}: 192.168.6.2
315 02:06:55.819473 - {PRESEED_CONFIG}: None
316 02:06:55.819915 - {PRESEED_LOCAL}: None
317 02:06:55.820438 - {RAMDISK_ADDR}: 0x08000000
318 02:06:55.820890 - {RAMDISK}: 964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
319 02:06:55.821333 - {ROOT_PART}: None
320 02:06:55.821773 - {ROOT}: None
321 02:06:55.822211 - {SERVER_IP}: 192.168.6.2
322 02:06:55.822648 - {TEE_ADDR}: 0x83000000
323 02:06:55.823084 - {TEE}: None
324 02:06:55.823519 Parsed boot commands:
325 02:06:55.823945 - setenv autoload no
326 02:06:55.824471 - setenv initrd_high 0xffffffff
327 02:06:55.824907 - setenv fdt_high 0xffffffff
328 02:06:55.825339 - dhcp
329 02:06:55.825773 - setenv serverip 192.168.6.2
330 02:06:55.826210 - tftpboot 0x01080000 964248/tftp-deploy-u8zwvfdf/kernel/uImage
331 02:06:55.826653 - tftpboot 0x08000000 964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
332 02:06:55.827093 - tftpboot 0x01070000 964248/tftp-deploy-u8zwvfdf/dtb/meson-g12b-a311d-libretech-cc.dtb
333 02:06:55.827530 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964248/extract-nfsrootfs-ztq67prq,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:06:55.828003 - bootm 0x01080000 0x08000000 0x01070000
335 02:06:55.828571 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:06:55.830238 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:06:55.830711 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 02:06:55.845917 Setting prompt string to ['lava-test: # ']
340 02:06:55.847560 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:06:55.848291 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:06:55.848954 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:06:55.849576 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:06:55.850861 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 02:06:55.889062 >> OK - accepted request
346 02:06:55.891195 Returned 0 in 0 seconds
347 02:06:55.992408 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:06:55.994194 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:06:55.994852 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:06:55.995439 Setting prompt string to ['Hit any key to stop autoboot']
352 02:06:55.995949 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:06:55.997710 Trying 192.168.56.21...
354 02:06:55.998253 Connected to conserv1.
355 02:06:55.998715 Escape character is '^]'.
356 02:06:55.999186
357 02:06:55.999650 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 02:06:56.000162
359 02:07:07.139486 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 02:07:07.140227 bl2_stage_init 0x01
361 02:07:07.140748 bl2_stage_init 0x81
362 02:07:07.144868 hw id: 0x0000 - pwm id 0x01
363 02:07:07.145509 bl2_stage_init 0xc1
364 02:07:07.145979 bl2_stage_init 0x02
365 02:07:07.146446
366 02:07:07.150494 L0:00000000
367 02:07:07.151026 L1:20000703
368 02:07:07.151474 L2:00008067
369 02:07:07.151925 L3:14000000
370 02:07:07.153453 B2:00402000
371 02:07:07.153935 B1:e0f83180
372 02:07:07.154379
373 02:07:07.154810 TE: 58167
374 02:07:07.155240
375 02:07:07.164595 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 02:07:07.165089
377 02:07:07.165523 Board ID = 1
378 02:07:07.165948 Set A53 clk to 24M
379 02:07:07.166370 Set A73 clk to 24M
380 02:07:07.170283 Set clk81 to 24M
381 02:07:07.170745 A53 clk: 1200 MHz
382 02:07:07.171174 A73 clk: 1200 MHz
383 02:07:07.175902 CLK81: 166.6M
384 02:07:07.176406 smccc: 00012abd
385 02:07:07.181314 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 02:07:07.181780 board id: 1
387 02:07:07.189753 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:07:07.200393 fw parse done
389 02:07:07.206348 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:07:07.248999 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:07:07.259879 PIEI prepare done
392 02:07:07.260421 fastboot data load
393 02:07:07.260856 fastboot data verify
394 02:07:07.265573 verify result: 266
395 02:07:07.271260 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 02:07:07.271737 LPDDR4 probe
397 02:07:07.272206 ddr clk to 1584MHz
398 02:07:07.279163 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:07:07.316407
400 02:07:07.316917 dmc_version 0001
401 02:07:07.323101 Check phy result
402 02:07:07.328913 INFO : End of CA training
403 02:07:07.329388 INFO : End of initialization
404 02:07:07.334546 INFO : Training has run successfully!
405 02:07:07.335018 Check phy result
406 02:07:07.340237 INFO : End of initialization
407 02:07:07.340700 INFO : End of read enable training
408 02:07:07.345731 INFO : End of fine write leveling
409 02:07:07.351361 INFO : End of Write leveling coarse delay
410 02:07:07.351828 INFO : Training has run successfully!
411 02:07:07.352295 Check phy result
412 02:07:07.356945 INFO : End of initialization
413 02:07:07.357416 INFO : End of read dq deskew training
414 02:07:07.362529 INFO : End of MPR read delay center optimization
415 02:07:07.368270 INFO : End of write delay center optimization
416 02:07:07.373738 INFO : End of read delay center optimization
417 02:07:07.374218 INFO : End of max read latency training
418 02:07:07.379325 INFO : Training has run successfully!
419 02:07:07.379812 1D training succeed
420 02:07:07.388490 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:07:07.436288 Check phy result
422 02:07:07.436945 INFO : End of initialization
423 02:07:07.458698 INFO : End of 2D read delay Voltage center optimization
424 02:07:07.479020 INFO : End of 2D read delay Voltage center optimization
425 02:07:07.531012 INFO : End of 2D write delay Voltage center optimization
426 02:07:07.580519 INFO : End of 2D write delay Voltage center optimization
427 02:07:07.585890 INFO : Training has run successfully!
428 02:07:07.586410
429 02:07:07.586876 channel==0
430 02:07:07.591500 RxClkDly_Margin_A0==88 ps 9
431 02:07:07.592053 TxDqDly_Margin_A0==98 ps 10
432 02:07:07.597114 RxClkDly_Margin_A1==88 ps 9
433 02:07:07.597625 TxDqDly_Margin_A1==98 ps 10
434 02:07:07.598085 TrainedVREFDQ_A0==74
435 02:07:07.602683 TrainedVREFDQ_A1==75
436 02:07:07.603184 VrefDac_Margin_A0==24
437 02:07:07.603640 DeviceVref_Margin_A0==40
438 02:07:07.608276 VrefDac_Margin_A1==24
439 02:07:07.608780 DeviceVref_Margin_A1==39
440 02:07:07.609233
441 02:07:07.609686
442 02:07:07.613900 channel==1
443 02:07:07.614407 RxClkDly_Margin_A0==98 ps 10
444 02:07:07.614864 TxDqDly_Margin_A0==98 ps 10
445 02:07:07.619495 RxClkDly_Margin_A1==98 ps 10
446 02:07:07.620034 TxDqDly_Margin_A1==88 ps 9
447 02:07:07.625081 TrainedVREFDQ_A0==77
448 02:07:07.625585 TrainedVREFDQ_A1==77
449 02:07:07.626040 VrefDac_Margin_A0==22
450 02:07:07.630687 DeviceVref_Margin_A0==37
451 02:07:07.631192 VrefDac_Margin_A1==22
452 02:07:07.636265 DeviceVref_Margin_A1==37
453 02:07:07.636762
454 02:07:07.637217 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:07:07.641881
456 02:07:07.669899 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 02:07:07.670489 2D training succeed
458 02:07:07.675491 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:07:07.681114 auto size-- 65535DDR cs0 size: 2048MB
460 02:07:07.681601 DDR cs1 size: 2048MB
461 02:07:07.686645 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:07:07.687125 cs0 DataBus test pass
463 02:07:07.692260 cs1 DataBus test pass
464 02:07:07.692732 cs0 AddrBus test pass
465 02:07:07.693191 cs1 AddrBus test pass
466 02:07:07.693637
467 02:07:07.697859 100bdlr_step_size ps== 420
468 02:07:07.698339 result report
469 02:07:07.703490 boot times 0Enable ddr reg access
470 02:07:07.708919 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:07:07.722427 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 02:07:08.296127 0.0;M3 CHK:0;cm4_sp_mode 0
473 02:07:08.296812 MVN_1=0x00000000
474 02:07:08.301517 MVN_2=0x00000000
475 02:07:08.307256 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 02:07:08.307737 OPS=0x10
477 02:07:08.308231 ring efuse init
478 02:07:08.308678 chipver efuse init
479 02:07:08.312861 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 02:07:08.318454 [0.018961 Inits done]
481 02:07:08.318942 secure task start!
482 02:07:08.319385 high task start!
483 02:07:08.323040 low task start!
484 02:07:08.323505 run into bl31
485 02:07:08.329686 NOTICE: BL31: v1.3(release):4fc40b1
486 02:07:08.337488 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 02:07:08.337968 NOTICE: BL31: G12A normal boot!
488 02:07:08.362817 NOTICE: BL31: BL33 decompress pass
489 02:07:08.368502 ERROR: Error initializing runtime service opteed_fast
490 02:07:09.601461
491 02:07:09.602128
492 02:07:09.609766 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 02:07:09.610295
494 02:07:09.610752 Model: Libre Computer AML-A311D-CC Alta
495 02:07:09.818201 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 02:07:09.841631 DRAM: 2 GiB (effective 3.8 GiB)
497 02:07:09.984606 Core: 408 devices, 31 uclasses, devicetree: separate
498 02:07:09.990460 WDT: Not starting watchdog@f0d0
499 02:07:10.022756 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 02:07:10.035185 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 02:07:10.040113 ** Bad device specification mmc 0 **
502 02:07:10.050510 Card did not respond to voltage select! : -110
503 02:07:10.058105 ** Bad device specification mmc 0 **
504 02:07:10.058602 Couldn't find partition mmc 0
505 02:07:10.066499 Card did not respond to voltage select! : -110
506 02:07:10.071945 ** Bad device specification mmc 0 **
507 02:07:10.072458 Couldn't find partition mmc 0
508 02:07:10.076993 Error: could not access storage.
509 02:07:11.339443 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 02:07:11.340151 bl2_stage_init 0x01
511 02:07:11.340629 bl2_stage_init 0x81
512 02:07:11.345033 hw id: 0x0000 - pwm id 0x01
513 02:07:11.345517 bl2_stage_init 0xc1
514 02:07:11.345968 bl2_stage_init 0x02
515 02:07:11.346411
516 02:07:11.350768 L0:00000000
517 02:07:11.351254 L1:20000703
518 02:07:11.351698 L2:00008067
519 02:07:11.352180 L3:14000000
520 02:07:11.356261 B2:00402000
521 02:07:11.356749 B1:e0f83180
522 02:07:11.357192
523 02:07:11.357637 TE: 58124
524 02:07:11.358077
525 02:07:11.361830 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 02:07:11.362310
527 02:07:11.362760 Board ID = 1
528 02:07:11.367510 Set A53 clk to 24M
529 02:07:11.368037 Set A73 clk to 24M
530 02:07:11.368500 Set clk81 to 24M
531 02:07:11.373065 A53 clk: 1200 MHz
532 02:07:11.373539 A73 clk: 1200 MHz
533 02:07:11.373983 CLK81: 166.6M
534 02:07:11.374419 smccc: 00012a91
535 02:07:11.378751 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 02:07:11.384218 board id: 1
537 02:07:11.390104 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 02:07:11.400776 fw parse done
539 02:07:11.406784 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:07:11.449356 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 02:07:11.460235 PIEI prepare done
542 02:07:11.460739 fastboot data load
543 02:07:11.461200 fastboot data verify
544 02:07:11.465887 verify result: 266
545 02:07:11.471499 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 02:07:11.471973 LPDDR4 probe
547 02:07:11.472474 ddr clk to 1584MHz
548 02:07:11.479496 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 02:07:11.516867
550 02:07:11.517388 dmc_version 0001
551 02:07:11.523394 Check phy result
552 02:07:11.529264 INFO : End of CA training
553 02:07:11.529751 INFO : End of initialization
554 02:07:11.534874 INFO : Training has run successfully!
555 02:07:11.535353 Check phy result
556 02:07:11.540497 INFO : End of initialization
557 02:07:11.540993 INFO : End of read enable training
558 02:07:11.543898 INFO : End of fine write leveling
559 02:07:11.549298 INFO : End of Write leveling coarse delay
560 02:07:11.554899 INFO : Training has run successfully!
561 02:07:11.555378 Check phy result
562 02:07:11.555824 INFO : End of initialization
563 02:07:11.560521 INFO : End of read dq deskew training
564 02:07:11.566110 INFO : End of MPR read delay center optimization
565 02:07:11.566598 INFO : End of write delay center optimization
566 02:07:11.571783 INFO : End of read delay center optimization
567 02:07:11.577418 INFO : End of max read latency training
568 02:07:11.577916 INFO : Training has run successfully!
569 02:07:11.582973 1D training succeed
570 02:07:11.588985 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 02:07:11.636488 Check phy result
572 02:07:11.637003 INFO : End of initialization
573 02:07:11.658270 INFO : End of 2D read delay Voltage center optimization
574 02:07:11.678400 INFO : End of 2D read delay Voltage center optimization
575 02:07:11.730421 INFO : End of 2D write delay Voltage center optimization
576 02:07:11.779816 INFO : End of 2D write delay Voltage center optimization
577 02:07:11.785357 INFO : Training has run successfully!
578 02:07:11.785834
579 02:07:11.786286 channel==0
580 02:07:11.790952 RxClkDly_Margin_A0==88 ps 9
581 02:07:11.791440 TxDqDly_Margin_A0==98 ps 10
582 02:07:11.796564 RxClkDly_Margin_A1==88 ps 9
583 02:07:11.797049 TxDqDly_Margin_A1==98 ps 10
584 02:07:11.797494 TrainedVREFDQ_A0==74
585 02:07:11.802149 TrainedVREFDQ_A1==74
586 02:07:11.802626 VrefDac_Margin_A0==25
587 02:07:11.803070 DeviceVref_Margin_A0==40
588 02:07:11.807806 VrefDac_Margin_A1==24
589 02:07:11.808311 DeviceVref_Margin_A1==40
590 02:07:11.808755
591 02:07:11.809199
592 02:07:11.813340 channel==1
593 02:07:11.813825 RxClkDly_Margin_A0==88 ps 9
594 02:07:11.814266 TxDqDly_Margin_A0==98 ps 10
595 02:07:11.818962 RxClkDly_Margin_A1==98 ps 10
596 02:07:11.819453 TxDqDly_Margin_A1==88 ps 9
597 02:07:11.824555 TrainedVREFDQ_A0==77
598 02:07:11.825055 TrainedVREFDQ_A1==77
599 02:07:11.825505 VrefDac_Margin_A0==22
600 02:07:11.830155 DeviceVref_Margin_A0==37
601 02:07:11.830639 VrefDac_Margin_A1==22
602 02:07:11.835889 DeviceVref_Margin_A1==37
603 02:07:11.836404
604 02:07:11.836853 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 02:07:11.837295
606 02:07:11.869349 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 02:07:11.869897 2D training succeed
608 02:07:11.874927 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 02:07:11.880562 auto size-- 65535DDR cs0 size: 2048MB
610 02:07:11.881042 DDR cs1 size: 2048MB
611 02:07:11.886151 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 02:07:11.886631 cs0 DataBus test pass
613 02:07:11.891814 cs1 DataBus test pass
614 02:07:11.892338 cs0 AddrBus test pass
615 02:07:11.892790 cs1 AddrBus test pass
616 02:07:11.893229
617 02:07:11.897344 100bdlr_step_size ps== 420
618 02:07:11.897830 result report
619 02:07:11.902924 boot times 0Enable ddr reg access
620 02:07:11.908303 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 02:07:11.921888 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 02:07:12.495608 0.0;M3 CHK:0;cm4_sp_mode 0
623 02:07:12.496323 MVN_1=0x00000000
624 02:07:12.501211 MVN_2=0x00000000
625 02:07:12.506948 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 02:07:12.507482 OPS=0x10
627 02:07:12.507951 ring efuse init
628 02:07:12.508464 chipver efuse init
629 02:07:12.512444 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 02:07:12.517994 [0.018961 Inits done]
631 02:07:12.518465 secure task start!
632 02:07:12.518900 high task start!
633 02:07:12.522714 low task start!
634 02:07:12.523186 run into bl31
635 02:07:12.529316 NOTICE: BL31: v1.3(release):4fc40b1
636 02:07:12.537125 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 02:07:12.537605 NOTICE: BL31: G12A normal boot!
638 02:07:12.562570 NOTICE: BL31: BL33 decompress pass
639 02:07:12.568224 ERROR: Error initializing runtime service opteed_fast
640 02:07:13.801041
641 02:07:13.801660
642 02:07:13.809550 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 02:07:13.810040
644 02:07:13.810499 Model: Libre Computer AML-A311D-CC Alta
645 02:07:14.018011 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 02:07:14.041461 DRAM: 2 GiB (effective 3.8 GiB)
647 02:07:14.184276 Core: 408 devices, 31 uclasses, devicetree: separate
648 02:07:14.190169 WDT: Not starting watchdog@f0d0
649 02:07:14.222370 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 02:07:14.234745 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 02:07:14.239824 ** Bad device specification mmc 0 **
652 02:07:14.250292 Card did not respond to voltage select! : -110
653 02:07:14.257805 ** Bad device specification mmc 0 **
654 02:07:14.258284 Couldn't find partition mmc 0
655 02:07:14.266242 Card did not respond to voltage select! : -110
656 02:07:14.272191 ** Bad device specification mmc 0 **
657 02:07:14.272663 Couldn't find partition mmc 0
658 02:07:14.276735 Error: could not access storage.
659 02:07:14.619282 Net: eth0: ethernet@ff3f0000
660 02:07:14.619885 starting USB...
661 02:07:14.871047 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 02:07:14.871616 Starting the controller
663 02:07:14.877922 USB XHCI 1.10
664 02:07:16.589728 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 02:07:16.590358 bl2_stage_init 0x01
666 02:07:16.590790 bl2_stage_init 0x81
667 02:07:16.595113 hw id: 0x0000 - pwm id 0x01
668 02:07:16.595424 bl2_stage_init 0xc1
669 02:07:16.595666 bl2_stage_init 0x02
670 02:07:16.595902
671 02:07:16.600712 L0:00000000
672 02:07:16.601051 L1:20000703
673 02:07:16.601300 L2:00008067
674 02:07:16.601541 L3:14000000
675 02:07:16.603660 B2:00402000
676 02:07:16.603950 B1:e0f83180
677 02:07:16.604223
678 02:07:16.604468 TE: 58159
679 02:07:16.604711
680 02:07:16.614770 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 02:07:16.615113
682 02:07:16.615360 Board ID = 1
683 02:07:16.615597 Set A53 clk to 24M
684 02:07:16.615834 Set A73 clk to 24M
685 02:07:16.620553 Set clk81 to 24M
686 02:07:16.620855 A53 clk: 1200 MHz
687 02:07:16.621109 A73 clk: 1200 MHz
688 02:07:16.624093 CLK81: 166.6M
689 02:07:16.624796 smccc: 00012ab5
690 02:07:16.629646 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 02:07:16.635252 board id: 1
692 02:07:16.640518 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 02:07:16.650885 fw parse done
694 02:07:16.656826 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 02:07:16.699397 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 02:07:16.710479 PIEI prepare done
697 02:07:16.710999 fastboot data load
698 02:07:16.711425 fastboot data verify
699 02:07:16.716072 verify result: 266
700 02:07:16.721676 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 02:07:16.722207 LPDDR4 probe
702 02:07:16.722619 ddr clk to 1584MHz
703 02:07:16.729676 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 02:07:16.766826
705 02:07:16.767337 dmc_version 0001
706 02:07:16.773521 Check phy result
707 02:07:16.779394 INFO : End of CA training
708 02:07:16.779887 INFO : End of initialization
709 02:07:16.784989 INFO : Training has run successfully!
710 02:07:16.785469 Check phy result
711 02:07:16.790572 INFO : End of initialization
712 02:07:16.791041 INFO : End of read enable training
713 02:07:16.796245 INFO : End of fine write leveling
714 02:07:16.801769 INFO : End of Write leveling coarse delay
715 02:07:16.802243 INFO : Training has run successfully!
716 02:07:16.802650 Check phy result
717 02:07:16.807383 INFO : End of initialization
718 02:07:16.807847 INFO : End of read dq deskew training
719 02:07:16.812982 INFO : End of MPR read delay center optimization
720 02:07:16.818570 INFO : End of write delay center optimization
721 02:07:16.824239 INFO : End of read delay center optimization
722 02:07:16.824718 INFO : End of max read latency training
723 02:07:16.829790 INFO : Training has run successfully!
724 02:07:16.830262 1D training succeed
725 02:07:16.838927 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 02:07:16.886576 Check phy result
727 02:07:16.887088 INFO : End of initialization
728 02:07:16.908447 INFO : End of 2D read delay Voltage center optimization
729 02:07:16.928626 INFO : End of 2D read delay Voltage center optimization
730 02:07:16.980610 INFO : End of 2D write delay Voltage center optimization
731 02:07:17.030034 INFO : End of 2D write delay Voltage center optimization
732 02:07:17.035640 INFO : Training has run successfully!
733 02:07:17.036202
734 02:07:17.036636 channel==0
735 02:07:17.041129 RxClkDly_Margin_A0==88 ps 9
736 02:07:17.041658 TxDqDly_Margin_A0==108 ps 11
737 02:07:17.044523 RxClkDly_Margin_A1==88 ps 9
738 02:07:17.045011 TxDqDly_Margin_A1==88 ps 9
739 02:07:17.050095 TrainedVREFDQ_A0==74
740 02:07:17.050616 TrainedVREFDQ_A1==74
741 02:07:17.051032 VrefDac_Margin_A0==25
742 02:07:17.055648 DeviceVref_Margin_A0==40
743 02:07:17.056172 VrefDac_Margin_A1==25
744 02:07:17.061264 DeviceVref_Margin_A1==40
745 02:07:17.061756
746 02:07:17.062168
747 02:07:17.062605 channel==1
748 02:07:17.063030 RxClkDly_Margin_A0==98 ps 10
749 02:07:17.064647 TxDqDly_Margin_A0==88 ps 9
750 02:07:17.070201 RxClkDly_Margin_A1==98 ps 10
751 02:07:17.070699 TxDqDly_Margin_A1==88 ps 9
752 02:07:17.071117 TrainedVREFDQ_A0==76
753 02:07:17.075773 TrainedVREFDQ_A1==77
754 02:07:17.076337 VrefDac_Margin_A0==22
755 02:07:17.081412 DeviceVref_Margin_A0==38
756 02:07:17.081896 VrefDac_Margin_A1==24
757 02:07:17.082310 DeviceVref_Margin_A1==37
758 02:07:17.082714
759 02:07:17.087006 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 02:07:17.087509
761 02:07:17.120615 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 02:07:17.121212 2D training succeed
763 02:07:17.126200 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 02:07:17.131782 auto size-- 65535DDR cs0 size: 2048MB
765 02:07:17.132326 DDR cs1 size: 2048MB
766 02:07:17.137393 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 02:07:17.137890 cs0 DataBus test pass
768 02:07:17.138304 cs1 DataBus test pass
769 02:07:17.143001 cs0 AddrBus test pass
770 02:07:17.143486 cs1 AddrBus test pass
771 02:07:17.143895
772 02:07:17.148646 100bdlr_step_size ps== 420
773 02:07:17.149135 result report
774 02:07:17.149541 boot times 0Enable ddr reg access
775 02:07:17.158432 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 02:07:17.171924 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 02:07:17.745610 0.0;M3 CHK:0;cm4_sp_mode 0
778 02:07:17.746243 MVN_1=0x00000000
779 02:07:17.751110 MVN_2=0x00000000
780 02:07:17.756789 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 02:07:17.757312 OPS=0x10
782 02:07:17.757718 ring efuse init
783 02:07:17.758107 chipver efuse init
784 02:07:17.762421 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 02:07:17.768024 [0.018961 Inits done]
786 02:07:17.768518 secure task start!
787 02:07:17.768915 high task start!
788 02:07:17.772619 low task start!
789 02:07:17.773162 run into bl31
790 02:07:17.779250 NOTICE: BL31: v1.3(release):4fc40b1
791 02:07:17.787048 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 02:07:17.787598 NOTICE: BL31: G12A normal boot!
793 02:07:17.812342 NOTICE: BL31: BL33 decompress pass
794 02:07:17.818005 ERROR: Error initializing runtime service opteed_fast
795 02:07:19.050945
796 02:07:19.051558
797 02:07:19.059254 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 02:07:19.059744
799 02:07:19.060201 Model: Libre Computer AML-A311D-CC Alta
800 02:07:19.267741 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 02:07:19.291083 DRAM: 2 GiB (effective 3.8 GiB)
802 02:07:19.434166 Core: 408 devices, 31 uclasses, devicetree: separate
803 02:07:19.439955 WDT: Not starting watchdog@f0d0
804 02:07:19.472202 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 02:07:19.484599 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 02:07:19.489644 ** Bad device specification mmc 0 **
807 02:07:19.500025 Card did not respond to voltage select! : -110
808 02:07:19.507654 ** Bad device specification mmc 0 **
809 02:07:19.508176 Couldn't find partition mmc 0
810 02:07:19.516007 Card did not respond to voltage select! : -110
811 02:07:19.521486 ** Bad device specification mmc 0 **
812 02:07:19.521959 Couldn't find partition mmc 0
813 02:07:19.526555 Error: could not access storage.
814 02:07:19.869013 Net: eth0: ethernet@ff3f0000
815 02:07:19.869446 starting USB...
816 02:07:20.120975 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 02:07:20.121566 Starting the controller
818 02:07:20.127798 USB XHCI 1.10
819 02:07:22.291429 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 02:07:22.292119 bl2_stage_init 0x01
821 02:07:22.292597 bl2_stage_init 0x81
822 02:07:22.296836 hw id: 0x0000 - pwm id 0x01
823 02:07:22.297331 bl2_stage_init 0xc1
824 02:07:22.297757 bl2_stage_init 0x02
825 02:07:22.298166
826 02:07:22.302508 L0:00000000
827 02:07:22.303002 L1:20000703
828 02:07:22.303415 L2:00008067
829 02:07:22.303839 L3:14000000
830 02:07:22.308201 B2:00402000
831 02:07:22.308693 B1:e0f83180
832 02:07:22.309110
833 02:07:22.309518 TE: 58159
834 02:07:22.309926
835 02:07:22.313771 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 02:07:22.314248
837 02:07:22.314659 Board ID = 1
838 02:07:22.319425 Set A53 clk to 24M
839 02:07:22.319923 Set A73 clk to 24M
840 02:07:22.320376 Set clk81 to 24M
841 02:07:22.324968 A53 clk: 1200 MHz
842 02:07:22.325456 A73 clk: 1200 MHz
843 02:07:22.325864 CLK81: 166.6M
844 02:07:22.326300 smccc: 00012ab5
845 02:07:22.330637 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 02:07:22.336129 board id: 1
847 02:07:22.342223 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 02:07:22.352555 fw parse done
849 02:07:22.358557 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 02:07:22.401284 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 02:07:22.412371 PIEI prepare done
852 02:07:22.413147 fastboot data load
853 02:07:22.413754 fastboot data verify
854 02:07:22.417879 verify result: 266
855 02:07:22.423454 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 02:07:22.424161 LPDDR4 probe
857 02:07:22.424740 ddr clk to 1584MHz
858 02:07:22.431471 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 02:07:22.468750
860 02:07:22.469489 dmc_version 0001
861 02:07:22.475346 Check phy result
862 02:07:22.481202 INFO : End of CA training
863 02:07:22.481865 INFO : End of initialization
864 02:07:22.486968 INFO : Training has run successfully!
865 02:07:22.487612 Check phy result
866 02:07:22.492530 INFO : End of initialization
867 02:07:22.493178 INFO : End of read enable training
868 02:07:22.495743 INFO : End of fine write leveling
869 02:07:22.501262 INFO : End of Write leveling coarse delay
870 02:07:22.506772 INFO : Training has run successfully!
871 02:07:22.507384 Check phy result
872 02:07:22.507928 INFO : End of initialization
873 02:07:22.512377 INFO : End of read dq deskew training
874 02:07:22.517859 INFO : End of MPR read delay center optimization
875 02:07:22.518468 INFO : End of write delay center optimization
876 02:07:22.523487 INFO : End of read delay center optimization
877 02:07:22.529249 INFO : End of max read latency training
878 02:07:22.529850 INFO : Training has run successfully!
879 02:07:22.534816 1D training succeed
880 02:07:22.540800 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 02:07:22.588332 Check phy result
882 02:07:22.589022 INFO : End of initialization
883 02:07:22.609944 INFO : End of 2D read delay Voltage center optimization
884 02:07:22.630013 INFO : End of 2D read delay Voltage center optimization
885 02:07:22.682011 INFO : End of 2D write delay Voltage center optimization
886 02:07:22.731278 INFO : End of 2D write delay Voltage center optimization
887 02:07:22.736746 INFO : Training has run successfully!
888 02:07:22.737363
889 02:07:22.737910 channel==0
890 02:07:22.742344 RxClkDly_Margin_A0==88 ps 9
891 02:07:22.742931 TxDqDly_Margin_A0==98 ps 10
892 02:07:22.747956 RxClkDly_Margin_A1==88 ps 9
893 02:07:22.748587 TxDqDly_Margin_A1==98 ps 10
894 02:07:22.749164 TrainedVREFDQ_A0==74
895 02:07:22.753527 TrainedVREFDQ_A1==74
896 02:07:22.754173 VrefDac_Margin_A0==25
897 02:07:22.754717 DeviceVref_Margin_A0==40
898 02:07:22.759082 VrefDac_Margin_A1==25
899 02:07:22.759701 DeviceVref_Margin_A1==40
900 02:07:22.760263
901 02:07:22.760771
902 02:07:22.764692 channel==1
903 02:07:22.765255 RxClkDly_Margin_A0==98 ps 10
904 02:07:22.765757 TxDqDly_Margin_A0==98 ps 10
905 02:07:22.770221 RxClkDly_Margin_A1==98 ps 10
906 02:07:22.770583 TxDqDly_Margin_A1==88 ps 9
907 02:07:22.776146 TrainedVREFDQ_A0==77
908 02:07:22.776497 TrainedVREFDQ_A1==77
909 02:07:22.776730 VrefDac_Margin_A0==22
910 02:07:22.781462 DeviceVref_Margin_A0==37
911 02:07:22.781758 VrefDac_Margin_A1==22
912 02:07:22.787080 DeviceVref_Margin_A1==37
913 02:07:22.787397
914 02:07:22.787610 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 02:07:22.792603
916 02:07:22.820621 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 02:07:22.821030 2D training succeed
918 02:07:22.826292 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 02:07:22.831815 auto size-- 65535DDR cs0 size: 2048MB
920 02:07:22.832185 DDR cs1 size: 2048MB
921 02:07:22.837527 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 02:07:22.837858 cs0 DataBus test pass
923 02:07:22.843000 cs1 DataBus test pass
924 02:07:22.843323 cs0 AddrBus test pass
925 02:07:22.843545 cs1 AddrBus test pass
926 02:07:22.843754
927 02:07:22.848610 100bdlr_step_size ps== 420
928 02:07:22.848952 result report
929 02:07:22.854212 boot times 0Enable ddr reg access
930 02:07:22.859657 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 02:07:22.873100 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 02:07:23.445302 0.0;M3 CHK:0;cm4_sp_mode 0
933 02:07:23.445946 MVN_1=0x00000000
934 02:07:23.450644 MVN_2=0x00000000
935 02:07:23.456523 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 02:07:23.457016 OPS=0x10
937 02:07:23.457452 ring efuse init
938 02:07:23.457863 chipver efuse init
939 02:07:23.461976 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 02:07:23.467685 [0.018961 Inits done]
941 02:07:23.468223 secure task start!
942 02:07:23.468652 high task start!
943 02:07:23.472307 low task start!
944 02:07:23.472772 run into bl31
945 02:07:23.478907 NOTICE: BL31: v1.3(release):4fc40b1
946 02:07:23.486777 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 02:07:23.487263 NOTICE: BL31: G12A normal boot!
948 02:07:23.512204 NOTICE: BL31: BL33 decompress pass
949 02:07:23.517804 ERROR: Error initializing runtime service opteed_fast
950 02:07:24.750762
951 02:07:24.751180
952 02:07:24.759089 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 02:07:24.759409
954 02:07:24.759633 Model: Libre Computer AML-A311D-CC Alta
955 02:07:24.967604 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 02:07:24.990883 DRAM: 2 GiB (effective 3.8 GiB)
957 02:07:25.133970 Core: 408 devices, 31 uclasses, devicetree: separate
958 02:07:25.139879 WDT: Not starting watchdog@f0d0
959 02:07:25.172067 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 02:07:25.184849 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 02:07:25.189451 ** Bad device specification mmc 0 **
962 02:07:25.199972 Card did not respond to voltage select! : -110
963 02:07:25.207514 ** Bad device specification mmc 0 **
964 02:07:25.208189 Couldn't find partition mmc 0
965 02:07:25.215632 Card did not respond to voltage select! : -110
966 02:07:25.221210 ** Bad device specification mmc 0 **
967 02:07:25.221658 Couldn't find partition mmc 0
968 02:07:25.226260 Error: could not access storage.
969 02:07:25.570029 Net: eth0: ethernet@ff3f0000
970 02:07:25.570637 starting USB...
971 02:07:25.821688 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 02:07:25.822106 Starting the controller
973 02:07:25.828588 USB XHCI 1.10
974 02:07:27.691414 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 02:07:27.692084 bl2_stage_init 0x01
976 02:07:27.692522 bl2_stage_init 0x81
977 02:07:27.696898 hw id: 0x0000 - pwm id 0x01
978 02:07:27.697384 bl2_stage_init 0xc1
979 02:07:27.697796 bl2_stage_init 0x02
980 02:07:27.698202
981 02:07:27.702505 L0:00000000
982 02:07:27.702995 L1:20000703
983 02:07:27.703407 L2:00008067
984 02:07:27.703839 L3:14000000
985 02:07:27.705381 B2:00402000
986 02:07:27.705843 B1:e0f83180
987 02:07:27.706250
988 02:07:27.706655 TE: 58124
989 02:07:27.707055
990 02:07:27.716397 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 02:07:27.716897
992 02:07:27.717309 Board ID = 1
993 02:07:27.717709 Set A53 clk to 24M
994 02:07:27.718103 Set A73 clk to 24M
995 02:07:27.722072 Set clk81 to 24M
996 02:07:27.722537 A53 clk: 1200 MHz
997 02:07:27.722946 A73 clk: 1200 MHz
998 02:07:27.727666 CLK81: 166.6M
999 02:07:27.728160 smccc: 00012a92
1000 02:07:27.733273 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 02:07:27.733745 board id: 1
1002 02:07:27.741884 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 02:07:27.752501 fw parse done
1004 02:07:27.758572 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 02:07:27.801144 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 02:07:27.812098 PIEI prepare done
1007 02:07:27.812575 fastboot data load
1008 02:07:27.812967 fastboot data verify
1009 02:07:27.817634 verify result: 266
1010 02:07:27.823241 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 02:07:27.823708 LPDDR4 probe
1012 02:07:27.824134 ddr clk to 1584MHz
1013 02:07:27.831267 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 02:07:27.868527
1015 02:07:27.869029 dmc_version 0001
1016 02:07:27.875215 Check phy result
1017 02:07:27.881125 INFO : End of CA training
1018 02:07:27.881593 INFO : End of initialization
1019 02:07:27.886724 INFO : Training has run successfully!
1020 02:07:27.887231 Check phy result
1021 02:07:27.892279 INFO : End of initialization
1022 02:07:27.892764 INFO : End of read enable training
1023 02:07:27.897821 INFO : End of fine write leveling
1024 02:07:27.903435 INFO : End of Write leveling coarse delay
1025 02:07:27.903911 INFO : Training has run successfully!
1026 02:07:27.904361 Check phy result
1027 02:07:27.909144 INFO : End of initialization
1028 02:07:27.909618 INFO : End of read dq deskew training
1029 02:07:27.914669 INFO : End of MPR read delay center optimization
1030 02:07:27.920249 INFO : End of write delay center optimization
1031 02:07:27.925832 INFO : End of read delay center optimization
1032 02:07:27.926309 INFO : End of max read latency training
1033 02:07:27.931412 INFO : Training has run successfully!
1034 02:07:27.931890 1D training succeed
1035 02:07:27.940586 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 02:07:27.988307 Check phy result
1037 02:07:27.988833 INFO : End of initialization
1038 02:07:28.009915 INFO : End of 2D read delay Voltage center optimization
1039 02:07:28.030097 INFO : End of 2D read delay Voltage center optimization
1040 02:07:28.081980 INFO : End of 2D write delay Voltage center optimization
1041 02:07:28.131356 INFO : End of 2D write delay Voltage center optimization
1042 02:07:28.136795 INFO : Training has run successfully!
1043 02:07:28.137278
1044 02:07:28.137690 channel==0
1045 02:07:28.142398 RxClkDly_Margin_A0==88 ps 9
1046 02:07:28.142872 TxDqDly_Margin_A0==98 ps 10
1047 02:07:28.145664 RxClkDly_Margin_A1==88 ps 9
1048 02:07:28.146130 TxDqDly_Margin_A1==88 ps 9
1049 02:07:28.151308 TrainedVREFDQ_A0==74
1050 02:07:28.151790 TrainedVREFDQ_A1==74
1051 02:07:28.152249 VrefDac_Margin_A0==25
1052 02:07:28.156792 DeviceVref_Margin_A0==40
1053 02:07:28.157262 VrefDac_Margin_A1==24
1054 02:07:28.162461 DeviceVref_Margin_A1==40
1055 02:07:28.162954
1056 02:07:28.163366
1057 02:07:28.163768 channel==1
1058 02:07:28.164206 RxClkDly_Margin_A0==98 ps 10
1059 02:07:28.165893 TxDqDly_Margin_A0==98 ps 10
1060 02:07:28.171435 RxClkDly_Margin_A1==98 ps 10
1061 02:07:28.171909 TxDqDly_Margin_A1==88 ps 9
1062 02:07:28.172355 TrainedVREFDQ_A0==77
1063 02:07:28.177046 TrainedVREFDQ_A1==77
1064 02:07:28.177520 VrefDac_Margin_A0==22
1065 02:07:28.182617 DeviceVref_Margin_A0==37
1066 02:07:28.183084 VrefDac_Margin_A1==24
1067 02:07:28.183490 DeviceVref_Margin_A1==37
1068 02:07:28.183884
1069 02:07:28.191536 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 02:07:28.192245
1071 02:07:28.219573 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
1072 02:07:28.220189 2D training succeed
1073 02:07:28.230632 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 02:07:28.231151 auto size-- 65535DDR cs0 size: 2048MB
1075 02:07:28.231775 DDR cs1 size: 2048MB
1076 02:07:28.236325 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 02:07:28.236806 cs0 DataBus test pass
1078 02:07:28.241890 cs1 DataBus test pass
1079 02:07:28.242350 cs0 AddrBus test pass
1080 02:07:28.247499 cs1 AddrBus test pass
1081 02:07:28.248006
1082 02:07:28.248417 100bdlr_step_size ps== 420
1083 02:07:28.248816 result report
1084 02:07:28.253126 boot times 0Enable ddr reg access
1085 02:07:28.259574 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 02:07:28.273059 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 02:07:28.844921 0.0;M3 CHK:0;cm4_sp_mode 0
1088 02:07:28.845342 MVN_1=0x00000000
1089 02:07:28.850392 MVN_2=0x00000000
1090 02:07:28.856192 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 02:07:28.856496 OPS=0x10
1092 02:07:28.856706 ring efuse init
1093 02:07:28.856911 chipver efuse init
1094 02:07:28.861758 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 02:07:28.867359 [0.018961 Inits done]
1096 02:07:28.867644 secure task start!
1097 02:07:28.867855 high task start!
1098 02:07:28.872013 low task start!
1099 02:07:28.872290 run into bl31
1100 02:07:28.878607 NOTICE: BL31: v1.3(release):4fc40b1
1101 02:07:28.886491 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 02:07:28.886792 NOTICE: BL31: G12A normal boot!
1103 02:07:28.911794 NOTICE: BL31: BL33 decompress pass
1104 02:07:28.917435 ERROR: Error initializing runtime service opteed_fast
1105 02:07:30.150474
1106 02:07:30.151100
1107 02:07:30.158847 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 02:07:30.159335
1109 02:07:30.159755 Model: Libre Computer AML-A311D-CC Alta
1110 02:07:30.367139 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 02:07:30.390592 DRAM: 2 GiB (effective 3.8 GiB)
1112 02:07:30.533557 Core: 408 devices, 31 uclasses, devicetree: separate
1113 02:07:30.539438 WDT: Not starting watchdog@f0d0
1114 02:07:30.571769 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 02:07:30.584180 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 02:07:30.589384 ** Bad device specification mmc 0 **
1117 02:07:30.599572 Card did not respond to voltage select! : -110
1118 02:07:30.607138 ** Bad device specification mmc 0 **
1119 02:07:30.607605 Couldn't find partition mmc 0
1120 02:07:30.615521 Card did not respond to voltage select! : -110
1121 02:07:30.620994 ** Bad device specification mmc 0 **
1122 02:07:30.621459 Couldn't find partition mmc 0
1123 02:07:30.626031 Error: could not access storage.
1124 02:07:30.969588 Net: eth0: ethernet@ff3f0000
1125 02:07:30.970167 starting USB...
1126 02:07:31.221549 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 02:07:31.222144 Starting the controller
1128 02:07:31.228361 USB XHCI 1.10
1129 02:07:32.782423 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 02:07:32.790748 scanning usb for storage devices... 0 Storage Device(s) found
1132 02:07:32.842364 Hit any key to stop autoboot: 1
1133 02:07:32.843137 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1134 02:07:32.843704 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1135 02:07:32.844202 Setting prompt string to ['=>']
1136 02:07:32.844665 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1137 02:07:32.858112 0
1138 02:07:32.858961 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 02:07:32.859435 Sending with 10 millisecond of delay
1141 02:07:33.994105 => setenv autoload no
1142 02:07:34.004905 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1143 02:07:34.009836 setenv autoload no
1144 02:07:34.010584 Sending with 10 millisecond of delay
1146 02:07:35.810373 => setenv initrd_high 0xffffffff
1147 02:07:35.821197 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1148 02:07:35.822139 setenv initrd_high 0xffffffff
1149 02:07:35.822836 Sending with 10 millisecond of delay
1151 02:07:37.439825 => setenv fdt_high 0xffffffff
1152 02:07:37.450495 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 02:07:37.451225 setenv fdt_high 0xffffffff
1154 02:07:37.451774 Sending with 10 millisecond of delay
1156 02:07:37.743402 => dhcp
1157 02:07:37.754034 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1158 02:07:37.754831 dhcp
1159 02:07:37.755089 Speed: 1000, full duplex
1160 02:07:37.755295 BOOTP broadcast 1
1161 02:07:37.916775 DHCP client bound to address 192.168.6.27 (162 ms)
1162 02:07:37.917452 Sending with 10 millisecond of delay
1164 02:07:39.594085 => setenv serverip 192.168.6.2
1165 02:07:39.604845 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1166 02:07:39.605432 setenv serverip 192.168.6.2
1167 02:07:39.605889 Sending with 10 millisecond of delay
1169 02:07:43.333609 => tftpboot 0x01080000 964248/tftp-deploy-u8zwvfdf/kernel/uImage
1170 02:07:43.344514 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 02:07:43.345494 tftpboot 0x01080000 964248/tftp-deploy-u8zwvfdf/kernel/uImage
1172 02:07:43.345963 Speed: 1000, full duplex
1173 02:07:43.346399 Using ethernet@ff3f0000 device
1174 02:07:43.347294 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 02:07:43.352710 Filename '964248/tftp-deploy-u8zwvfdf/kernel/uImage'.
1176 02:07:43.356712 Load address: 0x1080000
1177 02:07:46.365126 Loading: *################################################## 43.6 MiB
1178 02:07:46.365800 14.5 MiB/s
1179 02:07:46.366277 done
1180 02:07:46.369435 Bytes transferred = 45713984 (2b98a40 hex)
1181 02:07:46.370262 Sending with 10 millisecond of delay
1183 02:07:51.060032 => tftpboot 0x08000000 964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
1184 02:07:51.070916 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1185 02:07:51.071870 tftpboot 0x08000000 964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot
1186 02:07:51.072395 Speed: 1000, full duplex
1187 02:07:51.072838 Using ethernet@ff3f0000 device
1188 02:07:51.073777 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 02:07:51.082454 Filename '964248/tftp-deploy-u8zwvfdf/ramdisk/ramdisk.cpio.gz.uboot'.
1190 02:07:51.082937 Load address: 0x8000000
1191 02:07:57.602702 Loading: *############T ##################################### UDP wrong checksum 00000005 0000c15d
1192 02:08:02.604383 T UDP wrong checksum 00000005 0000c15d
1193 02:08:12.607731 T T UDP wrong checksum 00000005 0000c15d
1194 02:08:32.611475 T T T T UDP wrong checksum 00000005 0000c15d
1195 02:08:43.245762 T T UDP wrong checksum 000000ff 0000570d
1196 02:08:43.292618 UDP wrong checksum 000000ff 0000e0ff
1197 02:08:47.615554
1198 02:08:47.615977 Retry count exceeded; starting again
1200 02:08:47.617053 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1203 02:08:47.618253 end: 2.4 uboot-commands (duration 00:01:52) [common]
1205 02:08:47.618967 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1207 02:08:47.619535 end: 2 uboot-action (duration 00:01:52) [common]
1209 02:08:47.620792 Cleaning after the job
1210 02:08:47.621229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/ramdisk
1211 02:08:47.622210 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/kernel
1212 02:08:47.646615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/dtb
1213 02:08:47.647418 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/nfsrootfs
1214 02:08:47.735494 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964248/tftp-deploy-u8zwvfdf/modules
1215 02:08:47.752421 start: 4.1 power-off (timeout 00:00:30) [common]
1216 02:08:47.753058 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1217 02:08:47.786495 >> OK - accepted request
1218 02:08:47.788587 Returned 0 in 0 seconds
1219 02:08:47.889409 end: 4.1 power-off (duration 00:00:00) [common]
1221 02:08:47.890451 start: 4.2 read-feedback (timeout 00:10:00) [common]
1222 02:08:47.891117 Listened to connection for namespace 'common' for up to 1s
1223 02:08:48.891581 Finalising connection for namespace 'common'
1224 02:08:48.892067 Disconnecting from shell: Finalise
1225 02:08:48.892356 =>
1226 02:08:48.993130 end: 4.2 read-feedback (duration 00:00:01) [common]
1227 02:08:48.993750 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964248
1228 02:08:51.899804 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964248
1229 02:08:51.900469 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.