Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:29:17.566142 lava-dispatcher, installed at version: 2024.01
2 02:29:17.566977 start: 0 validate
3 02:29:17.567475 Start time: 2024-11-09 02:29:17.567445+00:00 (UTC)
4 02:29:17.568069 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:29:17.568645 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:29:17.604899 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:29:17.605455 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:29:17.634279 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:29:17.634917 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:29:17.670343 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:29:17.670828 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:29:17.704733 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:29:17.705227 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-246-gdbbaaaa6179b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:29:17.748151 validate duration: 0.18
16 02:29:17.749109 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:29:17.749459 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:29:17.749796 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:29:17.750473 Not decompressing ramdisk as can be used compressed.
20 02:29:17.751053 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:29:17.751395 saving as /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/ramdisk/initrd.cpio.gz
22 02:29:17.751730 total size: 5628140 (5 MB)
23 02:29:17.792027 progress 0 % (0 MB)
24 02:29:17.797827 progress 5 % (0 MB)
25 02:29:17.802563 progress 10 % (0 MB)
26 02:29:17.807182 progress 15 % (0 MB)
27 02:29:17.811596 progress 20 % (1 MB)
28 02:29:17.815525 progress 25 % (1 MB)
29 02:29:17.820290 progress 30 % (1 MB)
30 02:29:17.824888 progress 35 % (1 MB)
31 02:29:17.828941 progress 40 % (2 MB)
32 02:29:17.833833 progress 45 % (2 MB)
33 02:29:17.839420 progress 50 % (2 MB)
34 02:29:17.843732 progress 55 % (2 MB)
35 02:29:17.847934 progress 60 % (3 MB)
36 02:29:17.851869 progress 65 % (3 MB)
37 02:29:17.856173 progress 70 % (3 MB)
38 02:29:17.859963 progress 75 % (4 MB)
39 02:29:17.864087 progress 80 % (4 MB)
40 02:29:17.868093 progress 85 % (4 MB)
41 02:29:17.872426 progress 90 % (4 MB)
42 02:29:17.876349 progress 95 % (5 MB)
43 02:29:17.879719 progress 100 % (5 MB)
44 02:29:17.880416 5 MB downloaded in 0.13 s (41.71 MB/s)
45 02:29:17.880991 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:29:17.881894 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:29:17.882192 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:29:17.882466 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:29:17.882940 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/kernel/Image
51 02:29:17.883199 saving as /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/kernel/Image
52 02:29:17.883409 total size: 45713920 (43 MB)
53 02:29:17.883622 No compression specified
54 02:29:17.924277 progress 0 % (0 MB)
55 02:29:17.953387 progress 5 % (2 MB)
56 02:29:17.982868 progress 10 % (4 MB)
57 02:29:18.012189 progress 15 % (6 MB)
58 02:29:18.041742 progress 20 % (8 MB)
59 02:29:18.070269 progress 25 % (10 MB)
60 02:29:18.099963 progress 30 % (13 MB)
61 02:29:18.128628 progress 35 % (15 MB)
62 02:29:18.157100 progress 40 % (17 MB)
63 02:29:18.186126 progress 45 % (19 MB)
64 02:29:18.214336 progress 50 % (21 MB)
65 02:29:18.243299 progress 55 % (24 MB)
66 02:29:18.272073 progress 60 % (26 MB)
67 02:29:18.300574 progress 65 % (28 MB)
68 02:29:18.329087 progress 70 % (30 MB)
69 02:29:18.357213 progress 75 % (32 MB)
70 02:29:18.386098 progress 80 % (34 MB)
71 02:29:18.414877 progress 85 % (37 MB)
72 02:29:18.444238 progress 90 % (39 MB)
73 02:29:18.473326 progress 95 % (41 MB)
74 02:29:18.501938 progress 100 % (43 MB)
75 02:29:18.502489 43 MB downloaded in 0.62 s (70.42 MB/s)
76 02:29:18.502974 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:29:18.503809 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:29:18.504123 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:29:18.504397 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:29:18.504865 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:29:18.505144 saving as /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:29:18.505354 total size: 54703 (0 MB)
84 02:29:18.505564 No compression specified
85 02:29:18.545346 progress 59 % (0 MB)
86 02:29:18.546223 progress 100 % (0 MB)
87 02:29:18.546825 0 MB downloaded in 0.04 s (1.26 MB/s)
88 02:29:18.547345 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:29:18.548354 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:29:18.548692 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:29:18.548981 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:29:18.549467 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:29:18.549735 saving as /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/nfsrootfs/full.rootfs.tar
95 02:29:18.549958 total size: 474398908 (452 MB)
96 02:29:18.550184 Using unxz to decompress xz
97 02:29:18.587828 progress 0 % (0 MB)
98 02:29:19.683094 progress 5 % (22 MB)
99 02:29:21.124648 progress 10 % (45 MB)
100 02:29:21.571321 progress 15 % (67 MB)
101 02:29:22.344485 progress 20 % (90 MB)
102 02:29:22.872100 progress 25 % (113 MB)
103 02:29:23.231582 progress 30 % (135 MB)
104 02:29:23.829689 progress 35 % (158 MB)
105 02:29:24.670420 progress 40 % (181 MB)
106 02:29:25.522429 progress 45 % (203 MB)
107 02:29:26.077029 progress 50 % (226 MB)
108 02:29:26.733700 progress 55 % (248 MB)
109 02:29:27.966051 progress 60 % (271 MB)
110 02:29:29.420142 progress 65 % (294 MB)
111 02:29:31.041238 progress 70 % (316 MB)
112 02:29:34.135695 progress 75 % (339 MB)
113 02:29:36.568080 progress 80 % (361 MB)
114 02:29:39.469667 progress 85 % (384 MB)
115 02:29:42.655385 progress 90 % (407 MB)
116 02:29:45.935426 progress 95 % (429 MB)
117 02:29:49.129790 progress 100 % (452 MB)
118 02:29:49.142882 452 MB downloaded in 30.59 s (14.79 MB/s)
119 02:29:49.144158 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:29:49.146308 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:29:49.146994 start: 1.5 download-retry (timeout 00:09:29) [common]
123 02:29:49.147672 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 02:29:49.148755 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-246-gdbbaaaa6179b/arm64/defconfig/gcc-12/modules.tar.xz
125 02:29:49.149411 saving as /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/modules/modules.tar
126 02:29:49.149959 total size: 11610740 (11 MB)
127 02:29:49.150509 Using unxz to decompress xz
128 02:29:49.198303 progress 0 % (0 MB)
129 02:29:49.275550 progress 5 % (0 MB)
130 02:29:49.353843 progress 10 % (1 MB)
131 02:29:49.465845 progress 15 % (1 MB)
132 02:29:49.578866 progress 20 % (2 MB)
133 02:29:49.666297 progress 25 % (2 MB)
134 02:29:49.749139 progress 30 % (3 MB)
135 02:29:49.831902 progress 35 % (3 MB)
136 02:29:49.918345 progress 40 % (4 MB)
137 02:29:50.003122 progress 45 % (5 MB)
138 02:29:50.098735 progress 50 % (5 MB)
139 02:29:50.187150 progress 55 % (6 MB)
140 02:29:50.283134 progress 60 % (6 MB)
141 02:29:50.381376 progress 65 % (7 MB)
142 02:29:50.462210 progress 70 % (7 MB)
143 02:29:50.540190 progress 75 % (8 MB)
144 02:29:50.624138 progress 80 % (8 MB)
145 02:29:50.704684 progress 85 % (9 MB)
146 02:29:50.783558 progress 90 % (9 MB)
147 02:29:50.863325 progress 95 % (10 MB)
148 02:29:50.940514 progress 100 % (11 MB)
149 02:29:50.951942 11 MB downloaded in 1.80 s (6.14 MB/s)
150 02:29:50.952947 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:29:50.954692 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:29:50.955261 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 02:29:50.955843 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 02:30:07.132023 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964299/extract-nfsrootfs-piqxcaji
156 02:30:07.132611 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 02:30:07.132897 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 02:30:07.133724 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6
159 02:30:07.134635 makedir: /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin
160 02:30:07.135108 makedir: /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/tests
161 02:30:07.135467 makedir: /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/results
162 02:30:07.135807 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-add-keys
163 02:30:07.136393 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-add-sources
164 02:30:07.136986 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-background-process-start
165 02:30:07.137589 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-background-process-stop
166 02:30:07.138132 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-common-functions
167 02:30:07.138638 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-echo-ipv4
168 02:30:07.139137 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-install-packages
169 02:30:07.139694 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-installed-packages
170 02:30:07.140303 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-os-build
171 02:30:07.140898 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-probe-channel
172 02:30:07.143454 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-probe-ip
173 02:30:07.144230 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-target-ip
174 02:30:07.145457 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-target-mac
175 02:30:07.145994 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-target-storage
176 02:30:07.146507 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-case
177 02:30:07.147047 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-event
178 02:30:07.147606 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-feedback
179 02:30:07.148171 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-raise
180 02:30:07.148691 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-reference
181 02:30:07.149188 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-runner
182 02:30:07.149698 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-set
183 02:30:07.150247 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-test-shell
184 02:30:07.150786 Updating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-install-packages (oe)
185 02:30:07.151576 Updating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/bin/lava-installed-packages (oe)
186 02:30:07.152084 Creating /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/environment
187 02:30:07.152493 LAVA metadata
188 02:30:07.152763 - LAVA_JOB_ID=964299
189 02:30:07.152977 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:30:07.153366 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 02:30:07.154768 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:30:07.155106 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 02:30:07.155316 skipped lava-vland-overlay
194 02:30:07.155557 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:30:07.155810 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 02:30:07.156097 skipped lava-multinode-overlay
197 02:30:07.156355 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:30:07.156613 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 02:30:07.156874 Loading test definitions
200 02:30:07.157155 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 02:30:07.157373 Using /lava-964299 at stage 0
202 02:30:07.159207 uuid=964299_1.6.2.4.1 testdef=None
203 02:30:07.159579 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:30:07.159884 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 02:30:07.161854 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:30:07.162667 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 02:30:07.164999 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:30:07.165861 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 02:30:07.168066 runner path: /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 964299_1.6.2.4.1
212 02:30:07.170901 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:30:07.171726 Creating lava-test-runner.conf files
215 02:30:07.171930 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964299/lava-overlay-mfqcvby6/lava-964299/0 for stage 0
216 02:30:07.172325 - 0_v4l2-decoder-conformance-h264
217 02:30:07.172691 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:30:07.172970 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 02:30:07.195535 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:30:07.195977 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 02:30:07.196274 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:30:07.196598 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:30:07.196952 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 02:30:07.891181 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:30:07.891660 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 02:30:07.891909 extracting modules file /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964299/extract-nfsrootfs-piqxcaji
227 02:30:09.271732 extracting modules file /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk
228 02:30:10.658322 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:30:10.658804 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 02:30:10.659075 [common] Applying overlay to NFS
231 02:30:10.659288 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964299/compress-overlay-fefgv28r/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964299/extract-nfsrootfs-piqxcaji
232 02:30:10.688141 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:30:10.688535 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 02:30:10.688810 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 02:30:10.689039 Converting downloaded kernel to a uImage
236 02:30:10.689353 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/kernel/Image /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/kernel/uImage
237 02:30:11.168660 output: Image Name:
238 02:30:11.169069 output: Created: Sat Nov 9 02:30:10 2024
239 02:30:11.169277 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:30:11.169481 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 02:30:11.169685 output: Load Address: 01080000
242 02:30:11.169882 output: Entry Point: 01080000
243 02:30:11.170077 output:
244 02:30:11.170414 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:30:11.170678 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:30:11.170944 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 02:30:11.171196 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:30:11.171452 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 02:30:11.171716 Building ramdisk /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk
250 02:30:13.342030 >> 166792 blocks
251 02:30:21.098218 Adding RAMdisk u-boot header.
252 02:30:21.098818 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk.cpio.gz.uboot
253 02:30:21.338694 output: Image Name:
254 02:30:21.339120 output: Created: Sat Nov 9 02:30:21 2024
255 02:30:21.339333 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:30:21.339540 output: Data Size: 23431867 Bytes = 22882.68 KiB = 22.35 MiB
257 02:30:21.339743 output: Load Address: 00000000
258 02:30:21.339942 output: Entry Point: 00000000
259 02:30:21.340379 output:
260 02:30:21.341360 rename /var/lib/lava/dispatcher/tmp/964299/extract-overlay-ramdisk-mc200lig/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
261 02:30:21.342072 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:30:21.342612 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 02:30:21.343135 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 02:30:21.343586 No LXC device requested
265 02:30:21.344112 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:30:21.344628 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 02:30:21.345122 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:30:21.345537 Checking files for TFTP limit of 4294967296 bytes.
269 02:30:21.348277 end: 1 tftp-deploy (duration 00:01:04) [common]
270 02:30:21.348863 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:30:21.349380 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:30:21.349871 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:30:21.350365 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:30:21.350888 Using kernel file from prepare-kernel: 964299/tftp-deploy-yj__grog/kernel/uImage
275 02:30:21.351523 substitutions:
276 02:30:21.351969 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:30:21.352418 - {DTB_ADDR}: 0x01070000
278 02:30:21.352818 - {DTB}: 964299/tftp-deploy-yj__grog/dtb/meson-g12b-a311d-libretech-cc.dtb
279 02:30:21.353214 - {INITRD}: 964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
280 02:30:21.353608 - {KERNEL_ADDR}: 0x01080000
281 02:30:21.353999 - {KERNEL}: 964299/tftp-deploy-yj__grog/kernel/uImage
282 02:30:21.354391 - {LAVA_MAC}: None
283 02:30:21.354823 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964299/extract-nfsrootfs-piqxcaji
284 02:30:21.355220 - {NFS_SERVER_IP}: 192.168.6.2
285 02:30:21.355608 - {PRESEED_CONFIG}: None
286 02:30:21.356021 - {PRESEED_LOCAL}: None
287 02:30:21.356416 - {RAMDISK_ADDR}: 0x08000000
288 02:30:21.356799 - {RAMDISK}: 964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
289 02:30:21.357185 - {ROOT_PART}: None
290 02:30:21.357572 - {ROOT}: None
291 02:30:21.357955 - {SERVER_IP}: 192.168.6.2
292 02:30:21.358341 - {TEE_ADDR}: 0x83000000
293 02:30:21.358727 - {TEE}: None
294 02:30:21.359112 Parsed boot commands:
295 02:30:21.359490 - setenv autoload no
296 02:30:21.359876 - setenv initrd_high 0xffffffff
297 02:30:21.360284 - setenv fdt_high 0xffffffff
298 02:30:21.360668 - dhcp
299 02:30:21.361053 - setenv serverip 192.168.6.2
300 02:30:21.361435 - tftpboot 0x01080000 964299/tftp-deploy-yj__grog/kernel/uImage
301 02:30:21.361820 - tftpboot 0x08000000 964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
302 02:30:21.362206 - tftpboot 0x01070000 964299/tftp-deploy-yj__grog/dtb/meson-g12b-a311d-libretech-cc.dtb
303 02:30:21.362591 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964299/extract-nfsrootfs-piqxcaji,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:30:21.362988 - bootm 0x01080000 0x08000000 0x01070000
305 02:30:21.363493 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:30:21.364999 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:30:21.365417 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 02:30:21.380471 Setting prompt string to ['lava-test: # ']
310 02:30:21.381982 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:30:21.382600 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:30:21.383133 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:30:21.383651 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:30:21.384805 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 02:30:21.419786 >> OK - accepted request
316 02:30:21.421935 Returned 0 in 0 seconds
317 02:30:21.523102 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:30:21.524870 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:30:21.525466 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:30:21.525983 Setting prompt string to ['Hit any key to stop autoboot']
322 02:30:21.526460 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:30:21.528158 Trying 192.168.56.21...
324 02:30:21.528659 Connected to conserv1.
325 02:30:21.529078 Escape character is '^]'.
326 02:30:21.529497
327 02:30:21.529926 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:30:21.530336
329 02:30:33.128348 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 02:30:33.128772 bl2_stage_init 0x01
331 02:30:33.129027 bl2_stage_init 0x81
332 02:30:33.134045 hw id: 0x0000 - pwm id 0x01
333 02:30:33.134573 bl2_stage_init 0xc1
334 02:30:33.134988 bl2_stage_init 0x02
335 02:30:33.135379
336 02:30:33.139559 L0:00000000
337 02:30:33.139880 L1:20000703
338 02:30:33.140142 L2:00008067
339 02:30:33.140364 L3:14000000
340 02:30:33.142442 B2:00402000
341 02:30:33.142730 B1:e0f83180
342 02:30:33.142967
343 02:30:33.143184 TE: 58167
344 02:30:33.143398
345 02:30:33.153689 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 02:30:33.154158
347 02:30:33.154554 Board ID = 1
348 02:30:33.154940 Set A53 clk to 24M
349 02:30:33.155323 Set A73 clk to 24M
350 02:30:33.159126 Set clk81 to 24M
351 02:30:33.159560 A53 clk: 1200 MHz
352 02:30:33.159947 A73 clk: 1200 MHz
353 02:30:33.162671 CLK81: 166.6M
354 02:30:33.163082 smccc: 00012abe
355 02:30:33.168276 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 02:30:33.173870 board id: 1
357 02:30:33.178953 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:30:33.189557 fw parse done
359 02:30:33.195521 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:30:33.238249 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:30:33.249105 PIEI prepare done
362 02:30:33.249531 fastboot data load
363 02:30:33.249923 fastboot data verify
364 02:30:33.254628 verify result: 266
365 02:30:33.260203 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 02:30:33.260629 LPDDR4 probe
367 02:30:33.261021 ddr clk to 1584MHz
368 02:30:33.268209 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:30:33.305486
370 02:30:33.305925 dmc_version 0001
371 02:30:33.312196 Check phy result
372 02:30:33.318096 INFO : End of CA training
373 02:30:33.318514 INFO : End of initialization
374 02:30:33.323599 INFO : Training has run successfully!
375 02:30:33.324048 Check phy result
376 02:30:33.329205 INFO : End of initialization
377 02:30:33.329621 INFO : End of read enable training
378 02:30:33.334838 INFO : End of fine write leveling
379 02:30:33.340431 INFO : End of Write leveling coarse delay
380 02:30:33.340849 INFO : Training has run successfully!
381 02:30:33.341244 Check phy result
382 02:30:33.346157 INFO : End of initialization
383 02:30:33.346582 INFO : End of read dq deskew training
384 02:30:33.351622 INFO : End of MPR read delay center optimization
385 02:30:33.357230 INFO : End of write delay center optimization
386 02:30:33.362876 INFO : End of read delay center optimization
387 02:30:33.363293 INFO : End of max read latency training
388 02:30:33.368463 INFO : Training has run successfully!
389 02:30:33.368899 1D training succeed
390 02:30:33.377672 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:30:33.425358 Check phy result
392 02:30:33.425858 INFO : End of initialization
393 02:30:33.447176 INFO : End of 2D read delay Voltage center optimization
394 02:30:33.467325 INFO : End of 2D read delay Voltage center optimization
395 02:30:33.519388 INFO : End of 2D write delay Voltage center optimization
396 02:30:33.568734 INFO : End of 2D write delay Voltage center optimization
397 02:30:33.574464 INFO : Training has run successfully!
398 02:30:33.574895
399 02:30:33.575314 channel==0
400 02:30:33.579910 RxClkDly_Margin_A0==88 ps 9
401 02:30:33.580316 TxDqDly_Margin_A0==98 ps 10
402 02:30:33.585448 RxClkDly_Margin_A1==88 ps 9
403 02:30:33.585740 TxDqDly_Margin_A1==98 ps 10
404 02:30:33.585968 TrainedVREFDQ_A0==74
405 02:30:33.590953 TrainedVREFDQ_A1==74
406 02:30:33.591226 VrefDac_Margin_A0==25
407 02:30:33.591448 DeviceVref_Margin_A0==40
408 02:30:33.596595 VrefDac_Margin_A1==25
409 02:30:33.596861 DeviceVref_Margin_A1==40
410 02:30:33.597080
411 02:30:33.597298
412 02:30:33.602218 channel==1
413 02:30:33.602483 RxClkDly_Margin_A0==98 ps 10
414 02:30:33.602705 TxDqDly_Margin_A0==88 ps 9
415 02:30:33.607800 RxClkDly_Margin_A1==88 ps 9
416 02:30:33.608082 TxDqDly_Margin_A1==88 ps 9
417 02:30:33.613427 TrainedVREFDQ_A0==75
418 02:30:33.613688 TrainedVREFDQ_A1==77
419 02:30:33.613909 VrefDac_Margin_A0==22
420 02:30:33.619026 DeviceVref_Margin_A0==38
421 02:30:33.619283 VrefDac_Margin_A1==24
422 02:30:33.624669 DeviceVref_Margin_A1==37
423 02:30:33.624925
424 02:30:33.625148 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:30:33.625364
426 02:30:33.658381 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 02:30:33.658784 2D training succeed
428 02:30:33.663877 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:30:33.669332 auto size-- 65535DDR cs0 size: 2048MB
430 02:30:33.669607 DDR cs1 size: 2048MB
431 02:30:33.674958 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:30:33.675232 cs0 DataBus test pass
433 02:30:33.680536 cs1 DataBus test pass
434 02:30:33.680806 cs0 AddrBus test pass
435 02:30:33.681030 cs1 AddrBus test pass
436 02:30:33.681248
437 02:30:33.686203 100bdlr_step_size ps== 420
438 02:30:33.686472 result report
439 02:30:33.691712 boot times 0Enable ddr reg access
440 02:30:33.696984 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:30:33.710493 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 02:30:34.284281 0.0;M3 CHK:0;cm4_sp_mode 0
443 02:30:34.284907 MVN_1=0x00000000
444 02:30:34.289691 MVN_2=0x00000000
445 02:30:34.295682 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 02:30:34.296159 OPS=0x10
447 02:30:34.296562 ring efuse init
448 02:30:34.296957 chipver efuse init
449 02:30:34.301046 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 02:30:34.306616 [0.018961 Inits done]
451 02:30:34.307037 secure task start!
452 02:30:34.307429 high task start!
453 02:30:34.311295 low task start!
454 02:30:34.311720 run into bl31
455 02:30:34.317881 NOTICE: BL31: v1.3(release):4fc40b1
456 02:30:34.325739 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 02:30:34.326167 NOTICE: BL31: G12A normal boot!
458 02:30:34.351181 NOTICE: BL31: BL33 decompress pass
459 02:30:34.356747 ERROR: Error initializing runtime service opteed_fast
460 02:30:35.589639
461 02:30:35.590241
462 02:30:35.598081 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 02:30:35.598681
464 02:30:35.599108 Model: Libre Computer AML-A311D-CC Alta
465 02:30:35.806626 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 02:30:35.829096 DRAM: 2 GiB (effective 3.8 GiB)
467 02:30:35.972887 Core: 408 devices, 31 uclasses, devicetree: separate
468 02:30:35.978691 WDT: Not starting watchdog@f0d0
469 02:30:36.010965 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 02:30:36.023485 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 02:30:36.028497 ** Bad device specification mmc 0 **
472 02:30:36.038755 Card did not respond to voltage select! : -110
473 02:30:36.046511 ** Bad device specification mmc 0 **
474 02:30:36.047029 Couldn't find partition mmc 0
475 02:30:36.054728 Card did not respond to voltage select! : -110
476 02:30:36.060230 ** Bad device specification mmc 0 **
477 02:30:36.060748 Couldn't find partition mmc 0
478 02:30:36.065308 Error: could not access storage.
479 02:30:37.328815 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 02:30:37.329460 bl2_stage_init 0x01
481 02:30:37.329935 bl2_stage_init 0x81
482 02:30:37.334249 hw id: 0x0000 - pwm id 0x01
483 02:30:37.334764 bl2_stage_init 0xc1
484 02:30:37.335220 bl2_stage_init 0x02
485 02:30:37.335661
486 02:30:37.339862 L0:00000000
487 02:30:37.340383 L1:20000703
488 02:30:37.340835 L2:00008067
489 02:30:37.341275 L3:14000000
490 02:30:37.345439 B2:00402000
491 02:30:37.345930 B1:e0f83180
492 02:30:37.346378
493 02:30:37.346818 TE: 58167
494 02:30:37.347259
495 02:30:37.351022 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 02:30:37.351504
497 02:30:37.351953 Board ID = 1
498 02:30:37.356693 Set A53 clk to 24M
499 02:30:37.357172 Set A73 clk to 24M
500 02:30:37.357617 Set clk81 to 24M
501 02:30:37.362261 A53 clk: 1200 MHz
502 02:30:37.362737 A73 clk: 1200 MHz
503 02:30:37.363182 CLK81: 166.6M
504 02:30:37.363625 smccc: 00012abe
505 02:30:37.367911 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 02:30:37.374280 board id: 1
507 02:30:37.378378 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 02:30:37.390130 fw parse done
509 02:30:37.395119 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 02:30:37.437687 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 02:30:37.449430 PIEI prepare done
512 02:30:37.449780 fastboot data load
513 02:30:37.450382 fastboot data verify
514 02:30:37.455237 verify result: 266
515 02:30:37.460970 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 02:30:37.461560 LPDDR4 probe
517 02:30:37.461915 ddr clk to 1584MHz
518 02:30:37.467995 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 02:30:37.505147
520 02:30:37.505679 dmc_version 0001
521 02:30:37.511820 Check phy result
522 02:30:37.518539 INFO : End of CA training
523 02:30:37.518933 INFO : End of initialization
524 02:30:37.524317 INFO : Training has run successfully!
525 02:30:37.524701 Check phy result
526 02:30:37.529845 INFO : End of initialization
527 02:30:37.530214 INFO : End of read enable training
528 02:30:37.533138 INFO : End of fine write leveling
529 02:30:37.538609 INFO : End of Write leveling coarse delay
530 02:30:37.544316 INFO : Training has run successfully!
531 02:30:37.544921 Check phy result
532 02:30:37.545357 INFO : End of initialization
533 02:30:37.549811 INFO : End of read dq deskew training
534 02:30:37.555399 INFO : End of MPR read delay center optimization
535 02:30:37.555781 INFO : End of write delay center optimization
536 02:30:37.560965 INFO : End of read delay center optimization
537 02:30:37.566522 INFO : End of max read latency training
538 02:30:37.566867 INFO : Training has run successfully!
539 02:30:37.574183 1D training succeed
540 02:30:37.578158 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 02:30:37.625824 Check phy result
542 02:30:37.626418 INFO : End of initialization
543 02:30:37.648309 INFO : End of 2D read delay Voltage center optimization
544 02:30:37.668684 INFO : End of 2D read delay Voltage center optimization
545 02:30:37.719750 INFO : End of 2D write delay Voltage center optimization
546 02:30:37.770068 INFO : End of 2D write delay Voltage center optimization
547 02:30:37.775639 INFO : Training has run successfully!
548 02:30:37.776262
549 02:30:37.776706 channel==0
550 02:30:37.781209 RxClkDly_Margin_A0==88 ps 9
551 02:30:37.781787 TxDqDly_Margin_A0==98 ps 10
552 02:30:37.786917 RxClkDly_Margin_A1==88 ps 9
553 02:30:37.787478 TxDqDly_Margin_A1==98 ps 10
554 02:30:37.787928 TrainedVREFDQ_A0==74
555 02:30:37.792415 TrainedVREFDQ_A1==74
556 02:30:37.792961 VrefDac_Margin_A0==24
557 02:30:37.793378 DeviceVref_Margin_A0==40
558 02:30:37.798036 VrefDac_Margin_A1==25
559 02:30:37.798561 DeviceVref_Margin_A1==40
560 02:30:37.799001
561 02:30:37.799430
562 02:30:37.804145 channel==1
563 02:30:37.804494 RxClkDly_Margin_A0==98 ps 10
564 02:30:37.804707 TxDqDly_Margin_A0==88 ps 9
565 02:30:37.809076 RxClkDly_Margin_A1==88 ps 9
566 02:30:37.809354 TxDqDly_Margin_A1==98 ps 10
567 02:30:37.814782 TrainedVREFDQ_A0==77
568 02:30:37.815060 TrainedVREFDQ_A1==77
569 02:30:37.815272 VrefDac_Margin_A0==22
570 02:30:37.820256 DeviceVref_Margin_A0==37
571 02:30:37.820564 VrefDac_Margin_A1==24
572 02:30:37.825861 DeviceVref_Margin_A1==37
573 02:30:37.826133
574 02:30:37.826343 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 02:30:37.826548
576 02:30:37.859535 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 02:30:37.859908 2D training succeed
578 02:30:37.865045 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 02:30:37.870747 auto size-- 65535DDR cs0 size: 2048MB
580 02:30:37.871039 DDR cs1 size: 2048MB
581 02:30:37.876226 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 02:30:37.876509 cs0 DataBus test pass
583 02:30:37.881838 cs1 DataBus test pass
584 02:30:37.882144 cs0 AddrBus test pass
585 02:30:37.882352 cs1 AddrBus test pass
586 02:30:37.882552
587 02:30:37.887416 100bdlr_step_size ps== 420
588 02:30:37.887706 result report
589 02:30:37.893036 boot times 0Enable ddr reg access
590 02:30:37.898387 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 02:30:37.911896 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 02:30:38.485552 0.0;M3 CHK:0;cm4_sp_mode 0
593 02:30:38.486050 MVN_1=0x00000000
594 02:30:38.491073 MVN_2=0x00000000
595 02:30:38.496811 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 02:30:38.497171 OPS=0x10
597 02:30:38.497434 ring efuse init
598 02:30:38.497677 chipver efuse init
599 02:30:38.502702 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 02:30:38.508018 [0.018961 Inits done]
601 02:30:38.508379 secure task start!
602 02:30:38.508585 high task start!
603 02:30:38.512582 low task start!
604 02:30:38.512893 run into bl31
605 02:30:38.519211 NOTICE: BL31: v1.3(release):4fc40b1
606 02:30:38.527094 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 02:30:38.527634 NOTICE: BL31: G12A normal boot!
608 02:30:38.556266 NOTICE: BL31: BL33 decompress pass
609 02:30:38.558134 ERROR: Error initializing runtime service opteed_fast
610 02:30:39.791168
611 02:30:39.791829
612 02:30:39.799614 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 02:30:39.800195
614 02:30:39.800628 Model: Libre Computer AML-A311D-CC Alta
615 02:30:40.008198 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 02:30:40.030732 DRAM: 2 GiB (effective 3.8 GiB)
617 02:30:40.174377 Core: 408 devices, 31 uclasses, devicetree: separate
618 02:30:40.180223 WDT: Not starting watchdog@f0d0
619 02:30:40.212523 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 02:30:40.224942 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 02:30:40.229924 ** Bad device specification mmc 0 **
622 02:30:40.240191 Card did not respond to voltage select! : -110
623 02:30:40.248151 ** Bad device specification mmc 0 **
624 02:30:40.248538 Couldn't find partition mmc 0
625 02:30:40.256294 Card did not respond to voltage select! : -110
626 02:30:40.261815 ** Bad device specification mmc 0 **
627 02:30:40.262407 Couldn't find partition mmc 0
628 02:30:40.266862 Error: could not access storage.
629 02:30:40.610405 Net: eth0: ethernet@ff3f0000
630 02:30:40.611051 starting USB...
631 02:30:40.863358 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 02:30:40.863764 Starting the controller
633 02:30:40.869146 USB XHCI 1.10
634 02:30:42.580800 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 02:30:42.581481 bl2_stage_init 0x01
636 02:30:42.581985 bl2_stage_init 0x81
637 02:30:42.586287 hw id: 0x0000 - pwm id 0x01
638 02:30:42.586858 bl2_stage_init 0xc1
639 02:30:42.587324 bl2_stage_init 0x02
640 02:30:42.587773
641 02:30:42.591831 L0:00000000
642 02:30:42.592399 L1:20000703
643 02:30:42.592855 L2:00008067
644 02:30:42.593321 L3:14000000
645 02:30:42.594650 B2:00402000
646 02:30:42.595157 B1:e0f83180
647 02:30:42.595608
648 02:30:42.596114 TE: 58167
649 02:30:42.596595
650 02:30:42.605954 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 02:30:42.606529
652 02:30:42.606988 Board ID = 1
653 02:30:42.607430 Set A53 clk to 24M
654 02:30:42.607885 Set A73 clk to 24M
655 02:30:42.611526 Set clk81 to 24M
656 02:30:42.612269 A53 clk: 1200 MHz
657 02:30:42.612760 A73 clk: 1200 MHz
658 02:30:42.617047 CLK81: 166.6M
659 02:30:42.617604 smccc: 00012abd
660 02:30:42.622690 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 02:30:42.623264 board id: 1
662 02:30:42.631406 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 02:30:42.641916 fw parse done
664 02:30:42.647938 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 02:30:42.690469 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 02:30:42.702229 PIEI prepare done
667 02:30:42.702763 fastboot data load
668 02:30:42.703231 fastboot data verify
669 02:30:42.707068 verify result: 266
670 02:30:42.712645 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 02:30:42.713199 LPDDR4 probe
672 02:30:42.713658 ddr clk to 1584MHz
673 02:30:42.719634 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 02:30:42.757910
675 02:30:42.759018 dmc_version 0001
676 02:30:42.763744 Check phy result
677 02:30:42.770547 INFO : End of CA training
678 02:30:42.771070 INFO : End of initialization
679 02:30:42.776067 INFO : Training has run successfully!
680 02:30:42.776773 Check phy result
681 02:30:42.781709 INFO : End of initialization
682 02:30:42.782258 INFO : End of read enable training
683 02:30:42.784903 INFO : End of fine write leveling
684 02:30:42.790617 INFO : End of Write leveling coarse delay
685 02:30:42.796086 INFO : Training has run successfully!
686 02:30:42.796652 Check phy result
687 02:30:42.797121 INFO : End of initialization
688 02:30:42.801625 INFO : End of read dq deskew training
689 02:30:42.805020 INFO : End of MPR read delay center optimization
690 02:30:42.810602 INFO : End of write delay center optimization
691 02:30:42.816197 INFO : End of read delay center optimization
692 02:30:42.816718 INFO : End of max read latency training
693 02:30:42.821780 INFO : Training has run successfully!
694 02:30:42.822306 1D training succeed
695 02:30:42.829012 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 02:30:42.876794 Check phy result
697 02:30:42.877531 INFO : End of initialization
698 02:30:42.898229 INFO : End of 2D read delay Voltage center optimization
699 02:30:42.918519 INFO : End of 2D read delay Voltage center optimization
700 02:30:42.970321 INFO : End of 2D write delay Voltage center optimization
701 02:30:43.020680 INFO : End of 2D write delay Voltage center optimization
702 02:30:43.026144 INFO : Training has run successfully!
703 02:30:43.026724
704 02:30:43.027188 channel==0
705 02:30:43.031746 RxClkDly_Margin_A0==88 ps 9
706 02:30:43.032377 TxDqDly_Margin_A0==98 ps 10
707 02:30:43.037250 RxClkDly_Margin_A1==88 ps 9
708 02:30:43.037794 TxDqDly_Margin_A1==98 ps 10
709 02:30:43.038264 TrainedVREFDQ_A0==74
710 02:30:43.042819 TrainedVREFDQ_A1==74
711 02:30:43.043339 VrefDac_Margin_A0==25
712 02:30:43.043793 DeviceVref_Margin_A0==40
713 02:30:43.048388 VrefDac_Margin_A1==25
714 02:30:43.049025 DeviceVref_Margin_A1==40
715 02:30:43.049485
716 02:30:43.049933
717 02:30:43.054033 channel==1
718 02:30:43.054575 RxClkDly_Margin_A0==98 ps 10
719 02:30:43.055049 TxDqDly_Margin_A0==98 ps 10
720 02:30:43.059760 RxClkDly_Margin_A1==88 ps 9
721 02:30:43.060356 TxDqDly_Margin_A1==88 ps 9
722 02:30:43.065309 TrainedVREFDQ_A0==77
723 02:30:43.065871 TrainedVREFDQ_A1==77
724 02:30:43.066346 VrefDac_Margin_A0==22
725 02:30:43.070905 DeviceVref_Margin_A0==37
726 02:30:43.071437 VrefDac_Margin_A1==24
727 02:30:43.076587 DeviceVref_Margin_A1==37
728 02:30:43.077135
729 02:30:43.077607 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 02:30:43.078076
731 02:30:43.110057 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 02:30:43.110685 2D training succeed
733 02:30:43.115665 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 02:30:43.121250 auto size-- 65535DDR cs0 size: 2048MB
735 02:30:43.121788 DDR cs1 size: 2048MB
736 02:30:43.126779 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 02:30:43.127306 cs0 DataBus test pass
738 02:30:43.132986 cs1 DataBus test pass
739 02:30:43.133522 cs0 AddrBus test pass
740 02:30:43.133979 cs1 AddrBus test pass
741 02:30:43.134425
742 02:30:43.138030 100bdlr_step_size ps== 420
743 02:30:43.138575 result report
744 02:30:43.143607 boot times 0Enable ddr reg access
745 02:30:43.148057 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 02:30:43.161586 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 02:30:43.734414 0.0;M3 CHK:0;cm4_sp_mode 0
748 02:30:43.735068 MVN_1=0x00000000
749 02:30:43.740128 MVN_2=0x00000000
750 02:30:43.745810 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 02:30:43.746409 OPS=0x10
752 02:30:43.746865 ring efuse init
753 02:30:43.747302 chipver efuse init
754 02:30:43.751248 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 02:30:43.756842 [0.018961 Inits done]
756 02:30:43.757373 secure task start!
757 02:30:43.757813 high task start!
758 02:30:43.760473 low task start!
759 02:30:43.760953 run into bl31
760 02:30:43.768192 NOTICE: BL31: v1.3(release):4fc40b1
761 02:30:43.774928 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 02:30:43.775460 NOTICE: BL31: G12A normal boot!
763 02:30:43.801374 NOTICE: BL31: BL33 decompress pass
764 02:30:43.806140 ERROR: Error initializing runtime service opteed_fast
765 02:30:45.039793
766 02:30:45.040288
767 02:30:45.047252 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 02:30:45.047600
769 02:30:45.047828 Model: Libre Computer AML-A311D-CC Alta
770 02:30:45.255739 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 02:30:45.279025 DRAM: 2 GiB (effective 3.8 GiB)
772 02:30:45.423207 Core: 408 devices, 31 uclasses, devicetree: separate
773 02:30:45.428119 WDT: Not starting watchdog@f0d0
774 02:30:45.461344 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 02:30:45.473935 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 02:30:45.478750 ** Bad device specification mmc 0 **
777 02:30:45.489066 Card did not respond to voltage select! : -110
778 02:30:45.496554 ** Bad device specification mmc 0 **
779 02:30:45.496889 Couldn't find partition mmc 0
780 02:30:45.504983 Card did not respond to voltage select! : -110
781 02:30:45.510663 ** Bad device specification mmc 0 **
782 02:30:45.510988 Couldn't find partition mmc 0
783 02:30:45.515693 Error: could not access storage.
784 02:30:45.858002 Net: eth0: ethernet@ff3f0000
785 02:30:45.858412 starting USB...
786 02:30:46.109845 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 02:30:46.110257 Starting the controller
788 02:30:46.116744 USB XHCI 1.10
789 02:30:48.279353 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 02:30:48.279786 bl2_stage_init 0x81
791 02:30:48.285072 hw id: 0x0000 - pwm id 0x01
792 02:30:48.285366 bl2_stage_init 0xc1
793 02:30:48.285585 bl2_stage_init 0x02
794 02:30:48.285794
795 02:30:48.290404 L0:00000000
796 02:30:48.290712 L1:20000703
797 02:30:48.290924 L2:00008067
798 02:30:48.291129 L3:14000000
799 02:30:48.291330 B2:00402000
800 02:30:48.293280 B1:e0f83180
801 02:30:48.293536
802 02:30:48.293749 TE: 58150
803 02:30:48.293956
804 02:30:48.304322 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 02:30:48.304664
806 02:30:48.304873 Board ID = 1
807 02:30:48.305074 Set A53 clk to 24M
808 02:30:48.305273 Set A73 clk to 24M
809 02:30:48.309834 Set clk81 to 24M
810 02:30:48.310121 A53 clk: 1200 MHz
811 02:30:48.310331 A73 clk: 1200 MHz
812 02:30:48.315428 CLK81: 166.6M
813 02:30:48.315712 smccc: 00012aab
814 02:30:48.321010 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 02:30:48.321282 board id: 1
816 02:30:48.329640 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 02:30:48.340280 fw parse done
818 02:30:48.346252 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 02:30:48.388871 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 02:30:48.399744 PIEI prepare done
821 02:30:48.400075 fastboot data load
822 02:30:48.400298 fastboot data verify
823 02:30:48.405423 verify result: 266
824 02:30:48.411101 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 02:30:48.411394 LPDDR4 probe
826 02:30:48.411605 ddr clk to 1584MHz
827 02:30:48.417985 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 02:30:48.455485
829 02:30:48.455848 dmc_version 0001
830 02:30:48.462010 Check phy result
831 02:30:48.468785 INFO : End of CA training
832 02:30:48.469078 INFO : End of initialization
833 02:30:48.474355 INFO : Training has run successfully!
834 02:30:48.474620 Check phy result
835 02:30:48.480059 INFO : End of initialization
836 02:30:48.480337 INFO : End of read enable training
837 02:30:48.485587 INFO : End of fine write leveling
838 02:30:48.491222 INFO : End of Write leveling coarse delay
839 02:30:48.491491 INFO : Training has run successfully!
840 02:30:48.491704 Check phy result
841 02:30:48.496754 INFO : End of initialization
842 02:30:48.497010 INFO : End of read dq deskew training
843 02:30:48.502359 INFO : End of MPR read delay center optimization
844 02:30:48.508045 INFO : End of write delay center optimization
845 02:30:48.513575 INFO : End of read delay center optimization
846 02:30:48.513848 INFO : End of max read latency training
847 02:30:48.519253 INFO : Training has run successfully!
848 02:30:48.519525 1D training succeed
849 02:30:48.528329 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 02:30:48.576170 Check phy result
851 02:30:48.576583 INFO : End of initialization
852 02:30:48.596879 INFO : End of 2D read delay Voltage center optimization
853 02:30:48.617985 INFO : End of 2D read delay Voltage center optimization
854 02:30:48.670069 INFO : End of 2D write delay Voltage center optimization
855 02:30:48.719469 INFO : End of 2D write delay Voltage center optimization
856 02:30:48.725093 INFO : Training has run successfully!
857 02:30:48.725378
858 02:30:48.725593 channel==0
859 02:30:48.730645 RxClkDly_Margin_A0==88 ps 9
860 02:30:48.730907 TxDqDly_Margin_A0==98 ps 10
861 02:30:48.735665 RxClkDly_Margin_A1==88 ps 9
862 02:30:48.735922 TxDqDly_Margin_A1==98 ps 10
863 02:30:48.736169 TrainedVREFDQ_A0==74
864 02:30:48.741392 TrainedVREFDQ_A1==74
865 02:30:48.741673 VrefDac_Margin_A0==25
866 02:30:48.746856 DeviceVref_Margin_A0==40
867 02:30:48.747136 VrefDac_Margin_A1==25
868 02:30:48.747339 DeviceVref_Margin_A1==40
869 02:30:48.747539
870 02:30:48.747739
871 02:30:48.752446 channel==1
872 02:30:48.752746 RxClkDly_Margin_A0==98 ps 10
873 02:30:48.757996 TxDqDly_Margin_A0==88 ps 9
874 02:30:48.758274 RxClkDly_Margin_A1==88 ps 9
875 02:30:48.758477 TxDqDly_Margin_A1==88 ps 9
876 02:30:48.763559 TrainedVREFDQ_A0==76
877 02:30:48.763812 TrainedVREFDQ_A1==77
878 02:30:48.764046 VrefDac_Margin_A0==22
879 02:30:48.769310 DeviceVref_Margin_A0==38
880 02:30:48.769594 VrefDac_Margin_A1==24
881 02:30:48.774779 DeviceVref_Margin_A1==37
882 02:30:48.775034
883 02:30:48.780409 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 02:30:48.780686
885 02:30:48.808412 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 02:30:48.808756 2D training succeed
887 02:30:48.814009 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 02:30:48.819554 auto size-- 65535DDR cs0 size: 2048MB
889 02:30:48.819824 DDR cs1 size: 2048MB
890 02:30:48.825274 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 02:30:48.825551 cs0 DataBus test pass
892 02:30:48.830899 cs1 DataBus test pass
893 02:30:48.831218 cs0 AddrBus test pass
894 02:30:48.831427 cs1 AddrBus test pass
895 02:30:48.831627
896 02:30:48.836425 100bdlr_step_size ps== 420
897 02:30:48.836755 result report
898 02:30:48.842027 boot times 0Enable ddr reg access
899 02:30:48.847843 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 02:30:48.861337 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 02:30:49.435007 0.0;M3 CHK:0;cm4_sp_mode 0
902 02:30:49.435413 MVN_1=0x00000000
903 02:30:49.440390 MVN_2=0x00000000
904 02:30:49.446177 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 02:30:49.446563 OPS=0x10
906 02:30:49.446880 ring efuse init
907 02:30:49.447107 chipver efuse init
908 02:30:49.451798 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 02:30:49.457406 [0.018961 Inits done]
910 02:30:49.457688 secure task start!
911 02:30:49.457898 high task start!
912 02:30:49.461964 low task start!
913 02:30:49.462239 run into bl31
914 02:30:49.468645 NOTICE: BL31: v1.3(release):4fc40b1
915 02:30:49.476496 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 02:30:49.476803 NOTICE: BL31: G12A normal boot!
917 02:30:49.502421 NOTICE: BL31: BL33 decompress pass
918 02:30:49.508127 ERROR: Error initializing runtime service opteed_fast
919 02:30:50.740934
920 02:30:50.741332
921 02:30:50.748442 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 02:30:50.748914
923 02:30:50.749237 Model: Libre Computer AML-A311D-CC Alta
924 02:30:50.957842 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 02:30:50.981210 DRAM: 2 GiB (effective 3.8 GiB)
926 02:30:51.124277 Core: 408 devices, 31 uclasses, devicetree: separate
927 02:30:51.130031 WDT: Not starting watchdog@f0d0
928 02:30:51.162398 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 02:30:51.174880 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 02:30:51.179792 ** Bad device specification mmc 0 **
931 02:30:51.190471 Card did not respond to voltage select! : -110
932 02:30:51.197744 ** Bad device specification mmc 0 **
933 02:30:51.198068 Couldn't find partition mmc 0
934 02:30:51.206057 Card did not respond to voltage select! : -110
935 02:30:51.211563 ** Bad device specification mmc 0 **
936 02:30:51.211904 Couldn't find partition mmc 0
937 02:30:51.215729 Error: could not access storage.
938 02:30:51.558425 Net: eth0: ethernet@ff3f0000
939 02:30:51.558860 starting USB...
940 02:30:51.810940 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 02:30:51.811367 Starting the controller
942 02:30:51.817837 USB XHCI 1.10
943 02:30:53.372287 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 02:30:53.379566 scanning usb for storage devices... 0 Storage Device(s) found
946 02:30:53.431013 Hit any key to stop autoboot: 1
947 02:30:53.431824 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 02:30:53.432234 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 02:30:53.432513 Setting prompt string to ['=>']
950 02:30:53.432787 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 02:30:53.436773 0
952 02:30:53.437390 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 02:30:53.437669 Sending with 10 millisecond of delay
955 02:30:54.573003 => setenv autoload no
956 02:30:54.583920 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 02:30:54.589535 setenv autoload no
958 02:30:54.590411 Sending with 10 millisecond of delay
960 02:30:56.395341 => setenv initrd_high 0xffffffff
961 02:30:56.406240 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 02:30:56.407393 setenv initrd_high 0xffffffff
963 02:30:56.408161 Sending with 10 millisecond of delay
965 02:30:58.025735 => setenv fdt_high 0xffffffff
966 02:30:58.036566 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 02:30:58.037427 setenv fdt_high 0xffffffff
968 02:30:58.038140 Sending with 10 millisecond of delay
970 02:30:58.330169 => dhcp
971 02:30:58.341032 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 02:30:58.341947 dhcp
973 02:30:58.342399 Speed: 1000, full duplex
974 02:30:58.342818 BOOTP broadcast 1
975 02:30:58.348992 DHCP client bound to address 192.168.6.27 (8 ms)
976 02:30:58.349739 Sending with 10 millisecond of delay
978 02:31:00.026764 => setenv serverip 192.168.6.2
979 02:31:00.037567 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 02:31:00.038457 setenv serverip 192.168.6.2
981 02:31:00.039145 Sending with 10 millisecond of delay
983 02:31:03.768133 => tftpboot 0x01080000 964299/tftp-deploy-yj__grog/kernel/uImage
984 02:31:03.778999 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 02:31:03.779921 tftpboot 0x01080000 964299/tftp-deploy-yj__grog/kernel/uImage
986 02:31:03.780493 Speed: 1000, full duplex
987 02:31:03.780961 Using ethernet@ff3f0000 device
988 02:31:03.781748 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 02:31:03.787270 Filename '964299/tftp-deploy-yj__grog/kernel/uImage'.
990 02:31:03.791327 Load address: 0x1080000
991 02:31:06.693858 Loading: *################################################## 43.6 MiB
992 02:31:06.694554 15 MiB/s
993 02:31:06.695052 done
994 02:31:06.697986 Bytes transferred = 45713984 (2b98a40 hex)
995 02:31:06.698837 Sending with 10 millisecond of delay
997 02:31:11.389459 => tftpboot 0x08000000 964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
998 02:31:11.400341 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 02:31:11.401291 tftpboot 0x08000000 964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot
1000 02:31:11.401776 Speed: 1000, full duplex
1001 02:31:11.402231 Using ethernet@ff3f0000 device
1002 02:31:11.403046 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 02:31:11.414775 Filename '964299/tftp-deploy-yj__grog/ramdisk/ramdisk.cpio.gz.uboot'.
1004 02:31:11.415163 Load address: 0x8000000
1005 02:31:18.042240 Loading: *###################T ############################## UDP wrong checksum 00000005 0000a1b1
1006 02:31:23.042822 T UDP wrong checksum 00000005 0000a1b1
1007 02:31:33.045906 T T UDP wrong checksum 00000005 0000a1b1
1008 02:31:44.373923 T T UDP wrong checksum 000000ff 0000e6c1
1009 02:31:44.388921 UDP wrong checksum 000000ff 00007cb4
1010 02:31:53.050016 T T UDP wrong checksum 00000005 0000a1b1
1011 02:31:54.223019 UDP wrong checksum 000000ff 000040ca
1012 02:31:54.292572 UDP wrong checksum 000000ff 0000d1bc
1013 02:32:08.053524 T T
1014 02:32:08.054175 Retry count exceeded; starting again
1016 02:32:08.055732 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1019 02:32:08.057885 end: 2.4 uboot-commands (duration 00:01:47) [common]
1021 02:32:08.059442 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 02:32:08.060668 end: 2 uboot-action (duration 00:01:47) [common]
1025 02:32:08.062304 Cleaning after the job
1026 02:32:08.062888 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/ramdisk
1027 02:32:08.064230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/kernel
1028 02:32:08.072342 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/dtb
1029 02:32:08.073752 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/nfsrootfs
1030 02:32:08.153976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964299/tftp-deploy-yj__grog/modules
1031 02:32:08.162312 start: 4.1 power-off (timeout 00:00:30) [common]
1032 02:32:08.162892 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 02:32:08.196824 >> OK - accepted request
1034 02:32:08.198544 Returned 0 in 0 seconds
1035 02:32:08.299238 end: 4.1 power-off (duration 00:00:00) [common]
1037 02:32:08.300162 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 02:32:08.300796 Listened to connection for namespace 'common' for up to 1s
1039 02:32:09.301785 Finalising connection for namespace 'common'
1040 02:32:09.302520 Disconnecting from shell: Finalise
1041 02:32:09.303033 =>
1042 02:32:09.404085 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 02:32:09.404727 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964299
1044 02:32:12.021150 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964299
1045 02:32:12.021766 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.