Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:03:58.566919 lava-dispatcher, installed at version: 2024.01
2 03:03:58.567759 start: 0 validate
3 03:03:58.568267 Start time: 2024-11-09 03:03:58.568236+00:00 (UTC)
4 03:03:58.568833 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:03:58.569392 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 03:03:58.607116 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:03:58.607682 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:03:58.642166 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:03:58.642811 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:03:58.680046 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:03:58.680527 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 03:03:58.724932 validate duration: 0.16
14 03:03:58.725790 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:03:58.726123 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:03:58.726429 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:03:58.727010 Not decompressing ramdisk as can be used compressed.
18 03:03:58.727439 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 03:03:58.727710 saving as /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/ramdisk/rootfs.cpio.gz
20 03:03:58.728000 total size: 8181887 (7 MB)
21 03:03:58.762972 progress 0 % (0 MB)
22 03:03:58.768729 progress 5 % (0 MB)
23 03:03:58.773901 progress 10 % (0 MB)
24 03:03:58.779545 progress 15 % (1 MB)
25 03:03:58.784819 progress 20 % (1 MB)
26 03:03:58.790387 progress 25 % (1 MB)
27 03:03:58.795627 progress 30 % (2 MB)
28 03:03:58.801155 progress 35 % (2 MB)
29 03:03:58.806362 progress 40 % (3 MB)
30 03:03:58.811893 progress 45 % (3 MB)
31 03:03:58.817076 progress 50 % (3 MB)
32 03:03:58.822624 progress 55 % (4 MB)
33 03:03:58.827749 progress 60 % (4 MB)
34 03:03:58.833426 progress 65 % (5 MB)
35 03:03:58.838600 progress 70 % (5 MB)
36 03:03:58.844133 progress 75 % (5 MB)
37 03:03:58.849293 progress 80 % (6 MB)
38 03:03:58.854806 progress 85 % (6 MB)
39 03:03:58.859924 progress 90 % (7 MB)
40 03:03:58.865420 progress 95 % (7 MB)
41 03:03:58.870160 progress 100 % (7 MB)
42 03:03:58.870804 7 MB downloaded in 0.14 s (54.64 MB/s)
43 03:03:58.871371 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:03:58.872314 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:03:58.872628 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:03:58.872913 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:03:58.873394 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/kernel/Image
49 03:03:58.873667 saving as /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/kernel/Image
50 03:03:58.873889 total size: 45713920 (43 MB)
51 03:03:58.874109 No compression specified
52 03:03:58.917337 progress 0 % (0 MB)
53 03:03:58.945302 progress 5 % (2 MB)
54 03:03:58.973481 progress 10 % (4 MB)
55 03:03:59.001646 progress 15 % (6 MB)
56 03:03:59.029604 progress 20 % (8 MB)
57 03:03:59.057402 progress 25 % (10 MB)
58 03:03:59.085229 progress 30 % (13 MB)
59 03:03:59.113184 progress 35 % (15 MB)
60 03:03:59.141107 progress 40 % (17 MB)
61 03:03:59.168355 progress 45 % (19 MB)
62 03:03:59.196182 progress 50 % (21 MB)
63 03:03:59.224139 progress 55 % (24 MB)
64 03:03:59.252032 progress 60 % (26 MB)
65 03:03:59.279323 progress 65 % (28 MB)
66 03:03:59.307306 progress 70 % (30 MB)
67 03:03:59.335516 progress 75 % (32 MB)
68 03:03:59.363450 progress 80 % (34 MB)
69 03:03:59.391154 progress 85 % (37 MB)
70 03:03:59.419405 progress 90 % (39 MB)
71 03:03:59.447391 progress 95 % (41 MB)
72 03:03:59.474942 progress 100 % (43 MB)
73 03:03:59.475470 43 MB downloaded in 0.60 s (72.47 MB/s)
74 03:03:59.475969 end: 1.2.1 http-download (duration 00:00:01) [common]
76 03:03:59.476832 end: 1.2 download-retry (duration 00:00:01) [common]
77 03:03:59.477126 start: 1.3 download-retry (timeout 00:09:59) [common]
78 03:03:59.477405 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 03:03:59.477895 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 03:03:59.478175 saving as /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 03:03:59.478395 total size: 53209 (0 MB)
82 03:03:59.478612 No compression specified
83 03:03:59.523232 progress 61 % (0 MB)
84 03:03:59.524133 progress 100 % (0 MB)
85 03:03:59.524714 0 MB downloaded in 0.05 s (1.10 MB/s)
86 03:03:59.525191 end: 1.3.1 http-download (duration 00:00:00) [common]
88 03:03:59.526026 end: 1.3 download-retry (duration 00:00:00) [common]
89 03:03:59.526300 start: 1.4 download-retry (timeout 00:09:59) [common]
90 03:03:59.526575 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 03:03:59.527049 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/modules.tar.xz
92 03:03:59.527298 saving as /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/modules/modules.tar
93 03:03:59.527510 total size: 11612756 (11 MB)
94 03:03:59.527725 Using unxz to decompress xz
95 03:03:59.560858 progress 0 % (0 MB)
96 03:03:59.626753 progress 5 % (0 MB)
97 03:03:59.701212 progress 10 % (1 MB)
98 03:03:59.797946 progress 15 % (1 MB)
99 03:03:59.888826 progress 20 % (2 MB)
100 03:03:59.968849 progress 25 % (2 MB)
101 03:04:00.044509 progress 30 % (3 MB)
102 03:04:00.123078 progress 35 % (3 MB)
103 03:04:00.196075 progress 40 % (4 MB)
104 03:04:00.272581 progress 45 % (5 MB)
105 03:04:00.358517 progress 50 % (5 MB)
106 03:04:00.436360 progress 55 % (6 MB)
107 03:04:00.522429 progress 60 % (6 MB)
108 03:04:00.604484 progress 65 % (7 MB)
109 03:04:00.686139 progress 70 % (7 MB)
110 03:04:00.764899 progress 75 % (8 MB)
111 03:04:00.849907 progress 80 % (8 MB)
112 03:04:00.930758 progress 85 % (9 MB)
113 03:04:01.009808 progress 90 % (9 MB)
114 03:04:01.088597 progress 95 % (10 MB)
115 03:04:01.166285 progress 100 % (11 MB)
116 03:04:01.178351 11 MB downloaded in 1.65 s (6.71 MB/s)
117 03:04:01.178991 end: 1.4.1 http-download (duration 00:00:02) [common]
119 03:04:01.179839 end: 1.4 download-retry (duration 00:00:02) [common]
120 03:04:01.180273 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 03:04:01.180809 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 03:04:01.181303 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 03:04:01.181807 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 03:04:01.182807 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3
125 03:04:01.183681 makedir: /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin
126 03:04:01.185099 makedir: /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/tests
127 03:04:01.185748 makedir: /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/results
128 03:04:01.186375 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-add-keys
129 03:04:01.187391 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-add-sources
130 03:04:01.188437 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-background-process-start
131 03:04:01.189476 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-background-process-stop
132 03:04:01.190523 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-common-functions
133 03:04:01.191508 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-echo-ipv4
134 03:04:01.192603 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-install-packages
135 03:04:01.193587 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-installed-packages
136 03:04:01.194532 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-os-build
137 03:04:01.195472 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-probe-channel
138 03:04:01.196675 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-probe-ip
139 03:04:01.197629 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-target-ip
140 03:04:01.198560 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-target-mac
141 03:04:01.199499 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-target-storage
142 03:04:01.200493 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-case
143 03:04:01.201448 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-event
144 03:04:01.202358 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-feedback
145 03:04:01.203260 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-raise
146 03:04:01.204246 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-reference
147 03:04:01.205240 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-runner
148 03:04:01.206228 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-set
149 03:04:01.207204 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-test-shell
150 03:04:01.208413 Updating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-install-packages (oe)
151 03:04:01.209510 Updating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/bin/lava-installed-packages (oe)
152 03:04:01.210470 Creating /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/environment
153 03:04:01.211239 LAVA metadata
154 03:04:01.211742 - LAVA_JOB_ID=964653
155 03:04:01.212214 - LAVA_DISPATCHER_IP=192.168.6.2
156 03:04:01.212917 start: 1.5.2.1 ssh-authorize (timeout 00:09:58) [common]
157 03:04:01.215622 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 03:04:01.216469 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:58) [common]
159 03:04:01.216918 skipped lava-vland-overlay
160 03:04:01.217409 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 03:04:01.217919 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:58) [common]
162 03:04:01.218349 skipped lava-multinode-overlay
163 03:04:01.218831 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 03:04:01.219640 start: 1.5.2.4 test-definition (timeout 00:09:58) [common]
165 03:04:01.220444 Loading test definitions
166 03:04:01.221006 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:58) [common]
167 03:04:01.221448 Using /lava-964653 at stage 0
168 03:04:01.223697 uuid=964653_1.5.2.4.1 testdef=None
169 03:04:01.224445 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 03:04:01.224974 start: 1.5.2.4.2 test-overlay (timeout 00:09:58) [common]
171 03:04:01.228407 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 03:04:01.229948 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 03:04:01.234260 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 03:04:01.235885 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 03:04:01.238273 runner path: /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/0/tests/0_dmesg test_uuid 964653_1.5.2.4.1
178 03:04:01.238869 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 03:04:01.239655 Creating lava-test-runner.conf files
181 03:04:01.239857 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964653/lava-overlay-irzlb6o3/lava-964653/0 for stage 0
182 03:04:01.240245 - 0_dmesg
183 03:04:01.240613 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 03:04:01.240901 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 03:04:01.265051 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 03:04:01.265475 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 03:04:01.265742 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 03:04:01.266010 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 03:04:01.266275 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 03:04:02.208881 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 03:04:02.209347 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
192 03:04:02.209592 extracting modules file /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk
193 03:04:03.598883 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 03:04:03.599346 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 03:04:03.599620 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964653/compress-overlay-alre4vh9/overlay-1.5.2.5.tar.gz to ramdisk
196 03:04:03.599833 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964653/compress-overlay-alre4vh9/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk
197 03:04:03.630443 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 03:04:03.630859 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 03:04:03.631129 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 03:04:03.631355 Converting downloaded kernel to a uImage
201 03:04:03.631657 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/kernel/Image /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/kernel/uImage
202 03:04:04.185516 output: Image Name:
203 03:04:04.185930 output: Created: Sat Nov 9 03:04:03 2024
204 03:04:04.186138 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 03:04:04.186343 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 03:04:04.186545 output: Load Address: 01080000
207 03:04:04.186745 output: Entry Point: 01080000
208 03:04:04.186942 output:
209 03:04:04.187270 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 03:04:04.187536 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 03:04:04.187807 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 03:04:04.188099 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 03:04:04.188367 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 03:04:04.188627 Building ramdisk /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk
215 03:04:06.847564 >> 181576 blocks
216 03:04:15.998301 Adding RAMdisk u-boot header.
217 03:04:15.998748 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk.cpio.gz.uboot
218 03:04:16.270040 output: Image Name:
219 03:04:16.270455 output: Created: Sat Nov 9 03:04:15 2024
220 03:04:16.270875 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 03:04:16.271286 output: Data Size: 26053361 Bytes = 25442.74 KiB = 24.85 MiB
222 03:04:16.271690 output: Load Address: 00000000
223 03:04:16.272142 output: Entry Point: 00000000
224 03:04:16.272546 output:
225 03:04:16.273737 rename /var/lib/lava/dispatcher/tmp/964653/extract-overlay-ramdisk-h83mipl1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
226 03:04:16.274464 end: 1.5.8 compress-ramdisk (duration 00:00:12) [common]
227 03:04:16.275014 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
228 03:04:16.275543 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:42) [common]
229 03:04:16.276029 No LXC device requested
230 03:04:16.276546 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 03:04:16.277059 start: 1.7 deploy-device-env (timeout 00:09:42) [common]
232 03:04:16.277554 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 03:04:16.277966 Checking files for TFTP limit of 4294967296 bytes.
234 03:04:16.280639 end: 1 tftp-deploy (duration 00:00:18) [common]
235 03:04:16.281223 start: 2 uboot-action (timeout 00:05:00) [common]
236 03:04:16.281758 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 03:04:16.282259 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 03:04:16.282762 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 03:04:16.283294 Using kernel file from prepare-kernel: 964653/tftp-deploy-fruo5ikp/kernel/uImage
240 03:04:16.283924 substitutions:
241 03:04:16.284399 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 03:04:16.284848 - {DTB_ADDR}: 0x01070000
243 03:04:16.285263 - {DTB}: 964653/tftp-deploy-fruo5ikp/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 03:04:16.285663 - {INITRD}: 964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
245 03:04:16.286056 - {KERNEL_ADDR}: 0x01080000
246 03:04:16.286443 - {KERNEL}: 964653/tftp-deploy-fruo5ikp/kernel/uImage
247 03:04:16.286833 - {LAVA_MAC}: None
248 03:04:16.287266 - {PRESEED_CONFIG}: None
249 03:04:16.287657 - {PRESEED_LOCAL}: None
250 03:04:16.288069 - {RAMDISK_ADDR}: 0x08000000
251 03:04:16.288461 - {RAMDISK}: 964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
252 03:04:16.288855 - {ROOT_PART}: None
253 03:04:16.289240 - {ROOT}: None
254 03:04:16.289625 - {SERVER_IP}: 192.168.6.2
255 03:04:16.290015 - {TEE_ADDR}: 0x83000000
256 03:04:16.290401 - {TEE}: None
257 03:04:16.290786 Parsed boot commands:
258 03:04:16.291160 - setenv autoload no
259 03:04:16.291541 - setenv initrd_high 0xffffffff
260 03:04:16.291924 - setenv fdt_high 0xffffffff
261 03:04:16.292336 - dhcp
262 03:04:16.292719 - setenv serverip 192.168.6.2
263 03:04:16.293103 - tftpboot 0x01080000 964653/tftp-deploy-fruo5ikp/kernel/uImage
264 03:04:16.293488 - tftpboot 0x08000000 964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
265 03:04:16.293870 - tftpboot 0x01070000 964653/tftp-deploy-fruo5ikp/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 03:04:16.294259 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 03:04:16.294651 - bootm 0x01080000 0x08000000 0x01070000
268 03:04:16.295152 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 03:04:16.296652 start: 2.3 connect-device (timeout 00:05:00) [common]
271 03:04:16.297091 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 03:04:16.311776 Setting prompt string to ['lava-test: # ']
273 03:04:16.313318 end: 2.3 connect-device (duration 00:00:00) [common]
274 03:04:16.313914 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 03:04:16.314460 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 03:04:16.315036 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 03:04:16.316284 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 03:04:16.352732 >> OK - accepted request
279 03:04:16.354907 Returned 0 in 0 seconds
280 03:04:16.455809 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 03:04:16.457490 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 03:04:16.458054 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 03:04:16.458553 Setting prompt string to ['Hit any key to stop autoboot']
285 03:04:16.458988 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 03:04:16.460588 Trying 192.168.56.21...
287 03:04:16.461059 Connected to conserv1.
288 03:04:16.461474 Escape character is '^]'.
289 03:04:16.461892
290 03:04:16.462308 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 03:04:16.462733
292 03:04:24.127049 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 03:04:24.127679 bl2_stage_init 0x01
294 03:04:24.128149 bl2_stage_init 0x81
295 03:04:24.132755 hw id: 0x0000 - pwm id 0x01
296 03:04:24.133210 bl2_stage_init 0xc1
297 03:04:24.137992 bl2_stage_init 0x02
298 03:04:24.138429
299 03:04:24.138828 L0:00000000
300 03:04:24.139228 L1:00000703
301 03:04:24.139620 L2:00008067
302 03:04:24.143343 L3:15000000
303 03:04:24.143768 S1:00000000
304 03:04:24.144193 B2:20282000
305 03:04:24.144578 B1:a0f83180
306 03:04:24.144959
307 03:04:24.145344 TE: 68651
308 03:04:24.145727
309 03:04:24.154598 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 03:04:24.155029
311 03:04:24.155418 Board ID = 1
312 03:04:24.155804 Set cpu clk to 24M
313 03:04:24.156223 Set clk81 to 24M
314 03:04:24.158521 Use GP1_pll as DSU clk.
315 03:04:24.158935 DSU clk: 1200 Mhz
316 03:04:24.164256 CPU clk: 1200 MHz
317 03:04:24.164678 Set clk81 to 166.6M
318 03:04:24.169807 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 03:04:24.170281 board id: 1
320 03:04:24.178357 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 03:04:24.189661 fw parse done
322 03:04:24.195809 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 03:04:24.238278 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 03:04:24.249098 PIEI prepare done
325 03:04:24.249518 fastboot data load
326 03:04:24.249909 fastboot data verify
327 03:04:24.254724 verify result: 266
328 03:04:24.260315 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 03:04:24.260730 LPDDR4 probe
330 03:04:24.261120 ddr clk to 1584MHz
331 03:04:24.267391 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 03:04:24.305553
333 03:04:24.305987 dmc_version 0001
334 03:04:24.312309 Check phy result
335 03:04:24.318081 INFO : End of CA training
336 03:04:24.318501 INFO : End of initialization
337 03:04:24.323714 INFO : Training has run successfully!
338 03:04:24.324152 Check phy result
339 03:04:24.329391 INFO : End of initialization
340 03:04:24.329805 INFO : End of read enable training
341 03:04:24.332665 INFO : End of fine write leveling
342 03:04:24.338305 INFO : End of Write leveling coarse delay
343 03:04:24.343865 INFO : Training has run successfully!
344 03:04:24.344307 Check phy result
345 03:04:24.344699 INFO : End of initialization
346 03:04:24.349426 INFO : End of read dq deskew training
347 03:04:24.355012 INFO : End of MPR read delay center optimization
348 03:04:24.355427 INFO : End of write delay center optimization
349 03:04:24.360631 INFO : End of read delay center optimization
350 03:04:24.366303 INFO : End of max read latency training
351 03:04:24.366723 INFO : Training has run successfully!
352 03:04:24.371917 1D training succeed
353 03:04:24.376767 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 03:04:24.425494 Check phy result
355 03:04:24.426085 INFO : End of initialization
356 03:04:24.447812 INFO : End of 2D read delay Voltage center optimization
357 03:04:24.466827 INFO : End of 2D read delay Voltage center optimization
358 03:04:24.518823 INFO : End of 2D write delay Voltage center optimization
359 03:04:24.568110 INFO : End of 2D write delay Voltage center optimization
360 03:04:24.573554 INFO : Training has run successfully!
361 03:04:24.574009
362 03:04:24.574407 channel==0
363 03:04:24.579141 RxClkDly_Margin_A0==78 ps 8
364 03:04:24.579573 TxDqDly_Margin_A0==98 ps 10
365 03:04:24.582491 RxClkDly_Margin_A1==78 ps 8
366 03:04:24.582921 TxDqDly_Margin_A1==88 ps 9
367 03:04:24.588079 TrainedVREFDQ_A0==74
368 03:04:24.588523 TrainedVREFDQ_A1==74
369 03:04:24.588916 VrefDac_Margin_A0==23
370 03:04:24.593643 DeviceVref_Margin_A0==40
371 03:04:24.594069 VrefDac_Margin_A1==23
372 03:04:24.599315 DeviceVref_Margin_A1==40
373 03:04:24.599774
374 03:04:24.600217
375 03:04:24.600613 channel==1
376 03:04:24.600999 RxClkDly_Margin_A0==78 ps 8
377 03:04:24.602684 TxDqDly_Margin_A0==98 ps 10
378 03:04:24.608327 RxClkDly_Margin_A1==78 ps 8
379 03:04:24.608760 TxDqDly_Margin_A1==78 ps 8
380 03:04:24.609150 TrainedVREFDQ_A0==78
381 03:04:24.613929 TrainedVREFDQ_A1==75
382 03:04:24.614360 VrefDac_Margin_A0==22
383 03:04:24.619424 DeviceVref_Margin_A0==36
384 03:04:24.619848 VrefDac_Margin_A1==20
385 03:04:24.620280 DeviceVref_Margin_A1==39
386 03:04:24.620666
387 03:04:24.628311 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 03:04:24.628741
389 03:04:24.654076 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
390 03:04:24.659703 2D training succeed
391 03:04:24.663100 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 03:04:24.668697 auto size-- 65535DDR cs0 size: 2048MB
393 03:04:24.669126 DDR cs1 size: 2048MB
394 03:04:24.674360 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 03:04:24.674775 cs0 DataBus test pass
396 03:04:24.679949 cs1 DataBus test pass
397 03:04:24.680398 cs0 AddrBus test pass
398 03:04:24.680787 cs1 AddrBus test pass
399 03:04:24.681173
400 03:04:24.685511 100bdlr_step_size ps== 464
401 03:04:24.685940 result report
402 03:04:24.691142 boot times 0Enable ddr reg access
403 03:04:24.695393 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 03:04:24.709408 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 03:04:25.363672 bl2z: ptr: 05129330, size: 00001e40
406 03:04:25.371283 0.0;M3 CHK:0;cm4_sp_mode 0
407 03:04:25.371597 MVN_1=0x00000000
408 03:04:25.371818 MVN_2=0x00000000
409 03:04:25.382690 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 03:04:25.383239 OPS=0x04
411 03:04:25.383645 ring efuse init
412 03:04:25.388300 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 03:04:25.388800 [0.017319 Inits done]
414 03:04:25.389200 secure task start!
415 03:04:25.395937 high task start!
416 03:04:25.396445 low task start!
417 03:04:25.396840 run into bl31
418 03:04:25.404497 NOTICE: BL31: v1.3(release):4fc40b1
419 03:04:25.412291 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 03:04:25.412595 NOTICE: BL31: G12A normal boot!
421 03:04:25.427846 NOTICE: BL31: BL33 decompress pass
422 03:04:25.433582 ERROR: Error initializing runtime service opteed_fast
423 03:04:28.176343 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 03:04:28.176975 bl2_stage_init 0x01
425 03:04:28.177405 bl2_stage_init 0x81
426 03:04:28.182043 hw id: 0x0000 - pwm id 0x01
427 03:04:28.182543 bl2_stage_init 0xc1
428 03:04:28.187259 bl2_stage_init 0x02
429 03:04:28.187756
430 03:04:28.188208 L0:00000000
431 03:04:28.188594 L1:00000703
432 03:04:28.188977 L2:00008067
433 03:04:28.189356 L3:15000000
434 03:04:28.192791 S1:00000000
435 03:04:28.193239 B2:20282000
436 03:04:28.193629 B1:a0f83180
437 03:04:28.194010
438 03:04:28.194394 TE: 69705
439 03:04:28.194773
440 03:04:28.198397 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 03:04:28.204020
442 03:04:28.204483 Board ID = 1
443 03:04:28.204871 Set cpu clk to 24M
444 03:04:28.205254 Set clk81 to 24M
445 03:04:28.209628 Use GP1_pll as DSU clk.
446 03:04:28.210095 DSU clk: 1200 Mhz
447 03:04:28.210484 CPU clk: 1200 MHz
448 03:04:28.215273 Set clk81 to 166.6M
449 03:04:28.220870 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 03:04:28.221377 board id: 1
451 03:04:28.228409 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 03:04:28.239040 fw parse done
453 03:04:28.245016 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 03:04:28.287606 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 03:04:28.298577 PIEI prepare done
456 03:04:28.299069 fastboot data load
457 03:04:28.299465 fastboot data verify
458 03:04:28.304242 verify result: 266
459 03:04:28.309804 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 03:04:28.310324 LPDDR4 probe
461 03:04:28.310722 ddr clk to 1584MHz
462 03:04:28.317733 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 03:04:28.354904
464 03:04:28.355391 dmc_version 0001
465 03:04:28.361618 Check phy result
466 03:04:28.367617 INFO : End of CA training
467 03:04:28.368136 INFO : End of initialization
468 03:04:28.373299 INFO : Training has run successfully!
469 03:04:28.373763 Check phy result
470 03:04:28.378782 INFO : End of initialization
471 03:04:28.379242 INFO : End of read enable training
472 03:04:28.382016 INFO : End of fine write leveling
473 03:04:28.387589 INFO : End of Write leveling coarse delay
474 03:04:28.393279 INFO : Training has run successfully!
475 03:04:28.393736 Check phy result
476 03:04:28.394137 INFO : End of initialization
477 03:04:28.398745 INFO : End of read dq deskew training
478 03:04:28.404416 INFO : End of MPR read delay center optimization
479 03:04:28.404888 INFO : End of write delay center optimization
480 03:04:28.410098 INFO : End of read delay center optimization
481 03:04:28.415654 INFO : End of max read latency training
482 03:04:28.416214 INFO : Training has run successfully!
483 03:04:28.421327 1D training succeed
484 03:04:28.427214 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 03:04:28.474766 Check phy result
486 03:04:28.475300 INFO : End of initialization
487 03:04:28.497155 INFO : End of 2D read delay Voltage center optimization
488 03:04:28.516299 INFO : End of 2D read delay Voltage center optimization
489 03:04:28.568218 INFO : End of 2D write delay Voltage center optimization
490 03:04:28.617294 INFO : End of 2D write delay Voltage center optimization
491 03:04:28.622747 INFO : Training has run successfully!
492 03:04:28.623193
493 03:04:28.623607 channel==0
494 03:04:28.628363 RxClkDly_Margin_A0==78 ps 8
495 03:04:28.628798 TxDqDly_Margin_A0==98 ps 10
496 03:04:28.633958 RxClkDly_Margin_A1==88 ps 9
497 03:04:28.634387 TxDqDly_Margin_A1==88 ps 9
498 03:04:28.634796 TrainedVREFDQ_A0==74
499 03:04:28.639526 TrainedVREFDQ_A1==75
500 03:04:28.639956 VrefDac_Margin_A0==23
501 03:04:28.640389 DeviceVref_Margin_A0==40
502 03:04:28.645210 VrefDac_Margin_A1==23
503 03:04:28.645636 DeviceVref_Margin_A1==39
504 03:04:28.646042
505 03:04:28.646437
506 03:04:28.646829 channel==1
507 03:04:28.650703 RxClkDly_Margin_A0==88 ps 9
508 03:04:28.651130 TxDqDly_Margin_A0==98 ps 10
509 03:04:28.656321 RxClkDly_Margin_A1==78 ps 8
510 03:04:28.656777 TxDqDly_Margin_A1==88 ps 9
511 03:04:28.661937 TrainedVREFDQ_A0==78
512 03:04:28.662374 TrainedVREFDQ_A1==78
513 03:04:28.662778 VrefDac_Margin_A0==22
514 03:04:28.667517 DeviceVref_Margin_A0==36
515 03:04:28.667944 VrefDac_Margin_A1==22
516 03:04:28.673202 DeviceVref_Margin_A1==36
517 03:04:28.673623
518 03:04:28.674024 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 03:04:28.674418
520 03:04:28.706632 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 03:04:28.707145 2D training succeed
522 03:04:28.712304 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 03:04:28.718034 auto size-- 65535DDR cs0 size: 2048MB
524 03:04:28.718670 DDR cs1 size: 2048MB
525 03:04:28.723533 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 03:04:28.724167 cs0 DataBus test pass
527 03:04:28.729220 cs1 DataBus test pass
528 03:04:28.729816 cs0 AddrBus test pass
529 03:04:28.730366 cs1 AddrBus test pass
530 03:04:28.730899
531 03:04:28.734714 100bdlr_step_size ps== 478
532 03:04:28.735289 result report
533 03:04:28.740360 boot times 0Enable ddr reg access
534 03:04:28.745530 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 03:04:28.759327 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 03:04:29.414552 bl2z: ptr: 05129330, size: 00001e40
537 03:04:29.422702 0.0;M3 CHK:0;cm4_sp_mode 0
538 03:04:29.423232 MVN_1=0x00000000
539 03:04:29.423693 MVN_2=0x00000000
540 03:04:29.434237 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 03:04:29.434784 OPS=0x04
542 03:04:29.435242 ring efuse init
543 03:04:29.437319 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 03:04:29.443705 [0.017310 Inits done]
545 03:04:29.444269 secure task start!
546 03:04:29.444731 high task start!
547 03:04:29.445177 low task start!
548 03:04:29.450034 run into bl31
549 03:04:29.456295 NOTICE: BL31: v1.3(release):4fc40b1
550 03:04:29.464118 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 03:04:29.464669 NOTICE: BL31: G12A normal boot!
552 03:04:29.479476 NOTICE: BL31: BL33 decompress pass
553 03:04:29.485169 ERROR: Error initializing runtime service opteed_fast
554 03:04:30.729568 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 03:04:30.729975 bl2_stage_init 0x01
556 03:04:30.730208 bl2_stage_init 0x81
557 03:04:30.735192 hw id: 0x0000 - pwm id 0x01
558 03:04:30.735472 bl2_stage_init 0xc1
559 03:04:30.735703 bl2_stage_init 0x02
560 03:04:30.735929
561 03:04:30.740692 L0:00000000
562 03:04:30.740955 L1:00000703
563 03:04:30.741170 L2:00008067
564 03:04:30.741378 L3:15000000
565 03:04:30.741590 S1:00000000
566 03:04:30.742059 B2:20282000
567 03:04:30.747470 B1:a0f83180
568 03:04:30.747756
569 03:04:30.747975 TE: 70734
570 03:04:30.748215
571 03:04:30.753147 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 03:04:30.753464
573 03:04:30.753668 Board ID = 1
574 03:04:30.758694 Set cpu clk to 24M
575 03:04:30.758961 Set clk81 to 24M
576 03:04:30.759181 Use GP1_pll as DSU clk.
577 03:04:30.761947 DSU clk: 1200 Mhz
578 03:04:30.762205 CPU clk: 1200 MHz
579 03:04:30.767475 Set clk81 to 166.6M
580 03:04:30.773075 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 03:04:30.773354 board id: 1
582 03:04:30.780765 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 03:04:30.791631 fw parse done
584 03:04:30.797622 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 03:04:30.840790 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 03:04:30.851872 PIEI prepare done
587 03:04:30.852158 fastboot data load
588 03:04:30.852392 fastboot data verify
589 03:04:30.857467 verify result: 266
590 03:04:30.863100 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 03:04:30.863367 LPDDR4 probe
592 03:04:30.863591 ddr clk to 1584MHz
593 03:04:30.871041 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 03:04:30.909002
595 03:04:30.909377 dmc_version 0001
596 03:04:30.915917 Check phy result
597 03:04:30.921904 INFO : End of CA training
598 03:04:30.922496 INFO : End of initialization
599 03:04:30.927590 INFO : Training has run successfully!
600 03:04:30.927960 Check phy result
601 03:04:30.933117 INFO : End of initialization
602 03:04:30.933500 INFO : End of read enable training
603 03:04:30.938784 INFO : End of fine write leveling
604 03:04:30.944311 INFO : End of Write leveling coarse delay
605 03:04:30.944871 INFO : Training has run successfully!
606 03:04:30.945125 Check phy result
607 03:04:30.949925 INFO : End of initialization
608 03:04:30.950291 INFO : End of read dq deskew training
609 03:04:30.955544 INFO : End of MPR read delay center optimization
610 03:04:30.961114 INFO : End of write delay center optimization
611 03:04:30.966722 INFO : End of read delay center optimization
612 03:04:30.967220 INFO : End of max read latency training
613 03:04:30.972324 INFO : Training has run successfully!
614 03:04:30.972792 1D training succeed
615 03:04:30.981492 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 03:04:31.029833 Check phy result
617 03:04:31.030352 INFO : End of initialization
618 03:04:31.057235 INFO : End of 2D read delay Voltage center optimization
619 03:04:31.081447 INFO : End of 2D read delay Voltage center optimization
620 03:04:31.138060 INFO : End of 2D write delay Voltage center optimization
621 03:04:31.192104 INFO : End of 2D write delay Voltage center optimization
622 03:04:31.197634 INFO : Training has run successfully!
623 03:04:31.198120
624 03:04:31.198549 channel==0
625 03:04:31.203257 RxClkDly_Margin_A0==78 ps 8
626 03:04:31.203730 TxDqDly_Margin_A0==98 ps 10
627 03:04:31.206654 RxClkDly_Margin_A1==69 ps 7
628 03:04:31.207126 TxDqDly_Margin_A1==88 ps 9
629 03:04:31.212204 TrainedVREFDQ_A0==74
630 03:04:31.212691 TrainedVREFDQ_A1==75
631 03:04:31.213110 VrefDac_Margin_A0==23
632 03:04:31.217779 DeviceVref_Margin_A0==40
633 03:04:31.218258 VrefDac_Margin_A1==23
634 03:04:31.223352 DeviceVref_Margin_A1==39
635 03:04:31.223815
636 03:04:31.224270
637 03:04:31.224679 channel==1
638 03:04:31.225075 RxClkDly_Margin_A0==78 ps 8
639 03:04:31.228931 TxDqDly_Margin_A0==88 ps 9
640 03:04:31.229411 RxClkDly_Margin_A1==78 ps 8
641 03:04:31.234609 TxDqDly_Margin_A1==88 ps 9
642 03:04:31.235101 TrainedVREFDQ_A0==75
643 03:04:31.235520 TrainedVREFDQ_A1==75
644 03:04:31.240260 VrefDac_Margin_A0==22
645 03:04:31.240735 DeviceVref_Margin_A0==39
646 03:04:31.241146 VrefDac_Margin_A1==20
647 03:04:31.245753 DeviceVref_Margin_A1==39
648 03:04:31.246221
649 03:04:31.251356 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 03:04:31.251834
651 03:04:31.279326 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
652 03:04:31.284958 2D training succeed
653 03:04:31.290626 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 03:04:31.291108 auto size-- 65535DDR cs0 size: 2048MB
655 03:04:31.296189 DDR cs1 size: 2048MB
656 03:04:31.296660 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 03:04:31.301753 cs0 DataBus test pass
658 03:04:31.302221 cs1 DataBus test pass
659 03:04:31.302630 cs0 AddrBus test pass
660 03:04:31.307380 cs1 AddrBus test pass
661 03:04:31.307863
662 03:04:31.308336 100bdlr_step_size ps== 478
663 03:04:31.308759 result report
664 03:04:31.312961 boot times 0Enable ddr reg access
665 03:04:31.320348 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 03:04:31.334158 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 03:04:31.993601 bl2z: ptr: 05129330, size: 00001e40
668 03:04:32.002284 0.0;M3 CHK:0;cm4_sp_mode 0
669 03:04:32.002800 MVN_1=0x00000000
670 03:04:32.003217 MVN_2=0x00000000
671 03:04:32.013807 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 03:04:32.014359 OPS=0x04
673 03:04:32.014793 ring efuse init
674 03:04:32.016721 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 03:04:32.022239 [0.017354 Inits done]
676 03:04:32.022747 secure task start!
677 03:04:32.023167 high task start!
678 03:04:32.023579 low task start!
679 03:04:32.026783 run into bl31
680 03:04:32.035433 NOTICE: BL31: v1.3(release):4fc40b1
681 03:04:32.043194 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 03:04:32.043681 NOTICE: BL31: G12A normal boot!
683 03:04:32.058750 NOTICE: BL31: BL33 decompress pass
684 03:04:32.064393 ERROR: Error initializing runtime service opteed_fast
685 03:04:32.859885
686 03:04:32.860542
687 03:04:32.865209 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 03:04:32.865535
689 03:04:32.868730 Model: Libre Computer AML-S905D3-CC Solitude
690 03:04:33.015690 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 03:04:33.031044 DRAM: 2 GiB (effective 3.8 GiB)
692 03:04:33.132319 Core: 406 devices, 33 uclasses, devicetree: separate
693 03:04:33.138604 WDT: Not starting watchdog@f0d0
694 03:04:33.163052 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 03:04:33.175607 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 03:04:33.180287 ** Bad device specification mmc 0 **
697 03:04:33.190409 Card did not respond to voltage select! : -110
698 03:04:33.200810 ** Bad device specification mmc 0 **
699 03:04:33.201360 Couldn't find partition mmc 0
700 03:04:33.206337 Card did not respond to voltage select! : -110
701 03:04:33.212734 ** Bad device specification mmc 0 **
702 03:04:33.213260 Couldn't find partition mmc 0
703 03:04:33.216931 Error: could not access storage.
704 03:04:33.513386 Net: eth0: ethernet@ff3f0000
705 03:04:33.514034 starting USB...
706 03:04:33.758052 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 03:04:33.758679 Starting the controller
708 03:04:33.765013 USB XHCI 1.10
709 03:04:35.319182 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 03:04:35.327773 scanning usb for storage devices... 0 Storage Device(s) found
712 03:04:35.379407 Hit any key to stop autoboot: 1
713 03:04:35.380469 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 03:04:35.381105 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 03:04:35.381593 Setting prompt string to ['=>']
716 03:04:35.382075 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 03:04:35.393583 0
718 03:04:35.394508 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 03:04:35.495759 => setenv autoload no
721 03:04:35.496544 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 03:04:35.501655 setenv autoload no
724 03:04:35.603200 => setenv initrd_high 0xffffffff
725 03:04:35.603977 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 03:04:35.607827 setenv initrd_high 0xffffffff
728 03:04:35.709364 => setenv fdt_high 0xffffffff
729 03:04:35.710083 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 03:04:35.714922 setenv fdt_high 0xffffffff
732 03:04:35.816450 => dhcp
733 03:04:35.817213 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
734 03:04:35.821676 dhcp
735 03:04:36.777614 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 03:04:36.778222 Speed: 1000, full duplex
737 03:04:36.778624 BOOTP broadcast 1
738 03:04:37.025733 BOOTP broadcast 2
739 03:04:37.040506 DHCP client bound to address 192.168.6.21 (262 ms)
741 03:04:37.141965 => setenv serverip 192.168.6.2
742 03:04:37.142885 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
743 03:04:37.147493 setenv serverip 192.168.6.2
745 03:04:37.248958 => tftpboot 0x01080000 964653/tftp-deploy-fruo5ikp/kernel/uImage
746 03:04:37.249984 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
747 03:04:37.257046 tftpboot 0x01080000 964653/tftp-deploy-fruo5ikp/kernel/uImage
748 03:04:37.257647 Speed: 1000, full duplex
749 03:04:37.258074 Using ethernet@ff3f0000 device
750 03:04:37.262432 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
751 03:04:37.267745 Filename '964653/tftp-deploy-fruo5ikp/kernel/uImage'.
752 03:04:37.271735 Load address: 0x1080000
753 03:04:40.115800 Loading: *################################################## 43.6 MiB
754 03:04:40.116513 15.3 MiB/s
755 03:04:40.116963 done
756 03:04:40.120439 Bytes transferred = 45713984 (2b98a40 hex)
758 03:04:40.221936 => tftpboot 0x08000000 964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
759 03:04:40.222599 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
760 03:04:40.229328 tftpboot 0x08000000 964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot
761 03:04:40.229818 Speed: 1000, full duplex
762 03:04:40.230255 Using ethernet@ff3f0000 device
763 03:04:40.235005 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
764 03:04:40.244718 Filename '964653/tftp-deploy-fruo5ikp/ramdisk/ramdisk.cpio.gz.uboot'.
765 03:04:40.245252 Load address: 0x8000000
766 03:04:42.075606 Loading: *################################################# UDP wrong checksum 00000005 000045e7
767 03:04:44.270627 UDP wrong checksum 000000ff 00005864
768 03:04:44.311674 UDP wrong checksum 000000ff 0000e856
769 03:04:47.076493 T UDP wrong checksum 00000005 000045e7
770 03:04:57.078553 T T UDP wrong checksum 00000005 000045e7
771 03:05:02.974368 T UDP wrong checksum 000000ff 0000fdcf
772 03:05:03.031705 UDP wrong checksum 000000ff 00005649
773 03:05:04.369631 UDP wrong checksum 000000ff 0000cd44
774 03:05:04.411571 UDP wrong checksum 000000ff 00006837
775 03:05:08.480076 T UDP wrong checksum 000000ff 000052bc
776 03:05:08.492675 UDP wrong checksum 000000ff 0000dbae
777 03:05:09.208820 UDP wrong checksum 00000005 0000b279
778 03:05:17.082740 T T UDP wrong checksum 00000005 000045e7
779 03:05:37.087568 T T T
780 03:05:37.088215 Retry count exceeded; starting again
782 03:05:37.089635 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
785 03:05:37.091488 end: 2.4 uboot-commands (duration 00:01:21) [common]
787 03:05:37.092957 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
789 03:05:37.093961 end: 2 uboot-action (duration 00:01:21) [common]
791 03:05:37.095437 Cleaning after the job
792 03:05:37.095969 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/ramdisk
793 03:05:37.097245 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/kernel
794 03:05:37.143360 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/dtb
795 03:05:37.144155 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964653/tftp-deploy-fruo5ikp/modules
796 03:05:37.165013 start: 4.1 power-off (timeout 00:00:30) [common]
797 03:05:37.165655 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
798 03:05:37.199385 >> OK - accepted request
799 03:05:37.201268 Returned 0 in 0 seconds
800 03:05:37.302233 end: 4.1 power-off (duration 00:00:00) [common]
802 03:05:37.303183 start: 4.2 read-feedback (timeout 00:10:00) [common]
803 03:05:37.303833 Listened to connection for namespace 'common' for up to 1s
804 03:05:38.304818 Finalising connection for namespace 'common'
805 03:05:38.305557 Disconnecting from shell: Finalise
806 03:05:38.306079 =>
807 03:05:38.407110 end: 4.2 read-feedback (duration 00:00:01) [common]
808 03:05:38.407812 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964653
809 03:05:38.719832 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964653
810 03:05:38.720496 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.