Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:06:18.711936 lava-dispatcher, installed at version: 2024.01
2 03:06:18.712770 start: 0 validate
3 03:06:18.713254 Start time: 2024-11-09 03:06:18.713224+00:00 (UTC)
4 03:06:18.713791 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:06:18.714336 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:06:18.755902 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:06:18.756481 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:06:18.785751 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:06:18.786675 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:06:18.815379 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:06:18.815876 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:06:18.846848 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:06:18.847651 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:06:18.886161 validate duration: 0.17
16 03:06:18.887026 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:06:18.887360 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:06:18.887680 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:06:18.888293 Not decompressing ramdisk as can be used compressed.
20 03:06:18.888761 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 03:06:18.889052 saving as /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/ramdisk/initrd.cpio.gz
22 03:06:18.889334 total size: 5628182 (5 MB)
23 03:06:18.929319 progress 0 % (0 MB)
24 03:06:18.937072 progress 5 % (0 MB)
25 03:06:18.945198 progress 10 % (0 MB)
26 03:06:18.952509 progress 15 % (0 MB)
27 03:06:18.959458 progress 20 % (1 MB)
28 03:06:18.963713 progress 25 % (1 MB)
29 03:06:18.967939 progress 30 % (1 MB)
30 03:06:18.973096 progress 35 % (1 MB)
31 03:06:18.977958 progress 40 % (2 MB)
32 03:06:18.983058 progress 45 % (2 MB)
33 03:06:18.986854 progress 50 % (2 MB)
34 03:06:18.992763 progress 55 % (2 MB)
35 03:06:18.998583 progress 60 % (3 MB)
36 03:06:19.002646 progress 65 % (3 MB)
37 03:06:19.006840 progress 70 % (3 MB)
38 03:06:19.010827 progress 75 % (4 MB)
39 03:06:19.014961 progress 80 % (4 MB)
40 03:06:19.018713 progress 85 % (4 MB)
41 03:06:19.023460 progress 90 % (4 MB)
42 03:06:19.027491 progress 95 % (5 MB)
43 03:06:19.030889 progress 100 % (5 MB)
44 03:06:19.031628 5 MB downloaded in 0.14 s (37.72 MB/s)
45 03:06:19.032229 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:06:19.033160 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:06:19.033502 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:06:19.033825 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:06:19.034344 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/kernel/Image
51 03:06:19.034634 saving as /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/kernel/Image
52 03:06:19.034849 total size: 45713920 (43 MB)
53 03:06:19.035065 No compression specified
54 03:06:19.069135 progress 0 % (0 MB)
55 03:06:19.098344 progress 5 % (2 MB)
56 03:06:19.129367 progress 10 % (4 MB)
57 03:06:19.158272 progress 15 % (6 MB)
58 03:06:19.187270 progress 20 % (8 MB)
59 03:06:19.215481 progress 25 % (10 MB)
60 03:06:19.244207 progress 30 % (13 MB)
61 03:06:19.273959 progress 35 % (15 MB)
62 03:06:19.302568 progress 40 % (17 MB)
63 03:06:19.330899 progress 45 % (19 MB)
64 03:06:19.359646 progress 50 % (21 MB)
65 03:06:19.388387 progress 55 % (24 MB)
66 03:06:19.417333 progress 60 % (26 MB)
67 03:06:19.445603 progress 65 % (28 MB)
68 03:06:19.474719 progress 70 % (30 MB)
69 03:06:19.504087 progress 75 % (32 MB)
70 03:06:19.533371 progress 80 % (34 MB)
71 03:06:19.562384 progress 85 % (37 MB)
72 03:06:19.591572 progress 90 % (39 MB)
73 03:06:19.620788 progress 95 % (41 MB)
74 03:06:19.649471 progress 100 % (43 MB)
75 03:06:19.649984 43 MB downloaded in 0.62 s (70.87 MB/s)
76 03:06:19.650462 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:06:19.651289 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:06:19.651562 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:06:19.651827 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:06:19.652320 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:06:19.652571 saving as /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:06:19.652779 total size: 54703 (0 MB)
84 03:06:19.652989 No compression specified
85 03:06:19.694454 progress 59 % (0 MB)
86 03:06:19.695310 progress 100 % (0 MB)
87 03:06:19.695860 0 MB downloaded in 0.04 s (1.21 MB/s)
88 03:06:19.696382 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:06:19.697205 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:06:19.697471 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:06:19.697734 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:06:19.698190 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 03:06:19.698437 saving as /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/nfsrootfs/full.rootfs.tar
95 03:06:19.698643 total size: 107552908 (102 MB)
96 03:06:19.698853 Using unxz to decompress xz
97 03:06:19.737383 progress 0 % (0 MB)
98 03:06:20.383049 progress 5 % (5 MB)
99 03:06:21.105348 progress 10 % (10 MB)
100 03:06:21.827324 progress 15 % (15 MB)
101 03:06:22.582100 progress 20 % (20 MB)
102 03:06:23.152342 progress 25 % (25 MB)
103 03:06:23.772348 progress 30 % (30 MB)
104 03:06:24.507516 progress 35 % (35 MB)
105 03:06:24.868424 progress 40 % (41 MB)
106 03:06:25.290188 progress 45 % (46 MB)
107 03:06:26.001372 progress 50 % (51 MB)
108 03:06:26.693090 progress 55 % (56 MB)
109 03:06:27.455934 progress 60 % (61 MB)
110 03:06:28.216571 progress 65 % (66 MB)
111 03:06:28.948674 progress 70 % (71 MB)
112 03:06:29.713741 progress 75 % (76 MB)
113 03:06:30.396900 progress 80 % (82 MB)
114 03:06:31.104223 progress 85 % (87 MB)
115 03:06:31.840615 progress 90 % (92 MB)
116 03:06:32.557551 progress 95 % (97 MB)
117 03:06:33.299655 progress 100 % (102 MB)
118 03:06:33.311545 102 MB downloaded in 13.61 s (7.53 MB/s)
119 03:06:33.312826 end: 1.4.1 http-download (duration 00:00:14) [common]
121 03:06:33.316956 end: 1.4 download-retry (duration 00:00:14) [common]
122 03:06:33.318060 start: 1.5 download-retry (timeout 00:09:46) [common]
123 03:06:33.319090 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 03:06:33.320711 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/modules.tar.xz
125 03:06:33.321616 saving as /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/modules/modules.tar
126 03:06:33.322448 total size: 11612756 (11 MB)
127 03:06:33.323309 Using unxz to decompress xz
128 03:06:33.372999 progress 0 % (0 MB)
129 03:06:33.439619 progress 5 % (0 MB)
130 03:06:33.513955 progress 10 % (1 MB)
131 03:06:33.612769 progress 15 % (1 MB)
132 03:06:33.706121 progress 20 % (2 MB)
133 03:06:33.786138 progress 25 % (2 MB)
134 03:06:33.872064 progress 30 % (3 MB)
135 03:06:33.947965 progress 35 % (3 MB)
136 03:06:34.020741 progress 40 % (4 MB)
137 03:06:34.096912 progress 45 % (5 MB)
138 03:06:34.181303 progress 50 % (5 MB)
139 03:06:34.258438 progress 55 % (6 MB)
140 03:06:34.344461 progress 60 % (6 MB)
141 03:06:34.425294 progress 65 % (7 MB)
142 03:06:34.506313 progress 70 % (7 MB)
143 03:06:34.585584 progress 75 % (8 MB)
144 03:06:34.669737 progress 80 % (8 MB)
145 03:06:34.749994 progress 85 % (9 MB)
146 03:06:34.830783 progress 90 % (9 MB)
147 03:06:34.908976 progress 95 % (10 MB)
148 03:06:34.986271 progress 100 % (11 MB)
149 03:06:34.998234 11 MB downloaded in 1.68 s (6.61 MB/s)
150 03:06:34.998831 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:06:34.999676 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:06:34.999947 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 03:06:35.000576 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 03:06:45.263835 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964661/extract-nfsrootfs-k2rrr2s0
156 03:06:45.264463 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 03:06:45.264756 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 03:06:45.265398 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd
159 03:06:45.265863 makedir: /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin
160 03:06:45.266204 makedir: /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/tests
161 03:06:45.266529 makedir: /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/results
162 03:06:45.266870 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-add-keys
163 03:06:45.267432 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-add-sources
164 03:06:45.268326 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-background-process-start
165 03:06:45.268886 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-background-process-stop
166 03:06:45.269437 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-common-functions
167 03:06:45.269962 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-echo-ipv4
168 03:06:45.270466 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-install-packages
169 03:06:45.271065 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-installed-packages
170 03:06:45.271561 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-os-build
171 03:06:45.272208 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-probe-channel
172 03:06:45.272745 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-probe-ip
173 03:06:45.273341 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-target-ip
174 03:06:45.273855 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-target-mac
175 03:06:45.274352 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-target-storage
176 03:06:45.274852 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-case
177 03:06:45.275339 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-event
178 03:06:45.275848 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-feedback
179 03:06:45.276396 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-raise
180 03:06:45.276888 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-reference
181 03:06:45.277380 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-runner
182 03:06:45.277869 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-set
183 03:06:45.278342 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-test-shell
184 03:06:45.278828 Updating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-install-packages (oe)
185 03:06:45.279367 Updating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/bin/lava-installed-packages (oe)
186 03:06:45.279819 Creating /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/environment
187 03:06:45.280256 LAVA metadata
188 03:06:45.280524 - LAVA_JOB_ID=964661
189 03:06:45.280741 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:06:45.281116 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 03:06:45.282159 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:06:45.282478 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 03:06:45.282688 skipped lava-vland-overlay
194 03:06:45.282928 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:06:45.283182 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 03:06:45.283402 skipped lava-multinode-overlay
197 03:06:45.283644 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:06:45.283895 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 03:06:45.284173 Loading test definitions
200 03:06:45.284456 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 03:06:45.284678 Using /lava-964661 at stage 0
202 03:06:45.285881 uuid=964661_1.6.2.4.1 testdef=None
203 03:06:45.286185 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:06:45.286445 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 03:06:45.288291 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:06:45.289086 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 03:06:45.291415 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:06:45.292266 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 03:06:45.294521 runner path: /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/0/tests/0_dmesg test_uuid 964661_1.6.2.4.1
212 03:06:45.295080 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:06:45.295834 Creating lava-test-runner.conf files
215 03:06:45.296057 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964661/lava-overlay-8ydqiczd/lava-964661/0 for stage 0
216 03:06:45.296410 - 0_dmesg
217 03:06:45.296756 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:06:45.297030 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 03:06:45.319724 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:06:45.320165 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 03:06:45.320431 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:06:45.320699 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:06:45.320961 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 03:06:45.969602 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:06:45.970074 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 03:06:45.970321 extracting modules file /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964661/extract-nfsrootfs-k2rrr2s0
227 03:06:47.664841 extracting modules file /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk
228 03:06:49.124292 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:06:49.124778 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 03:06:49.125054 [common] Applying overlay to NFS
231 03:06:49.125266 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964661/compress-overlay-hyftcikd/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964661/extract-nfsrootfs-k2rrr2s0
232 03:06:49.154796 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:06:49.155201 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 03:06:49.155473 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 03:06:49.155703 Converting downloaded kernel to a uImage
236 03:06:49.156036 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/kernel/Image /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/kernel/uImage
237 03:06:49.606737 output: Image Name:
238 03:06:49.607165 output: Created: Sat Nov 9 03:06:49 2024
239 03:06:49.607380 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:06:49.607584 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 03:06:49.607787 output: Load Address: 01080000
242 03:06:49.608021 output: Entry Point: 01080000
243 03:06:49.608230 output:
244 03:06:49.608565 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 03:06:49.608831 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 03:06:49.609102 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 03:06:49.609355 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:06:49.609614 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 03:06:49.609869 Building ramdisk /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk
250 03:06:51.853592 >> 166792 blocks
251 03:06:59.532166 Adding RAMdisk u-boot header.
252 03:06:59.532840 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk.cpio.gz.uboot
253 03:06:59.798007 output: Image Name:
254 03:06:59.798439 output: Created: Sat Nov 9 03:06:59 2024
255 03:06:59.798654 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:06:59.798863 output: Data Size: 23432953 Bytes = 22883.74 KiB = 22.35 MiB
257 03:06:59.799066 output: Load Address: 00000000
258 03:06:59.799266 output: Entry Point: 00000000
259 03:06:59.799463 output:
260 03:06:59.800264 rename /var/lib/lava/dispatcher/tmp/964661/extract-overlay-ramdisk-qyfs5ryh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
261 03:06:59.801090 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 03:06:59.801702 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 03:06:59.802282 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 03:06:59.802791 No LXC device requested
265 03:06:59.803346 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:06:59.803913 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 03:06:59.804508 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:06:59.804969 Checking files for TFTP limit of 4294967296 bytes.
269 03:06:59.807908 end: 1 tftp-deploy (duration 00:00:41) [common]
270 03:06:59.808608 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:06:59.809193 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:06:59.809743 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:06:59.810294 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:06:59.810881 Using kernel file from prepare-kernel: 964661/tftp-deploy-96spojqc/kernel/uImage
275 03:06:59.811576 substitutions:
276 03:06:59.812056 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:06:59.812509 - {DTB_ADDR}: 0x01070000
278 03:06:59.812948 - {DTB}: 964661/tftp-deploy-96spojqc/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:06:59.813387 - {INITRD}: 964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
280 03:06:59.813823 - {KERNEL_ADDR}: 0x01080000
281 03:06:59.814257 - {KERNEL}: 964661/tftp-deploy-96spojqc/kernel/uImage
282 03:06:59.814693 - {LAVA_MAC}: None
283 03:06:59.815170 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964661/extract-nfsrootfs-k2rrr2s0
284 03:06:59.815624 - {NFS_SERVER_IP}: 192.168.6.2
285 03:06:59.816213 - {PRESEED_CONFIG}: None
286 03:06:59.816684 - {PRESEED_LOCAL}: None
287 03:06:59.817117 - {RAMDISK_ADDR}: 0x08000000
288 03:06:59.817545 - {RAMDISK}: 964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
289 03:06:59.817978 - {ROOT_PART}: None
290 03:06:59.818407 - {ROOT}: None
291 03:06:59.818838 - {SERVER_IP}: 192.168.6.2
292 03:06:59.819266 - {TEE_ADDR}: 0x83000000
293 03:06:59.819699 - {TEE}: None
294 03:06:59.820163 Parsed boot commands:
295 03:06:59.820586 - setenv autoload no
296 03:06:59.821013 - setenv initrd_high 0xffffffff
297 03:06:59.821440 - setenv fdt_high 0xffffffff
298 03:06:59.821865 - dhcp
299 03:06:59.822290 - setenv serverip 192.168.6.2
300 03:06:59.822714 - tftpboot 0x01080000 964661/tftp-deploy-96spojqc/kernel/uImage
301 03:06:59.823141 - tftpboot 0x08000000 964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
302 03:06:59.823567 - tftpboot 0x01070000 964661/tftp-deploy-96spojqc/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:06:59.824011 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964661/extract-nfsrootfs-k2rrr2s0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:06:59.824458 - bootm 0x01080000 0x08000000 0x01070000
305 03:06:59.825037 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:06:59.826685 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:06:59.827150 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:06:59.842273 Setting prompt string to ['lava-test: # ']
310 03:06:59.843867 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:06:59.844601 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:06:59.845218 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:06:59.845800 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:06:59.847040 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:06:59.889033 >> OK - accepted request
316 03:06:59.891205 Returned 0 in 0 seconds
317 03:06:59.992386 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:06:59.994120 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:06:59.994751 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:06:59.995311 Setting prompt string to ['Hit any key to stop autoboot']
322 03:06:59.995816 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:06:59.997581 Trying 192.168.56.21...
324 03:06:59.998103 Connected to conserv1.
325 03:06:59.998556 Escape character is '^]'.
326 03:06:59.999014
327 03:06:59.999475 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 03:06:59.999930
329 03:07:11.092146 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:07:11.092803 bl2_stage_init 0x01
331 03:07:11.093270 bl2_stage_init 0x81
332 03:07:11.097700 hw id: 0x0000 - pwm id 0x01
333 03:07:11.098191 bl2_stage_init 0xc1
334 03:07:11.098627 bl2_stage_init 0x02
335 03:07:11.099058
336 03:07:11.103399 L0:00000000
337 03:07:11.103866 L1:20000703
338 03:07:11.104338 L2:00008067
339 03:07:11.104782 L3:14000000
340 03:07:11.108891 B2:00402000
341 03:07:11.109354 B1:e0f83180
342 03:07:11.109806
343 03:07:11.110238 TE: 58124
344 03:07:11.110670
345 03:07:11.114457 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:07:11.114921
347 03:07:11.115351 Board ID = 1
348 03:07:11.120091 Set A53 clk to 24M
349 03:07:11.120552 Set A73 clk to 24M
350 03:07:11.120981 Set clk81 to 24M
351 03:07:11.125678 A53 clk: 1200 MHz
352 03:07:11.126130 A73 clk: 1200 MHz
353 03:07:11.126557 CLK81: 166.6M
354 03:07:11.126981 smccc: 00012a92
355 03:07:11.131245 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:07:11.136873 board id: 1
357 03:07:11.142763 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:07:11.153481 fw parse done
359 03:07:11.159475 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:07:11.202038 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:07:11.212913 PIEI prepare done
362 03:07:11.213368 fastboot data load
363 03:07:11.213801 fastboot data verify
364 03:07:11.218654 verify result: 266
365 03:07:11.224284 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:07:11.224752 LPDDR4 probe
367 03:07:11.225183 ddr clk to 1584MHz
368 03:07:11.232221 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:07:11.269436
370 03:07:11.269896 dmc_version 0001
371 03:07:11.276109 Check phy result
372 03:07:11.281979 INFO : End of CA training
373 03:07:11.282432 INFO : End of initialization
374 03:07:11.287575 INFO : Training has run successfully!
375 03:07:11.288074 Check phy result
376 03:07:11.293164 INFO : End of initialization
377 03:07:11.293618 INFO : End of read enable training
378 03:07:11.296509 INFO : End of fine write leveling
379 03:07:11.302100 INFO : End of Write leveling coarse delay
380 03:07:11.307680 INFO : Training has run successfully!
381 03:07:11.308159 Check phy result
382 03:07:11.308590 INFO : End of initialization
383 03:07:11.313277 INFO : End of read dq deskew training
384 03:07:11.318903 INFO : End of MPR read delay center optimization
385 03:07:11.319368 INFO : End of write delay center optimization
386 03:07:11.324493 INFO : End of read delay center optimization
387 03:07:11.330102 INFO : End of max read latency training
388 03:07:11.330559 INFO : Training has run successfully!
389 03:07:11.335709 1D training succeed
390 03:07:11.341620 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:07:11.389122 Check phy result
392 03:07:11.389598 INFO : End of initialization
393 03:07:11.411717 INFO : End of 2D read delay Voltage center optimization
394 03:07:11.431947 INFO : End of 2D read delay Voltage center optimization
395 03:07:11.484046 INFO : End of 2D write delay Voltage center optimization
396 03:07:11.533348 INFO : End of 2D write delay Voltage center optimization
397 03:07:11.538957 INFO : Training has run successfully!
398 03:07:11.539437
399 03:07:11.539881 channel==0
400 03:07:11.544570 RxClkDly_Margin_A0==88 ps 9
401 03:07:11.545035 TxDqDly_Margin_A0==98 ps 10
402 03:07:11.547780 RxClkDly_Margin_A1==88 ps 9
403 03:07:11.548280 TxDqDly_Margin_A1==98 ps 10
404 03:07:11.553403 TrainedVREFDQ_A0==74
405 03:07:11.553872 TrainedVREFDQ_A1==74
406 03:07:11.558903 VrefDac_Margin_A0==25
407 03:07:11.559361 DeviceVref_Margin_A0==40
408 03:07:11.559789 VrefDac_Margin_A1==25
409 03:07:11.564579 DeviceVref_Margin_A1==40
410 03:07:11.565035
411 03:07:11.565472
412 03:07:11.565910 channel==1
413 03:07:11.566338 RxClkDly_Margin_A0==98 ps 10
414 03:07:11.570169 TxDqDly_Margin_A0==98 ps 10
415 03:07:11.570631 RxClkDly_Margin_A1==98 ps 10
416 03:07:11.575753 TxDqDly_Margin_A1==88 ps 9
417 03:07:11.576250 TrainedVREFDQ_A0==77
418 03:07:11.576688 TrainedVREFDQ_A1==77
419 03:07:11.581431 VrefDac_Margin_A0==22
420 03:07:11.581899 DeviceVref_Margin_A0==37
421 03:07:11.586942 VrefDac_Margin_A1==22
422 03:07:11.587396 DeviceVref_Margin_A1==37
423 03:07:11.587825
424 03:07:11.592584 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:07:11.593042
426 03:07:11.620530 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 03:07:11.626250 2D training succeed
428 03:07:11.631715 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:07:11.632207 auto size-- 65535DDR cs0 size: 2048MB
430 03:07:11.637329 DDR cs1 size: 2048MB
431 03:07:11.637786 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:07:11.643004 cs0 DataBus test pass
433 03:07:11.643465 cs1 DataBus test pass
434 03:07:11.643895 cs0 AddrBus test pass
435 03:07:11.648538 cs1 AddrBus test pass
436 03:07:11.648995
437 03:07:11.649426 100bdlr_step_size ps== 420
438 03:07:11.649862 result report
439 03:07:11.654161 boot times 0Enable ddr reg access
440 03:07:11.661979 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:07:11.675464 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:07:12.249028 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:07:12.249650 MVN_1=0x00000000
444 03:07:12.254563 MVN_2=0x00000000
445 03:07:12.260300 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:07:12.260772 OPS=0x10
447 03:07:12.261229 ring efuse init
448 03:07:12.261674 chipver efuse init
449 03:07:12.268553 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:07:12.269042 [0.018961 Inits done]
451 03:07:12.276103 secure task start!
452 03:07:12.276579 high task start!
453 03:07:12.277025 low task start!
454 03:07:12.277469 run into bl31
455 03:07:12.282724 NOTICE: BL31: v1.3(release):4fc40b1
456 03:07:12.290658 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:07:12.291154 NOTICE: BL31: G12A normal boot!
458 03:07:12.316641 NOTICE: BL31: BL33 decompress pass
459 03:07:12.321282 ERROR: Error initializing runtime service opteed_fast
460 03:07:13.555265
461 03:07:13.555900
462 03:07:13.563652 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:07:13.564184
464 03:07:13.564643 Model: Libre Computer AML-A311D-CC Alta
465 03:07:13.772161 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:07:13.795453 DRAM: 2 GiB (effective 3.8 GiB)
467 03:07:13.938378 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:07:13.944293 WDT: Not starting watchdog@f0d0
469 03:07:13.976534 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:07:13.989028 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:07:13.994110 ** Bad device specification mmc 0 **
472 03:07:14.004338 Card did not respond to voltage select! : -110
473 03:07:14.012183 ** Bad device specification mmc 0 **
474 03:07:14.012661 Couldn't find partition mmc 0
475 03:07:14.020345 Card did not respond to voltage select! : -110
476 03:07:14.025866 ** Bad device specification mmc 0 **
477 03:07:14.026409 Couldn't find partition mmc 0
478 03:07:14.031008 Error: could not access storage.
479 03:07:15.293056 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 03:07:15.293660 bl2_stage_init 0x01
481 03:07:15.294124 bl2_stage_init 0x81
482 03:07:15.298501 hw id: 0x0000 - pwm id 0x01
483 03:07:15.298995 bl2_stage_init 0xc1
484 03:07:15.299448 bl2_stage_init 0x02
485 03:07:15.299893
486 03:07:15.304143 L0:00000000
487 03:07:15.304617 L1:20000703
488 03:07:15.305069 L2:00008067
489 03:07:15.305510 L3:14000000
490 03:07:15.307125 B2:00402000
491 03:07:15.307595 B1:e0f83180
492 03:07:15.308066
493 03:07:15.308519 TE: 58167
494 03:07:15.308963
495 03:07:15.318099 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 03:07:15.318580
497 03:07:15.319031 Board ID = 1
498 03:07:15.319474 Set A53 clk to 24M
499 03:07:15.319910 Set A73 clk to 24M
500 03:07:15.323735 Set clk81 to 24M
501 03:07:15.324272 A53 clk: 1200 MHz
502 03:07:15.324699 A73 clk: 1200 MHz
503 03:07:15.327493 CLK81: 166.6M
504 03:07:15.327928 smccc: 00012abe
505 03:07:15.333116 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 03:07:15.333557 board id: 1
507 03:07:15.342516 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 03:07:15.353911 fw parse done
509 03:07:15.358881 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 03:07:15.401515 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 03:07:15.413473 PIEI prepare done
512 03:07:15.413954 fastboot data load
513 03:07:15.414389 fastboot data verify
514 03:07:15.419077 verify result: 266
515 03:07:15.424585 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 03:07:15.425032 LPDDR4 probe
517 03:07:15.425451 ddr clk to 1584MHz
518 03:07:15.432539 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 03:07:15.469808
520 03:07:15.470275 dmc_version 0001
521 03:07:15.476517 Check phy result
522 03:07:15.482368 INFO : End of CA training
523 03:07:15.482811 INFO : End of initialization
524 03:07:15.488071 INFO : Training has run successfully!
525 03:07:15.488527 Check phy result
526 03:07:15.493631 INFO : End of initialization
527 03:07:15.494074 INFO : End of read enable training
528 03:07:15.499184 INFO : End of fine write leveling
529 03:07:15.504768 INFO : End of Write leveling coarse delay
530 03:07:15.505223 INFO : Training has run successfully!
531 03:07:15.505645 Check phy result
532 03:07:15.510389 INFO : End of initialization
533 03:07:15.510839 INFO : End of read dq deskew training
534 03:07:15.516075 INFO : End of MPR read delay center optimization
535 03:07:15.521541 INFO : End of write delay center optimization
536 03:07:15.527192 INFO : End of read delay center optimization
537 03:07:15.527650 INFO : End of max read latency training
538 03:07:15.532775 INFO : Training has run successfully!
539 03:07:15.533232 1D training succeed
540 03:07:15.542101 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 03:07:15.589634 Check phy result
542 03:07:15.590287 INFO : End of initialization
543 03:07:15.612337 INFO : End of 2D read delay Voltage center optimization
544 03:07:15.631643 INFO : End of 2D read delay Voltage center optimization
545 03:07:15.683608 INFO : End of 2D write delay Voltage center optimization
546 03:07:15.732955 INFO : End of 2D write delay Voltage center optimization
547 03:07:15.738592 INFO : Training has run successfully!
548 03:07:15.739159
549 03:07:15.739641 channel==0
550 03:07:15.744265 RxClkDly_Margin_A0==88 ps 9
551 03:07:15.744829 TxDqDly_Margin_A0==98 ps 10
552 03:07:15.749746 RxClkDly_Margin_A1==88 ps 9
553 03:07:15.750313 TxDqDly_Margin_A1==98 ps 10
554 03:07:15.750795 TrainedVREFDQ_A0==74
555 03:07:15.755351 TrainedVREFDQ_A1==74
556 03:07:15.755926 VrefDac_Margin_A0==24
557 03:07:15.756438 DeviceVref_Margin_A0==40
558 03:07:15.760968 VrefDac_Margin_A1==24
559 03:07:15.761537 DeviceVref_Margin_A1==40
560 03:07:15.762013
561 03:07:15.762472
562 03:07:15.766553 channel==1
563 03:07:15.767132 RxClkDly_Margin_A0==98 ps 10
564 03:07:15.767663 TxDqDly_Margin_A0==98 ps 10
565 03:07:15.772277 RxClkDly_Margin_A1==88 ps 9
566 03:07:15.772836 TxDqDly_Margin_A1==98 ps 10
567 03:07:15.777787 TrainedVREFDQ_A0==77
568 03:07:15.778343 TrainedVREFDQ_A1==77
569 03:07:15.778814 VrefDac_Margin_A0==23
570 03:07:15.783366 DeviceVref_Margin_A0==37
571 03:07:15.783911 VrefDac_Margin_A1==24
572 03:07:15.788986 DeviceVref_Margin_A1==37
573 03:07:15.789530
574 03:07:15.790001 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 03:07:15.794604
576 03:07:15.822524 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000019 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
577 03:07:15.823132 2D training succeed
578 03:07:15.828203 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 03:07:15.833767 auto size-- 65535DDR cs0 size: 2048MB
580 03:07:15.834327 DDR cs1 size: 2048MB
581 03:07:15.839365 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 03:07:15.839919 cs0 DataBus test pass
583 03:07:15.844995 cs1 DataBus test pass
584 03:07:15.845545 cs0 AddrBus test pass
585 03:07:15.846008 cs1 AddrBus test pass
586 03:07:15.846460
587 03:07:15.850567 100bdlr_step_size ps== 420
588 03:07:15.851135 result report
589 03:07:15.856288 boot times 0Enable ddr reg access
590 03:07:15.861581 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 03:07:15.875084 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 03:07:16.448722 0.0;M3 CHK:0;cm4_sp_mode 0
593 03:07:16.449389 MVN_1=0x00000000
594 03:07:16.454250 MVN_2=0x00000000
595 03:07:16.460050 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 03:07:16.460626 OPS=0x10
597 03:07:16.461101 ring efuse init
598 03:07:16.461589 chipver efuse init
599 03:07:16.465624 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 03:07:16.471164 [0.018961 Inits done]
601 03:07:16.471707 secure task start!
602 03:07:16.472193 high task start!
603 03:07:16.475710 low task start!
604 03:07:16.476259 run into bl31
605 03:07:16.482362 NOTICE: BL31: v1.3(release):4fc40b1
606 03:07:16.490331 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 03:07:16.490909 NOTICE: BL31: G12A normal boot!
608 03:07:16.515562 NOTICE: BL31: BL33 decompress pass
609 03:07:16.521303 ERROR: Error initializing runtime service opteed_fast
610 03:07:17.754050
611 03:07:17.754730
612 03:07:17.762553 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 03:07:17.763097
614 03:07:17.763575 Model: Libre Computer AML-A311D-CC Alta
615 03:07:17.970907 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 03:07:17.994382 DRAM: 2 GiB (effective 3.8 GiB)
617 03:07:18.137361 Core: 408 devices, 31 uclasses, devicetree: separate
618 03:07:18.143251 WDT: Not starting watchdog@f0d0
619 03:07:18.175419 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 03:07:18.187930 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 03:07:18.192950 ** Bad device specification mmc 0 **
622 03:07:18.203237 Card did not respond to voltage select! : -110
623 03:07:18.210926 ** Bad device specification mmc 0 **
624 03:07:18.211481 Couldn't find partition mmc 0
625 03:07:18.219243 Card did not respond to voltage select! : -110
626 03:07:18.224738 ** Bad device specification mmc 0 **
627 03:07:18.225282 Couldn't find partition mmc 0
628 03:07:18.229781 Error: could not access storage.
629 03:07:18.572247 Net: eth0: ethernet@ff3f0000
630 03:07:18.572681 starting USB...
631 03:07:18.824113 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 03:07:18.824766 Starting the controller
633 03:07:18.831089 USB XHCI 1.10
634 03:07:20.543107 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 03:07:20.543575 bl2_stage_init 0x01
636 03:07:20.543871 bl2_stage_init 0x81
637 03:07:20.548427 hw id: 0x0000 - pwm id 0x01
638 03:07:20.548884 bl2_stage_init 0xc1
639 03:07:20.549153 bl2_stage_init 0x02
640 03:07:20.549392
641 03:07:20.553950 L0:00000000
642 03:07:20.554391 L1:20000703
643 03:07:20.554640 L2:00008067
644 03:07:20.554881 L3:14000000
645 03:07:20.556937 B2:00402000
646 03:07:20.557471 B1:e0f83180
647 03:07:20.557850
648 03:07:20.558112 TE: 58124
649 03:07:20.558341
650 03:07:20.568116 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 03:07:20.568556
652 03:07:20.568793 Board ID = 1
653 03:07:20.569018 Set A53 clk to 24M
654 03:07:20.569234 Set A73 clk to 24M
655 03:07:20.573683 Set clk81 to 24M
656 03:07:20.574342 A53 clk: 1200 MHz
657 03:07:20.574752 A73 clk: 1200 MHz
658 03:07:20.577178 CLK81: 166.6M
659 03:07:20.577585 smccc: 00012a92
660 03:07:20.583110 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 03:07:20.590530 board id: 1
662 03:07:20.592876 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 03:07:20.604069 fw parse done
664 03:07:20.610255 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 03:07:20.652696 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 03:07:20.664111 PIEI prepare done
667 03:07:20.664845 fastboot data load
668 03:07:20.665231 fastboot data verify
669 03:07:20.669187 verify result: 266
670 03:07:20.674990 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 03:07:20.675677 LPDDR4 probe
672 03:07:20.676248 ddr clk to 1584MHz
673 03:07:20.682933 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 03:07:20.720178
675 03:07:20.720892 dmc_version 0001
676 03:07:20.726853 Check phy result
677 03:07:20.732718 INFO : End of CA training
678 03:07:20.733416 INFO : End of initialization
679 03:07:20.738282 INFO : Training has run successfully!
680 03:07:20.738689 Check phy result
681 03:07:20.743951 INFO : End of initialization
682 03:07:20.744550 INFO : End of read enable training
683 03:07:20.747145 INFO : End of fine write leveling
684 03:07:20.752802 INFO : End of Write leveling coarse delay
685 03:07:20.758331 INFO : Training has run successfully!
686 03:07:20.758902 Check phy result
687 03:07:20.759367 INFO : End of initialization
688 03:07:20.764022 INFO : End of read dq deskew training
689 03:07:20.769590 INFO : End of MPR read delay center optimization
690 03:07:20.770174 INFO : End of write delay center optimization
691 03:07:20.775100 INFO : End of read delay center optimization
692 03:07:20.780825 INFO : End of max read latency training
693 03:07:20.781400 INFO : Training has run successfully!
694 03:07:20.786479 1D training succeed
695 03:07:20.791480 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 03:07:20.839831 Check phy result
697 03:07:20.840462 INFO : End of initialization
698 03:07:20.864698 INFO : End of 2D read delay Voltage center optimization
699 03:07:20.881787 INFO : End of 2D read delay Voltage center optimization
700 03:07:20.933939 INFO : End of 2D write delay Voltage center optimization
701 03:07:20.983235 INFO : End of 2D write delay Voltage center optimization
702 03:07:20.988785 INFO : Training has run successfully!
703 03:07:20.989355
704 03:07:20.989827 channel==0
705 03:07:20.994433 RxClkDly_Margin_A0==88 ps 9
706 03:07:20.994971 TxDqDly_Margin_A0==98 ps 10
707 03:07:21.000056 RxClkDly_Margin_A1==78 ps 8
708 03:07:21.000600 TxDqDly_Margin_A1==98 ps 10
709 03:07:21.001064 TrainedVREFDQ_A0==74
710 03:07:21.005630 TrainedVREFDQ_A1==74
711 03:07:21.006163 VrefDac_Margin_A0==25
712 03:07:21.006620 DeviceVref_Margin_A0==40
713 03:07:21.011200 VrefDac_Margin_A1==25
714 03:07:21.011728 DeviceVref_Margin_A1==40
715 03:07:21.012231
716 03:07:21.012691
717 03:07:21.016880 channel==1
718 03:07:21.017424 RxClkDly_Margin_A0==98 ps 10
719 03:07:21.017887 TxDqDly_Margin_A0==98 ps 10
720 03:07:21.022512 RxClkDly_Margin_A1==98 ps 10
721 03:07:21.023055 TxDqDly_Margin_A1==98 ps 10
722 03:07:21.027962 TrainedVREFDQ_A0==77
723 03:07:21.028550 TrainedVREFDQ_A1==78
724 03:07:21.029012 VrefDac_Margin_A0==22
725 03:07:21.033526 DeviceVref_Margin_A0==37
726 03:07:21.034071 VrefDac_Margin_A1==22
727 03:07:21.039144 DeviceVref_Margin_A1==36
728 03:07:21.039679
729 03:07:21.040180 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 03:07:21.044714
731 03:07:21.072663 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 03:07:21.073288 2D training succeed
733 03:07:21.078304 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 03:07:21.083970 auto size-- 65535DDR cs0 size: 2048MB
735 03:07:21.084553 DDR cs1 size: 2048MB
736 03:07:21.089595 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 03:07:21.090158 cs0 DataBus test pass
738 03:07:21.095123 cs1 DataBus test pass
739 03:07:21.095651 cs0 AddrBus test pass
740 03:07:21.096147 cs1 AddrBus test pass
741 03:07:21.096605
742 03:07:21.100726 100bdlr_step_size ps== 420
743 03:07:21.101276 result report
744 03:07:21.106297 boot times 0Enable ddr reg access
745 03:07:21.111961 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 03:07:21.125384 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 03:07:21.698760 0.0;M3 CHK:0;cm4_sp_mode 0
748 03:07:21.699194 MVN_1=0x00000000
749 03:07:21.704316 MVN_2=0x00000000
750 03:07:21.710118 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 03:07:21.710445 OPS=0x10
752 03:07:21.710661 ring efuse init
753 03:07:21.710866 chipver efuse init
754 03:07:21.718440 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 03:07:21.718933 [0.018961 Inits done]
756 03:07:21.719278 secure task start!
757 03:07:21.725899 high task start!
758 03:07:21.726345 low task start!
759 03:07:21.726681 run into bl31
760 03:07:21.732585 NOTICE: BL31: v1.3(release):4fc40b1
761 03:07:21.740344 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 03:07:21.740696 NOTICE: BL31: G12A normal boot!
763 03:07:21.765754 NOTICE: BL31: BL33 decompress pass
764 03:07:21.771458 ERROR: Error initializing runtime service opteed_fast
765 03:07:23.004253
766 03:07:23.004880
767 03:07:23.012638 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 03:07:23.013100
769 03:07:23.013446 Model: Libre Computer AML-A311D-CC Alta
770 03:07:23.221117 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 03:07:23.244455 DRAM: 2 GiB (effective 3.8 GiB)
772 03:07:23.387488 Core: 408 devices, 31 uclasses, devicetree: separate
773 03:07:23.393346 WDT: Not starting watchdog@f0d0
774 03:07:23.425637 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 03:07:23.438112 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 03:07:23.443041 ** Bad device specification mmc 0 **
777 03:07:23.453428 Card did not respond to voltage select! : -110
778 03:07:23.461155 ** Bad device specification mmc 0 **
779 03:07:23.461770 Couldn't find partition mmc 0
780 03:07:23.469573 Card did not respond to voltage select! : -110
781 03:07:23.474912 ** Bad device specification mmc 0 **
782 03:07:23.475505 Couldn't find partition mmc 0
783 03:07:23.479977 Error: could not access storage.
784 03:07:23.822496 Net: eth0: ethernet@ff3f0000
785 03:07:23.823172 starting USB...
786 03:07:24.074342 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 03:07:24.075012 Starting the controller
788 03:07:24.081314 USB XHCI 1.10
789 03:07:26.242783 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 03:07:26.243446 bl2_stage_init 0x01
791 03:07:26.243915 bl2_stage_init 0x81
792 03:07:26.248324 hw id: 0x0000 - pwm id 0x01
793 03:07:26.248854 bl2_stage_init 0xc1
794 03:07:26.249317 bl2_stage_init 0x02
795 03:07:26.249766
796 03:07:26.254064 L0:00000000
797 03:07:26.254578 L1:20000703
798 03:07:26.255037 L2:00008067
799 03:07:26.255481 L3:14000000
800 03:07:26.259643 B2:00402000
801 03:07:26.260201 B1:e0f83180
802 03:07:26.260661
803 03:07:26.261115 TE: 58159
804 03:07:26.261562
805 03:07:26.265196 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 03:07:26.265721
807 03:07:26.266179 Board ID = 1
808 03:07:26.270875 Set A53 clk to 24M
809 03:07:26.271390 Set A73 clk to 24M
810 03:07:26.271843 Set clk81 to 24M
811 03:07:26.276425 A53 clk: 1200 MHz
812 03:07:26.276938 A73 clk: 1200 MHz
813 03:07:26.277384 CLK81: 166.6M
814 03:07:26.277825 smccc: 00012ab5
815 03:07:26.281942 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 03:07:26.287837 board id: 1
817 03:07:26.293531 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 03:07:26.304214 fw parse done
819 03:07:26.310061 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 03:07:26.352611 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 03:07:26.363579 PIEI prepare done
822 03:07:26.364155 fastboot data load
823 03:07:26.364627 fastboot data verify
824 03:07:26.369134 verify result: 266
825 03:07:26.374822 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 03:07:26.375361 LPDDR4 probe
827 03:07:26.375811 ddr clk to 1584MHz
828 03:07:26.382815 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 03:07:26.420086
830 03:07:26.420658 dmc_version 0001
831 03:07:26.426758 Check phy result
832 03:07:26.432659 INFO : End of CA training
833 03:07:26.433178 INFO : End of initialization
834 03:07:26.438227 INFO : Training has run successfully!
835 03:07:26.438736 Check phy result
836 03:07:26.443809 INFO : End of initialization
837 03:07:26.444396 INFO : End of read enable training
838 03:07:26.449444 INFO : End of fine write leveling
839 03:07:26.454982 INFO : End of Write leveling coarse delay
840 03:07:26.455504 INFO : Training has run successfully!
841 03:07:26.455960 Check phy result
842 03:07:26.460715 INFO : End of initialization
843 03:07:26.461235 INFO : End of read dq deskew training
844 03:07:26.466138 INFO : End of MPR read delay center optimization
845 03:07:26.471768 INFO : End of write delay center optimization
846 03:07:26.477373 INFO : End of read delay center optimization
847 03:07:26.477891 INFO : End of max read latency training
848 03:07:26.482927 INFO : Training has run successfully!
849 03:07:26.483446 1D training succeed
850 03:07:26.492184 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 03:07:26.539837 Check phy result
852 03:07:26.540462 INFO : End of initialization
853 03:07:26.561409 INFO : End of 2D read delay Voltage center optimization
854 03:07:26.581804 INFO : End of 2D read delay Voltage center optimization
855 03:07:26.633770 INFO : End of 2D write delay Voltage center optimization
856 03:07:26.683069 INFO : End of 2D write delay Voltage center optimization
857 03:07:26.688750 INFO : Training has run successfully!
858 03:07:26.689265
859 03:07:26.689724 channel==0
860 03:07:26.694267 RxClkDly_Margin_A0==88 ps 9
861 03:07:26.694774 TxDqDly_Margin_A0==98 ps 10
862 03:07:26.699850 RxClkDly_Margin_A1==88 ps 9
863 03:07:26.700391 TxDqDly_Margin_A1==98 ps 10
864 03:07:26.700863 TrainedVREFDQ_A0==74
865 03:07:26.705491 TrainedVREFDQ_A1==74
866 03:07:26.706032 VrefDac_Margin_A0==25
867 03:07:26.706485 DeviceVref_Margin_A0==40
868 03:07:26.711095 VrefDac_Margin_A1==25
869 03:07:26.711632 DeviceVref_Margin_A1==40
870 03:07:26.712105
871 03:07:26.712541
872 03:07:26.716716 channel==1
873 03:07:26.717243 RxClkDly_Margin_A0==98 ps 10
874 03:07:26.717683 TxDqDly_Margin_A0==98 ps 10
875 03:07:26.722337 RxClkDly_Margin_A1==88 ps 9
876 03:07:26.722882 TxDqDly_Margin_A1==88 ps 9
877 03:07:26.727872 TrainedVREFDQ_A0==77
878 03:07:26.728462 TrainedVREFDQ_A1==77
879 03:07:26.728905 VrefDac_Margin_A0==22
880 03:07:26.733534 DeviceVref_Margin_A0==37
881 03:07:26.734081 VrefDac_Margin_A1==24
882 03:07:26.739149 DeviceVref_Margin_A1==37
883 03:07:26.739692
884 03:07:26.740166 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 03:07:26.740597
886 03:07:26.772735 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 03:07:26.773381 2D training succeed
888 03:07:26.778352 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 03:07:26.783918 auto size-- 65535DDR cs0 size: 2048MB
890 03:07:26.784512 DDR cs1 size: 2048MB
891 03:07:26.789488 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 03:07:26.790056 cs0 DataBus test pass
893 03:07:26.795070 cs1 DataBus test pass
894 03:07:26.795648 cs0 AddrBus test pass
895 03:07:26.796123 cs1 AddrBus test pass
896 03:07:26.796555
897 03:07:26.800802 100bdlr_step_size ps== 420
898 03:07:26.801351 result report
899 03:07:26.806304 boot times 0Enable ddr reg access
900 03:07:26.811724 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 03:07:26.825080 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 03:07:27.398638 0.0;M3 CHK:0;cm4_sp_mode 0
903 03:07:27.399305 MVN_1=0x00000000
904 03:07:27.404184 MVN_2=0x00000000
905 03:07:27.409957 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 03:07:27.410493 OPS=0x10
907 03:07:27.410955 ring efuse init
908 03:07:27.411402 chipver efuse init
909 03:07:27.415624 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 03:07:27.421111 [0.018961 Inits done]
911 03:07:27.421629 secure task start!
912 03:07:27.422076 high task start!
913 03:07:27.425778 low task start!
914 03:07:27.426285 run into bl31
915 03:07:27.432323 NOTICE: BL31: v1.3(release):4fc40b1
916 03:07:27.440195 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 03:07:27.440725 NOTICE: BL31: G12A normal boot!
918 03:07:27.466000 NOTICE: BL31: BL33 decompress pass
919 03:07:27.471812 ERROR: Error initializing runtime service opteed_fast
920 03:07:28.704640
921 03:07:28.705313
922 03:07:28.713002 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 03:07:28.713533
924 03:07:28.714005 Model: Libre Computer AML-A311D-CC Alta
925 03:07:28.921419 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 03:07:28.944872 DRAM: 2 GiB (effective 3.8 GiB)
927 03:07:29.087843 Core: 408 devices, 31 uclasses, devicetree: separate
928 03:07:29.093689 WDT: Not starting watchdog@f0d0
929 03:07:29.126008 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 03:07:29.138387 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 03:07:29.143356 ** Bad device specification mmc 0 **
932 03:07:29.153650 Card did not respond to voltage select! : -110
933 03:07:29.161318 ** Bad device specification mmc 0 **
934 03:07:29.161643 Couldn't find partition mmc 0
935 03:07:29.169584 Card did not respond to voltage select! : -110
936 03:07:29.175070 ** Bad device specification mmc 0 **
937 03:07:29.175456 Couldn't find partition mmc 0
938 03:07:29.180261 Error: could not access storage.
939 03:07:29.522764 Net: eth0: ethernet@ff3f0000
940 03:07:29.523186 starting USB...
941 03:07:29.774525 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 03:07:29.774945 Starting the controller
943 03:07:29.781450 USB XHCI 1.10
944 03:07:31.335437 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 03:07:31.343833 scanning usb for storage devices... 0 Storage Device(s) found
947 03:07:31.395609 Hit any key to stop autoboot: 1
948 03:07:31.396872 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 03:07:31.397564 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 03:07:31.398093 Setting prompt string to ['=>']
951 03:07:31.398632 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 03:07:31.411443 0
953 03:07:31.412490 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 03:07:31.413055 Sending with 10 millisecond of delay
956 03:07:32.548691 => setenv autoload no
957 03:07:32.559656 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 03:07:32.565239 setenv autoload no
959 03:07:32.566095 Sending with 10 millisecond of delay
961 03:07:34.364149 => setenv initrd_high 0xffffffff
962 03:07:34.374976 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 03:07:34.375930 setenv initrd_high 0xffffffff
964 03:07:34.376763 Sending with 10 millisecond of delay
966 03:07:35.993946 => setenv fdt_high 0xffffffff
967 03:07:36.004773 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 03:07:36.005684 setenv fdt_high 0xffffffff
969 03:07:36.006451 Sending with 10 millisecond of delay
971 03:07:36.298424 => dhcp
972 03:07:36.309237 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 03:07:36.310146 dhcp
974 03:07:36.310626 Speed: 1000, full duplex
975 03:07:36.311085 BOOTP broadcast 1
976 03:07:36.318629 DHCP client bound to address 192.168.6.27 (9 ms)
977 03:07:36.319416 Sending with 10 millisecond of delay
979 03:07:37.996751 => setenv serverip 192.168.6.2
980 03:07:38.007625 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 03:07:38.008639 setenv serverip 192.168.6.2
982 03:07:38.009411 Sending with 10 millisecond of delay
984 03:07:41.736325 => tftpboot 0x01080000 964661/tftp-deploy-96spojqc/kernel/uImage
985 03:07:41.746944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 03:07:41.747542 tftpboot 0x01080000 964661/tftp-deploy-96spojqc/kernel/uImage
987 03:07:41.747812 Speed: 1000, full duplex
988 03:07:41.748153 Using ethernet@ff3f0000 device
989 03:07:41.750411 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 03:07:41.755650 Filename '964661/tftp-deploy-96spojqc/kernel/uImage'.
991 03:07:41.759426 Load address: 0x1080000
992 03:07:44.224294 Loading: *########################################### UDP wrong checksum 000000ff 00009f6c
993 03:07:44.236232 UDP wrong checksum 000000ff 0000285f
994 03:07:44.604842 ####### 43.6 MiB
995 03:07:44.605251 15.3 MiB/s
996 03:07:44.605460 done
997 03:07:44.608821 Bytes transferred = 45713984 (2b98a40 hex)
998 03:07:44.609343 Sending with 10 millisecond of delay
1000 03:07:49.300643 => tftpboot 0x08000000 964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
1001 03:07:49.311463 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1002 03:07:49.312344 tftpboot 0x08000000 964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot
1003 03:07:49.312774 Speed: 1000, full duplex
1004 03:07:49.313176 Using ethernet@ff3f0000 device
1005 03:07:49.314590 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1006 03:07:49.322949 Filename '964661/tftp-deploy-96spojqc/ramdisk/ramdisk.cpio.gz.uboot'.
1007 03:07:49.323389 Load address: 0x8000000
1008 03:07:55.923879 Loading: *#######################T ########################## UDP wrong checksum 00000005 000082ea
1009 03:08:00.924551 T UDP wrong checksum 00000005 000082ea
1010 03:08:02.706913 UDP wrong checksum 000000ff 0000ebe2
1011 03:08:02.757994 UDP wrong checksum 000000ff 00007ed5
1012 03:08:02.867403 UDP wrong checksum 000000ff 0000c4bb
1013 03:08:02.911602 UDP wrong checksum 000000ff 000054ae
1014 03:08:10.926558 T T UDP wrong checksum 00000005 000082ea
1015 03:08:30.930630 T T T T UDP wrong checksum 00000005 000082ea
1016 03:08:45.934706 T T
1017 03:08:45.935380 Retry count exceeded; starting again
1019 03:08:45.937262 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1022 03:08:45.939236 end: 2.4 uboot-commands (duration 00:01:46) [common]
1024 03:08:45.940768 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1026 03:08:45.941860 end: 2 uboot-action (duration 00:01:46) [common]
1028 03:08:45.943504 Cleaning after the job
1029 03:08:45.944139 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/ramdisk
1030 03:08:45.945612 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/kernel
1031 03:08:45.992611 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/dtb
1032 03:08:45.993470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/nfsrootfs
1033 03:08:46.149604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964661/tftp-deploy-96spojqc/modules
1034 03:08:46.171237 start: 4.1 power-off (timeout 00:00:30) [common]
1035 03:08:46.171910 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1036 03:08:46.205875 >> OK - accepted request
1037 03:08:46.208236 Returned 0 in 0 seconds
1038 03:08:46.309050 end: 4.1 power-off (duration 00:00:00) [common]
1040 03:08:46.310065 start: 4.2 read-feedback (timeout 00:10:00) [common]
1041 03:08:46.310714 Listened to connection for namespace 'common' for up to 1s
1042 03:08:47.311655 Finalising connection for namespace 'common'
1043 03:08:47.312181 Disconnecting from shell: Finalise
1044 03:08:47.312445 =>
1045 03:08:47.413312 end: 4.2 read-feedback (duration 00:00:01) [common]
1046 03:08:47.414046 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964661
1047 03:08:49.566915 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964661
1048 03:08:49.567545 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.