Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:21:19.240538 lava-dispatcher, installed at version: 2024.01
2 03:21:19.241357 start: 0 validate
3 03:21:19.241864 Start time: 2024-11-09 03:21:19.241832+00:00 (UTC)
4 03:21:19.242413 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:21:19.242974 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:21:19.285118 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:21:19.285660 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:21:19.317123 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:21:19.318072 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:21:19.352561 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:21:19.353086 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:21:19.386750 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:21:19.387256 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:21:19.424611 validate duration: 0.18
16 03:21:19.425476 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:21:19.425803 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:21:19.426121 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:21:19.426692 Not decompressing ramdisk as can be used compressed.
20 03:21:19.427148 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 03:21:19.427431 saving as /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/ramdisk/initrd.cpio.gz
22 03:21:19.427705 total size: 5628140 (5 MB)
23 03:21:19.464819 progress 0 % (0 MB)
24 03:21:19.471337 progress 5 % (0 MB)
25 03:21:19.479518 progress 10 % (0 MB)
26 03:21:19.485517 progress 15 % (0 MB)
27 03:21:19.489874 progress 20 % (1 MB)
28 03:21:19.493651 progress 25 % (1 MB)
29 03:21:19.497902 progress 30 % (1 MB)
30 03:21:19.502489 progress 35 % (1 MB)
31 03:21:19.506502 progress 40 % (2 MB)
32 03:21:19.511009 progress 45 % (2 MB)
33 03:21:19.515154 progress 50 % (2 MB)
34 03:21:19.519536 progress 55 % (2 MB)
35 03:21:19.523858 progress 60 % (3 MB)
36 03:21:19.527705 progress 65 % (3 MB)
37 03:21:19.532017 progress 70 % (3 MB)
38 03:21:19.536023 progress 75 % (4 MB)
39 03:21:19.540246 progress 80 % (4 MB)
40 03:21:19.543946 progress 85 % (4 MB)
41 03:21:19.548330 progress 90 % (4 MB)
42 03:21:19.552496 progress 95 % (5 MB)
43 03:21:19.555918 progress 100 % (5 MB)
44 03:21:19.556646 5 MB downloaded in 0.13 s (41.63 MB/s)
45 03:21:19.557221 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:21:19.558133 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:21:19.558434 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:21:19.558712 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:21:19.559201 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/kernel/Image
51 03:21:19.559471 saving as /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/kernel/Image
52 03:21:19.559686 total size: 45713920 (43 MB)
53 03:21:19.559902 No compression specified
54 03:21:19.595567 progress 0 % (0 MB)
55 03:21:19.625053 progress 5 % (2 MB)
56 03:21:19.654092 progress 10 % (4 MB)
57 03:21:19.683581 progress 15 % (6 MB)
58 03:21:19.712587 progress 20 % (8 MB)
59 03:21:19.741692 progress 25 % (10 MB)
60 03:21:19.771238 progress 30 % (13 MB)
61 03:21:19.802901 progress 35 % (15 MB)
62 03:21:19.832420 progress 40 % (17 MB)
63 03:21:19.860854 progress 45 % (19 MB)
64 03:21:19.890168 progress 50 % (21 MB)
65 03:21:19.919802 progress 55 % (24 MB)
66 03:21:19.948625 progress 60 % (26 MB)
67 03:21:19.977326 progress 65 % (28 MB)
68 03:21:20.006438 progress 70 % (30 MB)
69 03:21:20.036465 progress 75 % (32 MB)
70 03:21:20.065774 progress 80 % (34 MB)
71 03:21:20.094332 progress 85 % (37 MB)
72 03:21:20.124092 progress 90 % (39 MB)
73 03:21:20.153081 progress 95 % (41 MB)
74 03:21:20.182144 progress 100 % (43 MB)
75 03:21:20.182666 43 MB downloaded in 0.62 s (69.98 MB/s)
76 03:21:20.183127 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:21:20.183936 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:21:20.184238 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:21:20.184504 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:21:20.184965 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:21:20.185231 saving as /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:21:20.185436 total size: 54703 (0 MB)
84 03:21:20.185645 No compression specified
85 03:21:20.230759 progress 59 % (0 MB)
86 03:21:20.231711 progress 100 % (0 MB)
87 03:21:20.232453 0 MB downloaded in 0.05 s (1.11 MB/s)
88 03:21:20.232977 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:21:20.233858 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:21:20.234189 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:21:20.234469 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:21:20.234960 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 03:21:20.235247 saving as /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/nfsrootfs/full.rootfs.tar
95 03:21:20.235459 total size: 474398908 (452 MB)
96 03:21:20.235668 Using unxz to decompress xz
97 03:21:20.279489 progress 0 % (0 MB)
98 03:21:21.375876 progress 5 % (22 MB)
99 03:21:22.815997 progress 10 % (45 MB)
100 03:21:23.257115 progress 15 % (67 MB)
101 03:21:24.095704 progress 20 % (90 MB)
102 03:21:24.642578 progress 25 % (113 MB)
103 03:21:25.009043 progress 30 % (135 MB)
104 03:21:25.630076 progress 35 % (158 MB)
105 03:21:26.573056 progress 40 % (181 MB)
106 03:21:27.456661 progress 45 % (203 MB)
107 03:21:28.081045 progress 50 % (226 MB)
108 03:21:28.771815 progress 55 % (248 MB)
109 03:21:30.013643 progress 60 % (271 MB)
110 03:21:31.612445 progress 65 % (294 MB)
111 03:21:33.218428 progress 70 % (316 MB)
112 03:21:36.506687 progress 75 % (339 MB)
113 03:21:38.979496 progress 80 % (361 MB)
114 03:21:41.873977 progress 85 % (384 MB)
115 03:21:45.017609 progress 90 % (407 MB)
116 03:21:48.184559 progress 95 % (429 MB)
117 03:21:51.334856 progress 100 % (452 MB)
118 03:21:51.348248 452 MB downloaded in 31.11 s (14.54 MB/s)
119 03:21:51.349122 end: 1.4.1 http-download (duration 00:00:31) [common]
121 03:21:51.350723 end: 1.4 download-retry (duration 00:00:31) [common]
122 03:21:51.351244 start: 1.5 download-retry (timeout 00:09:28) [common]
123 03:21:51.351757 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 03:21:51.352619 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/modules.tar.xz
125 03:21:51.353085 saving as /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/modules/modules.tar
126 03:21:51.353497 total size: 11612756 (11 MB)
127 03:21:51.353917 Using unxz to decompress xz
128 03:21:51.404129 progress 0 % (0 MB)
129 03:21:51.470295 progress 5 % (0 MB)
130 03:21:51.544471 progress 10 % (1 MB)
131 03:21:51.640315 progress 15 % (1 MB)
132 03:21:51.731136 progress 20 % (2 MB)
133 03:21:51.811465 progress 25 % (2 MB)
134 03:21:51.886428 progress 30 % (3 MB)
135 03:21:51.964070 progress 35 % (3 MB)
136 03:21:52.036080 progress 40 % (4 MB)
137 03:21:52.111176 progress 45 % (5 MB)
138 03:21:52.196203 progress 50 % (5 MB)
139 03:21:52.272479 progress 55 % (6 MB)
140 03:21:52.356528 progress 60 % (6 MB)
141 03:21:52.450788 progress 65 % (7 MB)
142 03:21:52.546714 progress 70 % (7 MB)
143 03:21:52.639650 progress 75 % (8 MB)
144 03:21:52.738207 progress 80 % (8 MB)
145 03:21:52.832752 progress 85 % (9 MB)
146 03:21:52.925789 progress 90 % (9 MB)
147 03:21:53.017610 progress 95 % (10 MB)
148 03:21:53.108590 progress 100 % (11 MB)
149 03:21:53.122332 11 MB downloaded in 1.77 s (6.26 MB/s)
150 03:21:53.123178 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:21:53.124835 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:21:53.125352 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 03:21:53.125859 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 03:22:08.655611 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964608/extract-nfsrootfs-5qx0v6qu
156 03:22:08.656252 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 03:22:08.656542 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 03:22:08.657144 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy
159 03:22:08.657559 makedir: /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin
160 03:22:08.657880 makedir: /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/tests
161 03:22:08.658188 makedir: /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/results
162 03:22:08.658517 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-add-keys
163 03:22:08.659049 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-add-sources
164 03:22:08.659550 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-background-process-start
165 03:22:08.660067 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-background-process-stop
166 03:22:08.660600 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-common-functions
167 03:22:08.661081 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-echo-ipv4
168 03:22:08.661552 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-install-packages
169 03:22:08.662025 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-installed-packages
170 03:22:08.662488 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-os-build
171 03:22:08.662954 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-probe-channel
172 03:22:08.663421 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-probe-ip
173 03:22:08.663884 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-target-ip
174 03:22:08.664409 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-target-mac
175 03:22:08.664914 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-target-storage
176 03:22:08.665389 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-case
177 03:22:08.665857 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-event
178 03:22:08.666319 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-feedback
179 03:22:08.666848 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-raise
180 03:22:08.667323 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-reference
181 03:22:08.667786 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-runner
182 03:22:08.668316 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-set
183 03:22:08.668803 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-test-shell
184 03:22:08.669277 Updating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-install-packages (oe)
185 03:22:08.669799 Updating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/bin/lava-installed-packages (oe)
186 03:22:08.670230 Creating /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/environment
187 03:22:08.670585 LAVA metadata
188 03:22:08.670839 - LAVA_JOB_ID=964608
189 03:22:08.671052 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:22:08.671398 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 03:22:08.672367 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:22:08.672676 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 03:22:08.672883 skipped lava-vland-overlay
194 03:22:08.673122 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:22:08.673375 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 03:22:08.673591 skipped lava-multinode-overlay
197 03:22:08.673831 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:22:08.674080 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 03:22:08.674323 Loading test definitions
200 03:22:08.674596 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 03:22:08.674813 Using /lava-964608 at stage 0
202 03:22:08.675933 uuid=964608_1.6.2.4.1 testdef=None
203 03:22:08.676256 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:22:08.676516 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 03:22:08.678206 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:22:08.678981 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 03:22:08.681104 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:22:08.681918 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 03:22:08.683939 runner path: /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 964608_1.6.2.4.1
212 03:22:08.684501 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:22:08.685247 Creating lava-test-runner.conf files
215 03:22:08.685446 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964608/lava-overlay-rt9szdwy/lava-964608/0 for stage 0
216 03:22:08.685830 - 0_v4l2-decoder-conformance-h265
217 03:22:08.686179 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:22:08.686447 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 03:22:08.707753 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:22:08.708120 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 03:22:08.708380 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:22:08.708638 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:22:08.708895 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 03:22:09.318243 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:22:09.318709 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 03:22:09.318956 extracting modules file /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964608/extract-nfsrootfs-5qx0v6qu
227 03:22:10.704835 extracting modules file /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk
228 03:22:12.129279 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:22:12.129765 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 03:22:12.130039 [common] Applying overlay to NFS
231 03:22:12.130251 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964608/compress-overlay-hig9pv1z/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964608/extract-nfsrootfs-5qx0v6qu
232 03:22:12.159252 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:22:12.159606 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 03:22:12.159872 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 03:22:12.160132 Converting downloaded kernel to a uImage
236 03:22:12.160445 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/kernel/Image /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/kernel/uImage
237 03:22:12.646531 output: Image Name:
238 03:22:12.646973 output: Created: Sat Nov 9 03:22:12 2024
239 03:22:12.647186 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:22:12.647394 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 03:22:12.647596 output: Load Address: 01080000
242 03:22:12.647795 output: Entry Point: 01080000
243 03:22:12.648030 output:
244 03:22:12.648384 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 03:22:12.648656 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 03:22:12.648929 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 03:22:12.649186 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:22:12.649447 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 03:22:12.649711 Building ramdisk /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk
250 03:22:14.874656 >> 166792 blocks
251 03:22:22.619926 Adding RAMdisk u-boot header.
252 03:22:22.620655 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk.cpio.gz.uboot
253 03:22:22.927331 output: Image Name:
254 03:22:22.927959 output: Created: Sat Nov 9 03:22:22 2024
255 03:22:22.928440 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:22:22.928846 output: Data Size: 23431365 Bytes = 22882.19 KiB = 22.35 MiB
257 03:22:22.929278 output: Load Address: 00000000
258 03:22:22.929696 output: Entry Point: 00000000
259 03:22:22.930092 output:
260 03:22:22.931204 rename /var/lib/lava/dispatcher/tmp/964608/extract-overlay-ramdisk-5tpiej_k/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
261 03:22:22.931927 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 03:22:22.932529 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 03:22:22.933083 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 03:22:22.933546 No LXC device requested
265 03:22:22.934049 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:22:22.934557 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 03:22:22.935050 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:22:22.935460 Checking files for TFTP limit of 4294967296 bytes.
269 03:22:22.938205 end: 1 tftp-deploy (duration 00:01:04) [common]
270 03:22:22.938797 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:22:22.939344 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:22:22.939856 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:22:22.940408 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:22:22.940940 Using kernel file from prepare-kernel: 964608/tftp-deploy-c58uuf0u/kernel/uImage
275 03:22:22.941563 substitutions:
276 03:22:22.941968 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:22:22.942370 - {DTB_ADDR}: 0x01070000
278 03:22:22.942797 - {DTB}: 964608/tftp-deploy-c58uuf0u/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:22:22.943218 - {INITRD}: 964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
280 03:22:22.943619 - {KERNEL_ADDR}: 0x01080000
281 03:22:22.944038 - {KERNEL}: 964608/tftp-deploy-c58uuf0u/kernel/uImage
282 03:22:22.944437 - {LAVA_MAC}: None
283 03:22:22.944870 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964608/extract-nfsrootfs-5qx0v6qu
284 03:22:22.945267 - {NFS_SERVER_IP}: 192.168.6.2
285 03:22:22.945656 - {PRESEED_CONFIG}: None
286 03:22:22.946043 - {PRESEED_LOCAL}: None
287 03:22:22.946452 - {RAMDISK_ADDR}: 0x08000000
288 03:22:22.946843 - {RAMDISK}: 964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
289 03:22:22.947232 - {ROOT_PART}: None
290 03:22:22.947612 - {ROOT}: None
291 03:22:22.948039 - {SERVER_IP}: 192.168.6.2
292 03:22:22.948436 - {TEE_ADDR}: 0x83000000
293 03:22:22.948825 - {TEE}: None
294 03:22:22.949210 Parsed boot commands:
295 03:22:22.949588 - setenv autoload no
296 03:22:22.950008 - setenv initrd_high 0xffffffff
297 03:22:22.950402 - setenv fdt_high 0xffffffff
298 03:22:22.950794 - dhcp
299 03:22:22.951177 - setenv serverip 192.168.6.2
300 03:22:22.951559 - tftpboot 0x01080000 964608/tftp-deploy-c58uuf0u/kernel/uImage
301 03:22:22.951945 - tftpboot 0x08000000 964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
302 03:22:22.952367 - tftpboot 0x01070000 964608/tftp-deploy-c58uuf0u/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:22:22.952756 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964608/extract-nfsrootfs-5qx0v6qu,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:22:22.953157 - bootm 0x01080000 0x08000000 0x01070000
305 03:22:22.953674 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:22:22.955163 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:22:22.955581 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:22:22.970464 Setting prompt string to ['lava-test: # ']
310 03:22:22.971965 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:22:22.972642 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:22:22.973185 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:22:22.973714 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:22:22.974816 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:22:23.016279 >> OK - accepted request
316 03:22:23.018405 Returned 0 in 0 seconds
317 03:22:23.119565 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:22:23.121323 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:22:23.121958 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:22:23.122480 Setting prompt string to ['Hit any key to stop autoboot']
322 03:22:23.122951 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:22:23.124550 Trying 192.168.56.21...
324 03:22:23.125061 Connected to conserv1.
325 03:22:23.125495 Escape character is '^]'.
326 03:22:23.125918
327 03:22:23.126341 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 03:22:23.126744
329 03:22:34.707767 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:22:34.708431 bl2_stage_init 0x01
331 03:22:34.708883 bl2_stage_init 0x81
332 03:22:34.713366 hw id: 0x0000 - pwm id 0x01
333 03:22:34.713966 bl2_stage_init 0xc1
334 03:22:34.714416 bl2_stage_init 0x02
335 03:22:34.714850
336 03:22:34.718845 L0:00000000
337 03:22:34.719370 L1:20000703
338 03:22:34.719805 L2:00008067
339 03:22:34.720279 L3:14000000
340 03:22:34.721753 B2:00402000
341 03:22:34.722268 B1:e0f83180
342 03:22:34.722711
343 03:22:34.723145 TE: 58159
344 03:22:34.723573
345 03:22:34.732862 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:22:34.733399
347 03:22:34.733833 Board ID = 1
348 03:22:34.734259 Set A53 clk to 24M
349 03:22:34.734683 Set A73 clk to 24M
350 03:22:34.738501 Set clk81 to 24M
351 03:22:34.739018 A53 clk: 1200 MHz
352 03:22:34.739452 A73 clk: 1200 MHz
353 03:22:34.741997 CLK81: 166.6M
354 03:22:34.742507 smccc: 00012ab5
355 03:22:34.747604 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:22:34.753115 board id: 1
357 03:22:34.758410 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:22:34.768778 fw parse done
359 03:22:34.774781 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:22:34.817386 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:22:34.828338 PIEI prepare done
362 03:22:34.828866 fastboot data load
363 03:22:34.829298 fastboot data verify
364 03:22:34.833929 verify result: 266
365 03:22:34.839523 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:22:34.840111 LPDDR4 probe
367 03:22:34.840556 ddr clk to 1584MHz
368 03:22:34.847522 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:22:34.884759
370 03:22:34.885317 dmc_version 0001
371 03:22:34.891426 Check phy result
372 03:22:34.897287 INFO : End of CA training
373 03:22:34.897811 INFO : End of initialization
374 03:22:34.902874 INFO : Training has run successfully!
375 03:22:34.903407 Check phy result
376 03:22:34.908569 INFO : End of initialization
377 03:22:34.909103 INFO : End of read enable training
378 03:22:34.914115 INFO : End of fine write leveling
379 03:22:34.919705 INFO : End of Write leveling coarse delay
380 03:22:34.920271 INFO : Training has run successfully!
381 03:22:34.920710 Check phy result
382 03:22:34.925330 INFO : End of initialization
383 03:22:34.925857 INFO : End of read dq deskew training
384 03:22:34.930907 INFO : End of MPR read delay center optimization
385 03:22:34.936585 INFO : End of write delay center optimization
386 03:22:34.942108 INFO : End of read delay center optimization
387 03:22:34.942631 INFO : End of max read latency training
388 03:22:34.947706 INFO : Training has run successfully!
389 03:22:34.948279 1D training succeed
390 03:22:34.956836 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:22:35.004488 Check phy result
392 03:22:35.005039 INFO : End of initialization
393 03:22:35.026941 INFO : End of 2D read delay Voltage center optimization
394 03:22:35.047027 INFO : End of 2D read delay Voltage center optimization
395 03:22:35.098998 INFO : End of 2D write delay Voltage center optimization
396 03:22:35.148269 INFO : End of 2D write delay Voltage center optimization
397 03:22:35.153774 INFO : Training has run successfully!
398 03:22:35.154305
399 03:22:35.154762 channel==0
400 03:22:35.159350 RxClkDly_Margin_A0==88 ps 9
401 03:22:35.159875 TxDqDly_Margin_A0==98 ps 10
402 03:22:35.164979 RxClkDly_Margin_A1==88 ps 9
403 03:22:35.165502 TxDqDly_Margin_A1==98 ps 10
404 03:22:35.165940 TrainedVREFDQ_A0==74
405 03:22:35.170595 TrainedVREFDQ_A1==74
406 03:22:35.171119 VrefDac_Margin_A0==25
407 03:22:35.171555 DeviceVref_Margin_A0==40
408 03:22:35.176135 VrefDac_Margin_A1==25
409 03:22:35.176709 DeviceVref_Margin_A1==40
410 03:22:35.177154
411 03:22:35.177584
412 03:22:35.181746 channel==1
413 03:22:35.182271 RxClkDly_Margin_A0==98 ps 10
414 03:22:35.182707 TxDqDly_Margin_A0==98 ps 10
415 03:22:35.187306 RxClkDly_Margin_A1==98 ps 10
416 03:22:35.187829 TxDqDly_Margin_A1==88 ps 9
417 03:22:35.192934 TrainedVREFDQ_A0==77
418 03:22:35.193461 TrainedVREFDQ_A1==77
419 03:22:35.193902 VrefDac_Margin_A0==22
420 03:22:35.198586 DeviceVref_Margin_A0==37
421 03:22:35.199110 VrefDac_Margin_A1==24
422 03:22:35.204260 DeviceVref_Margin_A1==37
423 03:22:35.204826
424 03:22:35.205267 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:22:35.209768
426 03:22:35.237699 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000018 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 03:22:35.238354 2D training succeed
428 03:22:35.243347 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:22:35.248957 auto size-- 65535DDR cs0 size: 2048MB
430 03:22:35.249488 DDR cs1 size: 2048MB
431 03:22:35.254607 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:22:35.255123 cs0 DataBus test pass
433 03:22:35.260166 cs1 DataBus test pass
434 03:22:35.260685 cs0 AddrBus test pass
435 03:22:35.261119 cs1 AddrBus test pass
436 03:22:35.261545
437 03:22:35.265742 100bdlr_step_size ps== 420
438 03:22:35.266275 result report
439 03:22:35.271404 boot times 0Enable ddr reg access
440 03:22:35.276820 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:22:35.290349 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:22:35.862116 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:22:35.862556 MVN_1=0x00000000
444 03:22:35.867687 MVN_2=0x00000000
445 03:22:35.873447 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:22:35.874056 OPS=0x10
447 03:22:35.874339 ring efuse init
448 03:22:35.874551 chipver efuse init
449 03:22:35.879382 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:22:35.884637 [0.018960 Inits done]
451 03:22:35.885191 secure task start!
452 03:22:35.885468 high task start!
453 03:22:35.889280 low task start!
454 03:22:35.889976 run into bl31
455 03:22:35.895908 NOTICE: BL31: v1.3(release):4fc40b1
456 03:22:35.903655 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:22:35.904297 NOTICE: BL31: G12A normal boot!
458 03:22:35.928987 NOTICE: BL31: BL33 decompress pass
459 03:22:35.934706 ERROR: Error initializing runtime service opteed_fast
460 03:22:37.167521
461 03:22:37.167951
462 03:22:37.175830 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:22:37.176255
464 03:22:37.176496 Model: Libre Computer AML-A311D-CC Alta
465 03:22:37.384349 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:22:37.407664 DRAM: 2 GiB (effective 3.8 GiB)
467 03:22:37.550749 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:22:37.556498 WDT: Not starting watchdog@f0d0
469 03:22:37.588812 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:22:37.601231 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:22:37.606194 ** Bad device specification mmc 0 **
472 03:22:37.616560 Card did not respond to voltage select! : -110
473 03:22:37.624180 ** Bad device specification mmc 0 **
474 03:22:37.624474 Couldn't find partition mmc 0
475 03:22:37.632514 Card did not respond to voltage select! : -110
476 03:22:37.638053 ** Bad device specification mmc 0 **
477 03:22:37.638326 Couldn't find partition mmc 0
478 03:22:37.643106 Error: could not access storage.
479 03:22:38.907803 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 03:22:38.908273 bl2_stage_init 0x01
481 03:22:38.908503 bl2_stage_init 0x81
482 03:22:38.913317 hw id: 0x0000 - pwm id 0x01
483 03:22:38.913730 bl2_stage_init 0xc1
484 03:22:38.914062 bl2_stage_init 0x02
485 03:22:38.914383
486 03:22:38.919060 L0:00000000
487 03:22:38.919474 L1:20000703
488 03:22:38.919722 L2:00008067
489 03:22:38.919935 L3:14000000
490 03:22:38.924580 B2:00402000
491 03:22:38.924878 B1:e0f83180
492 03:22:38.925090
493 03:22:38.925295 TE: 58167
494 03:22:38.925499
495 03:22:38.930146 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 03:22:38.930569
497 03:22:38.930916 Board ID = 1
498 03:22:38.935757 Set A53 clk to 24M
499 03:22:38.936214 Set A73 clk to 24M
500 03:22:38.936560 Set clk81 to 24M
501 03:22:38.941350 A53 clk: 1200 MHz
502 03:22:38.941760 A73 clk: 1200 MHz
503 03:22:38.942001 CLK81: 166.6M
504 03:22:38.942212 smccc: 00012abe
505 03:22:38.946939 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 03:22:38.952536 board id: 1
507 03:22:38.958414 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 03:22:38.969082 fw parse done
509 03:22:38.975059 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 03:22:39.017665 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 03:22:39.028658 PIEI prepare done
512 03:22:39.029000 fastboot data load
513 03:22:39.029218 fastboot data verify
514 03:22:39.034205 verify result: 266
515 03:22:39.040515 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 03:22:39.040962 LPDDR4 probe
517 03:22:39.041310 ddr clk to 1584MHz
518 03:22:39.047906 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 03:22:39.085301
520 03:22:39.085669 dmc_version 0001
521 03:22:39.091855 Check phy result
522 03:22:39.097700 INFO : End of CA training
523 03:22:39.098130 INFO : End of initialization
524 03:22:39.103295 INFO : Training has run successfully!
525 03:22:39.103594 Check phy result
526 03:22:39.108844 INFO : End of initialization
527 03:22:39.109290 INFO : End of read enable training
528 03:22:39.114430 INFO : End of fine write leveling
529 03:22:39.120122 INFO : End of Write leveling coarse delay
530 03:22:39.120447 INFO : Training has run successfully!
531 03:22:39.120666 Check phy result
532 03:22:39.125703 INFO : End of initialization
533 03:22:39.126005 INFO : End of read dq deskew training
534 03:22:39.131203 INFO : End of MPR read delay center optimization
535 03:22:39.136789 INFO : End of write delay center optimization
536 03:22:39.142355 INFO : End of read delay center optimization
537 03:22:39.142659 INFO : End of max read latency training
538 03:22:39.148068 INFO : Training has run successfully!
539 03:22:39.148526 1D training succeed
540 03:22:39.157297 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 03:22:39.204913 Check phy result
542 03:22:39.205292 INFO : End of initialization
543 03:22:39.226528 INFO : End of 2D read delay Voltage center optimization
544 03:22:39.245882 INFO : End of 2D read delay Voltage center optimization
545 03:22:39.298057 INFO : End of 2D write delay Voltage center optimization
546 03:22:39.347480 INFO : End of 2D write delay Voltage center optimization
547 03:22:39.352968 INFO : Training has run successfully!
548 03:22:39.353277
549 03:22:39.353510 channel==0
550 03:22:39.358550 RxClkDly_Margin_A0==88 ps 9
551 03:22:39.359017 TxDqDly_Margin_A0==98 ps 10
552 03:22:39.364290 RxClkDly_Margin_A1==88 ps 9
553 03:22:39.364735 TxDqDly_Margin_A1==98 ps 10
554 03:22:39.365087 TrainedVREFDQ_A0==74
555 03:22:39.369797 TrainedVREFDQ_A1==74
556 03:22:39.370104 VrefDac_Margin_A0==25
557 03:22:39.370317 DeviceVref_Margin_A0==40
558 03:22:39.375404 VrefDac_Margin_A1==25
559 03:22:39.375699 DeviceVref_Margin_A1==40
560 03:22:39.375911
561 03:22:39.376156
562 03:22:39.381009 channel==1
563 03:22:39.381326 RxClkDly_Margin_A0==88 ps 9
564 03:22:39.381550 TxDqDly_Margin_A0==98 ps 10
565 03:22:39.386506 RxClkDly_Margin_A1==88 ps 9
566 03:22:39.386939 TxDqDly_Margin_A1==88 ps 9
567 03:22:39.392168 TrainedVREFDQ_A0==77
568 03:22:39.392475 TrainedVREFDQ_A1==77
569 03:22:39.392688 VrefDac_Margin_A0==23
570 03:22:39.397867 DeviceVref_Margin_A0==37
571 03:22:39.398288 VrefDac_Margin_A1==24
572 03:22:39.403360 DeviceVref_Margin_A1==37
573 03:22:39.403813
574 03:22:39.404217 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 03:22:39.404802
576 03:22:39.437128 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 03:22:39.437806 2D training succeed
578 03:22:39.442710 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 03:22:39.448405 auto size-- 65535DDR cs0 size: 2048MB
580 03:22:39.449068 DDR cs1 size: 2048MB
581 03:22:39.453875 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 03:22:39.454518 cs0 DataBus test pass
583 03:22:39.459569 cs1 DataBus test pass
584 03:22:39.460249 cs0 AddrBus test pass
585 03:22:39.460785 cs1 AddrBus test pass
586 03:22:39.461245
587 03:22:39.465116 100bdlr_step_size ps== 420
588 03:22:39.465850 result report
589 03:22:39.470676 boot times 0Enable ddr reg access
590 03:22:39.475892 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 03:22:39.489260 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 03:22:40.062416 0.0;M3 CHK:0;cm4_sp_mode 0
593 03:22:40.062858 MVN_1=0x00000000
594 03:22:40.067880 MVN_2=0x00000000
595 03:22:40.073771 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 03:22:40.074302 OPS=0x10
597 03:22:40.074709 ring efuse init
598 03:22:40.075101 chipver efuse init
599 03:22:40.081923 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 03:22:40.082411 [0.018961 Inits done]
601 03:22:40.082810 secure task start!
602 03:22:40.089538 high task start!
603 03:22:40.090056 low task start!
604 03:22:40.090448 run into bl31
605 03:22:40.096063 NOTICE: BL31: v1.3(release):4fc40b1
606 03:22:40.103896 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 03:22:40.104450 NOTICE: BL31: G12A normal boot!
608 03:22:40.129769 NOTICE: BL31: BL33 decompress pass
609 03:22:40.135445 ERROR: Error initializing runtime service opteed_fast
610 03:22:41.368517
611 03:22:41.369166
612 03:22:41.376863 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 03:22:41.377358
614 03:22:41.377777 Model: Libre Computer AML-A311D-CC Alta
615 03:22:41.585306 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 03:22:41.608684 DRAM: 2 GiB (effective 3.8 GiB)
617 03:22:41.751696 Core: 408 devices, 31 uclasses, devicetree: separate
618 03:22:41.757608 WDT: Not starting watchdog@f0d0
619 03:22:41.789783 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 03:22:41.802181 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 03:22:41.807234 ** Bad device specification mmc 0 **
622 03:22:41.817516 Card did not respond to voltage select! : -110
623 03:22:41.825102 ** Bad device specification mmc 0 **
624 03:22:41.825593 Couldn't find partition mmc 0
625 03:22:41.833502 Card did not respond to voltage select! : -110
626 03:22:41.839010 ** Bad device specification mmc 0 **
627 03:22:41.839517 Couldn't find partition mmc 0
628 03:22:41.844191 Error: could not access storage.
629 03:22:42.186551 Net: eth0: ethernet@ff3f0000
630 03:22:42.186982 starting USB...
631 03:22:42.438453 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 03:22:42.439049 Starting the controller
633 03:22:42.445402 USB XHCI 1.10
634 03:22:44.159853 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 03:22:44.160592 bl2_stage_init 0x01
636 03:22:44.161092 bl2_stage_init 0x81
637 03:22:44.165291 hw id: 0x0000 - pwm id 0x01
638 03:22:44.165794 bl2_stage_init 0xc1
639 03:22:44.166252 bl2_stage_init 0x02
640 03:22:44.166700
641 03:22:44.170939 L0:00000000
642 03:22:44.171430 L1:20000703
643 03:22:44.171882 L2:00008067
644 03:22:44.172375 L3:14000000
645 03:22:44.176461 B2:00402000
646 03:22:44.176950 B1:e0f83180
647 03:22:44.177401
648 03:22:44.177846 TE: 58167
649 03:22:44.178287
650 03:22:44.182243 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 03:22:44.182750
652 03:22:44.183205 Board ID = 1
653 03:22:44.187755 Set A53 clk to 24M
654 03:22:44.188296 Set A73 clk to 24M
655 03:22:44.188751 Set clk81 to 24M
656 03:22:44.193343 A53 clk: 1200 MHz
657 03:22:44.193833 A73 clk: 1200 MHz
658 03:22:44.194280 CLK81: 166.6M
659 03:22:44.194723 smccc: 00012abe
660 03:22:44.198927 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 03:22:44.204573 board id: 1
662 03:22:44.210576 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 03:22:44.220939 fw parse done
664 03:22:44.226909 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 03:22:44.269550 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 03:22:44.280521 PIEI prepare done
667 03:22:44.281034 fastboot data load
668 03:22:44.281491 fastboot data verify
669 03:22:44.286122 verify result: 266
670 03:22:44.291702 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 03:22:44.292248 LPDDR4 probe
672 03:22:44.292711 ddr clk to 1584MHz
673 03:22:44.299695 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 03:22:44.336997
675 03:22:44.337515 dmc_version 0001
676 03:22:44.343602 Check phy result
677 03:22:44.349480 INFO : End of CA training
678 03:22:44.349980 INFO : End of initialization
679 03:22:44.355081 INFO : Training has run successfully!
680 03:22:44.355573 Check phy result
681 03:22:44.360721 INFO : End of initialization
682 03:22:44.361213 INFO : End of read enable training
683 03:22:44.366257 INFO : End of fine write leveling
684 03:22:44.371894 INFO : End of Write leveling coarse delay
685 03:22:44.372448 INFO : Training has run successfully!
686 03:22:44.372904 Check phy result
687 03:22:44.377469 INFO : End of initialization
688 03:22:44.377966 INFO : End of read dq deskew training
689 03:22:44.383056 INFO : End of MPR read delay center optimization
690 03:22:44.388710 INFO : End of write delay center optimization
691 03:22:44.394271 INFO : End of read delay center optimization
692 03:22:44.394761 INFO : End of max read latency training
693 03:22:44.399866 INFO : Training has run successfully!
694 03:22:44.400258 1D training succeed
695 03:22:44.409080 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 03:22:44.456748 Check phy result
697 03:22:44.457159 INFO : End of initialization
698 03:22:44.479266 INFO : End of 2D read delay Voltage center optimization
699 03:22:44.499562 INFO : End of 2D read delay Voltage center optimization
700 03:22:44.551636 INFO : End of 2D write delay Voltage center optimization
701 03:22:44.600955 INFO : End of 2D write delay Voltage center optimization
702 03:22:44.606439 INFO : Training has run successfully!
703 03:22:44.606960
704 03:22:44.607428 channel==0
705 03:22:44.612056 RxClkDly_Margin_A0==88 ps 9
706 03:22:44.612588 TxDqDly_Margin_A0==98 ps 10
707 03:22:44.617633 RxClkDly_Margin_A1==88 ps 9
708 03:22:44.618141 TxDqDly_Margin_A1==98 ps 10
709 03:22:44.618605 TrainedVREFDQ_A0==74
710 03:22:44.623236 TrainedVREFDQ_A1==74
711 03:22:44.623741 VrefDac_Margin_A0==24
712 03:22:44.624241 DeviceVref_Margin_A0==40
713 03:22:44.628853 VrefDac_Margin_A1==24
714 03:22:44.629358 DeviceVref_Margin_A1==40
715 03:22:44.629812
716 03:22:44.630259
717 03:22:44.634429 channel==1
718 03:22:44.634932 RxClkDly_Margin_A0==98 ps 10
719 03:22:44.635383 TxDqDly_Margin_A0==98 ps 10
720 03:22:44.640044 RxClkDly_Margin_A1==98 ps 10
721 03:22:44.640558 TxDqDly_Margin_A1==88 ps 9
722 03:22:44.645638 TrainedVREFDQ_A0==77
723 03:22:44.646144 TrainedVREFDQ_A1==77
724 03:22:44.646600 VrefDac_Margin_A0==22
725 03:22:44.651303 DeviceVref_Margin_A0==37
726 03:22:44.651914 VrefDac_Margin_A1==22
727 03:22:44.656851 DeviceVref_Margin_A1==37
728 03:22:44.657399
729 03:22:44.657865 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 03:22:44.662443
731 03:22:44.690428 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000019 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 03:22:44.691052 2D training succeed
733 03:22:44.696040 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 03:22:44.701621 auto size-- 65535DDR cs0 size: 2048MB
735 03:22:44.702137 DDR cs1 size: 2048MB
736 03:22:44.707227 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 03:22:44.707728 cs0 DataBus test pass
738 03:22:44.712841 cs1 DataBus test pass
739 03:22:44.713344 cs0 AddrBus test pass
740 03:22:44.713799 cs1 AddrBus test pass
741 03:22:44.714242
742 03:22:44.718435 100bdlr_step_size ps== 420
743 03:22:44.718949 result report
744 03:22:44.724055 boot times 0Enable ddr reg access
745 03:22:44.729479 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 03:22:44.743004 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 03:22:45.316614 0.0;M3 CHK:0;cm4_sp_mode 0
748 03:22:45.317287 MVN_1=0x00000000
749 03:22:45.322116 MVN_2=0x00000000
750 03:22:45.327940 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 03:22:45.328669 OPS=0x10
752 03:22:45.329112 ring efuse init
753 03:22:45.329537 chipver efuse init
754 03:22:45.333448 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 03:22:45.339031 [0.018960 Inits done]
756 03:22:45.339534 secure task start!
757 03:22:45.339964 high task start!
758 03:22:45.343589 low task start!
759 03:22:45.344110 run into bl31
760 03:22:45.350239 NOTICE: BL31: v1.3(release):4fc40b1
761 03:22:45.358052 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 03:22:45.358556 NOTICE: BL31: G12A normal boot!
763 03:22:45.383477 NOTICE: BL31: BL33 decompress pass
764 03:22:45.389071 ERROR: Error initializing runtime service opteed_fast
765 03:22:46.622012
766 03:22:46.622691
767 03:22:46.630375 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 03:22:46.630912
769 03:22:46.631395 Model: Libre Computer AML-A311D-CC Alta
770 03:22:46.838800 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 03:22:46.862200 DRAM: 2 GiB (effective 3.8 GiB)
772 03:22:47.005190 Core: 408 devices, 31 uclasses, devicetree: separate
773 03:22:47.011150 WDT: Not starting watchdog@f0d0
774 03:22:47.043346 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 03:22:47.055786 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 03:22:47.060574 ** Bad device specification mmc 0 **
777 03:22:47.071137 Card did not respond to voltage select! : -110
778 03:22:47.078746 ** Bad device specification mmc 0 **
779 03:22:47.079251 Couldn't find partition mmc 0
780 03:22:47.087080 Card did not respond to voltage select! : -110
781 03:22:47.092770 ** Bad device specification mmc 0 **
782 03:22:47.093091 Couldn't find partition mmc 0
783 03:22:47.098225 Error: could not access storage.
784 03:22:47.440210 Net: eth0: ethernet@ff3f0000
785 03:22:47.440643 starting USB...
786 03:22:47.691917 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 03:22:47.692693 Starting the controller
788 03:22:47.698912 USB XHCI 1.10
789 03:22:49.858354 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 03:22:49.859046 bl2_stage_init 0x81
791 03:22:49.863916 hw id: 0x0000 - pwm id 0x01
792 03:22:49.864469 bl2_stage_init 0xc1
793 03:22:49.864927 bl2_stage_init 0x02
794 03:22:49.865378
795 03:22:49.869586 L0:00000000
796 03:22:49.870086 L1:20000703
797 03:22:49.870537 L2:00008067
798 03:22:49.870980 L3:14000000
799 03:22:49.871415 B2:00402000
800 03:22:49.875038 B1:e0f83180
801 03:22:49.875539
802 03:22:49.876024 TE: 58150
803 03:22:49.876481
804 03:22:49.880614 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 03:22:49.881118
806 03:22:49.881568 Board ID = 1
807 03:22:49.886303 Set A53 clk to 24M
808 03:22:49.886806 Set A73 clk to 24M
809 03:22:49.887254 Set clk81 to 24M
810 03:22:49.891834 A53 clk: 1200 MHz
811 03:22:49.892355 A73 clk: 1200 MHz
812 03:22:49.892807 CLK81: 166.6M
813 03:22:49.893245 smccc: 00012aab
814 03:22:49.897436 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 03:22:49.902985 board id: 1
816 03:22:49.908784 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 03:22:49.919406 fw parse done
818 03:22:49.925416 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 03:22:49.968236 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 03:22:49.979074 PIEI prepare done
821 03:22:49.979604 fastboot data load
822 03:22:49.980111 fastboot data verify
823 03:22:49.985375 verify result: 266
824 03:22:49.990227 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 03:22:49.990764 LPDDR4 probe
826 03:22:49.991226 ddr clk to 1584MHz
827 03:22:49.998262 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 03:22:50.035542
829 03:22:50.036244 dmc_version 0001
830 03:22:50.042212 Check phy result
831 03:22:50.048052 INFO : End of CA training
832 03:22:50.048592 INFO : End of initialization
833 03:22:50.054090 INFO : Training has run successfully!
834 03:22:50.054622 Check phy result
835 03:22:50.059545 INFO : End of initialization
836 03:22:50.060103 INFO : End of read enable training
837 03:22:50.065594 INFO : End of fine write leveling
838 03:22:50.071279 INFO : End of Write leveling coarse delay
839 03:22:50.071816 INFO : Training has run successfully!
840 03:22:50.072376 Check phy result
841 03:22:50.076134 INFO : End of initialization
842 03:22:50.076662 INFO : End of read dq deskew training
843 03:22:50.082919 INFO : End of MPR read delay center optimization
844 03:22:50.087965 INFO : End of write delay center optimization
845 03:22:50.093303 INFO : End of read delay center optimization
846 03:22:50.093968 INFO : End of max read latency training
847 03:22:50.100442 INFO : Training has run successfully!
848 03:22:50.101121 1D training succeed
849 03:22:50.107754 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 03:22:50.155252 Check phy result
851 03:22:50.155679 INFO : End of initialization
852 03:22:50.176987 INFO : End of 2D read delay Voltage center optimization
853 03:22:50.197300 INFO : End of 2D read delay Voltage center optimization
854 03:22:50.248381 INFO : End of 2D write delay Voltage center optimization
855 03:22:50.298617 INFO : End of 2D write delay Voltage center optimization
856 03:22:50.304112 INFO : Training has run successfully!
857 03:22:50.304622
858 03:22:50.305095 channel==0
859 03:22:50.309778 RxClkDly_Margin_A0==88 ps 9
860 03:22:50.310274 TxDqDly_Margin_A0==98 ps 10
861 03:22:50.313042 RxClkDly_Margin_A1==88 ps 9
862 03:22:50.313607 TxDqDly_Margin_A1==98 ps 10
863 03:22:50.318674 TrainedVREFDQ_A0==74
864 03:22:50.319174 TrainedVREFDQ_A1==74
865 03:22:50.324255 VrefDac_Margin_A0==25
866 03:22:50.324824 DeviceVref_Margin_A0==40
867 03:22:50.325279 VrefDac_Margin_A1==25
868 03:22:50.329821 DeviceVref_Margin_A1==40
869 03:22:50.330383
870 03:22:50.330817
871 03:22:50.331244 channel==1
872 03:22:50.331663 RxClkDly_Margin_A0==98 ps 10
873 03:22:50.333249 TxDqDly_Margin_A0==98 ps 10
874 03:22:50.338818 RxClkDly_Margin_A1==98 ps 10
875 03:22:50.339302 TxDqDly_Margin_A1==98 ps 10
876 03:22:50.344444 TrainedVREFDQ_A0==77
877 03:22:50.344928 TrainedVREFDQ_A1==78
878 03:22:50.345360 VrefDac_Margin_A0==22
879 03:22:50.350031 DeviceVref_Margin_A0==37
880 03:22:50.350498 VrefDac_Margin_A1==22
881 03:22:50.350924 DeviceVref_Margin_A1==36
882 03:22:50.351348
883 03:22:50.359013 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 03:22:50.359499
885 03:22:50.384908 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
886 03:22:50.390455 2D training succeed
887 03:22:50.393919 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 03:22:50.399384 auto size-- 65535DDR cs0 size: 2048MB
889 03:22:50.399859 DDR cs1 size: 2048MB
890 03:22:50.404913 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 03:22:50.405379 cs0 DataBus test pass
892 03:22:50.410540 cs1 DataBus test pass
893 03:22:50.411009 cs0 AddrBus test pass
894 03:22:50.411438 cs1 AddrBus test pass
895 03:22:50.411863
896 03:22:50.416159 100bdlr_step_size ps== 420
897 03:22:50.416644 result report
898 03:22:50.421743 boot times 0Enable ddr reg access
899 03:22:50.427149 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 03:22:50.440696 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 03:22:51.014334 0.0;M3 CHK:0;cm4_sp_mode 0
902 03:22:51.014759 MVN_1=0x00000000
903 03:22:51.019807 MVN_2=0x00000000
904 03:22:51.025571 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 03:22:51.026078 OPS=0x10
906 03:22:51.026332 ring efuse init
907 03:22:51.026544 chipver efuse init
908 03:22:51.031190 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 03:22:51.036727 [0.018961 Inits done]
910 03:22:51.037171 secure task start!
911 03:22:51.037499 high task start!
912 03:22:51.041326 low task start!
913 03:22:51.041628 run into bl31
914 03:22:51.048000 NOTICE: BL31: v1.3(release):4fc40b1
915 03:22:51.055794 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 03:22:51.056287 NOTICE: BL31: G12A normal boot!
917 03:22:51.081185 NOTICE: BL31: BL33 decompress pass
918 03:22:51.086826 ERROR: Error initializing runtime service opteed_fast
919 03:22:52.319703
920 03:22:52.320174
921 03:22:52.328171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 03:22:52.328698
923 03:22:52.329077 Model: Libre Computer AML-A311D-CC Alta
924 03:22:52.536663 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 03:22:52.560022 DRAM: 2 GiB (effective 3.8 GiB)
926 03:22:52.703028 Core: 408 devices, 31 uclasses, devicetree: separate
927 03:22:52.708864 WDT: Not starting watchdog@f0d0
928 03:22:52.741090 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 03:22:52.753544 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 03:22:52.758466 ** Bad device specification mmc 0 **
931 03:22:52.768865 Card did not respond to voltage select! : -110
932 03:22:52.776502 ** Bad device specification mmc 0 **
933 03:22:52.776854 Couldn't find partition mmc 0
934 03:22:52.784889 Card did not respond to voltage select! : -110
935 03:22:52.790316 ** Bad device specification mmc 0 **
936 03:22:52.790659 Couldn't find partition mmc 0
937 03:22:52.795420 Error: could not access storage.
938 03:22:53.139131 Net: eth0: ethernet@ff3f0000
939 03:22:53.139779 starting USB...
940 03:22:53.390044 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 03:22:53.390524 Starting the controller
942 03:22:53.396863 USB XHCI 1.10
943 03:22:54.950794 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 03:22:54.958807 scanning usb for storage devices... 0 Storage Device(s) found
946 03:22:55.010268 Hit any key to stop autoboot: 1
947 03:22:55.011198 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 03:22:55.011573 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 03:22:55.011839 Setting prompt string to ['=>']
950 03:22:55.012172 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 03:22:55.026376 0
952 03:22:55.027105 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 03:22:55.027566 Sending with 10 millisecond of delay
955 03:22:56.164878 => setenv autoload no
956 03:22:56.175760 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 03:22:56.181268 setenv autoload no
958 03:22:56.182057 Sending with 10 millisecond of delay
960 03:22:57.981273 => setenv initrd_high 0xffffffff
961 03:22:57.991855 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 03:22:57.992443 setenv initrd_high 0xffffffff
963 03:22:57.992906 Sending with 10 millisecond of delay
965 03:22:59.608423 => setenv fdt_high 0xffffffff
966 03:22:59.619168 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 03:22:59.619670 setenv fdt_high 0xffffffff
968 03:22:59.620173 Sending with 10 millisecond of delay
970 03:22:59.911650 => dhcp
971 03:22:59.922374 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 03:22:59.922869 dhcp
973 03:22:59.923104 Speed: 1000, full duplex
974 03:22:59.923314 BOOTP broadcast 1
975 03:23:00.060639 DHCP client bound to address 192.168.6.27 (138 ms)
976 03:23:00.061246 Sending with 10 millisecond of delay
978 03:23:01.737348 => setenv serverip 192.168.6.2
979 03:23:01.748060 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 03:23:01.748809 setenv serverip 192.168.6.2
981 03:23:01.749365 Sending with 10 millisecond of delay
983 03:23:05.473533 => tftpboot 0x01080000 964608/tftp-deploy-c58uuf0u/kernel/uImage
984 03:23:05.484334 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 03:23:05.484978 tftpboot 0x01080000 964608/tftp-deploy-c58uuf0u/kernel/uImage
986 03:23:05.485257 Speed: 1000, full duplex
987 03:23:05.485496 Using ethernet@ff3f0000 device
988 03:23:05.486750 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 03:23:05.492294 Filename '964608/tftp-deploy-c58uuf0u/kernel/uImage'.
990 03:23:05.496305 Load address: 0x1080000
991 03:23:09.044762 Loading: *################################################## 43.6 MiB
992 03:23:09.045425 12.3 MiB/s
993 03:23:09.045868 done
994 03:23:09.049246 Bytes transferred = 45713984 (2b98a40 hex)
995 03:23:09.050162 Sending with 10 millisecond of delay
997 03:23:13.738635 => tftpboot 0x08000000 964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
998 03:23:13.749243 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
999 03:23:13.749864 tftpboot 0x08000000 964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot
1000 03:23:13.750124 Speed: 1000, full duplex
1001 03:23:13.750333 Using ethernet@ff3f0000 device
1002 03:23:13.752066 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 03:23:13.760673 Filename '964608/tftp-deploy-c58uuf0u/ramdisk/ramdisk.cpio.gz.uboot'.
1004 03:23:13.761200 Load address: 0x8000000
1005 03:23:15.225597 Loading: *################################################# UDP wrong checksum 00000005 0000df06
1006 03:23:20.226913 T UDP wrong checksum 00000005 0000df06
1007 03:23:30.229927 T T UDP wrong checksum 00000005 0000df06
1008 03:23:32.510598 UDP wrong checksum 000000ff 00001603
1009 03:23:32.561616 UDP wrong checksum 000000ff 0000a0f5
1010 03:23:45.350681 T T T UDP wrong checksum 000000ff 0000bca8
1011 03:23:45.399747 UDP wrong checksum 000000ff 0000569b
1012 03:23:50.231047 UDP wrong checksum 00000005 0000df06
1013 03:24:10.238294 T T T T
1014 03:24:10.238935 Retry count exceeded; starting again
1016 03:24:10.240578 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1019 03:24:10.242628 end: 2.4 uboot-commands (duration 00:01:47) [common]
1021 03:24:10.244167 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 03:24:10.245276 end: 2 uboot-action (duration 00:01:47) [common]
1025 03:24:10.246895 Cleaning after the job
1026 03:24:10.247479 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/ramdisk
1027 03:24:10.249068 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/kernel
1028 03:24:10.259930 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/dtb
1029 03:24:10.261126 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/nfsrootfs
1030 03:24:10.325658 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964608/tftp-deploy-c58uuf0u/modules
1031 03:24:10.332043 start: 4.1 power-off (timeout 00:00:30) [common]
1032 03:24:10.332604 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 03:24:10.364833 >> OK - accepted request
1034 03:24:10.366756 Returned 0 in 0 seconds
1035 03:24:10.467501 end: 4.1 power-off (duration 00:00:00) [common]
1037 03:24:10.468533 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 03:24:10.469187 Listened to connection for namespace 'common' for up to 1s
1039 03:24:11.470144 Finalising connection for namespace 'common'
1040 03:24:11.470608 Disconnecting from shell: Finalise
1041 03:24:11.470881 =>
1042 03:24:11.571609 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 03:24:11.572116 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964608
1044 03:24:14.106376 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964608
1045 03:24:14.106935 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.