Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:13:38.953883 lava-dispatcher, installed at version: 2024.01
2 03:13:38.954731 start: 0 validate
3 03:13:38.955225 Start time: 2024-11-09 03:13:38.955195+00:00 (UTC)
4 03:13:38.955782 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:13:38.956347 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:13:38.997703 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:13:38.998361 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:13:39.027828 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:13:39.028517 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:13:39.057032 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:13:39.057583 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:13:39.091256 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:13:39.091770 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-247-gbf99f9b489d8e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:13:39.131486 validate duration: 0.18
16 03:13:39.133112 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:13:39.133685 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:13:39.134241 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:13:39.135157 Not decompressing ramdisk as can be used compressed.
20 03:13:39.135857 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 03:13:39.136360 saving as /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/ramdisk/initrd.cpio.gz
22 03:13:39.136854 total size: 5628140 (5 MB)
23 03:13:39.173903 progress 0 % (0 MB)
24 03:13:39.179626 progress 5 % (0 MB)
25 03:13:39.185896 progress 10 % (0 MB)
26 03:13:39.191132 progress 15 % (0 MB)
27 03:13:39.197010 progress 20 % (1 MB)
28 03:13:39.202140 progress 25 % (1 MB)
29 03:13:39.208081 progress 30 % (1 MB)
30 03:13:39.214013 progress 35 % (1 MB)
31 03:13:39.219298 progress 40 % (2 MB)
32 03:13:39.225190 progress 45 % (2 MB)
33 03:13:39.230657 progress 50 % (2 MB)
34 03:13:39.236636 progress 55 % (2 MB)
35 03:13:39.242511 progress 60 % (3 MB)
36 03:13:39.247816 progress 65 % (3 MB)
37 03:13:39.253728 progress 70 % (3 MB)
38 03:13:39.259019 progress 75 % (4 MB)
39 03:13:39.264878 progress 80 % (4 MB)
40 03:13:39.271566 progress 85 % (4 MB)
41 03:13:39.276173 progress 90 % (4 MB)
42 03:13:39.280357 progress 95 % (5 MB)
43 03:13:39.283671 progress 100 % (5 MB)
44 03:13:39.284370 5 MB downloaded in 0.15 s (36.38 MB/s)
45 03:13:39.284943 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:13:39.285908 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:13:39.286212 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:13:39.286484 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:13:39.286963 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/kernel/Image
51 03:13:39.287247 saving as /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/kernel/Image
52 03:13:39.287459 total size: 45713920 (43 MB)
53 03:13:39.287668 No compression specified
54 03:13:39.324849 progress 0 % (0 MB)
55 03:13:39.352803 progress 5 % (2 MB)
56 03:13:39.381269 progress 10 % (4 MB)
57 03:13:39.409487 progress 15 % (6 MB)
58 03:13:39.438074 progress 20 % (8 MB)
59 03:13:39.466105 progress 25 % (10 MB)
60 03:13:39.494503 progress 30 % (13 MB)
61 03:13:39.522688 progress 35 % (15 MB)
62 03:13:39.550652 progress 40 % (17 MB)
63 03:13:39.578248 progress 45 % (19 MB)
64 03:13:39.606320 progress 50 % (21 MB)
65 03:13:39.634463 progress 55 % (24 MB)
66 03:13:39.662629 progress 60 % (26 MB)
67 03:13:39.690260 progress 65 % (28 MB)
68 03:13:39.718624 progress 70 % (30 MB)
69 03:13:39.746869 progress 75 % (32 MB)
70 03:13:39.780977 progress 80 % (34 MB)
71 03:13:39.809009 progress 85 % (37 MB)
72 03:13:39.837551 progress 90 % (39 MB)
73 03:13:39.865990 progress 95 % (41 MB)
74 03:13:39.894191 progress 100 % (43 MB)
75 03:13:39.894731 43 MB downloaded in 0.61 s (71.79 MB/s)
76 03:13:39.895210 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:13:39.896054 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:13:39.896337 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:13:39.896603 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:13:39.897057 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:13:39.897338 saving as /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:13:39.897546 total size: 54703 (0 MB)
84 03:13:39.897754 No compression specified
85 03:13:39.936331 progress 59 % (0 MB)
86 03:13:39.937178 progress 100 % (0 MB)
87 03:13:39.937723 0 MB downloaded in 0.04 s (1.30 MB/s)
88 03:13:39.938187 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:13:39.939002 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:13:39.939264 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:13:39.939526 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:13:39.939999 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 03:13:39.940260 saving as /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/nfsrootfs/full.rootfs.tar
95 03:13:39.940466 total size: 474398908 (452 MB)
96 03:13:39.940677 Using unxz to decompress xz
97 03:13:39.980581 progress 0 % (0 MB)
98 03:13:41.082846 progress 5 % (22 MB)
99 03:13:42.541883 progress 10 % (45 MB)
100 03:13:42.988969 progress 15 % (67 MB)
101 03:13:43.755667 progress 20 % (90 MB)
102 03:13:44.291112 progress 25 % (113 MB)
103 03:13:44.634787 progress 30 % (135 MB)
104 03:13:45.247178 progress 35 % (158 MB)
105 03:13:46.181626 progress 40 % (181 MB)
106 03:13:46.931657 progress 45 % (203 MB)
107 03:13:47.488460 progress 50 % (226 MB)
108 03:13:48.134702 progress 55 % (248 MB)
109 03:13:49.355950 progress 60 % (271 MB)
110 03:13:50.861186 progress 65 % (294 MB)
111 03:13:52.528255 progress 70 % (316 MB)
112 03:13:55.649677 progress 75 % (339 MB)
113 03:13:58.086704 progress 80 % (361 MB)
114 03:14:01.051746 progress 85 % (384 MB)
115 03:14:04.224284 progress 90 % (407 MB)
116 03:14:07.441136 progress 95 % (429 MB)
117 03:14:10.629549 progress 100 % (452 MB)
118 03:14:10.643385 452 MB downloaded in 30.70 s (14.74 MB/s)
119 03:14:10.644288 end: 1.4.1 http-download (duration 00:00:31) [common]
121 03:14:10.645877 end: 1.4 download-retry (duration 00:00:31) [common]
122 03:14:10.646389 start: 1.5 download-retry (timeout 00:09:28) [common]
123 03:14:10.646895 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 03:14:10.647795 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-247-gbf99f9b489d8e/arm64/defconfig/gcc-12/modules.tar.xz
125 03:14:10.648298 saving as /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/modules/modules.tar
126 03:14:10.648703 total size: 11612756 (11 MB)
127 03:14:10.649146 Using unxz to decompress xz
128 03:14:10.699264 progress 0 % (0 MB)
129 03:14:10.766022 progress 5 % (0 MB)
130 03:14:10.841942 progress 10 % (1 MB)
131 03:14:10.939716 progress 15 % (1 MB)
132 03:14:11.033629 progress 20 % (2 MB)
133 03:14:11.115443 progress 25 % (2 MB)
134 03:14:11.193411 progress 30 % (3 MB)
135 03:14:11.273260 progress 35 % (3 MB)
136 03:14:11.347499 progress 40 % (4 MB)
137 03:14:11.426911 progress 45 % (5 MB)
138 03:14:11.513221 progress 50 % (5 MB)
139 03:14:11.592702 progress 55 % (6 MB)
140 03:14:11.679975 progress 60 % (6 MB)
141 03:14:11.763119 progress 65 % (7 MB)
142 03:14:11.848311 progress 70 % (7 MB)
143 03:14:11.931678 progress 75 % (8 MB)
144 03:14:12.017910 progress 80 % (8 MB)
145 03:14:12.100133 progress 85 % (9 MB)
146 03:14:12.180539 progress 90 % (9 MB)
147 03:14:12.261008 progress 95 % (10 MB)
148 03:14:12.340653 progress 100 % (11 MB)
149 03:14:12.353028 11 MB downloaded in 1.70 s (6.50 MB/s)
150 03:14:12.353691 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:14:12.354569 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:14:12.354842 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 03:14:12.355108 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 03:14:27.680539 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964578/extract-nfsrootfs-xp4ks2uh
156 03:14:27.681133 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 03:14:27.681417 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 03:14:27.682112 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs
159 03:14:27.682556 makedir: /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin
160 03:14:27.682875 makedir: /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/tests
161 03:14:27.683184 makedir: /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/results
162 03:14:27.683506 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-add-keys
163 03:14:27.684042 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-add-sources
164 03:14:27.684549 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-background-process-start
165 03:14:27.685030 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-background-process-stop
166 03:14:27.685566 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-common-functions
167 03:14:27.686080 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-echo-ipv4
168 03:14:27.686548 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-install-packages
169 03:14:27.687021 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-installed-packages
170 03:14:27.687561 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-os-build
171 03:14:27.688067 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-probe-channel
172 03:14:27.688551 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-probe-ip
173 03:14:27.689093 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-target-ip
174 03:14:27.689586 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-target-mac
175 03:14:27.690077 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-target-storage
176 03:14:27.690545 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-case
177 03:14:27.691013 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-event
178 03:14:27.691471 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-feedback
179 03:14:27.691929 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-raise
180 03:14:27.692431 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-reference
181 03:14:27.692897 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-runner
182 03:14:27.693383 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-set
183 03:14:27.693874 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-test-shell
184 03:14:27.694347 Updating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-install-packages (oe)
185 03:14:27.694859 Updating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/bin/lava-installed-packages (oe)
186 03:14:27.695279 Creating /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/environment
187 03:14:27.695632 LAVA metadata
188 03:14:27.695880 - LAVA_JOB_ID=964578
189 03:14:27.696123 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:14:27.696471 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 03:14:27.697389 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:14:27.697689 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 03:14:27.697894 skipped lava-vland-overlay
194 03:14:27.698129 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:14:27.698378 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 03:14:27.698593 skipped lava-multinode-overlay
197 03:14:27.698829 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:14:27.699074 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 03:14:27.699313 Loading test definitions
200 03:14:27.699583 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 03:14:27.699799 Using /lava-964578 at stage 0
202 03:14:27.700986 uuid=964578_1.6.2.4.1 testdef=None
203 03:14:27.701285 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:14:27.701543 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 03:14:27.703211 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:14:27.704004 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 03:14:27.706133 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:14:27.706944 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 03:14:27.708997 runner path: /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 964578_1.6.2.4.1
212 03:14:27.709527 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:14:27.710263 Creating lava-test-runner.conf files
215 03:14:27.710461 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964578/lava-overlay-80pkyqbs/lava-964578/0 for stage 0
216 03:14:27.710786 - 0_v4l2-decoder-conformance-vp9
217 03:14:27.711110 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:14:27.711376 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 03:14:27.732356 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:14:27.732691 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 03:14:27.732945 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:14:27.733206 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:14:27.733463 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 03:14:28.346881 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:14:28.347316 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 03:14:28.347560 extracting modules file /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964578/extract-nfsrootfs-xp4ks2uh
227 03:14:29.748833 extracting modules file /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk
228 03:14:31.150174 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:14:31.150616 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 03:14:31.150889 [common] Applying overlay to NFS
231 03:14:31.151101 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964578/compress-overlay-e0abu1_y/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964578/extract-nfsrootfs-xp4ks2uh
232 03:14:31.180137 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:14:31.180567 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 03:14:31.180869 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 03:14:31.181113 Converting downloaded kernel to a uImage
236 03:14:31.181450 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/kernel/Image /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/kernel/uImage
237 03:14:31.640202 output: Image Name:
238 03:14:31.640625 output: Created: Sat Nov 9 03:14:31 2024
239 03:14:31.640835 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:14:31.641040 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 03:14:31.641238 output: Load Address: 01080000
242 03:14:31.641436 output: Entry Point: 01080000
243 03:14:31.641632 output:
244 03:14:31.641968 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 03:14:31.642234 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 03:14:31.642500 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 03:14:31.642754 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:14:31.643009 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 03:14:31.643265 Building ramdisk /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk
250 03:14:33.804883 >> 166792 blocks
251 03:14:41.606104 Adding RAMdisk u-boot header.
252 03:14:41.606736 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk.cpio.gz.uboot
253 03:14:41.856824 output: Image Name:
254 03:14:41.857217 output: Created: Sat Nov 9 03:14:41 2024
255 03:14:41.857428 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:14:41.857634 output: Data Size: 23432921 Bytes = 22883.71 KiB = 22.35 MiB
257 03:14:41.857834 output: Load Address: 00000000
258 03:14:41.858031 output: Entry Point: 00000000
259 03:14:41.858228 output:
260 03:14:41.858932 rename /var/lib/lava/dispatcher/tmp/964578/extract-overlay-ramdisk-cc5bll37/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
261 03:14:41.859519 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 03:14:41.859929 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 03:14:41.861239 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 03:14:41.861804 No LXC device requested
265 03:14:41.862363 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:14:41.862923 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 03:14:41.863887 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:14:41.864716 Checking files for TFTP limit of 4294967296 bytes.
269 03:14:41.868639 end: 1 tftp-deploy (duration 00:01:03) [common]
270 03:14:41.869374 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:14:41.870228 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:14:41.871003 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:14:41.871793 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:14:41.872704 Using kernel file from prepare-kernel: 964578/tftp-deploy-l8ldnp1r/kernel/uImage
275 03:14:41.873757 substitutions:
276 03:14:41.874438 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:14:41.874901 - {DTB_ADDR}: 0x01070000
278 03:14:41.875422 - {DTB}: 964578/tftp-deploy-l8ldnp1r/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:14:41.875872 - {INITRD}: 964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
280 03:14:41.876401 - {KERNEL_ADDR}: 0x01080000
281 03:14:41.876891 - {KERNEL}: 964578/tftp-deploy-l8ldnp1r/kernel/uImage
282 03:14:41.877338 - {LAVA_MAC}: None
283 03:14:41.877817 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964578/extract-nfsrootfs-xp4ks2uh
284 03:14:41.878257 - {NFS_SERVER_IP}: 192.168.6.2
285 03:14:41.878688 - {PRESEED_CONFIG}: None
286 03:14:41.879118 - {PRESEED_LOCAL}: None
287 03:14:41.879548 - {RAMDISK_ADDR}: 0x08000000
288 03:14:41.879973 - {RAMDISK}: 964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
289 03:14:41.880565 - {ROOT_PART}: None
290 03:14:41.881164 - {ROOT}: None
291 03:14:41.881880 - {SERVER_IP}: 192.168.6.2
292 03:14:41.882562 - {TEE_ADDR}: 0x83000000
293 03:14:41.883303 - {TEE}: None
294 03:14:41.884118 Parsed boot commands:
295 03:14:41.884777 - setenv autoload no
296 03:14:41.885343 - setenv initrd_high 0xffffffff
297 03:14:41.885850 - setenv fdt_high 0xffffffff
298 03:14:41.886419 - dhcp
299 03:14:41.886940 - setenv serverip 192.168.6.2
300 03:14:41.887593 - tftpboot 0x01080000 964578/tftp-deploy-l8ldnp1r/kernel/uImage
301 03:14:41.888053 - tftpboot 0x08000000 964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
302 03:14:41.888486 - tftpboot 0x01070000 964578/tftp-deploy-l8ldnp1r/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:14:41.888914 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964578/extract-nfsrootfs-xp4ks2uh,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:14:41.889352 - bootm 0x01080000 0x08000000 0x01070000
305 03:14:41.889964 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:14:41.891584 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:14:41.892108 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:14:41.908705 Setting prompt string to ['lava-test: # ']
310 03:14:41.910645 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:14:41.911793 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:14:41.912602 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:14:41.913413 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:14:41.914767 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:14:41.952900 >> OK - accepted request
316 03:14:41.955006 Returned 0 in 0 seconds
317 03:14:42.056271 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:14:42.058055 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:14:42.058673 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:14:42.059246 Setting prompt string to ['Hit any key to stop autoboot']
322 03:14:42.059765 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:14:42.061494 Trying 192.168.56.21...
324 03:14:42.062038 Connected to conserv1.
325 03:14:42.062517 Escape character is '^]'.
326 03:14:42.062993
327 03:14:42.063480 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 03:14:42.063946
329 03:14:53.436340 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:14:53.437059 bl2_stage_init 0x01
331 03:14:53.437531 bl2_stage_init 0x81
332 03:14:53.441634 hw id: 0x0000 - pwm id 0x01
333 03:14:53.442161 bl2_stage_init 0xc1
334 03:14:53.442602 bl2_stage_init 0x02
335 03:14:53.443034
336 03:14:53.447345 L0:00000000
337 03:14:53.447894 L1:20000703
338 03:14:53.448383 L2:00008067
339 03:14:53.448900 L3:14000000
340 03:14:53.450355 B2:00402000
341 03:14:53.451029 B1:e0f83180
342 03:14:53.451579
343 03:14:53.452072 TE: 58124
344 03:14:53.452592
345 03:14:53.461456 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:14:53.462040
347 03:14:53.462485 Board ID = 1
348 03:14:53.462913 Set A53 clk to 24M
349 03:14:53.463412 Set A73 clk to 24M
350 03:14:53.466933 Set clk81 to 24M
351 03:14:53.467409 A53 clk: 1200 MHz
352 03:14:53.467841 A73 clk: 1200 MHz
353 03:14:53.472640 CLK81: 166.6M
354 03:14:53.473120 smccc: 00012a92
355 03:14:53.478181 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:14:53.478636 board id: 1
357 03:14:53.486809 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:14:53.497470 fw parse done
359 03:14:53.502452 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:14:53.545967 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:14:53.556795 PIEI prepare done
362 03:14:53.557402 fastboot data load
363 03:14:53.557847 fastboot data verify
364 03:14:53.562495 verify result: 266
365 03:14:53.568128 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:14:53.568677 LPDDR4 probe
367 03:14:53.569328 ddr clk to 1584MHz
368 03:14:53.576126 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:14:53.613375
370 03:14:53.613938 dmc_version 0001
371 03:14:53.619181 Check phy result
372 03:14:53.625866 INFO : End of CA training
373 03:14:53.626336 INFO : End of initialization
374 03:14:53.631452 INFO : Training has run successfully!
375 03:14:53.631937 Check phy result
376 03:14:53.637071 INFO : End of initialization
377 03:14:53.637551 INFO : End of read enable training
378 03:14:53.642649 INFO : End of fine write leveling
379 03:14:53.648282 INFO : End of Write leveling coarse delay
380 03:14:53.648759 INFO : Training has run successfully!
381 03:14:53.649205 Check phy result
382 03:14:53.653861 INFO : End of initialization
383 03:14:53.654320 INFO : End of read dq deskew training
384 03:14:53.659465 INFO : End of MPR read delay center optimization
385 03:14:53.665020 INFO : End of write delay center optimization
386 03:14:53.670642 INFO : End of read delay center optimization
387 03:14:53.671130 INFO : End of max read latency training
388 03:14:53.676303 INFO : Training has run successfully!
389 03:14:53.676788 1D training succeed
390 03:14:53.684452 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:14:53.733136 Check phy result
392 03:14:53.733700 INFO : End of initialization
393 03:14:53.754749 INFO : End of 2D read delay Voltage center optimization
394 03:14:53.774966 INFO : End of 2D read delay Voltage center optimization
395 03:14:53.827165 INFO : End of 2D write delay Voltage center optimization
396 03:14:53.876459 INFO : End of 2D write delay Voltage center optimization
397 03:14:53.882027 INFO : Training has run successfully!
398 03:14:53.882543
399 03:14:53.883022 channel==0
400 03:14:53.887567 RxClkDly_Margin_A0==88 ps 9
401 03:14:53.888098 TxDqDly_Margin_A0==98 ps 10
402 03:14:53.893294 RxClkDly_Margin_A1==88 ps 9
403 03:14:53.893796 TxDqDly_Margin_A1==88 ps 9
404 03:14:53.894254 TrainedVREFDQ_A0==74
405 03:14:53.898816 TrainedVREFDQ_A1==74
406 03:14:53.899336 VrefDac_Margin_A0==25
407 03:14:53.899785 DeviceVref_Margin_A0==40
408 03:14:53.904417 VrefDac_Margin_A1==25
409 03:14:53.904891 DeviceVref_Margin_A1==40
410 03:14:53.905330
411 03:14:53.905767
412 03:14:53.906204 channel==1
413 03:14:53.910016 RxClkDly_Margin_A0==98 ps 10
414 03:14:53.910490 TxDqDly_Margin_A0==98 ps 10
415 03:14:53.915549 RxClkDly_Margin_A1==98 ps 10
416 03:14:53.916035 TxDqDly_Margin_A1==88 ps 9
417 03:14:53.921242 TrainedVREFDQ_A0==77
418 03:14:53.921707 TrainedVREFDQ_A1==77
419 03:14:53.922153 VrefDac_Margin_A0==22
420 03:14:53.926761 DeviceVref_Margin_A0==37
421 03:14:53.927221 VrefDac_Margin_A1==22
422 03:14:53.932401 DeviceVref_Margin_A1==37
423 03:14:53.932872
424 03:14:53.933318 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:14:53.933752
426 03:14:53.966021 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 03:14:53.966591 2D training succeed
428 03:14:53.971594 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:14:53.977251 auto size-- 65535DDR cs0 size: 2048MB
430 03:14:53.977792 DDR cs1 size: 2048MB
431 03:14:53.982754 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:14:53.983235 cs0 DataBus test pass
433 03:14:53.988370 cs1 DataBus test pass
434 03:14:53.988998 cs0 AddrBus test pass
435 03:14:53.989566 cs1 AddrBus test pass
436 03:14:53.990009
437 03:14:53.993986 100bdlr_step_size ps== 420
438 03:14:53.994476 result report
439 03:14:53.999650 boot times 0Enable ddr reg access
440 03:14:54.004977 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:14:54.018449 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:14:54.592160 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:14:54.592945 MVN_1=0x00000000
444 03:14:54.597517 MVN_2=0x00000000
445 03:14:54.603391 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:14:54.603890 OPS=0x10
447 03:14:54.604440 ring efuse init
448 03:14:54.604894 chipver efuse init
449 03:14:54.608875 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:14:54.614441 [0.018961 Inits done]
451 03:14:54.614915 secure task start!
452 03:14:54.615352 high task start!
453 03:14:54.619049 low task start!
454 03:14:54.619588 run into bl31
455 03:14:54.625725 NOTICE: BL31: v1.3(release):4fc40b1
456 03:14:54.633622 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:14:54.634229 NOTICE: BL31: G12A normal boot!
458 03:14:54.659051 NOTICE: BL31: BL33 decompress pass
459 03:14:54.664587 ERROR: Error initializing runtime service opteed_fast
460 03:14:55.897434
461 03:14:55.898077
462 03:14:55.905779 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:14:55.906256
464 03:14:55.906698 Model: Libre Computer AML-A311D-CC Alta
465 03:14:56.114269 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:14:56.137661 DRAM: 2 GiB (effective 3.8 GiB)
467 03:14:56.280771 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:14:56.286510 WDT: Not starting watchdog@f0d0
469 03:14:56.318728 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:14:56.331198 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:14:56.335223 ** Bad device specification mmc 0 **
472 03:14:56.346537 Card did not respond to voltage select! : -110
473 03:14:56.354180 ** Bad device specification mmc 0 **
474 03:14:56.354671 Couldn't find partition mmc 0
475 03:14:56.362508 Card did not respond to voltage select! : -110
476 03:14:56.368021 ** Bad device specification mmc 0 **
477 03:14:56.368631 Couldn't find partition mmc 0
478 03:14:56.373173 Error: could not access storage.
479 03:14:57.636591 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 03:14:57.637244 bl2_stage_init 0x81
481 03:14:57.642111 hw id: 0x0000 - pwm id 0x01
482 03:14:57.642650 bl2_stage_init 0xc1
483 03:14:57.643102 bl2_stage_init 0x02
484 03:14:57.643539
485 03:14:57.647745 L0:00000000
486 03:14:57.648299 L1:20000703
487 03:14:57.648742 L2:00008067
488 03:14:57.649173 L3:14000000
489 03:14:57.649600 B2:00402000
490 03:14:57.650563 B1:e0f83180
491 03:14:57.651048
492 03:14:57.651485 TE: 58150
493 03:14:57.651923
494 03:14:57.661718 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 03:14:57.662249
496 03:14:57.662717 Board ID = 1
497 03:14:57.663160 Set A53 clk to 24M
498 03:14:57.663612 Set A73 clk to 24M
499 03:14:57.667203 Set clk81 to 24M
500 03:14:57.667695 A53 clk: 1200 MHz
501 03:14:57.668180 A73 clk: 1200 MHz
502 03:14:57.672778 CLK81: 166.6M
503 03:14:57.673280 smccc: 00012aac
504 03:14:57.678368 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 03:14:57.678855 board id: 1
506 03:14:57.684025 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 03:14:57.697755 fw parse done
508 03:14:57.703788 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 03:14:57.745396 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 03:14:57.757257 PIEI prepare done
511 03:14:57.757750 fastboot data load
512 03:14:57.758193 fastboot data verify
513 03:14:57.763005 verify result: 266
514 03:14:57.768645 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 03:14:57.769159 LPDDR4 probe
516 03:14:57.769594 ddr clk to 1584MHz
517 03:14:57.776486 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 03:14:57.812975
519 03:14:57.813550 dmc_version 0001
520 03:14:57.820521 Check phy result
521 03:14:57.826353 INFO : End of CA training
522 03:14:57.826867 INFO : End of initialization
523 03:14:57.831960 INFO : Training has run successfully!
524 03:14:57.832520 Check phy result
525 03:14:57.837606 INFO : End of initialization
526 03:14:57.838154 INFO : End of read enable training
527 03:14:57.840929 INFO : End of fine write leveling
528 03:14:57.846496 INFO : End of Write leveling coarse delay
529 03:14:57.852110 INFO : Training has run successfully!
530 03:14:57.852685 Check phy result
531 03:14:57.853141 INFO : End of initialization
532 03:14:57.857676 INFO : End of read dq deskew training
533 03:14:57.863312 INFO : End of MPR read delay center optimization
534 03:14:57.863882 INFO : End of write delay center optimization
535 03:14:57.868928 INFO : End of read delay center optimization
536 03:14:57.876576 INFO : End of max read latency training
537 03:14:57.877172 INFO : Training has run successfully!
538 03:14:57.880114 1D training succeed
539 03:14:57.885959 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 03:14:57.933576 Check phy result
541 03:14:57.934188 INFO : End of initialization
542 03:14:57.956259 INFO : End of 2D read delay Voltage center optimization
543 03:14:57.976400 INFO : End of 2D read delay Voltage center optimization
544 03:14:58.028418 INFO : End of 2D write delay Voltage center optimization
545 03:14:58.077772 INFO : End of 2D write delay Voltage center optimization
546 03:14:58.083254 INFO : Training has run successfully!
547 03:14:58.083829
548 03:14:58.084399 channel==0
549 03:14:58.088941 RxClkDly_Margin_A0==88 ps 9
550 03:14:58.089510 TxDqDly_Margin_A0==98 ps 10
551 03:14:58.094463 RxClkDly_Margin_A1==88 ps 9
552 03:14:58.095013 TxDqDly_Margin_A1==98 ps 10
553 03:14:58.095467 TrainedVREFDQ_A0==74
554 03:14:58.100060 TrainedVREFDQ_A1==74
555 03:14:58.100606 VrefDac_Margin_A0==24
556 03:14:58.101134 DeviceVref_Margin_A0==40
557 03:14:58.105653 VrefDac_Margin_A1==24
558 03:14:58.106208 DeviceVref_Margin_A1==40
559 03:14:58.106653
560 03:14:58.107088
561 03:14:58.111253 channel==1
562 03:14:58.111827 RxClkDly_Margin_A0==98 ps 10
563 03:14:58.112315 TxDqDly_Margin_A0==98 ps 10
564 03:14:58.116899 RxClkDly_Margin_A1==98 ps 10
565 03:14:58.117454 TxDqDly_Margin_A1==88 ps 9
566 03:14:58.122432 TrainedVREFDQ_A0==77
567 03:14:58.122979 TrainedVREFDQ_A1==77
568 03:14:58.123421 VrefDac_Margin_A0==22
569 03:14:58.128045 DeviceVref_Margin_A0==37
570 03:14:58.128595 VrefDac_Margin_A1==22
571 03:14:58.133666 DeviceVref_Margin_A1==37
572 03:14:58.134208
573 03:14:58.134676 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 03:14:58.139260
575 03:14:58.167235 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
576 03:14:58.167821 2D training succeed
577 03:14:58.172878 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 03:14:58.178437 auto size-- 65535DDR cs0 size: 2048MB
579 03:14:58.178996 DDR cs1 size: 2048MB
580 03:14:58.184156 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 03:14:58.184695 cs0 DataBus test pass
582 03:14:58.189738 cs1 DataBus test pass
583 03:14:58.190250 cs0 AddrBus test pass
584 03:14:58.190671 cs1 AddrBus test pass
585 03:14:58.191077
586 03:14:58.195190 100bdlr_step_size ps== 420
587 03:14:58.195686 result report
588 03:14:58.200825 boot times 0Enable ddr reg access
589 03:14:58.206196 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 03:14:58.219704 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 03:14:58.793575 0.0;M3 CHK:0;cm4_sp_mode 0
592 03:14:58.794201 MVN_1=0x00000000
593 03:14:58.799062 MVN_2=0x00000000
594 03:14:58.804749 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 03:14:58.805308 OPS=0x10
596 03:14:58.805767 ring efuse init
597 03:14:58.806236 chipver efuse init
598 03:14:58.813031 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 03:14:58.813551 [0.018960 Inits done]
600 03:14:58.820530 secure task start!
601 03:14:58.820985 high task start!
602 03:14:58.821375 low task start!
603 03:14:58.821760 run into bl31
604 03:14:58.827191 NOTICE: BL31: v1.3(release):4fc40b1
605 03:14:58.835158 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 03:14:58.835666 NOTICE: BL31: G12A normal boot!
607 03:14:58.860376 NOTICE: BL31: BL33 decompress pass
608 03:14:58.866021 ERROR: Error initializing runtime service opteed_fast
609 03:15:00.099088
610 03:15:00.099677
611 03:15:00.107445 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 03:15:00.107922
613 03:15:00.108403 Model: Libre Computer AML-A311D-CC Alta
614 03:15:00.315936 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 03:15:00.339338 DRAM: 2 GiB (effective 3.8 GiB)
616 03:15:00.482291 Core: 408 devices, 31 uclasses, devicetree: separate
617 03:15:00.488383 WDT: Not starting watchdog@f0d0
618 03:15:00.520496 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 03:15:00.532920 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 03:15:00.537686 ** Bad device specification mmc 0 **
621 03:15:00.548254 Card did not respond to voltage select! : -110
622 03:15:00.555809 ** Bad device specification mmc 0 **
623 03:15:00.556596 Couldn't find partition mmc 0
624 03:15:00.564199 Card did not respond to voltage select! : -110
625 03:15:00.569543 ** Bad device specification mmc 0 **
626 03:15:00.570202 Couldn't find partition mmc 0
627 03:15:00.574661 Error: could not access storage.
628 03:15:00.917199 Net: eth0: ethernet@ff3f0000
629 03:15:00.917706 starting USB...
630 03:15:01.169030 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 03:15:01.169686 Starting the controller
632 03:15:01.175909 USB XHCI 1.10
633 03:15:02.885546 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 03:15:02.886247 bl2_stage_init 0x01
635 03:15:02.886710 bl2_stage_init 0x81
636 03:15:02.891045 hw id: 0x0000 - pwm id 0x01
637 03:15:02.891851 bl2_stage_init 0xc1
638 03:15:02.892630 bl2_stage_init 0x02
639 03:15:02.893211
640 03:15:02.896564 L0:00000000
641 03:15:02.897270 L1:20000703
642 03:15:02.897791 L2:00008067
643 03:15:02.898250 L3:14000000
644 03:15:02.900667 B2:00402000
645 03:15:02.901274 B1:e0f83180
646 03:15:02.901753
647 03:15:02.902220 TE: 58124
648 03:15:02.902667
649 03:15:02.910712 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 03:15:02.911380
651 03:15:02.911864 Board ID = 1
652 03:15:02.912368 Set A53 clk to 24M
653 03:15:02.912821 Set A73 clk to 24M
654 03:15:02.917728 Set clk81 to 24M
655 03:15:02.918337 A53 clk: 1200 MHz
656 03:15:02.918785 A73 clk: 1200 MHz
657 03:15:02.921917 CLK81: 166.6M
658 03:15:02.922483 smccc: 00012a91
659 03:15:02.927597 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 03:15:02.928219 board id: 1
661 03:15:02.936243 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 03:15:02.946641 fw parse done
663 03:15:02.952601 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 03:15:02.995271 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 03:15:03.006194 PIEI prepare done
666 03:15:03.006971 fastboot data load
667 03:15:03.007547 fastboot data verify
668 03:15:03.011657 verify result: 266
669 03:15:03.017309 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 03:15:03.017912 LPDDR4 probe
671 03:15:03.018413 ddr clk to 1584MHz
672 03:15:03.025299 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 03:15:03.062540
674 03:15:03.063134 dmc_version 0001
675 03:15:03.069198 Check phy result
676 03:15:03.075055 INFO : End of CA training
677 03:15:03.075591 INFO : End of initialization
678 03:15:03.080663 INFO : Training has run successfully!
679 03:15:03.081205 Check phy result
680 03:15:03.086300 INFO : End of initialization
681 03:15:03.086823 INFO : End of read enable training
682 03:15:03.091866 INFO : End of fine write leveling
683 03:15:03.097482 INFO : End of Write leveling coarse delay
684 03:15:03.098013 INFO : Training has run successfully!
685 03:15:03.098497 Check phy result
686 03:15:03.103061 INFO : End of initialization
687 03:15:03.103585 INFO : End of read dq deskew training
688 03:15:03.108666 INFO : End of MPR read delay center optimization
689 03:15:03.114300 INFO : End of write delay center optimization
690 03:15:03.119872 INFO : End of read delay center optimization
691 03:15:03.120432 INFO : End of max read latency training
692 03:15:03.125495 INFO : Training has run successfully!
693 03:15:03.126036 1D training succeed
694 03:15:03.134655 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 03:15:03.182272 Check phy result
696 03:15:03.182904 INFO : End of initialization
697 03:15:03.204065 INFO : End of 2D read delay Voltage center optimization
698 03:15:03.224273 INFO : End of 2D read delay Voltage center optimization
699 03:15:03.276324 INFO : End of 2D write delay Voltage center optimization
700 03:15:03.325639 INFO : End of 2D write delay Voltage center optimization
701 03:15:03.331203 INFO : Training has run successfully!
702 03:15:03.331761
703 03:15:03.332306 channel==0
704 03:15:03.336800 RxClkDly_Margin_A0==88 ps 9
705 03:15:03.337378 TxDqDly_Margin_A0==98 ps 10
706 03:15:03.342450 RxClkDly_Margin_A1==88 ps 9
707 03:15:03.342976 TxDqDly_Margin_A1==98 ps 10
708 03:15:03.343450 TrainedVREFDQ_A0==74
709 03:15:03.347964 TrainedVREFDQ_A1==74
710 03:15:03.348535 VrefDac_Margin_A0==25
711 03:15:03.349004 DeviceVref_Margin_A0==40
712 03:15:03.353593 VrefDac_Margin_A1==25
713 03:15:03.354113 DeviceVref_Margin_A1==40
714 03:15:03.354587
715 03:15:03.355029
716 03:15:03.359148 channel==1
717 03:15:03.359633 RxClkDly_Margin_A0==98 ps 10
718 03:15:03.360192 TxDqDly_Margin_A0==98 ps 10
719 03:15:03.364729 RxClkDly_Margin_A1==88 ps 9
720 03:15:03.365216 TxDqDly_Margin_A1==88 ps 9
721 03:15:03.370513 TrainedVREFDQ_A0==77
722 03:15:03.371027 TrainedVREFDQ_A1==77
723 03:15:03.371475 VrefDac_Margin_A0==22
724 03:15:03.376271 DeviceVref_Margin_A0==37
725 03:15:03.376797 VrefDac_Margin_A1==24
726 03:15:03.381681 DeviceVref_Margin_A1==37
727 03:15:03.382223
728 03:15:03.382701 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 03:15:03.383145
730 03:15:03.415188 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
731 03:15:03.415821 2D training succeed
732 03:15:03.420857 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 03:15:03.426596 auto size-- 65535DDR cs0 size: 2048MB
734 03:15:03.427127 DDR cs1 size: 2048MB
735 03:15:03.432118 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 03:15:03.432658 cs0 DataBus test pass
737 03:15:03.437698 cs1 DataBus test pass
738 03:15:03.438229 cs0 AddrBus test pass
739 03:15:03.438674 cs1 AddrBus test pass
740 03:15:03.439108
741 03:15:03.443288 100bdlr_step_size ps== 420
742 03:15:03.443837 result report
743 03:15:03.448856 boot times 0Enable ddr reg access
744 03:15:03.454205 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 03:15:03.467677 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 03:15:04.041396 0.0;M3 CHK:0;cm4_sp_mode 0
747 03:15:04.041809 MVN_1=0x00000000
748 03:15:04.046806 MVN_2=0x00000000
749 03:15:04.052587 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 03:15:04.052930 OPS=0x10
751 03:15:04.053175 ring efuse init
752 03:15:04.053383 chipver efuse init
753 03:15:04.058216 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 03:15:04.064163 [0.018961 Inits done]
755 03:15:04.064704 secure task start!
756 03:15:04.065114 high task start!
757 03:15:04.068355 low task start!
758 03:15:04.068819 run into bl31
759 03:15:04.075082 NOTICE: BL31: v1.3(release):4fc40b1
760 03:15:04.082894 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 03:15:04.083369 NOTICE: BL31: G12A normal boot!
762 03:15:04.108309 NOTICE: BL31: BL33 decompress pass
763 03:15:04.113847 ERROR: Error initializing runtime service opteed_fast
764 03:15:05.346763
765 03:15:05.347379
766 03:15:05.355010 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 03:15:05.355495
768 03:15:05.355900 Model: Libre Computer AML-A311D-CC Alta
769 03:15:05.563520 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 03:15:05.586961 DRAM: 2 GiB (effective 3.8 GiB)
771 03:15:05.729956 Core: 408 devices, 31 uclasses, devicetree: separate
772 03:15:05.735667 WDT: Not starting watchdog@f0d0
773 03:15:05.768042 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 03:15:05.780408 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 03:15:05.785386 ** Bad device specification mmc 0 **
776 03:15:05.795697 Card did not respond to voltage select! : -110
777 03:15:05.803364 ** Bad device specification mmc 0 **
778 03:15:05.803875 Couldn't find partition mmc 0
779 03:15:05.811729 Card did not respond to voltage select! : -110
780 03:15:05.817224 ** Bad device specification mmc 0 **
781 03:15:05.817673 Couldn't find partition mmc 0
782 03:15:05.822254 Error: could not access storage.
783 03:15:06.164847 Net: eth0: ethernet@ff3f0000
784 03:15:06.165446 starting USB...
785 03:15:06.416781 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 03:15:06.417415 Starting the controller
787 03:15:06.423525 USB XHCI 1.10
788 03:15:08.585392 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 03:15:08.585853 bl2_stage_init 0x01
790 03:15:08.586080 bl2_stage_init 0x81
791 03:15:08.590907 hw id: 0x0000 - pwm id 0x01
792 03:15:08.591275 bl2_stage_init 0xc1
793 03:15:08.591493 bl2_stage_init 0x02
794 03:15:08.591696
795 03:15:08.596505 L0:00000000
796 03:15:08.597029 L1:20000703
797 03:15:08.597368 L2:00008067
798 03:15:08.597685 L3:14000000
799 03:15:08.602153 B2:00402000
800 03:15:08.602650 B1:e0f83180
801 03:15:08.602913
802 03:15:08.603135 TE: 58124
803 03:15:08.603340
804 03:15:08.607685 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 03:15:08.608080
806 03:15:08.608305 Board ID = 1
807 03:15:08.613204 Set A53 clk to 24M
808 03:15:08.614154 Set A73 clk to 24M
809 03:15:08.614519 Set clk81 to 24M
810 03:15:08.618857 A53 clk: 1200 MHz
811 03:15:08.619369 A73 clk: 1200 MHz
812 03:15:08.619608 CLK81: 166.6M
813 03:15:08.619813 smccc: 00012a92
814 03:15:08.624436 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 03:15:08.630071 board id: 1
816 03:15:08.636172 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 03:15:08.646513 fw parse done
818 03:15:08.652480 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 03:15:08.695186 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 03:15:08.706155 PIEI prepare done
821 03:15:08.706575 fastboot data load
822 03:15:08.706796 fastboot data verify
823 03:15:08.711688 verify result: 266
824 03:15:08.717283 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 03:15:08.717801 LPDDR4 probe
826 03:15:08.718065 ddr clk to 1584MHz
827 03:15:08.725299 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 03:15:08.762588
829 03:15:08.763181 dmc_version 0001
830 03:15:08.769346 Check phy result
831 03:15:08.775144 INFO : End of CA training
832 03:15:08.775561 INFO : End of initialization
833 03:15:08.780725 INFO : Training has run successfully!
834 03:15:08.781128 Check phy result
835 03:15:08.786308 INFO : End of initialization
836 03:15:08.786862 INFO : End of read enable training
837 03:15:08.791924 INFO : End of fine write leveling
838 03:15:08.797532 INFO : End of Write leveling coarse delay
839 03:15:08.797946 INFO : Training has run successfully!
840 03:15:08.798182 Check phy result
841 03:15:08.803136 INFO : End of initialization
842 03:15:08.803510 INFO : End of read dq deskew training
843 03:15:08.808667 INFO : End of MPR read delay center optimization
844 03:15:08.814283 INFO : End of write delay center optimization
845 03:15:08.819876 INFO : End of read delay center optimization
846 03:15:08.820464 INFO : End of max read latency training
847 03:15:08.825457 INFO : Training has run successfully!
848 03:15:08.825819 1D training succeed
849 03:15:08.834646 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 03:15:08.882352 Check phy result
851 03:15:08.882956 INFO : End of initialization
852 03:15:08.904666 INFO : End of 2D read delay Voltage center optimization
853 03:15:08.924800 INFO : End of 2D read delay Voltage center optimization
854 03:15:08.976683 INFO : End of 2D write delay Voltage center optimization
855 03:15:09.025978 INFO : End of 2D write delay Voltage center optimization
856 03:15:09.032062 INFO : Training has run successfully!
857 03:15:09.032668
858 03:15:09.032950 channel==0
859 03:15:09.037120 RxClkDly_Margin_A0==88 ps 9
860 03:15:09.037702 TxDqDly_Margin_A0==98 ps 10
861 03:15:09.042693 RxClkDly_Margin_A1==88 ps 9
862 03:15:09.043113 TxDqDly_Margin_A1==98 ps 10
863 03:15:09.043353 TrainedVREFDQ_A0==74
864 03:15:09.048287 TrainedVREFDQ_A1==74
865 03:15:09.048683 VrefDac_Margin_A0==24
866 03:15:09.048910 DeviceVref_Margin_A0==40
867 03:15:09.053879 VrefDac_Margin_A1==24
868 03:15:09.054272 DeviceVref_Margin_A1==40
869 03:15:09.054507
870 03:15:09.054736
871 03:15:09.060459 channel==1
872 03:15:09.060835 RxClkDly_Margin_A0==98 ps 10
873 03:15:09.061038 TxDqDly_Margin_A0==98 ps 10
874 03:15:09.065088 RxClkDly_Margin_A1==98 ps 10
875 03:15:09.065448 TxDqDly_Margin_A1==88 ps 9
876 03:15:09.070611 TrainedVREFDQ_A0==77
877 03:15:09.070929 TrainedVREFDQ_A1==77
878 03:15:09.071135 VrefDac_Margin_A0==22
879 03:15:09.076249 DeviceVref_Margin_A0==37
880 03:15:09.076561 VrefDac_Margin_A1==22
881 03:15:09.081830 DeviceVref_Margin_A1==37
882 03:15:09.082163
883 03:15:09.082374 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 03:15:09.087423
885 03:15:09.115470 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
886 03:15:09.115900 2D training succeed
887 03:15:09.121095 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 03:15:09.126644 auto size-- 65535DDR cs0 size: 2048MB
889 03:15:09.127000 DDR cs1 size: 2048MB
890 03:15:09.132260 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 03:15:09.132600 cs0 DataBus test pass
892 03:15:09.137859 cs1 DataBus test pass
893 03:15:09.138205 cs0 AddrBus test pass
894 03:15:09.138419 cs1 AddrBus test pass
895 03:15:09.138624
896 03:15:09.143442 100bdlr_step_size ps== 420
897 03:15:09.143763 result report
898 03:15:09.149095 boot times 0Enable ddr reg access
899 03:15:09.154485 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 03:15:09.167940 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 03:15:09.740194 0.0;M3 CHK:0;cm4_sp_mode 0
902 03:15:09.740839 MVN_1=0x00000000
903 03:15:09.745466 MVN_2=0x00000000
904 03:15:09.751310 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 03:15:09.751762 OPS=0x10
906 03:15:09.752198 ring efuse init
907 03:15:09.752590 chipver efuse init
908 03:15:09.756846 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 03:15:09.762441 [0.018960 Inits done]
910 03:15:09.762885 secure task start!
911 03:15:09.763280 high task start!
912 03:15:09.767013 low task start!
913 03:15:09.767451 run into bl31
914 03:15:09.773682 NOTICE: BL31: v1.3(release):4fc40b1
915 03:15:09.781492 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 03:15:09.781946 NOTICE: BL31: G12A normal boot!
917 03:15:09.806830 NOTICE: BL31: BL33 decompress pass
918 03:15:09.812517 ERROR: Error initializing runtime service opteed_fast
919 03:15:11.045633
920 03:15:11.046086
921 03:15:11.053886 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 03:15:11.054485
923 03:15:11.054761 Model: Libre Computer AML-A311D-CC Alta
924 03:15:11.262340 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 03:15:11.285731 DRAM: 2 GiB (effective 3.8 GiB)
926 03:15:11.428788 Core: 408 devices, 31 uclasses, devicetree: separate
927 03:15:11.434553 WDT: Not starting watchdog@f0d0
928 03:15:11.466817 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 03:15:11.479295 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 03:15:11.484391 ** Bad device specification mmc 0 **
931 03:15:11.494800 Card did not respond to voltage select! : -110
932 03:15:11.502317 ** Bad device specification mmc 0 **
933 03:15:11.502756 Couldn't find partition mmc 0
934 03:15:11.510651 Card did not respond to voltage select! : -110
935 03:15:11.516182 ** Bad device specification mmc 0 **
936 03:15:11.516753 Couldn't find partition mmc 0
937 03:15:11.521198 Error: could not access storage.
938 03:15:11.863665 Net: eth0: ethernet@ff3f0000
939 03:15:11.864389 starting USB...
940 03:15:12.115568 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 03:15:12.116269 Starting the controller
942 03:15:12.122470 USB XHCI 1.10
943 03:15:13.985466 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
944 03:15:13.986137 bl2_stage_init 0x01
945 03:15:13.986615 bl2_stage_init 0x81
946 03:15:13.991167 hw id: 0x0000 - pwm id 0x01
947 03:15:13.991697 bl2_stage_init 0xc1
948 03:15:13.992220 bl2_stage_init 0x02
949 03:15:13.992675
950 03:15:13.996733 L0:00000000
951 03:15:13.997243 L1:20000703
952 03:15:13.997695 L2:00008067
953 03:15:13.998139 L3:14000000
954 03:15:14.002368 B2:00402000
955 03:15:14.002888 B1:e0f83180
956 03:15:14.003336
957 03:15:14.003780 TE: 58167
958 03:15:14.004268
959 03:15:14.007863 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 03:15:14.008414
961 03:15:14.008873 Board ID = 1
962 03:15:14.013557 Set A53 clk to 24M
963 03:15:14.014071 Set A73 clk to 24M
964 03:15:14.014518 Set clk81 to 24M
965 03:15:14.019246 A53 clk: 1200 MHz
966 03:15:14.019770 A73 clk: 1200 MHz
967 03:15:14.020272 CLK81: 166.6M
968 03:15:14.020719 smccc: 00012abe
969 03:15:14.024731 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 03:15:14.030493 board id: 1
971 03:15:14.036285 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 03:15:14.046840 fw parse done
973 03:15:14.052875 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 03:15:14.095309 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 03:15:14.106222 PIEI prepare done
976 03:15:14.106730 fastboot data load
977 03:15:14.107163 fastboot data verify
978 03:15:14.111822 verify result: 266
979 03:15:14.117418 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 03:15:14.117919 LPDDR4 probe
981 03:15:14.118349 ddr clk to 1584MHz
982 03:15:14.125394 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 03:15:14.162650
984 03:15:14.163183 dmc_version 0001
985 03:15:14.169337 Check phy result
986 03:15:14.175188 INFO : End of CA training
987 03:15:14.175688 INFO : End of initialization
988 03:15:14.180807 INFO : Training has run successfully!
989 03:15:14.181305 Check phy result
990 03:15:14.186410 INFO : End of initialization
991 03:15:14.186933 INFO : End of read enable training
992 03:15:14.192100 INFO : End of fine write leveling
993 03:15:14.197630 INFO : End of Write leveling coarse delay
994 03:15:14.198141 INFO : Training has run successfully!
995 03:15:14.198593 Check phy result
996 03:15:14.203222 INFO : End of initialization
997 03:15:14.203729 INFO : End of read dq deskew training
998 03:15:14.208812 INFO : End of MPR read delay center optimization
999 03:15:14.214442 INFO : End of write delay center optimization
1000 03:15:14.220107 INFO : End of read delay center optimization
1001 03:15:14.220624 INFO : End of max read latency training
1002 03:15:14.225606 INFO : Training has run successfully!
1003 03:15:14.226111 1D training succeed
1004 03:15:14.234756 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 03:15:14.282382 Check phy result
1006 03:15:14.282923 INFO : End of initialization
1007 03:15:14.304079 INFO : End of 2D read delay Voltage center optimization
1008 03:15:14.324195 INFO : End of 2D read delay Voltage center optimization
1009 03:15:14.376042 INFO : End of 2D write delay Voltage center optimization
1010 03:15:14.425289 INFO : End of 2D write delay Voltage center optimization
1011 03:15:14.430811 INFO : Training has run successfully!
1012 03:15:14.431329
1013 03:15:14.431801 channel==0
1014 03:15:14.436405 RxClkDly_Margin_A0==88 ps 9
1015 03:15:14.436928 TxDqDly_Margin_A0==98 ps 10
1016 03:15:14.442094 RxClkDly_Margin_A1==88 ps 9
1017 03:15:14.442600 TxDqDly_Margin_A1==98 ps 10
1018 03:15:14.443055 TrainedVREFDQ_A0==74
1019 03:15:14.447591 TrainedVREFDQ_A1==74
1020 03:15:14.448169 VrefDac_Margin_A0==25
1021 03:15:14.448652 DeviceVref_Margin_A0==40
1022 03:15:14.453206 VrefDac_Margin_A1==25
1023 03:15:14.453724 DeviceVref_Margin_A1==40
1024 03:15:14.454182
1025 03:15:14.454631
1026 03:15:14.458803 channel==1
1027 03:15:14.459320 RxClkDly_Margin_A0==98 ps 10
1028 03:15:14.459772 TxDqDly_Margin_A0==88 ps 9
1029 03:15:14.464446 RxClkDly_Margin_A1==98 ps 10
1030 03:15:14.464961 TxDqDly_Margin_A1==88 ps 9
1031 03:15:14.470089 TrainedVREFDQ_A0==77
1032 03:15:14.470602 TrainedVREFDQ_A1==77
1033 03:15:14.471052 VrefDac_Margin_A0==22
1034 03:15:14.475568 DeviceVref_Margin_A0==37
1035 03:15:14.476117 VrefDac_Margin_A1==22
1036 03:15:14.481181 DeviceVref_Margin_A1==37
1037 03:15:14.481688
1038 03:15:14.482139 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 03:15:14.482581
1040 03:15:14.514684 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1041 03:15:14.515084 2D training succeed
1042 03:15:14.520289 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 03:15:14.525975 auto size-- 65535DDR cs0 size: 2048MB
1044 03:15:14.526397 DDR cs1 size: 2048MB
1045 03:15:14.531477 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 03:15:14.531799 cs0 DataBus test pass
1047 03:15:14.537099 cs1 DataBus test pass
1048 03:15:14.537435 cs0 AddrBus test pass
1049 03:15:14.537660 cs1 AddrBus test pass
1050 03:15:14.537876
1051 03:15:14.542702 100bdlr_step_size ps== 420
1052 03:15:14.543175 result report
1053 03:15:14.548307 boot times 0Enable ddr reg access
1054 03:15:14.553633 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 03:15:14.567136 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 03:15:15.139286 0.0;M3 CHK:0;cm4_sp_mode 0
1057 03:15:15.139964 MVN_1=0x00000000
1058 03:15:15.144675 MVN_2=0x00000000
1059 03:15:15.150413 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 03:15:15.150927 OPS=0x10
1061 03:15:15.151389 ring efuse init
1062 03:15:15.151833 chipver efuse init
1063 03:15:15.156120 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 03:15:15.161593 [0.018960 Inits done]
1065 03:15:15.162101 secure task start!
1066 03:15:15.162553 high task start!
1067 03:15:15.166222 low task start!
1068 03:15:15.166720 run into bl31
1069 03:15:15.172856 NOTICE: BL31: v1.3(release):4fc40b1
1070 03:15:15.180645 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 03:15:15.181167 NOTICE: BL31: G12A normal boot!
1072 03:15:15.206113 NOTICE: BL31: BL33 decompress pass
1073 03:15:15.211730 ERROR: Error initializing runtime service opteed_fast
1074 03:15:16.444683
1075 03:15:16.445355
1076 03:15:16.453011 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 03:15:16.453538
1078 03:15:16.454003 Model: Libre Computer AML-A311D-CC Alta
1079 03:15:16.661518 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 03:15:16.684796 DRAM: 2 GiB (effective 3.8 GiB)
1081 03:15:16.827764 Core: 408 devices, 31 uclasses, devicetree: separate
1082 03:15:16.833646 WDT: Not starting watchdog@f0d0
1083 03:15:16.865909 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 03:15:16.878333 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 03:15:16.883393 ** Bad device specification mmc 0 **
1086 03:15:16.893676 Card did not respond to voltage select! : -110
1087 03:15:16.901387 ** Bad device specification mmc 0 **
1088 03:15:16.901891 Couldn't find partition mmc 0
1089 03:15:16.909658 Card did not respond to voltage select! : -110
1090 03:15:16.915185 ** Bad device specification mmc 0 **
1091 03:15:16.915693 Couldn't find partition mmc 0
1092 03:15:16.920288 Error: could not access storage.
1093 03:15:17.263726 Net: eth0: ethernet@ff3f0000
1094 03:15:17.264357 starting USB...
1095 03:15:17.515491 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 03:15:17.515906 Starting the controller
1097 03:15:17.522448 USB XHCI 1.10
1098 03:15:19.078808 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 03:15:19.087122 scanning usb for storage devices... 0 Storage Device(s) found
1101 03:15:19.138936 Hit any key to stop autoboot: 1
1102 03:15:19.139785 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1103 03:15:19.140625 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1104 03:15:19.141152 Setting prompt string to ['=>']
1105 03:15:19.141673 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1106 03:15:19.154781 0
1107 03:15:19.155746 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 03:15:19.156322 Sending with 10 millisecond of delay
1110 03:15:20.291532 => setenv autoload no
1111 03:15:20.302449 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1112 03:15:20.307773 setenv autoload no
1113 03:15:20.308607 Sending with 10 millisecond of delay
1115 03:15:22.105889 => setenv initrd_high 0xffffffff
1116 03:15:22.116704 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1117 03:15:22.117682 setenv initrd_high 0xffffffff
1118 03:15:22.118445 Sending with 10 millisecond of delay
1120 03:15:23.735036 => setenv fdt_high 0xffffffff
1121 03:15:23.745888 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1122 03:15:23.746832 setenv fdt_high 0xffffffff
1123 03:15:23.747599 Sending with 10 millisecond of delay
1125 03:15:24.039593 => dhcp
1126 03:15:24.050451 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 03:15:24.051366 dhcp
1128 03:15:24.051842 Speed: 1000, full duplex
1129 03:15:24.052363 BOOTP broadcast 1
1130 03:15:24.059489 DHCP client bound to address 192.168.6.27 (9 ms)
1131 03:15:24.060345 Sending with 10 millisecond of delay
1133 03:15:25.737013 => setenv serverip 192.168.6.2
1134 03:15:25.747856 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1135 03:15:25.748841 setenv serverip 192.168.6.2
1136 03:15:25.749576 Sending with 10 millisecond of delay
1138 03:15:29.472879 => tftpboot 0x01080000 964578/tftp-deploy-l8ldnp1r/kernel/uImage
1139 03:15:29.483731 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1140 03:15:29.484678 tftpboot 0x01080000 964578/tftp-deploy-l8ldnp1r/kernel/uImage
1141 03:15:29.485187 Speed: 1000, full duplex
1142 03:15:29.485640 Using ethernet@ff3f0000 device
1143 03:15:29.486698 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 03:15:29.492322 Filename '964578/tftp-deploy-l8ldnp1r/kernel/uImage'.
1145 03:15:29.496047 Load address: 0x1080000
1146 03:15:32.283931 Loading: *################################################## 43.6 MiB
1147 03:15:32.284646 15.6 MiB/s
1148 03:15:32.285126 done
1149 03:15:32.288581 Bytes transferred = 45713984 (2b98a40 hex)
1150 03:15:32.289471 Sending with 10 millisecond of delay
1152 03:15:36.976084 => tftpboot 0x08000000 964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
1153 03:15:36.986873 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1154 03:15:36.987699 tftpboot 0x08000000 964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot
1155 03:15:36.988193 Speed: 1000, full duplex
1156 03:15:36.988610 Using ethernet@ff3f0000 device
1157 03:15:36.989682 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 03:15:36.998359 Filename '964578/tftp-deploy-l8ldnp1r/ramdisk/ramdisk.cpio.gz.uboot'.
1159 03:15:36.998870 Load address: 0x8000000
1160 03:15:43.492408 Loading: *##########################T ####################### UDP wrong checksum 00000005 000033c7
1161 03:15:48.493598 T UDP wrong checksum 00000005 000033c7
1162 03:15:58.496755 T T UDP wrong checksum 00000005 000033c7
1163 03:16:09.446635 T T UDP wrong checksum 000000ff 0000e27b
1164 03:16:09.473039 UDP wrong checksum 000000ff 0000766e
1165 03:16:18.500676 T T UDP wrong checksum 00000005 000033c7
1166 03:16:33.505023 T T
1167 03:16:33.505714 Retry count exceeded; starting again
1169 03:16:33.507274 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1172 03:16:33.509463 end: 2.4 uboot-commands (duration 00:01:52) [common]
1174 03:16:33.511004 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1176 03:16:33.512241 end: 2 uboot-action (duration 00:01:52) [common]
1178 03:16:33.514037 Cleaning after the job
1179 03:16:33.514646 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/ramdisk
1180 03:16:33.516299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/kernel
1181 03:16:33.544395 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/dtb
1182 03:16:33.545962 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/nfsrootfs
1183 03:16:33.647656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964578/tftp-deploy-l8ldnp1r/modules
1184 03:16:33.655758 start: 4.1 power-off (timeout 00:00:30) [common]
1185 03:16:33.656455 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1186 03:16:33.690981 >> OK - accepted request
1187 03:16:33.693316 Returned 0 in 0 seconds
1188 03:16:33.795492 end: 4.1 power-off (duration 00:00:00) [common]
1190 03:16:33.797178 start: 4.2 read-feedback (timeout 00:10:00) [common]
1191 03:16:33.798002 Listened to connection for namespace 'common' for up to 1s
1192 03:16:34.798037 Finalising connection for namespace 'common'
1193 03:16:34.798550 Disconnecting from shell: Finalise
1194 03:16:34.798849 =>
1195 03:16:34.899595 end: 4.2 read-feedback (duration 00:00:01) [common]
1196 03:16:34.900143 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964578
1197 03:16:37.394751 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964578
1198 03:16:37.395351 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.