Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:20:23.958274 lava-dispatcher, installed at version: 2024.01
2 05:20:23.959165 start: 0 validate
3 05:20:23.959661 Start time: 2024-11-09 05:20:23.959628+00:00 (UTC)
4 05:20:23.960286 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:20:23.960837 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 05:20:24.005059 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:20:24.005637 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:20:24.042531 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:20:24.043234 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 05:20:24.077217 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:20:24.077709 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 05:20:24.130555 validate duration: 0.17
14 05:20:24.132330 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:20:24.132756 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:20:24.133245 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:20:24.134470 Not decompressing ramdisk as can be used compressed.
18 05:20:24.135342 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 05:20:24.135658 saving as /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/ramdisk/rootfs.cpio.gz
20 05:20:24.135928 total size: 47897469 (45 MB)
21 05:20:24.172893 progress 0 % (0 MB)
22 05:20:24.214442 progress 5 % (2 MB)
23 05:20:24.248425 progress 10 % (4 MB)
24 05:20:24.280499 progress 15 % (6 MB)
25 05:20:24.313226 progress 20 % (9 MB)
26 05:20:24.345302 progress 25 % (11 MB)
27 05:20:24.377309 progress 30 % (13 MB)
28 05:20:24.409465 progress 35 % (16 MB)
29 05:20:24.441531 progress 40 % (18 MB)
30 05:20:24.473491 progress 45 % (20 MB)
31 05:20:24.504748 progress 50 % (22 MB)
32 05:20:24.538598 progress 55 % (25 MB)
33 05:20:24.574661 progress 60 % (27 MB)
34 05:20:24.607087 progress 65 % (29 MB)
35 05:20:24.638709 progress 70 % (32 MB)
36 05:20:24.670005 progress 75 % (34 MB)
37 05:20:24.700987 progress 80 % (36 MB)
38 05:20:24.732202 progress 85 % (38 MB)
39 05:20:24.763452 progress 90 % (41 MB)
40 05:20:24.794269 progress 95 % (43 MB)
41 05:20:24.824934 progress 100 % (45 MB)
42 05:20:24.825658 45 MB downloaded in 0.69 s (66.23 MB/s)
43 05:20:24.826232 end: 1.1.1 http-download (duration 00:00:01) [common]
45 05:20:24.827180 end: 1.1 download-retry (duration 00:00:01) [common]
46 05:20:24.827475 start: 1.2 download-retry (timeout 00:09:59) [common]
47 05:20:24.827795 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 05:20:24.828312 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kernel/Image
49 05:20:24.828622 saving as /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/kernel/Image
50 05:20:24.828836 total size: 45713920 (43 MB)
51 05:20:24.829047 No compression specified
52 05:20:24.867177 progress 0 % (0 MB)
53 05:20:24.895559 progress 5 % (2 MB)
54 05:20:24.924637 progress 10 % (4 MB)
55 05:20:24.953424 progress 15 % (6 MB)
56 05:20:24.983743 progress 20 % (8 MB)
57 05:20:25.012241 progress 25 % (10 MB)
58 05:20:25.041376 progress 30 % (13 MB)
59 05:20:25.071266 progress 35 % (15 MB)
60 05:20:25.100297 progress 40 % (17 MB)
61 05:20:25.129380 progress 45 % (19 MB)
62 05:20:25.158797 progress 50 % (21 MB)
63 05:20:25.187881 progress 55 % (24 MB)
64 05:20:25.217898 progress 60 % (26 MB)
65 05:20:25.246113 progress 65 % (28 MB)
66 05:20:25.275407 progress 70 % (30 MB)
67 05:20:25.304113 progress 75 % (32 MB)
68 05:20:25.332898 progress 80 % (34 MB)
69 05:20:25.361723 progress 85 % (37 MB)
70 05:20:25.390663 progress 90 % (39 MB)
71 05:20:25.421339 progress 95 % (41 MB)
72 05:20:25.450108 progress 100 % (43 MB)
73 05:20:25.450639 43 MB downloaded in 0.62 s (70.11 MB/s)
74 05:20:25.451113 end: 1.2.1 http-download (duration 00:00:01) [common]
76 05:20:25.451952 end: 1.2 download-retry (duration 00:00:01) [common]
77 05:20:25.452266 start: 1.3 download-retry (timeout 00:09:59) [common]
78 05:20:25.452533 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 05:20:25.453003 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 05:20:25.453249 saving as /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 05:20:25.453455 total size: 53209 (0 MB)
82 05:20:25.453665 No compression specified
83 05:20:25.495770 progress 61 % (0 MB)
84 05:20:25.496644 progress 100 % (0 MB)
85 05:20:25.497230 0 MB downloaded in 0.04 s (1.16 MB/s)
86 05:20:25.497726 end: 1.3.1 http-download (duration 00:00:00) [common]
88 05:20:25.498588 end: 1.3 download-retry (duration 00:00:00) [common]
89 05:20:25.498880 start: 1.4 download-retry (timeout 00:09:59) [common]
90 05:20:25.499152 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 05:20:25.499623 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/modules.tar.xz
92 05:20:25.499918 saving as /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/modules/modules.tar
93 05:20:25.500172 total size: 11607448 (11 MB)
94 05:20:25.500398 Using unxz to decompress xz
95 05:20:25.537559 progress 0 % (0 MB)
96 05:20:25.605543 progress 5 % (0 MB)
97 05:20:25.681856 progress 10 % (1 MB)
98 05:20:25.780801 progress 15 % (1 MB)
99 05:20:25.872626 progress 20 % (2 MB)
100 05:20:25.953119 progress 25 % (2 MB)
101 05:20:26.029304 progress 30 % (3 MB)
102 05:20:26.104383 progress 35 % (3 MB)
103 05:20:26.184884 progress 40 % (4 MB)
104 05:20:26.264283 progress 45 % (5 MB)
105 05:20:26.350115 progress 50 % (5 MB)
106 05:20:26.429165 progress 55 % (6 MB)
107 05:20:26.515476 progress 60 % (6 MB)
108 05:20:26.598013 progress 65 % (7 MB)
109 05:20:26.675734 progress 70 % (7 MB)
110 05:20:26.759651 progress 75 % (8 MB)
111 05:20:26.843812 progress 80 % (8 MB)
112 05:20:26.924728 progress 85 % (9 MB)
113 05:20:27.004253 progress 90 % (9 MB)
114 05:20:27.083794 progress 95 % (10 MB)
115 05:20:27.162484 progress 100 % (11 MB)
116 05:20:27.174496 11 MB downloaded in 1.67 s (6.61 MB/s)
117 05:20:27.175135 end: 1.4.1 http-download (duration 00:00:02) [common]
119 05:20:27.176015 end: 1.4 download-retry (duration 00:00:02) [common]
120 05:20:27.176797 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 05:20:27.177385 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 05:20:27.177936 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 05:20:27.178490 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 05:20:27.179561 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8
125 05:20:27.180514 makedir: /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin
126 05:20:27.181267 makedir: /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/tests
127 05:20:27.181952 makedir: /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/results
128 05:20:27.182767 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-add-keys
129 05:20:27.183829 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-add-sources
130 05:20:27.184922 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-background-process-start
131 05:20:27.185979 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-background-process-stop
132 05:20:27.187082 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-common-functions
133 05:20:27.188116 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-echo-ipv4
134 05:20:27.189133 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-install-packages
135 05:20:27.190097 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-installed-packages
136 05:20:27.191049 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-os-build
137 05:20:27.192039 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-probe-channel
138 05:20:27.193252 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-probe-ip
139 05:20:27.194265 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-target-ip
140 05:20:27.195240 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-target-mac
141 05:20:27.196238 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-target-storage
142 05:20:27.197238 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-case
143 05:20:27.198207 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-event
144 05:20:27.199356 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-feedback
145 05:20:27.200382 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-raise
146 05:20:27.201384 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-reference
147 05:20:27.202366 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-runner
148 05:20:27.203338 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-set
149 05:20:27.204474 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-test-shell
150 05:20:27.205538 Updating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-install-packages (oe)
151 05:20:27.206615 Updating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/bin/lava-installed-packages (oe)
152 05:20:27.207539 Creating /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/environment
153 05:20:27.208485 LAVA metadata
154 05:20:27.209031 - LAVA_JOB_ID=965321
155 05:20:27.209508 - LAVA_DISPATCHER_IP=192.168.6.2
156 05:20:27.210242 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 05:20:27.212255 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 05:20:27.212905 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 05:20:27.213357 skipped lava-vland-overlay
160 05:20:27.213892 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 05:20:27.214449 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 05:20:27.214920 skipped lava-multinode-overlay
163 05:20:27.215461 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 05:20:27.216046 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 05:20:27.216588 Loading test definitions
166 05:20:27.217190 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 05:20:27.217673 Using /lava-965321 at stage 0
168 05:20:27.220125 uuid=965321_1.5.2.4.1 testdef=None
169 05:20:27.220771 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 05:20:27.221511 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 05:20:27.225109 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 05:20:27.226672 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 05:20:27.230861 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 05:20:27.232296 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 05:20:27.234406 runner path: /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/0/tests/0_igt-gpu-panfrost test_uuid 965321_1.5.2.4.1
178 05:20:27.234976 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 05:20:27.235775 Creating lava-test-runner.conf files
181 05:20:27.236001 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/965321/lava-overlay-_kmhyns8/lava-965321/0 for stage 0
182 05:20:27.236353 - 0_igt-gpu-panfrost
183 05:20:27.236697 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 05:20:27.236975 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 05:20:27.260653 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 05:20:27.261065 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 05:20:27.261328 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 05:20:27.261597 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 05:20:27.261858 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 05:20:34.769232 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:08) [common]
191 05:20:34.769674 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
192 05:20:34.769922 extracting modules file /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk
193 05:20:36.178390 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 05:20:36.178871 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 05:20:36.179152 [common] Applying overlay /var/lib/lava/dispatcher/tmp/965321/compress-overlay-197nehne/overlay-1.5.2.5.tar.gz to ramdisk
196 05:20:36.179365 [common] Applying overlay /var/lib/lava/dispatcher/tmp/965321/compress-overlay-197nehne/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk
197 05:20:36.209698 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 05:20:36.210123 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 05:20:36.210392 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 05:20:36.210619 Converting downloaded kernel to a uImage
201 05:20:36.210924 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/kernel/Image /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/kernel/uImage
202 05:20:36.702860 output: Image Name:
203 05:20:36.703250 output: Created: Sat Nov 9 05:20:36 2024
204 05:20:36.703475 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 05:20:36.703691 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 05:20:36.703898 output: Load Address: 01080000
207 05:20:36.704143 output: Entry Point: 01080000
208 05:20:36.704353 output:
209 05:20:36.704699 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 05:20:36.704993 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 05:20:36.705283 start: 1.5.7 configure-preseed-file (timeout 00:09:47) [common]
212 05:20:36.705553 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 05:20:36.705832 start: 1.5.8 compress-ramdisk (timeout 00:09:47) [common]
214 05:20:36.706099 Building ramdisk /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk
215 05:20:44.350449 >> 502380 blocks
216 05:21:05.187166 Adding RAMdisk u-boot header.
217 05:21:05.187927 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk.cpio.gz.uboot
218 05:21:05.867346 output: Image Name:
219 05:21:05.868079 output: Created: Sat Nov 9 05:21:05 2024
220 05:21:05.868569 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 05:21:05.869031 output: Data Size: 65714821 Bytes = 64174.63 KiB = 62.67 MiB
222 05:21:05.869485 output: Load Address: 00000000
223 05:21:05.869934 output: Entry Point: 00000000
224 05:21:05.870375 output:
225 05:21:05.871451 rename /var/lib/lava/dispatcher/tmp/965321/extract-overlay-ramdisk-wsjd5v8p/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
226 05:21:05.872286 end: 1.5.8 compress-ramdisk (duration 00:00:29) [common]
227 05:21:05.872905 end: 1.5 prepare-tftp-overlay (duration 00:00:39) [common]
228 05:21:05.873494 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:18) [common]
229 05:21:05.874014 No LXC device requested
230 05:21:05.874576 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 05:21:05.875145 start: 1.7 deploy-device-env (timeout 00:09:18) [common]
232 05:21:05.875696 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 05:21:05.876193 Checking files for TFTP limit of 4294967296 bytes.
234 05:21:05.879136 end: 1 tftp-deploy (duration 00:00:42) [common]
235 05:21:05.879810 start: 2 uboot-action (timeout 00:05:00) [common]
236 05:21:05.880467 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 05:21:05.881045 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 05:21:05.881616 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 05:21:05.882215 Using kernel file from prepare-kernel: 965321/tftp-deploy-7fd9du3f/kernel/uImage
240 05:21:05.882905 substitutions:
241 05:21:05.883370 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 05:21:05.883822 - {DTB_ADDR}: 0x01070000
243 05:21:05.884306 - {DTB}: 965321/tftp-deploy-7fd9du3f/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 05:21:05.884763 - {INITRD}: 965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
245 05:21:05.885212 - {KERNEL_ADDR}: 0x01080000
246 05:21:05.885658 - {KERNEL}: 965321/tftp-deploy-7fd9du3f/kernel/uImage
247 05:21:05.886108 - {LAVA_MAC}: None
248 05:21:05.886601 - {PRESEED_CONFIG}: None
249 05:21:05.887049 - {PRESEED_LOCAL}: None
250 05:21:05.887485 - {RAMDISK_ADDR}: 0x08000000
251 05:21:05.887921 - {RAMDISK}: 965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
252 05:21:05.888401 - {ROOT_PART}: None
253 05:21:05.888835 - {ROOT}: None
254 05:21:05.889274 - {SERVER_IP}: 192.168.6.2
255 05:21:05.889716 - {TEE_ADDR}: 0x83000000
256 05:21:05.890154 - {TEE}: None
257 05:21:05.890591 Parsed boot commands:
258 05:21:05.891012 - setenv autoload no
259 05:21:05.891441 - setenv initrd_high 0xffffffff
260 05:21:05.891873 - setenv fdt_high 0xffffffff
261 05:21:05.892337 - dhcp
262 05:21:05.892782 - setenv serverip 192.168.6.2
263 05:21:05.893299 - tftpboot 0x01080000 965321/tftp-deploy-7fd9du3f/kernel/uImage
264 05:21:05.893728 - tftpboot 0x08000000 965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
265 05:21:05.894237 - tftpboot 0x01070000 965321/tftp-deploy-7fd9du3f/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 05:21:05.894711 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 05:21:05.895230 - bootm 0x01080000 0x08000000 0x01070000
268 05:21:05.895853 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 05:21:05.897691 start: 2.3 connect-device (timeout 00:05:00) [common]
271 05:21:05.897968 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 05:21:05.911378 Setting prompt string to ['lava-test: # ']
273 05:21:05.912758 end: 2.3 connect-device (duration 00:00:00) [common]
274 05:21:05.913273 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 05:21:05.913682 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 05:21:05.914065 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 05:21:05.914777 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 05:21:05.950317 >> OK - accepted request
279 05:21:05.952849 Returned 0 in 0 seconds
280 05:21:06.054095 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 05:21:06.055803 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 05:21:06.056425 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 05:21:06.056953 Setting prompt string to ['Hit any key to stop autoboot']
285 05:21:06.057401 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 05:21:06.058986 Trying 192.168.56.21...
287 05:21:06.059471 Connected to conserv1.
288 05:21:06.059885 Escape character is '^]'.
289 05:21:06.060340
290 05:21:06.060755 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 05:21:06.061173
292 05:21:13.328135 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 05:21:13.328781 bl2_stage_init 0x01
294 05:21:13.329211 bl2_stage_init 0x81
295 05:21:13.333355 hw id: 0x0000 - pwm id 0x01
296 05:21:13.333701 bl2_stage_init 0xc1
297 05:21:13.338918 bl2_stage_init 0x02
298 05:21:13.339215
299 05:21:13.339440 L0:00000000
300 05:21:13.339654 L1:00000703
301 05:21:13.339865 L2:00008067
302 05:21:13.340105 L3:15000000
303 05:21:13.344635 S1:00000000
304 05:21:13.344943 B2:20282000
305 05:21:13.345163 B1:a0f83180
306 05:21:13.345365
307 05:21:13.345565 TE: 68969
308 05:21:13.345769
309 05:21:13.350155 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 05:21:13.350451
311 05:21:13.355679 Board ID = 1
312 05:21:13.355971 Set cpu clk to 24M
313 05:21:13.356242 Set clk81 to 24M
314 05:21:13.361338 Use GP1_pll as DSU clk.
315 05:21:13.361633 DSU clk: 1200 Mhz
316 05:21:13.361853 CPU clk: 1200 MHz
317 05:21:13.366955 Set clk81 to 166.6M
318 05:21:13.372576 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 05:21:13.372934 board id: 1
320 05:21:13.379772 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 05:21:13.390581 fw parse done
322 05:21:13.396646 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 05:21:13.439752 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 05:21:13.451014 PIEI prepare done
325 05:21:13.451536 fastboot data load
326 05:21:13.451948 fastboot data verify
327 05:21:13.456566 verify result: 266
328 05:21:13.462121 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 05:21:13.462613 LPDDR4 probe
330 05:21:13.463034 ddr clk to 1584MHz
331 05:21:13.470070 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 05:21:13.508040
333 05:21:13.508627 dmc_version 0001
334 05:21:13.514978 Check phy result
335 05:21:13.522569 INFO : End of CA training
336 05:21:13.523122 INFO : End of initialization
337 05:21:13.526543 INFO : Training has run successfully!
338 05:21:13.527051 Check phy result
339 05:21:13.532096 INFO : End of initialization
340 05:21:13.532596 INFO : End of read enable training
341 05:21:13.537719 INFO : End of fine write leveling
342 05:21:13.543329 INFO : End of Write leveling coarse delay
343 05:21:13.543832 INFO : Training has run successfully!
344 05:21:13.544288 Check phy result
345 05:21:13.548888 INFO : End of initialization
346 05:21:13.549397 INFO : End of read dq deskew training
347 05:21:13.554452 INFO : End of MPR read delay center optimization
348 05:21:13.560398 INFO : End of write delay center optimization
349 05:21:13.565706 INFO : End of read delay center optimization
350 05:21:13.566215 INFO : End of max read latency training
351 05:21:13.571337 INFO : Training has run successfully!
352 05:21:13.571859 1D training succeed
353 05:21:13.581500 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 05:21:13.628902 Check phy result
355 05:21:13.629480 INFO : End of initialization
356 05:21:13.656335 INFO : End of 2D read delay Voltage center optimization
357 05:21:13.682314 INFO : End of 2D read delay Voltage center optimization
358 05:21:13.737103 INFO : End of 2D write delay Voltage center optimization
359 05:21:13.791138 INFO : End of 2D write delay Voltage center optimization
360 05:21:13.796589 INFO : Training has run successfully!
361 05:21:13.797074
362 05:21:13.797479 channel==0
363 05:21:13.802172 RxClkDly_Margin_A0==78 ps 8
364 05:21:13.802653 TxDqDly_Margin_A0==98 ps 10
365 05:21:13.809250 RxClkDly_Margin_A1==69 ps 7
366 05:21:13.809799 TxDqDly_Margin_A1==98 ps 10
367 05:21:13.810204 TrainedVREFDQ_A0==74
368 05:21:13.813471 TrainedVREFDQ_A1==74
369 05:21:13.813970 VrefDac_Margin_A0==24
370 05:21:13.814371 DeviceVref_Margin_A0==40
371 05:21:13.818654 VrefDac_Margin_A1==23
372 05:21:13.822112 DeviceVref_Margin_A1==40
373 05:21:13.822576
374 05:21:13.822980
375 05:21:13.823374 channel==1
376 05:21:13.823768 RxClkDly_Margin_A0==78 ps 8
377 05:21:13.827656 TxDqDly_Margin_A0==98 ps 10
378 05:21:13.828159 RxClkDly_Margin_A1==78 ps 8
379 05:21:13.833291 TxDqDly_Margin_A1==88 ps 9
380 05:21:13.833764 TrainedVREFDQ_A0==78
381 05:21:13.834164 TrainedVREFDQ_A1==77
382 05:21:13.838811 VrefDac_Margin_A0==22
383 05:21:13.839307 DeviceVref_Margin_A0==36
384 05:21:13.846529 VrefDac_Margin_A1==22
385 05:21:13.847045 DeviceVref_Margin_A1==37
386 05:21:13.847459
387 05:21:13.850077 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 05:21:13.850572
389 05:21:13.878082 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
390 05:21:13.885396 2D training succeed
391 05:21:13.889223 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 05:21:13.889722 auto size-- 65535DDR cs0 size: 2048MB
393 05:21:13.894761 DDR cs1 size: 2048MB
394 05:21:13.895249 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 05:21:13.900377 cs0 DataBus test pass
396 05:21:13.900853 cs1 DataBus test pass
397 05:21:13.901250 cs0 AddrBus test pass
398 05:21:13.905922 cs1 AddrBus test pass
399 05:21:13.906391
400 05:21:13.906790 100bdlr_step_size ps== 471
401 05:21:13.907193 result report
402 05:21:13.911547 boot times 0Enable ddr reg access
403 05:21:13.921171 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 05:21:13.933178 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 05:21:14.593772 bl2z: ptr: 05129330, size: 00001e40
406 05:21:14.600999 0.0;M3 CHK:0;cm4_sp_mode 0
407 05:21:14.601530 MVN_1=0x00000000
408 05:21:14.601934 MVN_2=0x00000000
409 05:21:14.612468 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 05:21:14.612971 OPS=0x04
411 05:21:14.613380 ring efuse init
412 05:21:14.618083 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 05:21:14.618567 [0.017354 Inits done]
414 05:21:14.618968 secure task start!
415 05:21:14.625783 high task start!
416 05:21:14.626258 low task start!
417 05:21:14.626658 run into bl31
418 05:21:14.634601 NOTICE: BL31: v1.3(release):4fc40b1
419 05:21:14.642262 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 05:21:14.642772 NOTICE: BL31: G12A normal boot!
421 05:21:14.657814 NOTICE: BL31: BL33 decompress pass
422 05:21:14.663526 ERROR: Error initializing runtime service opteed_fast
423 05:21:17.378753 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 05:21:17.379395 bl2_stage_init 0x01
425 05:21:17.379835 bl2_stage_init 0x81
426 05:21:17.384804 hw id: 0x0000 - pwm id 0x01
427 05:21:17.385315 bl2_stage_init 0xc1
428 05:21:17.390117 bl2_stage_init 0x02
429 05:21:17.390627
430 05:21:17.391033 L0:00000000
431 05:21:17.391431 L1:00000703
432 05:21:17.391836 L2:00008067
433 05:21:17.392296 L3:15000000
434 05:21:17.395472 S1:00000000
435 05:21:17.395963 B2:20282000
436 05:21:17.396414 B1:a0f83180
437 05:21:17.396807
438 05:21:17.397195 TE: 68672
439 05:21:17.397586
440 05:21:17.401018 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 05:21:17.401484
442 05:21:17.406726 Board ID = 1
443 05:21:17.407180 Set cpu clk to 24M
444 05:21:17.407574 Set clk81 to 24M
445 05:21:17.412262 Use GP1_pll as DSU clk.
446 05:21:17.412750 DSU clk: 1200 Mhz
447 05:21:17.413150 CPU clk: 1200 MHz
448 05:21:17.417849 Set clk81 to 166.6M
449 05:21:17.423488 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 05:21:17.423956 board id: 1
451 05:21:17.431976 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 05:21:17.441376 fw parse done
453 05:21:17.447245 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 05:21:17.489894 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 05:21:17.500877 PIEI prepare done
456 05:21:17.501365 fastboot data load
457 05:21:17.501765 fastboot data verify
458 05:21:17.506460 verify result: 266
459 05:21:17.513530 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 05:21:17.514041 LPDDR4 probe
461 05:21:17.514442 ddr clk to 1584MHz
462 05:21:17.520075 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 05:21:17.557332
464 05:21:17.557936 dmc_version 0001
465 05:21:17.564011 Check phy result
466 05:21:17.569924 INFO : End of CA training
467 05:21:17.570445 INFO : End of initialization
468 05:21:17.576986 INFO : Training has run successfully!
469 05:21:17.577555 Check phy result
470 05:21:17.581556 INFO : End of initialization
471 05:21:17.581962 INFO : End of read enable training
472 05:21:17.586693 INFO : End of fine write leveling
473 05:21:17.592271 INFO : End of Write leveling coarse delay
474 05:21:17.592808 INFO : Training has run successfully!
475 05:21:17.593248 Check phy result
476 05:21:17.597902 INFO : End of initialization
477 05:21:17.598471 INFO : End of read dq deskew training
478 05:21:17.605335 INFO : End of MPR read delay center optimization
479 05:21:17.609198 INFO : End of write delay center optimization
480 05:21:17.614673 INFO : End of read delay center optimization
481 05:21:17.615217 INFO : End of max read latency training
482 05:21:17.620227 INFO : Training has run successfully!
483 05:21:17.620753 1D training succeed
484 05:21:17.629418 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 05:21:17.677056 Check phy result
486 05:21:17.677640 INFO : End of initialization
487 05:21:17.699450 INFO : End of 2D read delay Voltage center optimization
488 05:21:17.718560 INFO : End of 2D read delay Voltage center optimization
489 05:21:17.770624 INFO : End of 2D write delay Voltage center optimization
490 05:21:17.819717 INFO : End of 2D write delay Voltage center optimization
491 05:21:17.825292 INFO : Training has run successfully!
492 05:21:17.825816
493 05:21:17.826286 channel==0
494 05:21:17.830928 RxClkDly_Margin_A0==78 ps 8
495 05:21:17.831448 TxDqDly_Margin_A0==98 ps 10
496 05:21:17.836436 RxClkDly_Margin_A1==88 ps 9
497 05:21:17.836951 TxDqDly_Margin_A1==88 ps 9
498 05:21:17.837412 TrainedVREFDQ_A0==76
499 05:21:17.843305 TrainedVREFDQ_A1==74
500 05:21:17.843833 VrefDac_Margin_A0==24
501 05:21:17.844331 DeviceVref_Margin_A0==38
502 05:21:17.847654 VrefDac_Margin_A1==23
503 05:21:17.848213 DeviceVref_Margin_A1==40
504 05:21:17.848677
505 05:21:17.849123
506 05:21:17.849567 channel==1
507 05:21:17.853260 RxClkDly_Margin_A0==88 ps 9
508 05:21:17.853771 TxDqDly_Margin_A0==98 ps 10
509 05:21:17.858897 RxClkDly_Margin_A1==78 ps 8
510 05:21:17.859454 TxDqDly_Margin_A1==78 ps 8
511 05:21:17.864437 TrainedVREFDQ_A0==78
512 05:21:17.864965 TrainedVREFDQ_A1==75
513 05:21:17.865418 VrefDac_Margin_A0==22
514 05:21:17.870062 DeviceVref_Margin_A0==36
515 05:21:17.870579 VrefDac_Margin_A1==22
516 05:21:17.875682 DeviceVref_Margin_A1==39
517 05:21:17.876233
518 05:21:17.876695 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 05:21:17.877143
520 05:21:17.909208 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 05:21:17.909842 2D training succeed
522 05:21:17.914956 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 05:21:17.920422 auto size-- 65535DDR cs0 size: 2048MB
524 05:21:17.920944 DDR cs1 size: 2048MB
525 05:21:17.926081 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 05:21:17.926598 cs0 DataBus test pass
527 05:21:17.931787 cs1 DataBus test pass
528 05:21:17.932359 cs0 AddrBus test pass
529 05:21:17.932817 cs1 AddrBus test pass
530 05:21:17.933270
531 05:21:17.937449 100bdlr_step_size ps== 478
532 05:21:17.937993 result report
533 05:21:17.942937 boot times 0Enable ddr reg access
534 05:21:17.948119 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 05:21:17.961934 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 05:21:18.616793 bl2z: ptr: 05129330, size: 00001e40
537 05:21:18.625430 0.0;M3 CHK:0;cm4_sp_mode 0
538 05:21:18.625943 MVN_1=0x00000000
539 05:21:18.626392 MVN_2=0x00000000
540 05:21:18.636370 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 05:21:18.636890 OPS=0x04
542 05:21:18.637347 ring efuse init
543 05:21:18.642002 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 05:21:18.642505 [0.017320 Inits done]
545 05:21:18.642955 secure task start!
546 05:21:18.649966 high task start!
547 05:21:18.650452 low task start!
548 05:21:18.650900 run into bl31
549 05:21:18.658530 NOTICE: BL31: v1.3(release):4fc40b1
550 05:21:18.666925 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 05:21:18.667423 NOTICE: BL31: G12A normal boot!
552 05:21:18.681881 NOTICE: BL31: BL33 decompress pass
553 05:21:18.687603 ERROR: Error initializing runtime service opteed_fast
554 05:21:20.077103 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 05:21:20.077776 bl2_stage_init 0x01
556 05:21:20.078249 bl2_stage_init 0x81
557 05:21:20.082651 hw id: 0x0000 - pwm id 0x01
558 05:21:20.083151 bl2_stage_init 0xc1
559 05:21:20.088311 bl2_stage_init 0x02
560 05:21:20.088797
561 05:21:20.089254 L0:00000000
562 05:21:20.089696 L1:00000703
563 05:21:20.090134 L2:00008067
564 05:21:20.090572 L3:15000000
565 05:21:20.093766 S1:00000000
566 05:21:20.094243 B2:20282000
567 05:21:20.094689 B1:a0f83180
568 05:21:20.095125
569 05:21:20.095562 TE: 68003
570 05:21:20.096053
571 05:21:20.101131 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 05:21:20.101631
573 05:21:20.105018 Board ID = 1
574 05:21:20.105509 Set cpu clk to 24M
575 05:21:20.105955 Set clk81 to 24M
576 05:21:20.110569 Use GP1_pll as DSU clk.
577 05:21:20.111056 DSU clk: 1200 Mhz
578 05:21:20.111501 CPU clk: 1200 MHz
579 05:21:20.117916 Set clk81 to 166.6M
580 05:21:20.121820 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 05:21:20.122312 board id: 1
582 05:21:20.129099 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 05:21:20.139937 fw parse done
584 05:21:20.145918 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 05:21:20.188951 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 05:21:20.200226 PIEI prepare done
587 05:21:20.200724 fastboot data load
588 05:21:20.201182 fastboot data verify
589 05:21:20.205597 verify result: 266
590 05:21:20.211240 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 05:21:20.211727 LPDDR4 probe
592 05:21:20.212235 ddr clk to 1584MHz
593 05:21:20.219240 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 05:21:20.256995
595 05:21:20.257510 dmc_version 0001
596 05:21:20.263962 Check phy result
597 05:21:20.271972 INFO : End of CA training
598 05:21:20.272483 INFO : End of initialization
599 05:21:20.275569 INFO : Training has run successfully!
600 05:21:20.276084 Check phy result
601 05:21:20.281234 INFO : End of initialization
602 05:21:20.281719 INFO : End of read enable training
603 05:21:20.286769 INFO : End of fine write leveling
604 05:21:20.292392 INFO : End of Write leveling coarse delay
605 05:21:20.292866 INFO : Training has run successfully!
606 05:21:20.293310 Check phy result
607 05:21:20.297952 INFO : End of initialization
608 05:21:20.298424 INFO : End of read dq deskew training
609 05:21:20.303613 INFO : End of MPR read delay center optimization
610 05:21:20.310468 INFO : End of write delay center optimization
611 05:21:20.314847 INFO : End of read delay center optimization
612 05:21:20.315333 INFO : End of max read latency training
613 05:21:20.320373 INFO : Training has run successfully!
614 05:21:20.320852 1D training succeed
615 05:21:20.329593 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 05:21:20.377962 Check phy result
617 05:21:20.378470 INFO : End of initialization
618 05:21:20.405375 INFO : End of 2D read delay Voltage center optimization
619 05:21:20.429398 INFO : End of 2D read delay Voltage center optimization
620 05:21:20.486275 INFO : End of 2D write delay Voltage center optimization
621 05:21:20.540323 INFO : End of 2D write delay Voltage center optimization
622 05:21:20.550118 INFO : Training has run successfully!
623 05:21:20.550633
624 05:21:20.551095 channel==0
625 05:21:20.551905 RxClkDly_Margin_A0==78 ps 8
626 05:21:20.552431 TxDqDly_Margin_A0==98 ps 10
627 05:21:20.554620 RxClkDly_Margin_A1==78 ps 8
628 05:21:20.555103 TxDqDly_Margin_A1==98 ps 10
629 05:21:20.560199 TrainedVREFDQ_A0==76
630 05:21:20.560690 TrainedVREFDQ_A1==74
631 05:21:20.561135 VrefDac_Margin_A0==23
632 05:21:20.565777 DeviceVref_Margin_A0==38
633 05:21:20.566301 VrefDac_Margin_A1==23
634 05:21:20.571345 DeviceVref_Margin_A1==40
635 05:21:20.571846
636 05:21:20.572337
637 05:21:20.572779 channel==1
638 05:21:20.573215 RxClkDly_Margin_A0==78 ps 8
639 05:21:20.574793 TxDqDly_Margin_A0==98 ps 10
640 05:21:20.580311 RxClkDly_Margin_A1==88 ps 9
641 05:21:20.580784 TxDqDly_Margin_A1==88 ps 9
642 05:21:20.581233 TrainedVREFDQ_A0==78
643 05:21:20.585984 TrainedVREFDQ_A1==77
644 05:21:20.586459 VrefDac_Margin_A0==22
645 05:21:20.592077 DeviceVref_Margin_A0==36
646 05:21:20.592562 VrefDac_Margin_A1==22
647 05:21:20.593005 DeviceVref_Margin_A1==37
648 05:21:20.593444
649 05:21:20.597193 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 05:21:20.597679
651 05:21:20.630742 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 05:21:20.631271 2D training succeed
653 05:21:20.636403 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 05:21:20.641826 auto size-- 65535DDR cs0 size: 2048MB
655 05:21:20.642300 DDR cs1 size: 2048MB
656 05:21:20.647419 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 05:21:20.647895 cs0 DataBus test pass
658 05:21:20.648381 cs1 DataBus test pass
659 05:21:20.653048 cs0 AddrBus test pass
660 05:21:20.653523 cs1 AddrBus test pass
661 05:21:20.653968
662 05:21:20.658635 100bdlr_step_size ps== 485
663 05:21:20.659138 result report
664 05:21:20.659579 boot times 0Enable ddr reg access
665 05:21:20.668471 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 05:21:20.682272 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 05:21:21.341506 bl2z: ptr: 05129330, size: 00001e40
668 05:21:21.350478 0.0;M3 CHK:0;cm4_sp_mode 0
669 05:21:21.350979 MVN_1=0x00000000
670 05:21:21.351425 MVN_2=0x00000000
671 05:21:21.362032 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 05:21:21.362522 OPS=0x04
673 05:21:21.362977 ring efuse init
674 05:21:21.364982 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 05:21:21.371480 [0.017354 Inits done]
676 05:21:21.371957 secure task start!
677 05:21:21.372494 high task start!
678 05:21:21.372937 low task start!
679 05:21:21.375747 run into bl31
680 05:21:21.384419 NOTICE: BL31: v1.3(release):4fc40b1
681 05:21:21.392149 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 05:21:21.392635 NOTICE: BL31: G12A normal boot!
683 05:21:21.407640 NOTICE: BL31: BL33 decompress pass
684 05:21:21.413428 ERROR: Error initializing runtime service opteed_fast
685 05:21:22.207685
686 05:21:22.208433
687 05:21:22.212997 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 05:21:22.213495
689 05:21:22.216481 Model: Libre Computer AML-S905D3-CC Solitude
690 05:21:22.363382 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 05:21:22.378762 DRAM: 2 GiB (effective 3.8 GiB)
692 05:21:22.479771 Core: 406 devices, 33 uclasses, devicetree: separate
693 05:21:22.485533 WDT: Not starting watchdog@f0d0
694 05:21:22.510666 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 05:21:22.522837 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 05:21:22.527828 ** Bad device specification mmc 0 **
697 05:21:22.537890 Card did not respond to voltage select! : -110
698 05:21:22.545491 ** Bad device specification mmc 0 **
699 05:21:22.545968 Couldn't find partition mmc 0
700 05:21:22.553815 Card did not respond to voltage select! : -110
701 05:21:22.559360 ** Bad device specification mmc 0 **
702 05:21:22.559826 Couldn't find partition mmc 0
703 05:21:22.564466 Error: could not access storage.
704 05:21:22.862035 Net: eth0: ethernet@ff3f0000
705 05:21:22.862711 starting USB...
706 05:21:23.106636 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 05:21:23.107303 Starting the controller
708 05:21:23.113565 USB XHCI 1.10
709 05:21:24.670153 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 05:21:24.678532 scanning usb for storage devices... 0 Storage Device(s) found
712 05:21:24.730302 Hit any key to stop autoboot: 1
713 05:21:24.731325 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 05:21:24.732036 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 05:21:24.732579 Setting prompt string to ['=>']
716 05:21:24.733114 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 05:21:24.744552 0
718 05:21:24.745537 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 05:21:24.846868 => setenv autoload no
721 05:21:24.847660 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 05:21:24.853064 setenv autoload no
724 05:21:24.954694 => setenv initrd_high 0xffffffff
725 05:21:24.955486 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 05:21:24.959822 setenv initrd_high 0xffffffff
728 05:21:25.061416 => setenv fdt_high 0xffffffff
729 05:21:25.062164 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 05:21:25.066583 setenv fdt_high 0xffffffff
732 05:21:25.168219 => dhcp
733 05:21:25.169053 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 05:21:25.173138 dhcp
735 05:21:25.678748 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 05:21:25.679378 Speed: 1000, full duplex
737 05:21:25.679849 BOOTP broadcast 1
738 05:21:25.696776 DHCP client bound to address 192.168.6.21 (17 ms)
740 05:21:25.798351 => setenv serverip 192.168.6.2
741 05:21:25.799108 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 05:21:25.803723 setenv serverip 192.168.6.2
744 05:21:25.905409 => tftpboot 0x01080000 965321/tftp-deploy-7fd9du3f/kernel/uImage
745 05:21:25.906192 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 05:21:25.913053 tftpboot 0x01080000 965321/tftp-deploy-7fd9du3f/kernel/uImage
747 05:21:25.913573 Speed: 1000, full duplex
748 05:21:25.914027 Using ethernet@ff3f0000 device
749 05:21:25.918597 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 05:21:25.924034 Filename '965321/tftp-deploy-7fd9du3f/kernel/uImage'.
751 05:21:25.928042 Load address: 0x1080000
752 05:21:28.868408 Loading: *################################################## 43.6 MiB
753 05:21:28.868933 14.8 MiB/s
754 05:21:28.869233 done
755 05:21:28.872910 Bytes transferred = 45713984 (2b98a40 hex)
757 05:21:28.974294 => tftpboot 0x08000000 965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
758 05:21:28.975237 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
759 05:21:28.982256 tftpboot 0x08000000 965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot
760 05:21:28.982934 Speed: 1000, full duplex
761 05:21:28.983459 Using ethernet@ff3f0000 device
762 05:21:28.987781 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
763 05:21:28.997431 Filename '965321/tftp-deploy-7fd9du3f/ramdisk/ramdisk.cpio.gz.uboot'.
764 05:21:28.997820 Load address: 0x8000000
765 05:21:37.713229 Loading: *###################T ################### UDP wrong checksum 000000ff 0000b73f
766 05:21:37.752745 UDP wrong checksum 000000ff 00004732
767 05:21:38.747793 ########### UDP wrong checksum 0000000f 0000ed7b
768 05:21:43.748828 T UDP wrong checksum 0000000f 0000ed7b
769 05:21:53.750720 T T UDP wrong checksum 0000000f 0000ed7b
770 05:22:13.752476 T T T UDP wrong checksum 0000000f 0000ed7b
771 05:22:19.047974 T T UDP wrong checksum 000000ff 00004109
772 05:22:19.095637 UDP wrong checksum 000000ff 0000dbfb
773 05:22:25.537309 T UDP wrong checksum 000000ff 00005f7d
774 05:22:25.587736 UDP wrong checksum 000000ff 0000f96f
775 05:22:28.758380
776 05:22:28.758801 Retry count exceeded; starting again
778 05:22:28.759840 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
781 05:22:28.761113 end: 2.4 uboot-commands (duration 00:01:23) [common]
783 05:22:28.762175 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
785 05:22:28.762774 end: 2 uboot-action (duration 00:01:23) [common]
787 05:22:28.763602 Cleaning after the job
788 05:22:28.763914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/ramdisk
789 05:22:28.764765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/kernel
790 05:22:28.790927 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/dtb
791 05:22:28.792039 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965321/tftp-deploy-7fd9du3f/modules
792 05:22:28.812262 start: 4.1 power-off (timeout 00:00:30) [common]
793 05:22:28.812927 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
794 05:22:28.849566 >> OK - accepted request
795 05:22:28.851688 Returned 0 in 0 seconds
796 05:22:28.952593 end: 4.1 power-off (duration 00:00:00) [common]
798 05:22:28.954366 start: 4.2 read-feedback (timeout 00:10:00) [common]
799 05:22:28.955563 Listened to connection for namespace 'common' for up to 1s
800 05:22:29.955844 Finalising connection for namespace 'common'
801 05:22:29.956695 Disconnecting from shell: Finalise
802 05:22:29.957291 =>
803 05:22:30.058441 end: 4.2 read-feedback (duration 00:00:01) [common]
804 05:22:30.059134 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/965321
805 05:22:30.728469 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/965321
806 05:22:30.729070 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.