Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:04:23.527663 lava-dispatcher, installed at version: 2024.01
2 05:04:23.528561 start: 0 validate
3 05:04:23.529064 Start time: 2024-11-09 05:04:23.529032+00:00 (UTC)
4 05:04:23.529627 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:04:23.530218 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:04:23.575785 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:04:23.576463 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:04:23.605104 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:04:23.605772 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 05:04:23.633464 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:04:23.633960 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:04:23.666492 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:04:23.667009 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:04:23.709065 validate duration: 0.18
16 05:04:23.709904 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:04:23.710238 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:04:23.710564 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:04:23.711139 Not decompressing ramdisk as can be used compressed.
20 05:04:23.711584 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 05:04:23.711870 saving as /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/ramdisk/initrd.cpio.gz
22 05:04:23.712162 total size: 5628169 (5 MB)
23 05:04:23.749427 progress 0 % (0 MB)
24 05:04:23.757035 progress 5 % (0 MB)
25 05:04:23.764985 progress 10 % (0 MB)
26 05:04:23.772158 progress 15 % (0 MB)
27 05:04:23.778141 progress 20 % (1 MB)
28 05:04:23.781811 progress 25 % (1 MB)
29 05:04:23.785980 progress 30 % (1 MB)
30 05:04:23.790094 progress 35 % (1 MB)
31 05:04:23.793789 progress 40 % (2 MB)
32 05:04:23.797765 progress 45 % (2 MB)
33 05:04:23.801445 progress 50 % (2 MB)
34 05:04:23.805483 progress 55 % (2 MB)
35 05:04:23.809504 progress 60 % (3 MB)
36 05:04:23.813090 progress 65 % (3 MB)
37 05:04:23.817212 progress 70 % (3 MB)
38 05:04:23.820799 progress 75 % (4 MB)
39 05:04:23.824747 progress 80 % (4 MB)
40 05:04:23.828331 progress 85 % (4 MB)
41 05:04:23.832312 progress 90 % (4 MB)
42 05:04:23.835954 progress 95 % (5 MB)
43 05:04:23.839222 progress 100 % (5 MB)
44 05:04:23.839852 5 MB downloaded in 0.13 s (42.04 MB/s)
45 05:04:23.840405 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:04:23.841295 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:04:23.841584 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:04:23.841852 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:04:23.842311 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kernel/Image
51 05:04:23.842553 saving as /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/kernel/Image
52 05:04:23.842765 total size: 45713920 (43 MB)
53 05:04:23.842979 No compression specified
54 05:04:23.875695 progress 0 % (0 MB)
55 05:04:23.903564 progress 5 % (2 MB)
56 05:04:23.931283 progress 10 % (4 MB)
57 05:04:23.959268 progress 15 % (6 MB)
58 05:04:23.987143 progress 20 % (8 MB)
59 05:04:24.014961 progress 25 % (10 MB)
60 05:04:24.042919 progress 30 % (13 MB)
61 05:04:24.070827 progress 35 % (15 MB)
62 05:04:24.098867 progress 40 % (17 MB)
63 05:04:24.126456 progress 45 % (19 MB)
64 05:04:24.154394 progress 50 % (21 MB)
65 05:04:24.182308 progress 55 % (24 MB)
66 05:04:24.210541 progress 60 % (26 MB)
67 05:04:24.239863 progress 65 % (28 MB)
68 05:04:24.269173 progress 70 % (30 MB)
69 05:04:24.297043 progress 75 % (32 MB)
70 05:04:24.325355 progress 80 % (34 MB)
71 05:04:24.352931 progress 85 % (37 MB)
72 05:04:24.380946 progress 90 % (39 MB)
73 05:04:24.409144 progress 95 % (41 MB)
74 05:04:24.438181 progress 100 % (43 MB)
75 05:04:24.438739 43 MB downloaded in 0.60 s (73.15 MB/s)
76 05:04:24.439234 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:04:24.440117 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:04:24.440421 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:04:24.440706 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:04:24.441177 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 05:04:24.441457 saving as /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/dtb/meson-g12b-a311d-libretech-cc.dtb
83 05:04:24.441677 total size: 54703 (0 MB)
84 05:04:24.441896 No compression specified
85 05:04:24.482033 progress 59 % (0 MB)
86 05:04:24.482905 progress 100 % (0 MB)
87 05:04:24.483484 0 MB downloaded in 0.04 s (1.25 MB/s)
88 05:04:24.483967 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:04:24.484864 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:04:24.485137 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:04:24.485414 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:04:24.485877 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 05:04:24.486127 saving as /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/nfsrootfs/full.rootfs.tar
95 05:04:24.486339 total size: 120894716 (115 MB)
96 05:04:24.486553 Using unxz to decompress xz
97 05:04:24.519074 progress 0 % (0 MB)
98 05:04:25.310527 progress 5 % (5 MB)
99 05:04:26.148743 progress 10 % (11 MB)
100 05:04:26.958305 progress 15 % (17 MB)
101 05:04:27.707914 progress 20 % (23 MB)
102 05:04:28.303010 progress 25 % (28 MB)
103 05:04:29.142823 progress 30 % (34 MB)
104 05:04:29.957056 progress 35 % (40 MB)
105 05:04:30.303425 progress 40 % (46 MB)
106 05:04:30.675049 progress 45 % (51 MB)
107 05:04:31.402413 progress 50 % (57 MB)
108 05:04:32.294155 progress 55 % (63 MB)
109 05:04:33.083976 progress 60 % (69 MB)
110 05:04:33.864557 progress 65 % (74 MB)
111 05:04:34.640525 progress 70 % (80 MB)
112 05:04:35.484145 progress 75 % (86 MB)
113 05:04:36.275797 progress 80 % (92 MB)
114 05:04:37.035405 progress 85 % (98 MB)
115 05:04:37.887975 progress 90 % (103 MB)
116 05:04:38.665870 progress 95 % (109 MB)
117 05:04:39.500245 progress 100 % (115 MB)
118 05:04:39.512805 115 MB downloaded in 15.03 s (7.67 MB/s)
119 05:04:39.513423 end: 1.4.1 http-download (duration 00:00:15) [common]
121 05:04:39.514249 end: 1.4 download-retry (duration 00:00:15) [common]
122 05:04:39.514517 start: 1.5 download-retry (timeout 00:09:44) [common]
123 05:04:39.514779 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 05:04:39.515333 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/modules.tar.xz
125 05:04:39.515620 saving as /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/modules/modules.tar
126 05:04:39.515828 total size: 11607448 (11 MB)
127 05:04:39.516136 Using unxz to decompress xz
128 05:04:39.562585 progress 0 % (0 MB)
129 05:04:39.629143 progress 5 % (0 MB)
130 05:04:39.703486 progress 10 % (1 MB)
131 05:04:39.799451 progress 15 % (1 MB)
132 05:04:39.890855 progress 20 % (2 MB)
133 05:04:39.971019 progress 25 % (2 MB)
134 05:04:40.046824 progress 30 % (3 MB)
135 05:04:40.121002 progress 35 % (3 MB)
136 05:04:40.198057 progress 40 % (4 MB)
137 05:04:40.274669 progress 45 % (5 MB)
138 05:04:40.358991 progress 50 % (5 MB)
139 05:04:40.437203 progress 55 % (6 MB)
140 05:04:40.522566 progress 60 % (6 MB)
141 05:04:40.604314 progress 65 % (7 MB)
142 05:04:40.680725 progress 70 % (7 MB)
143 05:04:40.762591 progress 75 % (8 MB)
144 05:04:40.845798 progress 80 % (8 MB)
145 05:04:40.925717 progress 85 % (9 MB)
146 05:04:41.004191 progress 90 % (9 MB)
147 05:04:41.081971 progress 95 % (10 MB)
148 05:04:41.158807 progress 100 % (11 MB)
149 05:04:41.169812 11 MB downloaded in 1.65 s (6.69 MB/s)
150 05:04:41.170399 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:04:41.171234 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:04:41.171502 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 05:04:41.171767 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 05:04:58.118950 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/965250/extract-nfsrootfs-6l6pr5yi
156 05:04:58.119566 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 05:04:58.119858 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 05:04:58.120537 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2
159 05:04:58.120986 makedir: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin
160 05:04:58.121316 makedir: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/tests
161 05:04:58.121636 makedir: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/results
162 05:04:58.121976 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-add-keys
163 05:04:58.122561 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-add-sources
164 05:04:58.123092 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-background-process-start
165 05:04:58.123613 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-background-process-stop
166 05:04:58.124188 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-common-functions
167 05:04:58.124712 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-echo-ipv4
168 05:04:58.125195 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-install-packages
169 05:04:58.125744 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-installed-packages
170 05:04:58.126249 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-os-build
171 05:04:58.126751 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-probe-channel
172 05:04:58.127229 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-probe-ip
173 05:04:58.127700 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-target-ip
174 05:04:58.128224 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-target-mac
175 05:04:58.128726 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-target-storage
176 05:04:58.129215 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-case
177 05:04:58.129693 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-event
178 05:04:58.130176 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-feedback
179 05:04:58.130669 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-raise
180 05:04:58.131141 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-reference
181 05:04:58.131613 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-runner
182 05:04:58.132114 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-set
183 05:04:58.132617 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-test-shell
184 05:04:58.133113 Updating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-add-keys (debian)
185 05:04:58.133647 Updating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-add-sources (debian)
186 05:04:58.134165 Updating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-install-packages (debian)
187 05:04:58.134671 Updating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-installed-packages (debian)
188 05:04:58.135170 Updating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/bin/lava-os-build (debian)
189 05:04:58.135613 Creating /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/environment
190 05:04:58.136020 LAVA metadata
191 05:04:58.136305 - LAVA_JOB_ID=965250
192 05:04:58.136524 - LAVA_DISPATCHER_IP=192.168.6.2
193 05:04:58.136902 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 05:04:58.137922 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 05:04:58.138265 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 05:04:58.138475 skipped lava-vland-overlay
197 05:04:58.138716 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 05:04:58.138972 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 05:04:58.139193 skipped lava-multinode-overlay
200 05:04:58.139435 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 05:04:58.139687 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 05:04:58.139938 Loading test definitions
203 05:04:58.140293 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 05:04:58.140523 Using /lava-965250 at stage 0
205 05:04:58.141696 uuid=965250_1.6.2.4.1 testdef=None
206 05:04:58.142023 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 05:04:58.142290 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 05:04:58.143874 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 05:04:58.144744 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 05:04:58.146745 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 05:04:58.147592 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 05:04:58.149771 runner path: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/0/tests/0_timesync-off test_uuid 965250_1.6.2.4.1
215 05:04:58.150423 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 05:04:58.151288 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 05:04:58.151516 Using /lava-965250 at stage 0
219 05:04:58.151888 Fetching tests from https://github.com/kernelci/test-definitions.git
220 05:04:58.152235 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/0/tests/1_kselftest-dt'
221 05:05:01.747367 Running '/usr/bin/git checkout kernelci.org
222 05:05:02.291664 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 05:05:02.293137 uuid=965250_1.6.2.4.5 testdef=None
224 05:05:02.293481 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 05:05:02.294229 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 05:05:02.297107 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 05:05:02.297938 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 05:05:02.301749 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 05:05:02.302644 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 05:05:02.306340 runner path: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/0/tests/1_kselftest-dt test_uuid 965250_1.6.2.4.5
234 05:05:02.306648 BOARD='meson-g12b-a311d-libretech-cc'
235 05:05:02.306858 BRANCH='broonie-sound'
236 05:05:02.307058 SKIPFILE='/dev/null'
237 05:05:02.307256 SKIP_INSTALL='True'
238 05:05:02.307455 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 05:05:02.307657 TST_CASENAME=''
240 05:05:02.307856 TST_CMDFILES='dt'
241 05:05:02.308471 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 05:05:02.309286 Creating lava-test-runner.conf files
244 05:05:02.309494 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/965250/lava-overlay-um2qvjr2/lava-965250/0 for stage 0
245 05:05:02.309936 - 0_timesync-off
246 05:05:02.310209 - 1_kselftest-dt
247 05:05:02.310559 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 05:05:02.310848 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 05:05:26.108240 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 05:05:26.108684 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 05:05:26.109107 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 05:05:26.109397 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 05:05:26.109667 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 05:05:26.784418 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 05:05:26.784881 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 05:05:26.785139 extracting modules file /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965250/extract-nfsrootfs-6l6pr5yi
257 05:05:28.236704 extracting modules file /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk
258 05:05:29.639930 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 05:05:29.640433 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 05:05:29.640711 [common] Applying overlay to NFS
261 05:05:29.640927 [common] Applying overlay /var/lib/lava/dispatcher/tmp/965250/compress-overlay-pl5smb0b/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/965250/extract-nfsrootfs-6l6pr5yi
262 05:05:32.436277 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 05:05:32.436783 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 05:05:32.437061 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 05:05:32.437293 Converting downloaded kernel to a uImage
266 05:05:32.437608 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/kernel/Image /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/kernel/uImage
267 05:05:32.913465 output: Image Name:
268 05:05:32.913982 output: Created: Sat Nov 9 05:05:32 2024
269 05:05:32.914246 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 05:05:32.914502 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 05:05:32.914756 output: Load Address: 01080000
272 05:05:32.915013 output: Entry Point: 01080000
273 05:05:32.915259 output:
274 05:05:32.915681 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 05:05:32.916062 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 05:05:32.916419 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 05:05:32.916737 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 05:05:32.917060 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 05:05:32.917411 Building ramdisk /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk
280 05:05:35.062976 >> 166792 blocks
281 05:05:42.944218 Adding RAMdisk u-boot header.
282 05:05:42.944886 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk.cpio.gz.uboot
283 05:05:43.190474 output: Image Name:
284 05:05:43.190900 output: Created: Sat Nov 9 05:05:42 2024
285 05:05:43.191375 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 05:05:43.191844 output: Data Size: 23433923 Bytes = 22884.69 KiB = 22.35 MiB
287 05:05:43.192525 output: Load Address: 00000000
288 05:05:43.193016 output: Entry Point: 00000000
289 05:05:43.193481 output:
290 05:05:43.194589 rename /var/lib/lava/dispatcher/tmp/965250/extract-overlay-ramdisk-mglle2kj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
291 05:05:43.195486 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 05:05:43.196297 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 05:05:43.197080 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 05:05:43.197680 No LXC device requested
295 05:05:43.198271 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 05:05:43.198933 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 05:05:43.199529 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 05:05:43.200028 Checking files for TFTP limit of 4294967296 bytes.
299 05:05:43.203192 end: 1 tftp-deploy (duration 00:01:19) [common]
300 05:05:43.204054 start: 2 uboot-action (timeout 00:05:00) [common]
301 05:05:43.204749 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 05:05:43.205329 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 05:05:43.205906 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 05:05:43.206587 Using kernel file from prepare-kernel: 965250/tftp-deploy-w8vkq7kw/kernel/uImage
305 05:05:43.207382 substitutions:
306 05:05:43.208006 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 05:05:43.208662 - {DTB_ADDR}: 0x01070000
308 05:05:43.209136 - {DTB}: 965250/tftp-deploy-w8vkq7kw/dtb/meson-g12b-a311d-libretech-cc.dtb
309 05:05:43.209591 - {INITRD}: 965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
310 05:05:43.210044 - {KERNEL_ADDR}: 0x01080000
311 05:05:43.210489 - {KERNEL}: 965250/tftp-deploy-w8vkq7kw/kernel/uImage
312 05:05:43.211071 - {LAVA_MAC}: None
313 05:05:43.211637 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/965250/extract-nfsrootfs-6l6pr5yi
314 05:05:43.212256 - {NFS_SERVER_IP}: 192.168.6.2
315 05:05:43.212791 - {PRESEED_CONFIG}: None
316 05:05:43.213248 - {PRESEED_LOCAL}: None
317 05:05:43.213695 - {RAMDISK_ADDR}: 0x08000000
318 05:05:43.214136 - {RAMDISK}: 965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
319 05:05:43.214645 - {ROOT_PART}: None
320 05:05:43.215254 - {ROOT}: None
321 05:05:43.215767 - {SERVER_IP}: 192.168.6.2
322 05:05:43.216529 - {TEE_ADDR}: 0x83000000
323 05:05:43.217058 - {TEE}: None
324 05:05:43.217522 Parsed boot commands:
325 05:05:43.218029 - setenv autoload no
326 05:05:43.218544 - setenv initrd_high 0xffffffff
327 05:05:43.218981 - setenv fdt_high 0xffffffff
328 05:05:43.219416 - dhcp
329 05:05:43.219912 - setenv serverip 192.168.6.2
330 05:05:43.220459 - tftpboot 0x01080000 965250/tftp-deploy-w8vkq7kw/kernel/uImage
331 05:05:43.220961 - tftpboot 0x08000000 965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
332 05:05:43.221478 - tftpboot 0x01070000 965250/tftp-deploy-w8vkq7kw/dtb/meson-g12b-a311d-libretech-cc.dtb
333 05:05:43.222028 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/965250/extract-nfsrootfs-6l6pr5yi,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 05:05:43.222547 - bootm 0x01080000 0x08000000 0x01070000
335 05:05:43.223255 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 05:05:43.225105 start: 2.3 connect-device (timeout 00:05:00) [common]
338 05:05:43.225606 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 05:05:43.241938 Setting prompt string to ['lava-test: # ']
340 05:05:43.243833 end: 2.3 connect-device (duration 00:00:00) [common]
341 05:05:43.244701 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 05:05:43.245350 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 05:05:43.246008 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 05:05:43.247343 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 05:05:43.308833 >> OK - accepted request
346 05:05:43.310938 Returned 0 in 0 seconds
347 05:05:43.411913 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 05:05:43.414360 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 05:05:43.415083 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 05:05:43.415733 Setting prompt string to ['Hit any key to stop autoboot']
352 05:05:43.416355 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 05:05:43.418207 Trying 192.168.56.21...
354 05:05:43.418799 Connected to conserv1.
355 05:05:43.419301 Escape character is '^]'.
356 05:05:43.419792
357 05:05:43.420305 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 05:05:43.420782
359 05:05:54.696899 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 05:05:54.697601 bl2_stage_init 0x01
361 05:05:54.698090 bl2_stage_init 0x81
362 05:05:54.702344 hw id: 0x0000 - pwm id 0x01
363 05:05:54.702925 bl2_stage_init 0xc1
364 05:05:54.703405 bl2_stage_init 0x02
365 05:05:54.703881
366 05:05:54.708062 L0:00000000
367 05:05:54.708590 L1:20000703
368 05:05:54.709054 L2:00008067
369 05:05:54.709516 L3:14000000
370 05:05:54.713558 B2:00402000
371 05:05:54.714068 B1:e0f83180
372 05:05:54.714521
373 05:05:54.714961 TE: 58124
374 05:05:54.715401
375 05:05:54.719153 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 05:05:54.719639
377 05:05:54.720117 Board ID = 1
378 05:05:54.724729 Set A53 clk to 24M
379 05:05:54.725211 Set A73 clk to 24M
380 05:05:54.725653 Set clk81 to 24M
381 05:05:54.730394 A53 clk: 1200 MHz
382 05:05:54.730870 A73 clk: 1200 MHz
383 05:05:54.731309 CLK81: 166.6M
384 05:05:54.731740 smccc: 00012a92
385 05:05:54.735898 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 05:05:54.741503 board id: 1
387 05:05:54.747479 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 05:05:54.758244 fw parse done
389 05:05:54.764148 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 05:05:54.806583 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 05:05:54.817459 PIEI prepare done
392 05:05:54.817973 fastboot data load
393 05:05:54.818426 fastboot data verify
394 05:05:54.823158 verify result: 266
395 05:05:54.828776 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 05:05:54.829341 LPDDR4 probe
397 05:05:54.829808 ddr clk to 1584MHz
398 05:05:54.836750 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 05:05:54.874030
400 05:05:54.874647 dmc_version 0001
401 05:05:54.880624 Check phy result
402 05:05:54.886497 INFO : End of CA training
403 05:05:54.887014 INFO : End of initialization
404 05:05:54.892102 INFO : Training has run successfully!
405 05:05:54.892609 Check phy result
406 05:05:54.897683 INFO : End of initialization
407 05:05:54.898189 INFO : End of read enable training
408 05:05:54.903313 INFO : End of fine write leveling
409 05:05:54.909052 INFO : End of Write leveling coarse delay
410 05:05:54.909632 INFO : Training has run successfully!
411 05:05:54.910116 Check phy result
412 05:05:54.914504 INFO : End of initialization
413 05:05:54.915017 INFO : End of read dq deskew training
414 05:05:54.920074 INFO : End of MPR read delay center optimization
415 05:05:54.925695 INFO : End of write delay center optimization
416 05:05:54.931263 INFO : End of read delay center optimization
417 05:05:54.931805 INFO : End of max read latency training
418 05:05:54.936881 INFO : Training has run successfully!
419 05:05:54.937405 1D training succeed
420 05:05:54.946040 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 05:05:54.993741 Check phy result
422 05:05:54.994384 INFO : End of initialization
423 05:05:55.016360 INFO : End of 2D read delay Voltage center optimization
424 05:05:55.036600 INFO : End of 2D read delay Voltage center optimization
425 05:05:55.088642 INFO : End of 2D write delay Voltage center optimization
426 05:05:55.137962 INFO : End of 2D write delay Voltage center optimization
427 05:05:55.143457 INFO : Training has run successfully!
428 05:05:55.144021
429 05:05:55.144506 channel==0
430 05:05:55.149059 RxClkDly_Margin_A0==88 ps 9
431 05:05:55.149580 TxDqDly_Margin_A0==98 ps 10
432 05:05:55.152401 RxClkDly_Margin_A1==88 ps 9
433 05:05:55.152935 TxDqDly_Margin_A1==98 ps 10
434 05:05:55.158008 TrainedVREFDQ_A0==74
435 05:05:55.158572 TrainedVREFDQ_A1==74
436 05:05:55.159025 VrefDac_Margin_A0==25
437 05:05:55.163574 DeviceVref_Margin_A0==40
438 05:05:55.164097 VrefDac_Margin_A1==25
439 05:05:55.169178 DeviceVref_Margin_A1==40
440 05:05:55.169671
441 05:05:55.170123
442 05:05:55.170571 channel==1
443 05:05:55.171011 RxClkDly_Margin_A0==98 ps 10
444 05:05:55.174758 TxDqDly_Margin_A0==88 ps 9
445 05:05:55.175259 RxClkDly_Margin_A1==98 ps 10
446 05:05:55.180399 TxDqDly_Margin_A1==88 ps 9
447 05:05:55.180915 TrainedVREFDQ_A0==77
448 05:05:55.181366 TrainedVREFDQ_A1==77
449 05:05:55.185956 VrefDac_Margin_A0==22
450 05:05:55.186461 DeviceVref_Margin_A0==37
451 05:05:55.191571 VrefDac_Margin_A1==24
452 05:05:55.192170 DeviceVref_Margin_A1==37
453 05:05:55.192642
454 05:05:55.197202 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 05:05:55.197717
456 05:05:55.225190 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 05:05:55.230829 2D training succeed
458 05:05:55.236420 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 05:05:55.236965 auto size-- 65535DDR cs0 size: 2048MB
460 05:05:55.242254 DDR cs1 size: 2048MB
461 05:05:55.242817 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 05:05:55.247666 cs0 DataBus test pass
463 05:05:55.248215 cs1 DataBus test pass
464 05:05:55.248668 cs0 AddrBus test pass
465 05:05:55.253235 cs1 AddrBus test pass
466 05:05:55.253725
467 05:05:55.254178 100bdlr_step_size ps== 420
468 05:05:55.254633 result report
469 05:05:55.258830 boot times 0Enable ddr reg access
470 05:05:55.266486 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 05:05:55.279931 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 05:05:55.853718 0.0;M3 CHK:0;cm4_sp_mode 0
473 05:05:55.854421 MVN_1=0x00000000
474 05:05:55.859102 MVN_2=0x00000000
475 05:05:55.864860 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 05:05:55.865378 OPS=0x10
477 05:05:55.865841 ring efuse init
478 05:05:55.866291 chipver efuse init
479 05:05:55.870468 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 05:05:55.876067 [0.018961 Inits done]
481 05:05:55.876577 secure task start!
482 05:05:55.877034 high task start!
483 05:05:55.880627 low task start!
484 05:05:55.881171 run into bl31
485 05:05:55.887307 NOTICE: BL31: v1.3(release):4fc40b1
486 05:05:55.895119 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 05:05:55.895659 NOTICE: BL31: G12A normal boot!
488 05:05:55.920521 NOTICE: BL31: BL33 decompress pass
489 05:05:55.926111 ERROR: Error initializing runtime service opteed_fast
490 05:05:57.159055
491 05:05:57.159743
492 05:05:57.167416 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 05:05:57.167946
494 05:05:57.168502 Model: Libre Computer AML-A311D-CC Alta
495 05:05:57.375975 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 05:05:57.399259 DRAM: 2 GiB (effective 3.8 GiB)
497 05:05:57.542415 Core: 408 devices, 31 uclasses, devicetree: separate
498 05:05:57.548155 WDT: Not starting watchdog@f0d0
499 05:05:57.580361 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 05:05:57.592792 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 05:05:57.597758 ** Bad device specification mmc 0 **
502 05:05:57.608081 Card did not respond to voltage select! : -110
503 05:05:57.615745 ** Bad device specification mmc 0 **
504 05:05:57.616313 Couldn't find partition mmc 0
505 05:05:57.624096 Card did not respond to voltage select! : -110
506 05:05:57.629604 ** Bad device specification mmc 0 **
507 05:05:57.630121 Couldn't find partition mmc 0
508 05:05:57.634669 Error: could not access storage.
509 05:05:58.897224 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 05:05:58.897876 bl2_stage_init 0x01
511 05:05:58.898360 bl2_stage_init 0x81
512 05:05:58.902818 hw id: 0x0000 - pwm id 0x01
513 05:05:58.903373 bl2_stage_init 0xc1
514 05:05:58.903885 bl2_stage_init 0x02
515 05:05:58.904446
516 05:05:58.908447 L0:00000000
517 05:05:58.909185 L1:20000703
518 05:05:58.909801 L2:00008067
519 05:05:58.910459 L3:14000000
520 05:05:58.911509 B2:00402000
521 05:05:58.912190 B1:e0f83180
522 05:05:58.912867
523 05:05:58.913566 TE: 58124
524 05:05:58.914223
525 05:05:58.922529 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 05:05:58.923287
527 05:05:58.923937 Board ID = 1
528 05:05:58.924615 Set A53 clk to 24M
529 05:05:58.925283 Set A73 clk to 24M
530 05:05:58.928160 Set clk81 to 24M
531 05:05:58.928710 A53 clk: 1200 MHz
532 05:05:58.929198 A73 clk: 1200 MHz
533 05:05:58.933691 CLK81: 166.6M
534 05:05:58.934234 smccc: 00012a92
535 05:05:58.939277 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 05:05:58.939806 board id: 1
537 05:05:58.947869 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 05:05:58.958561 fw parse done
539 05:05:58.964500 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 05:05:59.007157 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 05:05:59.018158 PIEI prepare done
542 05:05:59.018949 fastboot data load
543 05:05:59.019604 fastboot data verify
544 05:05:59.023763 verify result: 266
545 05:05:59.029386 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 05:05:59.030064 LPDDR4 probe
547 05:05:59.030703 ddr clk to 1584MHz
548 05:05:59.037296 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 05:05:59.074572
550 05:05:59.075317 dmc_version 0001
551 05:05:59.081221 Check phy result
552 05:05:59.087085 INFO : End of CA training
553 05:05:59.087772 INFO : End of initialization
554 05:05:59.092667 INFO : Training has run successfully!
555 05:05:59.093308 Check phy result
556 05:05:59.098298 INFO : End of initialization
557 05:05:59.098898 INFO : End of read enable training
558 05:05:59.103940 INFO : End of fine write leveling
559 05:05:59.109483 INFO : End of Write leveling coarse delay
560 05:05:59.110148 INFO : Training has run successfully!
561 05:05:59.110745 Check phy result
562 05:05:59.115114 INFO : End of initialization
563 05:05:59.115784 INFO : End of read dq deskew training
564 05:05:59.120697 INFO : End of MPR read delay center optimization
565 05:05:59.126326 INFO : End of write delay center optimization
566 05:05:59.131922 INFO : End of read delay center optimization
567 05:05:59.132618 INFO : End of max read latency training
568 05:05:59.137471 INFO : Training has run successfully!
569 05:05:59.138149 1D training succeed
570 05:05:59.146725 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 05:05:59.194330 Check phy result
572 05:05:59.195065 INFO : End of initialization
573 05:05:59.216077 INFO : End of 2D read delay Voltage center optimization
574 05:05:59.236308 INFO : End of 2D read delay Voltage center optimization
575 05:05:59.287971 INFO : End of 2D write delay Voltage center optimization
576 05:05:59.337798 INFO : End of 2D write delay Voltage center optimization
577 05:05:59.343273 INFO : Training has run successfully!
578 05:05:59.344087
579 05:05:59.344719 channel==0
580 05:05:59.348904 RxClkDly_Margin_A0==88 ps 9
581 05:05:59.349647 TxDqDly_Margin_A0==98 ps 10
582 05:05:59.354597 RxClkDly_Margin_A1==88 ps 9
583 05:05:59.355307 TxDqDly_Margin_A1==98 ps 10
584 05:05:59.355912 TrainedVREFDQ_A0==74
585 05:05:59.360106 TrainedVREFDQ_A1==74
586 05:05:59.360798 VrefDac_Margin_A0==25
587 05:05:59.361404 DeviceVref_Margin_A0==40
588 05:05:59.365627 VrefDac_Margin_A1==23
589 05:05:59.366264 DeviceVref_Margin_A1==40
590 05:05:59.366907
591 05:05:59.367533
592 05:05:59.371248 channel==1
593 05:05:59.371895 RxClkDly_Margin_A0==98 ps 10
594 05:05:59.372601 TxDqDly_Margin_A0==98 ps 10
595 05:05:59.376814 RxClkDly_Margin_A1==98 ps 10
596 05:05:59.377466 TxDqDly_Margin_A1==88 ps 9
597 05:05:59.382458 TrainedVREFDQ_A0==77
598 05:05:59.383155 TrainedVREFDQ_A1==77
599 05:05:59.383754 VrefDac_Margin_A0==22
600 05:05:59.388088 DeviceVref_Margin_A0==37
601 05:05:59.388717 VrefDac_Margin_A1==22
602 05:05:59.393628 DeviceVref_Margin_A1==37
603 05:05:59.394206
604 05:05:59.394865 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 05:05:59.399246
606 05:05:59.427237 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 05:05:59.427899 2D training succeed
608 05:05:59.432799 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 05:05:59.438395 auto size-- 65535DDR cs0 size: 2048MB
610 05:05:59.438915 DDR cs1 size: 2048MB
611 05:05:59.444042 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 05:05:59.444554 cs0 DataBus test pass
613 05:05:59.449609 cs1 DataBus test pass
614 05:05:59.450123 cs0 AddrBus test pass
615 05:05:59.450583 cs1 AddrBus test pass
616 05:05:59.451031
617 05:05:59.455193 100bdlr_step_size ps== 420
618 05:05:59.455712 result report
619 05:05:59.460793 boot times 0Enable ddr reg access
620 05:05:59.466238 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 05:05:59.479734 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 05:06:00.052912 0.0;M3 CHK:0;cm4_sp_mode 0
623 05:06:00.053610 MVN_1=0x00000000
624 05:06:00.058503 MVN_2=0x00000000
625 05:06:00.064232 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 05:06:00.064743 OPS=0x10
627 05:06:00.065203 ring efuse init
628 05:06:00.065648 chipver efuse init
629 05:06:00.069702 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 05:06:00.075283 [0.018960 Inits done]
631 05:06:00.075784 secure task start!
632 05:06:00.076302 high task start!
633 05:06:00.079880 low task start!
634 05:06:00.080405 run into bl31
635 05:06:00.086518 NOTICE: BL31: v1.3(release):4fc40b1
636 05:06:00.094356 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 05:06:00.094864 NOTICE: BL31: G12A normal boot!
638 05:06:00.119772 NOTICE: BL31: BL33 decompress pass
639 05:06:00.125406 ERROR: Error initializing runtime service opteed_fast
640 05:06:01.358297
641 05:06:01.358983
642 05:06:01.366708 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 05:06:01.367270
644 05:06:01.367772 Model: Libre Computer AML-A311D-CC Alta
645 05:06:01.575205 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 05:06:01.597883 DRAM: 2 GiB (effective 3.8 GiB)
647 05:06:01.741588 Core: 408 devices, 31 uclasses, devicetree: separate
648 05:06:01.747336 WDT: Not starting watchdog@f0d0
649 05:06:01.779611 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 05:06:01.792063 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 05:06:01.797105 ** Bad device specification mmc 0 **
652 05:06:01.807317 Card did not respond to voltage select! : -110
653 05:06:01.815080 ** Bad device specification mmc 0 **
654 05:06:01.815890 Couldn't find partition mmc 0
655 05:06:01.823344 Card did not respond to voltage select! : -110
656 05:06:01.828905 ** Bad device specification mmc 0 **
657 05:06:01.829664 Couldn't find partition mmc 0
658 05:06:01.833986 Error: could not access storage.
659 05:06:02.176466 Net: eth0: ethernet@ff3f0000
660 05:06:02.176905 starting USB...
661 05:06:02.428275 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 05:06:02.428951 Starting the controller
663 05:06:02.435295 USB XHCI 1.10
664 05:06:04.147662 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 05:06:04.148480 bl2_stage_init 0x81
666 05:06:04.153272 hw id: 0x0000 - pwm id 0x01
667 05:06:04.153893 bl2_stage_init 0xc1
668 05:06:04.154366 bl2_stage_init 0x02
669 05:06:04.154827
670 05:06:04.158893 L0:00000000
671 05:06:04.159495 L1:20000703
672 05:06:04.159964 L2:00008067
673 05:06:04.160475 L3:14000000
674 05:06:04.160927 B2:00402000
675 05:06:04.164361 B1:e0f83180
676 05:06:04.164973
677 05:06:04.165450 TE: 58141
678 05:06:04.165947
679 05:06:04.170032 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 05:06:04.170636
681 05:06:04.171090 Board ID = 1
682 05:06:04.175617 Set A53 clk to 24M
683 05:06:04.176278 Set A73 clk to 24M
684 05:06:04.176728 Set clk81 to 24M
685 05:06:04.181229 A53 clk: 1200 MHz
686 05:06:04.181782 A73 clk: 1200 MHz
687 05:06:04.182232 CLK81: 166.6M
688 05:06:04.182674 smccc: 00012aa3
689 05:06:04.186757 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 05:06:04.192373 board id: 1
691 05:06:04.198166 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 05:06:04.208736 fw parse done
693 05:06:04.213789 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 05:06:04.259513 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 05:06:04.268290 PIEI prepare done
696 05:06:04.268814 fastboot data load
697 05:06:04.269278 fastboot data verify
698 05:06:04.273866 verify result: 266
699 05:06:04.280542 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 05:06:04.281065 LPDDR4 probe
701 05:06:04.281516 ddr clk to 1584MHz
702 05:06:04.287577 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 05:06:04.324739
704 05:06:04.325283 dmc_version 0001
705 05:06:04.331372 Check phy result
706 05:06:04.337228 INFO : End of CA training
707 05:06:04.337740 INFO : End of initialization
708 05:06:04.342773 INFO : Training has run successfully!
709 05:06:04.343068 Check phy result
710 05:06:04.348330 INFO : End of initialization
711 05:06:04.348620 INFO : End of read enable training
712 05:06:04.353317 INFO : End of fine write leveling
713 05:06:04.357016 INFO : End of Write leveling coarse delay
714 05:06:04.362796 INFO : Training has run successfully!
715 05:06:04.363076 Check phy result
716 05:06:04.363294 INFO : End of initialization
717 05:06:04.368198 INFO : End of read dq deskew training
718 05:06:04.373869 INFO : End of MPR read delay center optimization
719 05:06:04.374172 INFO : End of write delay center optimization
720 05:06:04.379427 INFO : End of read delay center optimization
721 05:06:04.385033 INFO : End of max read latency training
722 05:06:04.385356 INFO : Training has run successfully!
723 05:06:04.390653 1D training succeed
724 05:06:04.395909 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 05:06:04.444420 Check phy result
726 05:06:04.444828 INFO : End of initialization
727 05:06:04.466136 INFO : End of 2D read delay Voltage center optimization
728 05:06:04.486328 INFO : End of 2D read delay Voltage center optimization
729 05:06:04.538375 INFO : End of 2D write delay Voltage center optimization
730 05:06:04.587819 INFO : End of 2D write delay Voltage center optimization
731 05:06:04.593344 INFO : Training has run successfully!
732 05:06:04.593637
733 05:06:04.593852 channel==0
734 05:06:04.598882 RxClkDly_Margin_A0==88 ps 9
735 05:06:04.599173 TxDqDly_Margin_A0==98 ps 10
736 05:06:04.604535 RxClkDly_Margin_A1==88 ps 9
737 05:06:04.604823 TxDqDly_Margin_A1==88 ps 9
738 05:06:04.605035 TrainedVREFDQ_A0==74
739 05:06:04.610164 TrainedVREFDQ_A1==74
740 05:06:04.610445 VrefDac_Margin_A0==25
741 05:06:04.610657 DeviceVref_Margin_A0==40
742 05:06:04.615715 VrefDac_Margin_A1==25
743 05:06:04.616032 DeviceVref_Margin_A1==40
744 05:06:04.616250
745 05:06:04.616460
746 05:06:04.616668 channel==1
747 05:06:04.621303 RxClkDly_Margin_A0==98 ps 10
748 05:06:04.621609 TxDqDly_Margin_A0==88 ps 9
749 05:06:04.626873 RxClkDly_Margin_A1==98 ps 10
750 05:06:04.627164 TxDqDly_Margin_A1==88 ps 9
751 05:06:04.632526 TrainedVREFDQ_A0==77
752 05:06:04.632829 TrainedVREFDQ_A1==77
753 05:06:04.633062 VrefDac_Margin_A0==22
754 05:06:04.638204 DeviceVref_Margin_A0==37
755 05:06:04.638494 VrefDac_Margin_A1==22
756 05:06:04.643701 DeviceVref_Margin_A1==37
757 05:06:04.644267
758 05:06:04.644687 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 05:06:04.645099
760 05:06:04.677175 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
761 05:06:04.677710 2D training succeed
762 05:06:04.682769 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 05:06:04.688343 auto size-- 65535DDR cs0 size: 2048MB
764 05:06:04.688815 DDR cs1 size: 2048MB
765 05:06:04.693970 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 05:06:04.694434 cs0 DataBus test pass
767 05:06:04.699566 cs1 DataBus test pass
768 05:06:04.700070 cs0 AddrBus test pass
769 05:06:04.700497 cs1 AddrBus test pass
770 05:06:04.700898
771 05:06:04.705145 100bdlr_step_size ps== 420
772 05:06:04.705619 result report
773 05:06:04.710734 boot times 0Enable ddr reg access
774 05:06:04.716027 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 05:06:04.729571 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 05:06:05.303229 0.0;M3 CHK:0;cm4_sp_mode 0
777 05:06:05.303887 MVN_1=0x00000000
778 05:06:05.308602 MVN_2=0x00000000
779 05:06:05.314418 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 05:06:05.314751 OPS=0x10
781 05:06:05.314964 ring efuse init
782 05:06:05.315170 chipver efuse init
783 05:06:05.320001 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 05:06:05.325593 [0.018961 Inits done]
785 05:06:05.325904 secure task start!
786 05:06:05.326111 high task start!
787 05:06:05.330277 low task start!
788 05:06:05.330852 run into bl31
789 05:06:05.336831 NOTICE: BL31: v1.3(release):4fc40b1
790 05:06:05.344656 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 05:06:05.345216 NOTICE: BL31: G12A normal boot!
792 05:06:05.370043 NOTICE: BL31: BL33 decompress pass
793 05:06:05.375699 ERROR: Error initializing runtime service opteed_fast
794 05:06:06.608652
795 05:06:06.609327
796 05:06:06.617061 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 05:06:06.617829
798 05:06:06.618343 Model: Libre Computer AML-A311D-CC Alta
799 05:06:06.825472 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 05:06:06.848886 DRAM: 2 GiB (effective 3.8 GiB)
801 05:06:06.991873 Core: 408 devices, 31 uclasses, devicetree: separate
802 05:06:06.997799 WDT: Not starting watchdog@f0d0
803 05:06:07.030116 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 05:06:07.042460 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 05:06:07.047471 ** Bad device specification mmc 0 **
806 05:06:07.057812 Card did not respond to voltage select! : -110
807 05:06:07.065443 ** Bad device specification mmc 0 **
808 05:06:07.066006 Couldn't find partition mmc 0
809 05:06:07.073805 Card did not respond to voltage select! : -110
810 05:06:07.079461 ** Bad device specification mmc 0 **
811 05:06:07.080133 Couldn't find partition mmc 0
812 05:06:07.084496 Error: could not access storage.
813 05:06:07.426901 Net: eth0: ethernet@ff3f0000
814 05:06:07.427570 starting USB...
815 05:06:07.678766 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 05:06:07.679410 Starting the controller
817 05:06:07.685733 USB XHCI 1.10
818 05:06:09.847818 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 05:06:09.848500 bl2_stage_init 0x01
820 05:06:09.848975 bl2_stage_init 0x81
821 05:06:09.853303 hw id: 0x0000 - pwm id 0x01
822 05:06:09.853805 bl2_stage_init 0xc1
823 05:06:09.854236 bl2_stage_init 0x02
824 05:06:09.854654
825 05:06:09.858811 L0:00000000
826 05:06:09.859276 L1:20000703
827 05:06:09.859691 L2:00008067
828 05:06:09.860139 L3:14000000
829 05:06:09.861718 B2:00402000
830 05:06:09.862157 B1:e0f83180
831 05:06:09.862570
832 05:06:09.862982 TE: 58159
833 05:06:09.863389
834 05:06:09.872830 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 05:06:09.873298
836 05:06:09.873718 Board ID = 1
837 05:06:09.874126 Set A53 clk to 24M
838 05:06:09.874533 Set A73 clk to 24M
839 05:06:09.878596 Set clk81 to 24M
840 05:06:09.879054 A53 clk: 1200 MHz
841 05:06:09.879470 A73 clk: 1200 MHz
842 05:06:09.884173 CLK81: 166.6M
843 05:06:09.884637 smccc: 00012ab5
844 05:06:09.889675 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 05:06:09.890126 board id: 1
846 05:06:09.898342 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 05:06:09.909052 fw parse done
848 05:06:09.914225 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 05:06:09.957423 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 05:06:09.968439 PIEI prepare done
851 05:06:09.968968 fastboot data load
852 05:06:09.969438 fastboot data verify
853 05:06:09.973911 verify result: 266
854 05:06:09.979503 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 05:06:09.979887 LPDDR4 probe
856 05:06:09.980151 ddr clk to 1584MHz
857 05:06:09.987459 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 05:06:10.024784
859 05:06:10.025216 dmc_version 0001
860 05:06:10.030527 Check phy result
861 05:06:10.037411 INFO : End of CA training
862 05:06:10.038001 INFO : End of initialization
863 05:06:10.042849 INFO : Training has run successfully!
864 05:06:10.043221 Check phy result
865 05:06:10.048482 INFO : End of initialization
866 05:06:10.048957 INFO : End of read enable training
867 05:06:10.054036 INFO : End of fine write leveling
868 05:06:10.059614 INFO : End of Write leveling coarse delay
869 05:06:10.059897 INFO : Training has run successfully!
870 05:06:10.060131 Check phy result
871 05:06:10.065223 INFO : End of initialization
872 05:06:10.065640 INFO : End of read dq deskew training
873 05:06:10.070817 INFO : End of MPR read delay center optimization
874 05:06:10.076437 INFO : End of write delay center optimization
875 05:06:10.081996 INFO : End of read delay center optimization
876 05:06:10.082276 INFO : End of max read latency training
877 05:06:10.087593 INFO : Training has run successfully!
878 05:06:10.088006 1D training succeed
879 05:06:10.096793 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 05:06:10.144528 Check phy result
881 05:06:10.144909 INFO : End of initialization
882 05:06:10.167057 INFO : End of 2D read delay Voltage center optimization
883 05:06:10.187266 INFO : End of 2D read delay Voltage center optimization
884 05:06:10.239395 INFO : End of 2D write delay Voltage center optimization
885 05:06:10.288761 INFO : End of 2D write delay Voltage center optimization
886 05:06:10.294243 INFO : Training has run successfully!
887 05:06:10.294521
888 05:06:10.294737 channel==0
889 05:06:10.299825 RxClkDly_Margin_A0==88 ps 9
890 05:06:10.300144 TxDqDly_Margin_A0==98 ps 10
891 05:06:10.305383 RxClkDly_Margin_A1==88 ps 9
892 05:06:10.305655 TxDqDly_Margin_A1==98 ps 10
893 05:06:10.305870 TrainedVREFDQ_A0==74
894 05:06:10.311004 TrainedVREFDQ_A1==74
895 05:06:10.311283 VrefDac_Margin_A0==24
896 05:06:10.311489 DeviceVref_Margin_A0==40
897 05:06:10.316601 VrefDac_Margin_A1==25
898 05:06:10.316885 DeviceVref_Margin_A1==40
899 05:06:10.317096
900 05:06:10.317299
901 05:06:10.322213 channel==1
902 05:06:10.322475 RxClkDly_Margin_A0==98 ps 10
903 05:06:10.322681 TxDqDly_Margin_A0==98 ps 10
904 05:06:10.327772 RxClkDly_Margin_A1==98 ps 10
905 05:06:10.328048 TxDqDly_Margin_A1==88 ps 9
906 05:06:10.333417 TrainedVREFDQ_A0==77
907 05:06:10.333843 TrainedVREFDQ_A1==77
908 05:06:10.334066 VrefDac_Margin_A0==22
909 05:06:10.339049 DeviceVref_Margin_A0==37
910 05:06:10.339364 VrefDac_Margin_A1==24
911 05:06:10.344648 DeviceVref_Margin_A1==37
912 05:06:10.344949
913 05:06:10.345173 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 05:06:10.350216
915 05:06:10.378255 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
916 05:06:10.378737 2D training succeed
917 05:06:10.383818 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 05:06:10.389638 auto size-- 65535DDR cs0 size: 2048MB
919 05:06:10.390007 DDR cs1 size: 2048MB
920 05:06:10.395181 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 05:06:10.395586 cs0 DataBus test pass
922 05:06:10.400953 cs1 DataBus test pass
923 05:06:10.401337 cs0 AddrBus test pass
924 05:06:10.401595 cs1 AddrBus test pass
925 05:06:10.401842
926 05:06:10.406852 100bdlr_step_size ps== 420
927 05:06:10.407241 result report
928 05:06:10.411812 boot times 0Enable ddr reg access
929 05:06:10.417275 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 05:06:10.430752 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 05:06:11.004463 0.0;M3 CHK:0;cm4_sp_mode 0
932 05:06:11.004958 MVN_1=0x00000000
933 05:06:11.009959 MVN_2=0x00000000
934 05:06:11.015700 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 05:06:11.016272 OPS=0x10
936 05:06:11.016708 ring efuse init
937 05:06:11.017028 chipver efuse init
938 05:06:11.021274 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 05:06:11.026988 [0.018961 Inits done]
940 05:06:11.027579 secure task start!
941 05:06:11.027904 high task start!
942 05:06:11.030532 low task start!
943 05:06:11.031035 run into bl31
944 05:06:11.038273 NOTICE: BL31: v1.3(release):4fc40b1
945 05:06:11.045166 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 05:06:11.045550 NOTICE: BL31: G12A normal boot!
947 05:06:11.071434 NOTICE: BL31: BL33 decompress pass
948 05:06:11.076130 ERROR: Error initializing runtime service opteed_fast
949 05:06:12.310022
950 05:06:12.310544
951 05:06:12.318360 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 05:06:12.318944
953 05:06:12.319356 Model: Libre Computer AML-A311D-CC Alta
954 05:06:12.526705 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 05:06:12.550196 DRAM: 2 GiB (effective 3.8 GiB)
956 05:06:12.693177 Core: 408 devices, 31 uclasses, devicetree: separate
957 05:06:12.699010 WDT: Not starting watchdog@f0d0
958 05:06:12.731347 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 05:06:12.743910 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 05:06:12.748777 ** Bad device specification mmc 0 **
961 05:06:12.759124 Card did not respond to voltage select! : -110
962 05:06:12.766863 ** Bad device specification mmc 0 **
963 05:06:12.767455 Couldn't find partition mmc 0
964 05:06:12.775199 Card did not respond to voltage select! : -110
965 05:06:12.780689 ** Bad device specification mmc 0 **
966 05:06:12.781255 Couldn't find partition mmc 0
967 05:06:12.785751 Error: could not access storage.
968 05:06:13.129282 Net: eth0: ethernet@ff3f0000
969 05:06:13.129931 starting USB...
970 05:06:13.380959 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 05:06:13.381614 Starting the controller
972 05:06:13.387932 USB XHCI 1.10
973 05:06:14.945025 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 05:06:14.952726 scanning usb for storage devices... 0 Storage Device(s) found
976 05:06:15.005774 Hit any key to stop autoboot: 1
977 05:06:15.007135 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 05:06:15.007908 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 05:06:15.008554 Setting prompt string to ['=>']
980 05:06:15.009123 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 05:06:15.020494 0
982 05:06:15.021626 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 05:06:15.022267 Sending with 10 millisecond of delay
985 05:06:16.159660 => setenv autoload no
986 05:06:16.170562 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 05:06:16.176095 setenv autoload no
988 05:06:16.176906 Sending with 10 millisecond of delay
990 05:06:17.977502 => setenv initrd_high 0xffffffff
991 05:06:17.988066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 05:06:17.988617 setenv initrd_high 0xffffffff
993 05:06:17.989085 Sending with 10 millisecond of delay
995 05:06:19.605531 => setenv fdt_high 0xffffffff
996 05:06:19.616363 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 05:06:19.617248 setenv fdt_high 0xffffffff
998 05:06:19.618020 Sending with 10 millisecond of delay
1000 05:06:19.910014 => dhcp
1001 05:06:19.920831 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 05:06:19.921720 dhcp
1003 05:06:19.922228 Speed: 1000, full duplex
1004 05:06:19.922689 BOOTP broadcast 1
1005 05:06:19.929004 DHCP client bound to address 192.168.6.27 (9 ms)
1006 05:06:19.929761 Sending with 10 millisecond of delay
1008 05:06:21.607031 => setenv serverip 192.168.6.2
1009 05:06:21.617893 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 05:06:21.618871 setenv serverip 192.168.6.2
1011 05:06:21.619622 Sending with 10 millisecond of delay
1013 05:06:25.350601 => tftpboot 0x01080000 965250/tftp-deploy-w8vkq7kw/kernel/uImage
1014 05:06:25.361353 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 05:06:25.362107 tftpboot 0x01080000 965250/tftp-deploy-w8vkq7kw/kernel/uImage
1016 05:06:25.362484 Speed: 1000, full duplex
1017 05:06:25.362815 Using ethernet@ff3f0000 device
1018 05:06:25.363941 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 05:06:25.369545 Filename '965250/tftp-deploy-w8vkq7kw/kernel/uImage'.
1020 05:06:25.373423 Load address: 0x1080000
1021 05:06:28.302942 Loading: *################################################## 43.6 MiB
1022 05:06:28.303391 14.9 MiB/s
1023 05:06:28.303646 done
1024 05:06:28.307401 Bytes transferred = 45713984 (2b98a40 hex)
1025 05:06:28.308197 Sending with 10 millisecond of delay
1027 05:06:32.996772 => tftpboot 0x08000000 965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
1028 05:06:33.007676 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1029 05:06:33.008302 tftpboot 0x08000000 965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot
1030 05:06:33.008579 Speed: 1000, full duplex
1031 05:06:33.008819 Using ethernet@ff3f0000 device
1032 05:06:33.011570 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 05:06:33.022010 Filename '965250/tftp-deploy-w8vkq7kw/ramdisk/ramdisk.cpio.gz.uboot'.
1034 05:06:33.022474 Load address: 0x8000000
1035 05:06:39.878136 Loading: *###########T ###################################### UDP wrong checksum 00000005 0000eef8
1036 05:06:41.640439 UDP wrong checksum 000000ff 0000e878
1037 05:06:41.679147 UDP wrong checksum 000000ff 00007b6b
1038 05:06:44.879694 T UDP wrong checksum 00000005 0000eef8
1039 05:06:53.004178 T UDP wrong checksum 000000ff 0000b96f
1040 05:06:53.012712 UDP wrong checksum 000000ff 00004762
1041 05:06:54.190599 UDP wrong checksum 000000ff 0000402d
1042 05:06:54.230712 UDP wrong checksum 000000ff 0000ca1f
1043 05:06:54.881758 T UDP wrong checksum 00000005 0000eef8
1044 05:07:09.645435 T T UDP wrong checksum 000000ff 0000d822
1045 05:07:09.673018 UDP wrong checksum 000000ff 00006f15
1046 05:07:14.884935 T T UDP wrong checksum 00000005 0000eef8
1047 05:07:29.889783 T T
1048 05:07:29.890234 Retry count exceeded; starting again
1050 05:07:29.891402 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1053 05:07:29.892508 end: 2.4 uboot-commands (duration 00:01:47) [common]
1055 05:07:29.893258 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1057 05:07:29.893894 end: 2 uboot-action (duration 00:01:47) [common]
1059 05:07:29.894750 Cleaning after the job
1060 05:07:29.895090 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/ramdisk
1061 05:07:29.896022 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/kernel
1062 05:07:29.910189 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/dtb
1063 05:07:29.910986 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/nfsrootfs
1064 05:07:29.951934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965250/tftp-deploy-w8vkq7kw/modules
1065 05:07:29.961006 start: 4.1 power-off (timeout 00:00:30) [common]
1066 05:07:29.961656 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1067 05:07:29.996205 >> OK - accepted request
1068 05:07:29.997963 Returned 0 in 0 seconds
1069 05:07:30.098707 end: 4.1 power-off (duration 00:00:00) [common]
1071 05:07:30.099703 start: 4.2 read-feedback (timeout 00:10:00) [common]
1072 05:07:30.100384 Listened to connection for namespace 'common' for up to 1s
1073 05:07:31.100697 Finalising connection for namespace 'common'
1074 05:07:31.101395 Disconnecting from shell: Finalise
1075 05:07:31.101903 =>
1076 05:07:31.202966 end: 4.2 read-feedback (duration 00:00:01) [common]
1077 05:07:31.203667 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/965250
1078 05:07:34.155123 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/965250
1079 05:07:34.155740 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.