Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:18:23.887951 lava-dispatcher, installed at version: 2024.01
2 05:18:23.888762 start: 0 validate
3 05:18:23.889246 Start time: 2024-11-09 05:18:23.889216+00:00 (UTC)
4 05:18:23.889799 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:18:23.890355 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:18:23.930466 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:18:23.931010 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:18:23.965277 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:18:23.965877 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 05:18:23.997629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:18:23.998116 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:18:24.035887 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:18:24.036425 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:18:24.076664 validate duration: 0.19
16 05:18:24.077508 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:18:24.077836 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:18:24.078157 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:18:24.078735 Not decompressing ramdisk as can be used compressed.
20 05:18:24.079191 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 05:18:24.079483 saving as /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/ramdisk/initrd.cpio.gz
22 05:18:24.079750 total size: 5628169 (5 MB)
23 05:18:24.121575 progress 0 % (0 MB)
24 05:18:24.126216 progress 5 % (0 MB)
25 05:18:24.131070 progress 10 % (0 MB)
26 05:18:24.135173 progress 15 % (0 MB)
27 05:18:24.139660 progress 20 % (1 MB)
28 05:18:24.143678 progress 25 % (1 MB)
29 05:18:24.148136 progress 30 % (1 MB)
30 05:18:24.152478 progress 35 % (1 MB)
31 05:18:24.156318 progress 40 % (2 MB)
32 05:18:24.160526 progress 45 % (2 MB)
33 05:18:24.164475 progress 50 % (2 MB)
34 05:18:24.168710 progress 55 % (2 MB)
35 05:18:24.173064 progress 60 % (3 MB)
36 05:18:24.176960 progress 65 % (3 MB)
37 05:18:24.181190 progress 70 % (3 MB)
38 05:18:24.185106 progress 75 % (4 MB)
39 05:18:24.189330 progress 80 % (4 MB)
40 05:18:24.193092 progress 85 % (4 MB)
41 05:18:24.197207 progress 90 % (4 MB)
42 05:18:24.200987 progress 95 % (5 MB)
43 05:18:24.204429 progress 100 % (5 MB)
44 05:18:24.205117 5 MB downloaded in 0.13 s (42.82 MB/s)
45 05:18:24.205705 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:18:24.206672 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:18:24.207009 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:18:24.207320 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:18:24.207835 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kernel/Image
51 05:18:24.208143 saving as /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/kernel/Image
52 05:18:24.208381 total size: 45713920 (43 MB)
53 05:18:24.208617 No compression specified
54 05:18:24.248873 progress 0 % (0 MB)
55 05:18:24.277747 progress 5 % (2 MB)
56 05:18:24.307054 progress 10 % (4 MB)
57 05:18:24.335947 progress 15 % (6 MB)
58 05:18:24.364977 progress 20 % (8 MB)
59 05:18:24.393531 progress 25 % (10 MB)
60 05:18:24.422877 progress 30 % (13 MB)
61 05:18:24.452094 progress 35 % (15 MB)
62 05:18:24.481389 progress 40 % (17 MB)
63 05:18:24.509974 progress 45 % (19 MB)
64 05:18:24.538644 progress 50 % (21 MB)
65 05:18:24.567573 progress 55 % (24 MB)
66 05:18:24.596328 progress 60 % (26 MB)
67 05:18:24.624627 progress 65 % (28 MB)
68 05:18:24.653335 progress 70 % (30 MB)
69 05:18:24.682014 progress 75 % (32 MB)
70 05:18:24.710761 progress 80 % (34 MB)
71 05:18:24.739085 progress 85 % (37 MB)
72 05:18:24.767487 progress 90 % (39 MB)
73 05:18:24.795895 progress 95 % (41 MB)
74 05:18:24.823753 progress 100 % (43 MB)
75 05:18:24.824276 43 MB downloaded in 0.62 s (70.79 MB/s)
76 05:18:24.824747 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:18:24.825557 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:18:24.825831 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:18:24.826097 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:18:24.826556 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 05:18:24.826820 saving as /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/dtb/meson-g12b-a311d-libretech-cc.dtb
83 05:18:24.827025 total size: 54703 (0 MB)
84 05:18:24.827231 No compression specified
85 05:18:24.870843 progress 59 % (0 MB)
86 05:18:24.871692 progress 100 % (0 MB)
87 05:18:24.872276 0 MB downloaded in 0.05 s (1.15 MB/s)
88 05:18:24.872749 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:18:24.873557 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:18:24.873818 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:18:24.874080 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:18:24.874535 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 05:18:24.874770 saving as /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/nfsrootfs/full.rootfs.tar
95 05:18:24.874974 total size: 120894716 (115 MB)
96 05:18:24.875183 Using unxz to decompress xz
97 05:18:24.914578 progress 0 % (0 MB)
98 05:18:25.704166 progress 5 % (5 MB)
99 05:18:26.538481 progress 10 % (11 MB)
100 05:18:27.332168 progress 15 % (17 MB)
101 05:18:28.069084 progress 20 % (23 MB)
102 05:18:28.679468 progress 25 % (28 MB)
103 05:18:29.539886 progress 30 % (34 MB)
104 05:18:30.334383 progress 35 % (40 MB)
105 05:18:30.684918 progress 40 % (46 MB)
106 05:18:31.060858 progress 45 % (51 MB)
107 05:18:31.787564 progress 50 % (57 MB)
108 05:18:32.675072 progress 55 % (63 MB)
109 05:18:33.524616 progress 60 % (69 MB)
110 05:18:34.287890 progress 65 % (74 MB)
111 05:18:35.075356 progress 70 % (80 MB)
112 05:18:35.914775 progress 75 % (86 MB)
113 05:18:36.699522 progress 80 % (92 MB)
114 05:18:37.460054 progress 85 % (98 MB)
115 05:18:38.308434 progress 90 % (103 MB)
116 05:18:39.089244 progress 95 % (109 MB)
117 05:18:39.921865 progress 100 % (115 MB)
118 05:18:39.934380 115 MB downloaded in 15.06 s (7.66 MB/s)
119 05:18:39.935108 end: 1.4.1 http-download (duration 00:00:15) [common]
121 05:18:39.936959 end: 1.4 download-retry (duration 00:00:15) [common]
122 05:18:39.937543 start: 1.5 download-retry (timeout 00:09:44) [common]
123 05:18:39.938116 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 05:18:39.939174 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/modules.tar.xz
125 05:18:39.939728 saving as /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/modules/modules.tar
126 05:18:39.940229 total size: 11607448 (11 MB)
127 05:18:39.940698 Using unxz to decompress xz
128 05:18:39.982154 progress 0 % (0 MB)
129 05:18:40.049845 progress 5 % (0 MB)
130 05:18:40.125283 progress 10 % (1 MB)
131 05:18:40.224816 progress 15 % (1 MB)
132 05:18:40.316782 progress 20 % (2 MB)
133 05:18:40.399448 progress 25 % (2 MB)
134 05:18:40.476646 progress 30 % (3 MB)
135 05:18:40.551882 progress 35 % (3 MB)
136 05:18:40.632678 progress 40 % (4 MB)
137 05:18:40.709738 progress 45 % (5 MB)
138 05:18:40.794711 progress 50 % (5 MB)
139 05:18:40.872557 progress 55 % (6 MB)
140 05:18:40.959203 progress 60 % (6 MB)
141 05:18:41.040930 progress 65 % (7 MB)
142 05:18:41.118700 progress 70 % (7 MB)
143 05:18:41.202079 progress 75 % (8 MB)
144 05:18:41.289923 progress 80 % (8 MB)
145 05:18:41.372563 progress 85 % (9 MB)
146 05:18:41.452633 progress 90 % (9 MB)
147 05:18:41.536893 progress 95 % (10 MB)
148 05:18:41.615877 progress 100 % (11 MB)
149 05:18:41.627553 11 MB downloaded in 1.69 s (6.56 MB/s)
150 05:18:41.628243 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:18:41.629109 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:18:41.629388 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 05:18:41.629659 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 05:18:58.769244 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/965284/extract-nfsrootfs-c62uj5_s
156 05:18:58.769854 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 05:18:58.770145 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 05:18:58.770827 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng
159 05:18:58.771284 makedir: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin
160 05:18:58.771621 makedir: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/tests
161 05:18:58.771942 makedir: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/results
162 05:18:58.772308 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-add-keys
163 05:18:58.772852 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-add-sources
164 05:18:58.773380 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-background-process-start
165 05:18:58.773890 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-background-process-stop
166 05:18:58.774496 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-common-functions
167 05:18:58.775082 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-echo-ipv4
168 05:18:58.775703 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-install-packages
169 05:18:58.776246 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-installed-packages
170 05:18:58.776745 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-os-build
171 05:18:58.777248 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-probe-channel
172 05:18:58.777750 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-probe-ip
173 05:18:58.778252 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-target-ip
174 05:18:58.778745 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-target-mac
175 05:18:58.779288 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-target-storage
176 05:18:58.779808 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-case
177 05:18:58.780350 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-event
178 05:18:58.780880 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-feedback
179 05:18:58.781383 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-raise
180 05:18:58.781869 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-reference
181 05:18:58.782350 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-runner
182 05:18:58.782901 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-set
183 05:18:58.783444 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-test-shell
184 05:18:58.783973 Updating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-add-keys (debian)
185 05:18:58.784581 Updating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-add-sources (debian)
186 05:18:58.785230 Updating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-install-packages (debian)
187 05:18:58.785800 Updating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-installed-packages (debian)
188 05:18:58.786327 Updating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/bin/lava-os-build (debian)
189 05:18:58.786786 Creating /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/environment
190 05:18:58.787185 LAVA metadata
191 05:18:58.787455 - LAVA_JOB_ID=965284
192 05:18:58.787669 - LAVA_DISPATCHER_IP=192.168.6.2
193 05:18:58.788083 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 05:18:58.789247 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 05:18:58.789590 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 05:18:58.789798 skipped lava-vland-overlay
197 05:18:58.790039 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 05:18:58.790295 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 05:18:58.790516 skipped lava-multinode-overlay
200 05:18:58.790758 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 05:18:58.791010 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 05:18:58.791262 Loading test definitions
203 05:18:58.791542 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 05:18:58.791764 Using /lava-965284 at stage 0
205 05:18:58.792934 uuid=965284_1.6.2.4.1 testdef=None
206 05:18:58.793268 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 05:18:58.793533 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 05:18:58.795235 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 05:18:58.796066 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 05:18:58.798100 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 05:18:58.798943 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 05:18:58.800905 runner path: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/0/tests/0_timesync-off test_uuid 965284_1.6.2.4.1
215 05:18:58.801547 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 05:18:58.802387 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 05:18:58.802613 Using /lava-965284 at stage 0
219 05:18:58.802982 Fetching tests from https://github.com/kernelci/test-definitions.git
220 05:18:58.803283 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/0/tests/1_kselftest-rtc'
221 05:19:02.277024 Running '/usr/bin/git checkout kernelci.org
222 05:19:02.529697 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 05:19:02.531187 uuid=965284_1.6.2.4.5 testdef=None
224 05:19:02.531548 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 05:19:02.532344 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 05:19:02.535272 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 05:19:02.536152 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 05:19:02.540057 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 05:19:02.540965 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 05:19:02.544709 runner path: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/0/tests/1_kselftest-rtc test_uuid 965284_1.6.2.4.5
234 05:19:02.545033 BOARD='meson-g12b-a311d-libretech-cc'
235 05:19:02.545241 BRANCH='broonie-sound'
236 05:19:02.545441 SKIPFILE='/dev/null'
237 05:19:02.545639 SKIP_INSTALL='True'
238 05:19:02.545835 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 05:19:02.546034 TST_CASENAME=''
240 05:19:02.546229 TST_CMDFILES='rtc'
241 05:19:02.546866 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 05:19:02.547685 Creating lava-test-runner.conf files
244 05:19:02.547895 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/965284/lava-overlay-otg8s4ng/lava-965284/0 for stage 0
245 05:19:02.548395 - 0_timesync-off
246 05:19:02.548679 - 1_kselftest-rtc
247 05:19:02.549038 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 05:19:02.549336 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 05:19:25.769765 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 05:19:25.770257 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 05:19:25.770537 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 05:19:25.770825 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 05:19:25.771108 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 05:19:26.388931 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 05:19:26.389417 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 05:19:26.389689 extracting modules file /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965284/extract-nfsrootfs-c62uj5_s
257 05:19:27.790106 extracting modules file /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk
258 05:19:29.235054 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 05:19:29.235530 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 05:19:29.235827 [common] Applying overlay to NFS
261 05:19:29.236086 [common] Applying overlay /var/lib/lava/dispatcher/tmp/965284/compress-overlay-q4jpxnlv/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/965284/extract-nfsrootfs-c62uj5_s
262 05:19:31.990106 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 05:19:31.990578 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 05:19:31.990885 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 05:19:31.991150 Converting downloaded kernel to a uImage
266 05:19:31.991479 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/kernel/Image /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/kernel/uImage
267 05:19:32.443626 output: Image Name:
268 05:19:32.444079 output: Created: Sat Nov 9 05:19:31 2024
269 05:19:32.444303 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 05:19:32.444511 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 05:19:32.444712 output: Load Address: 01080000
272 05:19:32.444913 output: Entry Point: 01080000
273 05:19:32.445111 output:
274 05:19:32.445444 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 05:19:32.445716 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 05:19:32.445988 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 05:19:32.446242 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 05:19:32.446500 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 05:19:32.446757 Building ramdisk /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk
280 05:19:34.707495 >> 166792 blocks
281 05:19:42.411306 Adding RAMdisk u-boot header.
282 05:19:42.411955 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk.cpio.gz.uboot
283 05:19:42.658036 output: Image Name:
284 05:19:42.658438 output: Created: Sat Nov 9 05:19:42 2024
285 05:19:42.658652 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 05:19:42.658858 output: Data Size: 23434161 Bytes = 22884.92 KiB = 22.35 MiB
287 05:19:42.659060 output: Load Address: 00000000
288 05:19:42.659260 output: Entry Point: 00000000
289 05:19:42.659460 output:
290 05:19:42.660244 rename /var/lib/lava/dispatcher/tmp/965284/extract-overlay-ramdisk-k6oy1twj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
291 05:19:42.660971 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 05:19:42.661514 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 05:19:42.662034 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 05:19:42.662485 No LXC device requested
295 05:19:42.662984 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 05:19:42.663489 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 05:19:42.664002 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 05:19:42.664423 Checking files for TFTP limit of 4294967296 bytes.
299 05:19:42.667072 end: 1 tftp-deploy (duration 00:01:19) [common]
300 05:19:42.667649 start: 2 uboot-action (timeout 00:05:00) [common]
301 05:19:42.668219 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 05:19:42.668723 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 05:19:42.669222 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 05:19:42.669749 Using kernel file from prepare-kernel: 965284/tftp-deploy-r1pigjom/kernel/uImage
305 05:19:42.670371 substitutions:
306 05:19:42.670778 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 05:19:42.671179 - {DTB_ADDR}: 0x01070000
308 05:19:42.671579 - {DTB}: 965284/tftp-deploy-r1pigjom/dtb/meson-g12b-a311d-libretech-cc.dtb
309 05:19:42.672006 - {INITRD}: 965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
310 05:19:42.672414 - {KERNEL_ADDR}: 0x01080000
311 05:19:42.672808 - {KERNEL}: 965284/tftp-deploy-r1pigjom/kernel/uImage
312 05:19:42.673202 - {LAVA_MAC}: None
313 05:19:42.673632 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/965284/extract-nfsrootfs-c62uj5_s
314 05:19:42.674028 - {NFS_SERVER_IP}: 192.168.6.2
315 05:19:42.674417 - {PRESEED_CONFIG}: None
316 05:19:42.674804 - {PRESEED_LOCAL}: None
317 05:19:42.675193 - {RAMDISK_ADDR}: 0x08000000
318 05:19:42.675578 - {RAMDISK}: 965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
319 05:19:42.675968 - {ROOT_PART}: None
320 05:19:42.676388 - {ROOT}: None
321 05:19:42.676775 - {SERVER_IP}: 192.168.6.2
322 05:19:42.677158 - {TEE_ADDR}: 0x83000000
323 05:19:42.677545 - {TEE}: None
324 05:19:42.677928 Parsed boot commands:
325 05:19:42.678302 - setenv autoload no
326 05:19:42.678687 - setenv initrd_high 0xffffffff
327 05:19:42.679067 - setenv fdt_high 0xffffffff
328 05:19:42.679447 - dhcp
329 05:19:42.679827 - setenv serverip 192.168.6.2
330 05:19:42.680239 - tftpboot 0x01080000 965284/tftp-deploy-r1pigjom/kernel/uImage
331 05:19:42.680629 - tftpboot 0x08000000 965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
332 05:19:42.681014 - tftpboot 0x01070000 965284/tftp-deploy-r1pigjom/dtb/meson-g12b-a311d-libretech-cc.dtb
333 05:19:42.681400 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/965284/extract-nfsrootfs-c62uj5_s,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 05:19:42.681799 - bootm 0x01080000 0x08000000 0x01070000
335 05:19:42.682288 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 05:19:42.683746 start: 2.3 connect-device (timeout 00:05:00) [common]
338 05:19:42.684191 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 05:19:42.699404 Setting prompt string to ['lava-test: # ']
340 05:19:42.700949 end: 2.3 connect-device (duration 00:00:00) [common]
341 05:19:42.701549 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 05:19:42.702102 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 05:19:42.702613 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 05:19:42.703777 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 05:19:42.740482 >> OK - accepted request
346 05:19:42.742289 Returned 0 in 0 seconds
347 05:19:42.843339 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 05:19:42.844958 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 05:19:42.845508 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 05:19:42.846010 Setting prompt string to ['Hit any key to stop autoboot']
352 05:19:42.846451 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 05:19:42.848028 Trying 192.168.56.21...
354 05:19:42.848500 Connected to conserv1.
355 05:19:42.848913 Escape character is '^]'.
356 05:19:42.849326
357 05:19:42.849728 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 05:19:42.850144
359 05:19:53.942545 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 05:19:53.943148 bl2_stage_init 0x01
361 05:19:53.943560 bl2_stage_init 0x81
362 05:19:53.947894 hw id: 0x0000 - pwm id 0x01
363 05:19:53.948371 bl2_stage_init 0xc1
364 05:19:53.948777 bl2_stage_init 0x02
365 05:19:53.949183
366 05:19:53.953443 L0:00000000
367 05:19:53.953881 L1:20000703
368 05:19:53.954287 L2:00008067
369 05:19:53.954685 L3:14000000
370 05:19:53.956513 B2:00402000
371 05:19:53.956939 B1:e0f83180
372 05:19:53.957340
373 05:19:53.957727 TE: 58124
374 05:19:53.958114
375 05:19:53.967661 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 05:19:53.968108
377 05:19:53.968501 Board ID = 1
378 05:19:53.968884 Set A53 clk to 24M
379 05:19:53.969262 Set A73 clk to 24M
380 05:19:53.973487 Set clk81 to 24M
381 05:19:53.973900 A53 clk: 1200 MHz
382 05:19:53.974286 A73 clk: 1200 MHz
383 05:19:53.978977 CLK81: 166.6M
384 05:19:53.979387 smccc: 00012a91
385 05:19:53.984438 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 05:19:53.984847 board id: 1
387 05:19:53.992798 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 05:19:54.003513 fw parse done
389 05:19:54.009442 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 05:19:54.052098 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 05:19:54.062992 PIEI prepare done
392 05:19:54.063403 fastboot data load
393 05:19:54.063795 fastboot data verify
394 05:19:54.068666 verify result: 266
395 05:19:54.074313 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 05:19:54.074772 LPDDR4 probe
397 05:19:54.075184 ddr clk to 1584MHz
398 05:19:54.082211 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 05:19:54.119442
400 05:19:54.119879 dmc_version 0001
401 05:19:54.126151 Check phy result
402 05:19:54.132157 INFO : End of CA training
403 05:19:54.132624 INFO : End of initialization
404 05:19:54.137563 INFO : Training has run successfully!
405 05:19:54.137994 Check phy result
406 05:19:54.143530 INFO : End of initialization
407 05:19:54.144035 INFO : End of read enable training
408 05:19:54.146559 INFO : End of fine write leveling
409 05:19:54.152198 INFO : End of Write leveling coarse delay
410 05:19:54.157744 INFO : Training has run successfully!
411 05:19:54.158205 Check phy result
412 05:19:54.158621 INFO : End of initialization
413 05:19:54.163372 INFO : End of read dq deskew training
414 05:19:54.169024 INFO : End of MPR read delay center optimization
415 05:19:54.169457 INFO : End of write delay center optimization
416 05:19:54.174481 INFO : End of read delay center optimization
417 05:19:54.180130 INFO : End of max read latency training
418 05:19:54.180567 INFO : Training has run successfully!
419 05:19:54.185667 1D training succeed
420 05:19:54.191576 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 05:19:54.239101 Check phy result
422 05:19:54.239545 INFO : End of initialization
423 05:19:54.261743 INFO : End of 2D read delay Voltage center optimization
424 05:19:54.282001 INFO : End of 2D read delay Voltage center optimization
425 05:19:54.333994 INFO : End of 2D write delay Voltage center optimization
426 05:19:54.383382 INFO : End of 2D write delay Voltage center optimization
427 05:19:54.388932 INFO : Training has run successfully!
428 05:19:54.389374
429 05:19:54.389785 channel==0
430 05:19:54.394529 RxClkDly_Margin_A0==88 ps 9
431 05:19:54.394954 TxDqDly_Margin_A0==98 ps 10
432 05:19:54.397922 RxClkDly_Margin_A1==88 ps 9
433 05:19:54.398348 TxDqDly_Margin_A1==98 ps 10
434 05:19:54.403494 TrainedVREFDQ_A0==74
435 05:19:54.403929 TrainedVREFDQ_A1==74
436 05:19:54.409150 VrefDac_Margin_A0==25
437 05:19:54.409581 DeviceVref_Margin_A0==40
438 05:19:54.409983 VrefDac_Margin_A1==25
439 05:19:54.414795 DeviceVref_Margin_A1==40
440 05:19:54.415236
441 05:19:54.415642
442 05:19:54.416068 channel==1
443 05:19:54.416467 RxClkDly_Margin_A0==98 ps 10
444 05:19:54.418281 TxDqDly_Margin_A0==98 ps 10
445 05:19:54.423729 RxClkDly_Margin_A1==88 ps 9
446 05:19:54.424198 TxDqDly_Margin_A1==88 ps 9
447 05:19:54.424610 TrainedVREFDQ_A0==77
448 05:19:54.429166 TrainedVREFDQ_A1==77
449 05:19:54.429589 VrefDac_Margin_A0==22
450 05:19:54.434898 DeviceVref_Margin_A0==37
451 05:19:54.435319 VrefDac_Margin_A1==24
452 05:19:54.435720 DeviceVref_Margin_A1==37
453 05:19:54.436145
454 05:19:54.443953 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 05:19:54.444405
456 05:19:54.469658 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 05:19:54.475314 2D training succeed
458 05:19:54.480801 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 05:19:54.486366 auto size-- 65535DDR cs0 size: 2048MB
460 05:19:54.486822 DDR cs1 size: 2048MB
461 05:19:54.487233 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 05:19:54.492044 cs0 DataBus test pass
463 05:19:54.492470 cs1 DataBus test pass
464 05:19:54.497647 cs0 AddrBus test pass
465 05:19:54.498083 cs1 AddrBus test pass
466 05:19:54.498488
467 05:19:54.498891 100bdlr_step_size ps== 420
468 05:19:54.503329 result report
469 05:19:54.503763 boot times 0Enable ddr reg access
470 05:19:54.508795 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 05:19:54.525204 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 05:19:55.099108 0.0;M3 CHK:0;cm4_sp_mode 0
473 05:19:55.099704 MVN_1=0x00000000
474 05:19:55.104539 MVN_2=0x00000000
475 05:19:55.110362 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 05:19:55.110796 OPS=0x10
477 05:19:55.111208 ring efuse init
478 05:19:55.111604 chipver efuse init
479 05:19:55.115873 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 05:19:55.121470 [0.018961 Inits done]
481 05:19:55.121904 secure task start!
482 05:19:55.122309 high task start!
483 05:19:55.126051 low task start!
484 05:19:55.126480 run into bl31
485 05:19:55.132708 NOTICE: BL31: v1.3(release):4fc40b1
486 05:19:55.140532 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 05:19:55.140970 NOTICE: BL31: G12A normal boot!
488 05:19:55.165869 NOTICE: BL31: BL33 decompress pass
489 05:19:55.171588 ERROR: Error initializing runtime service opteed_fast
490 05:19:56.404549
491 05:19:56.405169
492 05:19:56.412892 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 05:19:56.413367
494 05:19:56.413789 Model: Libre Computer AML-A311D-CC Alta
495 05:19:56.621441 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 05:19:56.644709 DRAM: 2 GiB (effective 3.8 GiB)
497 05:19:56.787678 Core: 408 devices, 31 uclasses, devicetree: separate
498 05:19:56.793633 WDT: Not starting watchdog@f0d0
499 05:19:56.825789 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 05:19:56.838278 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 05:19:56.843223 ** Bad device specification mmc 0 **
502 05:19:56.853694 Card did not respond to voltage select! : -110
503 05:19:56.861303 ** Bad device specification mmc 0 **
504 05:19:56.861773 Couldn't find partition mmc 0
505 05:19:56.872347 Card did not respond to voltage select! : -110
506 05:19:56.875462 ** Bad device specification mmc 0 **
507 05:19:56.876125 Couldn't find partition mmc 0
508 05:19:56.880168 Error: could not access storage.
509 05:19:58.142700 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 05:19:58.143397 bl2_stage_init 0x01
511 05:19:58.143891 bl2_stage_init 0x81
512 05:19:58.148217 hw id: 0x0000 - pwm id 0x01
513 05:19:58.148748 bl2_stage_init 0xc1
514 05:19:58.149217 bl2_stage_init 0x02
515 05:19:58.149672
516 05:19:58.153813 L0:00000000
517 05:19:58.154321 L1:20000703
518 05:19:58.154779 L2:00008067
519 05:19:58.155229 L3:14000000
520 05:19:58.159403 B2:00402000
521 05:19:58.159921 B1:e0f83180
522 05:19:58.160418
523 05:19:58.160870 TE: 58124
524 05:19:58.161322
525 05:19:58.165042 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 05:19:58.165554
527 05:19:58.166013 Board ID = 1
528 05:19:58.170793 Set A53 clk to 24M
529 05:19:58.171311 Set A73 clk to 24M
530 05:19:58.171775 Set clk81 to 24M
531 05:19:58.176209 A53 clk: 1200 MHz
532 05:19:58.176716 A73 clk: 1200 MHz
533 05:19:58.177170 CLK81: 166.6M
534 05:19:58.177616 smccc: 00012a92
535 05:19:58.181783 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 05:19:58.187390 board id: 1
537 05:19:58.193283 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 05:19:58.203921 fw parse done
539 05:19:58.209865 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 05:19:58.252623 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 05:19:58.263405 PIEI prepare done
542 05:19:58.263905 fastboot data load
543 05:19:58.264407 fastboot data verify
544 05:19:58.269099 verify result: 266
545 05:19:58.274704 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 05:19:58.275205 LPDDR4 probe
547 05:19:58.275655 ddr clk to 1584MHz
548 05:19:58.282686 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 05:19:58.319945
550 05:19:58.320467 dmc_version 0001
551 05:19:58.326614 Check phy result
552 05:19:58.332493 INFO : End of CA training
553 05:19:58.332975 INFO : End of initialization
554 05:19:58.338120 INFO : Training has run successfully!
555 05:19:58.338597 Check phy result
556 05:19:58.343663 INFO : End of initialization
557 05:19:58.344170 INFO : End of read enable training
558 05:19:58.349258 INFO : End of fine write leveling
559 05:19:58.354892 INFO : End of Write leveling coarse delay
560 05:19:58.355362 INFO : Training has run successfully!
561 05:19:58.355807 Check phy result
562 05:19:58.360494 INFO : End of initialization
563 05:19:58.360985 INFO : End of read dq deskew training
564 05:19:58.366059 INFO : End of MPR read delay center optimization
565 05:19:58.371662 INFO : End of write delay center optimization
566 05:19:58.377309 INFO : End of read delay center optimization
567 05:19:58.377787 INFO : End of max read latency training
568 05:19:58.382865 INFO : Training has run successfully!
569 05:19:58.383345 1D training succeed
570 05:19:58.392100 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 05:19:58.439763 Check phy result
572 05:19:58.440375 INFO : End of initialization
573 05:19:58.461399 INFO : End of 2D read delay Voltage center optimization
574 05:19:58.481755 INFO : End of 2D read delay Voltage center optimization
575 05:19:58.533893 INFO : End of 2D write delay Voltage center optimization
576 05:19:58.583141 INFO : End of 2D write delay Voltage center optimization
577 05:19:58.588654 INFO : Training has run successfully!
578 05:19:58.589145
579 05:19:58.589607 channel==0
580 05:19:58.594196 RxClkDly_Margin_A0==88 ps 9
581 05:19:58.594696 TxDqDly_Margin_A0==98 ps 10
582 05:19:58.599870 RxClkDly_Margin_A1==88 ps 9
583 05:19:58.600398 TxDqDly_Margin_A1==88 ps 9
584 05:19:58.600856 TrainedVREFDQ_A0==74
585 05:19:58.605418 TrainedVREFDQ_A1==74
586 05:19:58.605901 VrefDac_Margin_A0==25
587 05:19:58.606348 DeviceVref_Margin_A0==40
588 05:19:58.611081 VrefDac_Margin_A1==25
589 05:19:58.611556 DeviceVref_Margin_A1==40
590 05:19:58.612031
591 05:19:58.612485
592 05:19:58.612928 channel==1
593 05:19:58.616667 RxClkDly_Margin_A0==98 ps 10
594 05:19:58.617144 TxDqDly_Margin_A0==98 ps 10
595 05:19:58.622186 RxClkDly_Margin_A1==98 ps 10
596 05:19:58.622660 TxDqDly_Margin_A1==88 ps 9
597 05:19:58.627916 TrainedVREFDQ_A0==77
598 05:19:58.628475 TrainedVREFDQ_A1==77
599 05:19:58.628933 VrefDac_Margin_A0==22
600 05:19:58.633407 DeviceVref_Margin_A0==37
601 05:19:58.633900 VrefDac_Margin_A1==24
602 05:19:58.639059 DeviceVref_Margin_A1==37
603 05:19:58.639539
604 05:19:58.640010 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 05:19:58.640466
606 05:19:58.672684 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
607 05:19:58.673230 2D training succeed
608 05:19:58.678201 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 05:19:58.683906 auto size-- 65535DDR cs0 size: 2048MB
610 05:19:58.684438 DDR cs1 size: 2048MB
611 05:19:58.689447 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 05:19:58.689930 cs0 DataBus test pass
613 05:19:58.694965 cs1 DataBus test pass
614 05:19:58.695464 cs0 AddrBus test pass
615 05:19:58.695915 cs1 AddrBus test pass
616 05:19:58.696392
617 05:19:58.700685 100bdlr_step_size ps== 420
618 05:19:58.701178 result report
619 05:19:58.706223 boot times 0Enable ddr reg access
620 05:19:58.711577 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 05:19:58.725060 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 05:19:59.298683 0.0;M3 CHK:0;cm4_sp_mode 0
623 05:19:59.299334 MVN_1=0x00000000
624 05:19:59.303802 MVN_2=0x00000000
625 05:19:59.309503 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 05:19:59.310030 OPS=0x10
627 05:19:59.310498 ring efuse init
628 05:19:59.310961 chipver efuse init
629 05:19:59.315272 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 05:19:59.320790 [0.018961 Inits done]
631 05:19:59.321268 secure task start!
632 05:19:59.321701 high task start!
633 05:19:59.325143 low task start!
634 05:19:59.325606 run into bl31
635 05:19:59.331782 NOTICE: BL31: v1.3(release):4fc40b1
636 05:19:59.339617 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 05:19:59.340128 NOTICE: BL31: G12A normal boot!
638 05:19:59.365063 NOTICE: BL31: BL33 decompress pass
639 05:19:59.370717 ERROR: Error initializing runtime service opteed_fast
640 05:20:00.603628
641 05:20:00.604324
642 05:20:00.612033 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 05:20:00.612575
644 05:20:00.613049 Model: Libre Computer AML-A311D-CC Alta
645 05:20:00.820465 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 05:20:00.843862 DRAM: 2 GiB (effective 3.8 GiB)
647 05:20:00.986749 Core: 408 devices, 31 uclasses, devicetree: separate
648 05:20:00.992691 WDT: Not starting watchdog@f0d0
649 05:20:01.024983 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 05:20:01.037450 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 05:20:01.042498 ** Bad device specification mmc 0 **
652 05:20:01.052740 Card did not respond to voltage select! : -110
653 05:20:01.060508 ** Bad device specification mmc 0 **
654 05:20:01.061004 Couldn't find partition mmc 0
655 05:20:01.068733 Card did not respond to voltage select! : -110
656 05:20:01.074367 ** Bad device specification mmc 0 **
657 05:20:01.074858 Couldn't find partition mmc 0
658 05:20:01.079477 Error: could not access storage.
659 05:20:01.421865 Net: eth0: ethernet@ff3f0000
660 05:20:01.422409 starting USB...
661 05:20:01.673755 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 05:20:01.674361 Starting the controller
663 05:20:01.680574 USB XHCI 1.10
664 05:20:03.392843 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 05:20:03.393517 bl2_stage_init 0x01
666 05:20:03.393993 bl2_stage_init 0x81
667 05:20:03.398347 hw id: 0x0000 - pwm id 0x01
668 05:20:03.398843 bl2_stage_init 0xc1
669 05:20:03.399300 bl2_stage_init 0x02
670 05:20:03.399749
671 05:20:03.403971 L0:00000000
672 05:20:03.404493 L1:20000703
673 05:20:03.404943 L2:00008067
674 05:20:03.405381 L3:14000000
675 05:20:03.406863 B2:00402000
676 05:20:03.407342 B1:e0f83180
677 05:20:03.407790
678 05:20:03.408281 TE: 58167
679 05:20:03.408730
680 05:20:03.418075 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 05:20:03.418592
682 05:20:03.419045 Board ID = 1
683 05:20:03.419488 Set A53 clk to 24M
684 05:20:03.419924 Set A73 clk to 24M
685 05:20:03.423659 Set clk81 to 24M
686 05:20:03.424171 A53 clk: 1200 MHz
687 05:20:03.424623 A73 clk: 1200 MHz
688 05:20:03.429263 CLK81: 166.6M
689 05:20:03.429742 smccc: 00012abe
690 05:20:03.434844 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 05:20:03.435326 board id: 1
692 05:20:03.443428 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 05:20:03.454110 fw parse done
694 05:20:03.461204 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 05:20:03.502717 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 05:20:03.513627 PIEI prepare done
697 05:20:03.514188 fastboot data load
698 05:20:03.514652 fastboot data verify
699 05:20:03.519259 verify result: 266
700 05:20:03.524854 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 05:20:03.525349 LPDDR4 probe
702 05:20:03.525804 ddr clk to 1584MHz
703 05:20:03.531798 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 05:20:03.569204
705 05:20:03.569755 dmc_version 0001
706 05:20:03.575868 Check phy result
707 05:20:03.582595 INFO : End of CA training
708 05:20:03.583103 INFO : End of initialization
709 05:20:03.588227 INFO : Training has run successfully!
710 05:20:03.588705 Check phy result
711 05:20:03.593833 INFO : End of initialization
712 05:20:03.594309 INFO : End of read enable training
713 05:20:03.597111 INFO : End of fine write leveling
714 05:20:03.602557 INFO : End of Write leveling coarse delay
715 05:20:03.608267 INFO : Training has run successfully!
716 05:20:03.608740 Check phy result
717 05:20:03.609187 INFO : End of initialization
718 05:20:03.613853 INFO : End of read dq deskew training
719 05:20:03.617307 INFO : End of MPR read delay center optimization
720 05:20:03.622879 INFO : End of write delay center optimization
721 05:20:03.628521 INFO : End of read delay center optimization
722 05:20:03.628996 INFO : End of max read latency training
723 05:20:03.634078 INFO : Training has run successfully!
724 05:20:03.634567 1D training succeed
725 05:20:03.641272 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 05:20:03.688980 Check phy result
727 05:20:03.689493 INFO : End of initialization
728 05:20:03.710726 INFO : End of 2D read delay Voltage center optimization
729 05:20:03.730872 INFO : End of 2D read delay Voltage center optimization
730 05:20:03.782879 INFO : End of 2D write delay Voltage center optimization
731 05:20:03.833239 INFO : End of 2D write delay Voltage center optimization
732 05:20:03.838795 INFO : Training has run successfully!
733 05:20:03.839271
734 05:20:03.839724 channel==0
735 05:20:03.844450 RxClkDly_Margin_A0==88 ps 9
736 05:20:03.844925 TxDqDly_Margin_A0==98 ps 10
737 05:20:03.847717 RxClkDly_Margin_A1==88 ps 9
738 05:20:03.848224 TxDqDly_Margin_A1==98 ps 10
739 05:20:03.853344 TrainedVREFDQ_A0==74
740 05:20:03.853814 TrainedVREFDQ_A1==74
741 05:20:03.858932 VrefDac_Margin_A0==25
742 05:20:03.859400 DeviceVref_Margin_A0==40
743 05:20:03.859840 VrefDac_Margin_A1==26
744 05:20:03.864478 DeviceVref_Margin_A1==40
745 05:20:03.864949
746 05:20:03.865394
747 05:20:03.865834 channel==1
748 05:20:03.866268 RxClkDly_Margin_A0==98 ps 10
749 05:20:03.867848 TxDqDly_Margin_A0==98 ps 10
750 05:20:03.873420 RxClkDly_Margin_A1==88 ps 9
751 05:20:03.873897 TxDqDly_Margin_A1==88 ps 9
752 05:20:03.874343 TrainedVREFDQ_A0==77
753 05:20:03.878982 TrainedVREFDQ_A1==77
754 05:20:03.879457 VrefDac_Margin_A0==22
755 05:20:03.884707 DeviceVref_Margin_A0==37
756 05:20:03.885175 VrefDac_Margin_A1==24
757 05:20:03.885619 DeviceVref_Margin_A1==37
758 05:20:03.886052
759 05:20:03.893556 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 05:20:03.894035
761 05:20:03.919241 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 05:20:03.924860 2D training succeed
763 05:20:03.928241 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 05:20:03.933757 auto size-- 65535DDR cs0 size: 2048MB
765 05:20:03.934227 DDR cs1 size: 2048MB
766 05:20:03.939338 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 05:20:03.939808 cs0 DataBus test pass
768 05:20:03.944961 cs1 DataBus test pass
769 05:20:03.945428 cs0 AddrBus test pass
770 05:20:03.945868 cs1 AddrBus test pass
771 05:20:03.946304
772 05:20:03.948219 100bdlr_step_size ps== 420
773 05:20:03.953760 result report
774 05:20:03.954228 boot times 0Enable ddr reg access
775 05:20:03.960831 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 05:20:03.974353 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 05:20:04.548896 0.0;M3 CHK:0;cm4_sp_mode 0
778 05:20:04.549537 MVN_1=0x00000000
779 05:20:04.554422 MVN_2=0x00000000
780 05:20:04.560133 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 05:20:04.560692 OPS=0x10
782 05:20:04.561132 ring efuse init
783 05:20:04.561557 chipver efuse init
784 05:20:04.565674 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 05:20:04.571410 [0.018961 Inits done]
786 05:20:04.571884 secure task start!
787 05:20:04.572355 high task start!
788 05:20:04.575824 low task start!
789 05:20:04.576315 run into bl31
790 05:20:04.582410 NOTICE: BL31: v1.3(release):4fc40b1
791 05:20:04.590226 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 05:20:04.590690 NOTICE: BL31: G12A normal boot!
793 05:20:04.616251 NOTICE: BL31: BL33 decompress pass
794 05:20:04.621902 ERROR: Error initializing runtime service opteed_fast
795 05:20:05.854847
796 05:20:05.855471
797 05:20:05.863154 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 05:20:05.863638
799 05:20:05.864130 Model: Libre Computer AML-A311D-CC Alta
800 05:20:06.071642 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 05:20:06.095047 DRAM: 2 GiB (effective 3.8 GiB)
802 05:20:06.238008 Core: 408 devices, 31 uclasses, devicetree: separate
803 05:20:06.243862 WDT: Not starting watchdog@f0d0
804 05:20:06.276143 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 05:20:06.288591 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 05:20:06.293527 ** Bad device specification mmc 0 **
807 05:20:06.303947 Card did not respond to voltage select! : -110
808 05:20:06.311547 ** Bad device specification mmc 0 **
809 05:20:06.312094 Couldn't find partition mmc 0
810 05:20:06.319943 Card did not respond to voltage select! : -110
811 05:20:06.325381 ** Bad device specification mmc 0 **
812 05:20:06.325907 Couldn't find partition mmc 0
813 05:20:06.330455 Error: could not access storage.
814 05:20:06.674120 Net: eth0: ethernet@ff3f0000
815 05:20:06.674753 starting USB...
816 05:20:06.925761 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 05:20:06.926358 Starting the controller
818 05:20:06.931828 USB XHCI 1.10
819 05:20:09.093123 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 05:20:09.093759 bl2_stage_init 0x01
821 05:20:09.094229 bl2_stage_init 0x81
822 05:20:09.098683 hw id: 0x0000 - pwm id 0x01
823 05:20:09.099171 bl2_stage_init 0xc1
824 05:20:09.099626 bl2_stage_init 0x02
825 05:20:09.100128
826 05:20:09.104321 L0:00000000
827 05:20:09.104795 L1:20000703
828 05:20:09.105245 L2:00008067
829 05:20:09.105688 L3:14000000
830 05:20:09.107070 B2:00402000
831 05:20:09.107545 B1:e0f83180
832 05:20:09.108020
833 05:20:09.108470 TE: 58159
834 05:20:09.108917
835 05:20:09.118336 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 05:20:09.118824
837 05:20:09.119274 Board ID = 1
838 05:20:09.119713 Set A53 clk to 24M
839 05:20:09.120188 Set A73 clk to 24M
840 05:20:09.123807 Set clk81 to 24M
841 05:20:09.124306 A53 clk: 1200 MHz
842 05:20:09.124751 A73 clk: 1200 MHz
843 05:20:09.127290 CLK81: 166.6M
844 05:20:09.127752 smccc: 00012ab5
845 05:20:09.132752 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 05:20:09.138361 board id: 1
847 05:20:09.142858 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 05:20:09.154426 fw parse done
849 05:20:09.159441 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 05:20:09.202140 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 05:20:09.213959 PIEI prepare done
852 05:20:09.214428 fastboot data load
853 05:20:09.214875 fastboot data verify
854 05:20:09.219588 verify result: 266
855 05:20:09.225226 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 05:20:09.225703 LPDDR4 probe
857 05:20:09.226149 ddr clk to 1584MHz
858 05:20:09.232237 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 05:20:09.269487
860 05:20:09.269961 dmc_version 0001
861 05:20:09.276100 Check phy result
862 05:20:09.282945 INFO : End of CA training
863 05:20:09.283411 INFO : End of initialization
864 05:20:09.288486 INFO : Training has run successfully!
865 05:20:09.288958 Check phy result
866 05:20:09.294190 INFO : End of initialization
867 05:20:09.294661 INFO : End of read enable training
868 05:20:09.299721 INFO : End of fine write leveling
869 05:20:09.305416 INFO : End of Write leveling coarse delay
870 05:20:09.305884 INFO : Training has run successfully!
871 05:20:09.306333 Check phy result
872 05:20:09.310880 INFO : End of initialization
873 05:20:09.311348 INFO : End of read dq deskew training
874 05:20:09.316494 INFO : End of MPR read delay center optimization
875 05:20:09.322149 INFO : End of write delay center optimization
876 05:20:09.327716 INFO : End of read delay center optimization
877 05:20:09.328232 INFO : End of max read latency training
878 05:20:09.333443 INFO : Training has run successfully!
879 05:20:09.333911 1D training succeed
880 05:20:09.341480 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 05:20:09.389232 Check phy result
882 05:20:09.389708 INFO : End of initialization
883 05:20:09.410778 INFO : End of 2D read delay Voltage center optimization
884 05:20:09.430907 INFO : End of 2D read delay Voltage center optimization
885 05:20:09.482789 INFO : End of 2D write delay Voltage center optimization
886 05:20:09.533050 INFO : End of 2D write delay Voltage center optimization
887 05:20:09.538572 INFO : Training has run successfully!
888 05:20:09.539063
889 05:20:09.539512 channel==0
890 05:20:09.544205 RxClkDly_Margin_A0==88 ps 9
891 05:20:09.544694 TxDqDly_Margin_A0==98 ps 10
892 05:20:09.547574 RxClkDly_Margin_A1==88 ps 9
893 05:20:09.548100 TxDqDly_Margin_A1==98 ps 10
894 05:20:09.553122 TrainedVREFDQ_A0==74
895 05:20:09.553600 TrainedVREFDQ_A1==74
896 05:20:09.554066 VrefDac_Margin_A0==25
897 05:20:09.558716 DeviceVref_Margin_A0==40
898 05:20:09.559234 VrefDac_Margin_A1==25
899 05:20:09.564376 DeviceVref_Margin_A1==40
900 05:20:09.564895
901 05:20:09.565330
902 05:20:09.565757 channel==1
903 05:20:09.566181 RxClkDly_Margin_A0==98 ps 10
904 05:20:09.567689 TxDqDly_Margin_A0==98 ps 10
905 05:20:09.573244 RxClkDly_Margin_A1==98 ps 10
906 05:20:09.573705 TxDqDly_Margin_A1==88 ps 9
907 05:20:09.574135 TrainedVREFDQ_A0==77
908 05:20:09.578777 TrainedVREFDQ_A1==77
909 05:20:09.579236 VrefDac_Margin_A0==22
910 05:20:09.584516 DeviceVref_Margin_A0==37
911 05:20:09.584969 VrefDac_Margin_A1==22
912 05:20:09.585389 DeviceVref_Margin_A1==37
913 05:20:09.585809
914 05:20:09.590023 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 05:20:09.590487
916 05:20:09.623544 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 05:20:09.624098 2D training succeed
918 05:20:09.629263 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 05:20:09.634824 auto size-- 65535DDR cs0 size: 2048MB
920 05:20:09.635281 DDR cs1 size: 2048MB
921 05:20:09.640510 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 05:20:09.640976 cs0 DataBus test pass
923 05:20:09.641403 cs1 DataBus test pass
924 05:20:09.645970 cs0 AddrBus test pass
925 05:20:09.646426 cs1 AddrBus test pass
926 05:20:09.646851
927 05:20:09.651580 100bdlr_step_size ps== 420
928 05:20:09.652128 result report
929 05:20:09.652567 boot times 0Enable ddr reg access
930 05:20:09.660555 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 05:20:09.674132 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 05:20:10.246994 0.0;M3 CHK:0;cm4_sp_mode 0
933 05:20:10.247636 MVN_1=0x00000000
934 05:20:10.252420 MVN_2=0x00000000
935 05:20:10.258220 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 05:20:10.258704 OPS=0x10
937 05:20:10.259155 ring efuse init
938 05:20:10.259595 chipver efuse init
939 05:20:10.266440 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 05:20:10.266935 [0.018961 Inits done]
941 05:20:10.273999 secure task start!
942 05:20:10.274471 high task start!
943 05:20:10.274918 low task start!
944 05:20:10.275358 run into bl31
945 05:20:10.280559 NOTICE: BL31: v1.3(release):4fc40b1
946 05:20:10.288484 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 05:20:10.288965 NOTICE: BL31: G12A normal boot!
948 05:20:10.313753 NOTICE: BL31: BL33 decompress pass
949 05:20:10.319533 ERROR: Error initializing runtime service opteed_fast
950 05:20:11.552363
951 05:20:11.553015
952 05:20:11.560695 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 05:20:11.561191
954 05:20:11.561646 Model: Libre Computer AML-A311D-CC Alta
955 05:20:11.769103 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 05:20:11.792457 DRAM: 2 GiB (effective 3.8 GiB)
957 05:20:11.935536 Core: 408 devices, 31 uclasses, devicetree: separate
958 05:20:11.940332 WDT: Not starting watchdog@f0d0
959 05:20:11.973718 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 05:20:11.986019 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 05:20:11.990976 ** Bad device specification mmc 0 **
962 05:20:12.001310 Card did not respond to voltage select! : -110
963 05:20:12.008975 ** Bad device specification mmc 0 **
964 05:20:12.009449 Couldn't find partition mmc 0
965 05:20:12.017329 Card did not respond to voltage select! : -110
966 05:20:12.022958 ** Bad device specification mmc 0 **
967 05:20:12.023440 Couldn't find partition mmc 0
968 05:20:12.028037 Error: could not access storage.
969 05:20:12.370504 Net: eth0: ethernet@ff3f0000
970 05:20:12.371034 starting USB...
971 05:20:12.622318 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 05:20:12.622952 Starting the controller
973 05:20:12.629273 USB XHCI 1.10
974 05:20:14.493142 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 05:20:14.493769 bl2_stage_init 0x01
976 05:20:14.494238 bl2_stage_init 0x81
977 05:20:14.498562 hw id: 0x0000 - pwm id 0x01
978 05:20:14.499080 bl2_stage_init 0xc1
979 05:20:14.499536 bl2_stage_init 0x02
980 05:20:14.500019
981 05:20:14.504141 L0:00000000
982 05:20:14.504624 L1:20000703
983 05:20:14.505073 L2:00008067
984 05:20:14.505511 L3:14000000
985 05:20:14.509643 B2:00402000
986 05:20:14.510125 B1:e0f83180
987 05:20:14.510573
988 05:20:14.511018 TE: 58159
989 05:20:14.511460
990 05:20:14.515245 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 05:20:14.515748
992 05:20:14.516239 Board ID = 1
993 05:20:14.520848 Set A53 clk to 24M
994 05:20:14.521330 Set A73 clk to 24M
995 05:20:14.521772 Set clk81 to 24M
996 05:20:14.526467 A53 clk: 1200 MHz
997 05:20:14.526946 A73 clk: 1200 MHz
998 05:20:14.527389 CLK81: 166.6M
999 05:20:14.527830 smccc: 00012ab5
1000 05:20:14.532168 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 05:20:14.537620 board id: 1
1002 05:20:14.543599 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 05:20:14.554129 fw parse done
1004 05:20:14.559301 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 05:20:14.602713 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 05:20:14.613559 PIEI prepare done
1007 05:20:14.614021 fastboot data load
1008 05:20:14.614455 fastboot data verify
1009 05:20:14.619315 verify result: 266
1010 05:20:14.624979 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 05:20:14.625451 LPDDR4 probe
1012 05:20:14.625883 ddr clk to 1584MHz
1013 05:20:14.631930 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 05:20:14.670212
1015 05:20:14.670673 dmc_version 0001
1016 05:20:14.676796 Check phy result
1017 05:20:14.682685 INFO : End of CA training
1018 05:20:14.683139 INFO : End of initialization
1019 05:20:14.688240 INFO : Training has run successfully!
1020 05:20:14.688697 Check phy result
1021 05:20:14.693900 INFO : End of initialization
1022 05:20:14.694411 INFO : End of read enable training
1023 05:20:14.697172 INFO : End of fine write leveling
1024 05:20:14.702964 INFO : End of Write leveling coarse delay
1025 05:20:14.708498 INFO : Training has run successfully!
1026 05:20:14.708967 Check phy result
1027 05:20:14.709413 INFO : End of initialization
1028 05:20:14.714040 INFO : End of read dq deskew training
1029 05:20:14.717402 INFO : End of MPR read delay center optimization
1030 05:20:14.722925 INFO : End of write delay center optimization
1031 05:20:14.728517 INFO : End of read delay center optimization
1032 05:20:14.728980 INFO : End of max read latency training
1033 05:20:14.734163 INFO : Training has run successfully!
1034 05:20:14.734637 1D training succeed
1035 05:20:14.742224 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 05:20:14.789930 Check phy result
1037 05:20:14.790434 INFO : End of initialization
1038 05:20:14.811568 INFO : End of 2D read delay Voltage center optimization
1039 05:20:14.831825 INFO : End of 2D read delay Voltage center optimization
1040 05:20:14.883954 INFO : End of 2D write delay Voltage center optimization
1041 05:20:14.933466 INFO : End of 2D write delay Voltage center optimization
1042 05:20:14.938814 INFO : Training has run successfully!
1043 05:20:14.939288
1044 05:20:14.939736 channel==0
1045 05:20:14.944417 RxClkDly_Margin_A0==88 ps 9
1046 05:20:14.944884 TxDqDly_Margin_A0==98 ps 10
1047 05:20:14.949930 RxClkDly_Margin_A1==88 ps 9
1048 05:20:14.950399 TxDqDly_Margin_A1==98 ps 10
1049 05:20:14.950845 TrainedVREFDQ_A0==74
1050 05:20:14.955600 TrainedVREFDQ_A1==74
1051 05:20:14.956098 VrefDac_Margin_A0==25
1052 05:20:14.956542 DeviceVref_Margin_A0==40
1053 05:20:14.961187 VrefDac_Margin_A1==25
1054 05:20:14.961653 DeviceVref_Margin_A1==40
1055 05:20:14.962091
1056 05:20:14.962528
1057 05:20:14.966791 channel==1
1058 05:20:14.967256 RxClkDly_Margin_A0==98 ps 10
1059 05:20:14.967695 TxDqDly_Margin_A0==98 ps 10
1060 05:20:14.972397 RxClkDly_Margin_A1==88 ps 9
1061 05:20:14.972867 TxDqDly_Margin_A1==88 ps 9
1062 05:20:14.977908 TrainedVREFDQ_A0==77
1063 05:20:14.978377 TrainedVREFDQ_A1==77
1064 05:20:14.978819 VrefDac_Margin_A0==22
1065 05:20:14.983508 DeviceVref_Margin_A0==37
1066 05:20:14.983974 VrefDac_Margin_A1==24
1067 05:20:14.989168 DeviceVref_Margin_A1==37
1068 05:20:14.989631
1069 05:20:14.990072 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 05:20:14.990513
1071 05:20:15.022745 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
1072 05:20:15.023280 2D training succeed
1073 05:20:15.028326 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 05:20:15.033977 auto size-- 65535DDR cs0 size: 2048MB
1075 05:20:15.034446 DDR cs1 size: 2048MB
1076 05:20:15.040027 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 05:20:15.040504 cs0 DataBus test pass
1078 05:20:15.045145 cs1 DataBus test pass
1079 05:20:15.045616 cs0 AddrBus test pass
1080 05:20:15.046057 cs1 AddrBus test pass
1081 05:20:15.046499
1082 05:20:15.050742 100bdlr_step_size ps== 420
1083 05:20:15.051225 result report
1084 05:20:15.056328 boot times 0Enable ddr reg access
1085 05:20:15.061708 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 05:20:15.074271 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 05:20:15.648938 0.0;M3 CHK:0;cm4_sp_mode 0
1088 05:20:15.649597 MVN_1=0x00000000
1089 05:20:15.654305 MVN_2=0x00000000
1090 05:20:15.660170 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 05:20:15.660652 OPS=0x10
1092 05:20:15.661105 ring efuse init
1093 05:20:15.661550 chipver efuse init
1094 05:20:15.665673 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 05:20:15.671329 [0.018960 Inits done]
1096 05:20:15.671800 secure task start!
1097 05:20:15.672298 high task start!
1098 05:20:15.675853 low task start!
1099 05:20:15.676359 run into bl31
1100 05:20:15.682521 NOTICE: BL31: v1.3(release):4fc40b1
1101 05:20:15.690325 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 05:20:15.690803 NOTICE: BL31: G12A normal boot!
1103 05:20:15.715679 NOTICE: BL31: BL33 decompress pass
1104 05:20:15.721387 ERROR: Error initializing runtime service opteed_fast
1105 05:20:16.954309
1106 05:20:16.954945
1107 05:20:16.962649 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 05:20:16.963140
1109 05:20:16.963599 Model: Libre Computer AML-A311D-CC Alta
1110 05:20:17.171058 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 05:20:17.194444 DRAM: 2 GiB (effective 3.8 GiB)
1112 05:20:17.337488 Core: 408 devices, 31 uclasses, devicetree: separate
1113 05:20:17.343336 WDT: Not starting watchdog@f0d0
1114 05:20:17.375646 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 05:20:17.388080 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 05:20:17.393126 ** Bad device specification mmc 0 **
1117 05:20:17.403447 Card did not respond to voltage select! : -110
1118 05:20:17.411162 ** Bad device specification mmc 0 **
1119 05:20:17.411698 Couldn't find partition mmc 0
1120 05:20:17.419578 Card did not respond to voltage select! : -110
1121 05:20:17.425057 ** Bad device specification mmc 0 **
1122 05:20:17.425563 Couldn't find partition mmc 0
1123 05:20:17.430125 Error: could not access storage.
1124 05:20:17.772581 Net: eth0: ethernet@ff3f0000
1125 05:20:17.773155 starting USB...
1126 05:20:18.024361 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 05:20:18.024934 Starting the controller
1128 05:20:18.030455 USB XHCI 1.10
1129 05:20:19.585331 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 05:20:19.592759 scanning usb for storage devices... 0 Storage Device(s) found
1132 05:20:19.644414 Hit any key to stop autoboot: 1
1133 05:20:19.645323 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1134 05:20:19.646138 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1135 05:20:19.646736 Setting prompt string to ['=>']
1136 05:20:19.647351 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1137 05:20:19.651073 0
1138 05:20:19.651959 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 05:20:19.652485 Sending with 10 millisecond of delay
1141 05:20:20.787177 => setenv autoload no
1142 05:20:20.797944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1143 05:20:20.802892 setenv autoload no
1144 05:20:20.803628 Sending with 10 millisecond of delay
1146 05:20:22.600694 => setenv initrd_high 0xffffffff
1147 05:20:22.611446 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1148 05:20:22.612330 setenv initrd_high 0xffffffff
1149 05:20:22.613037 Sending with 10 millisecond of delay
1151 05:20:24.230391 => setenv fdt_high 0xffffffff
1152 05:20:24.241155 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 05:20:24.242021 setenv fdt_high 0xffffffff
1154 05:20:24.242729 Sending with 10 millisecond of delay
1156 05:20:24.534850 => dhcp
1157 05:20:24.545686 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1158 05:20:24.546563 dhcp
1159 05:20:24.547035 Speed: 1000, full duplex
1160 05:20:24.547481 BOOTP broadcast 1
1161 05:20:24.554065 DHCP client bound to address 192.168.6.27 (9 ms)
1162 05:20:24.554854 Sending with 10 millisecond of delay
1164 05:20:26.232625 => setenv serverip 192.168.6.2
1165 05:20:26.243462 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1166 05:20:26.244236 setenv serverip 192.168.6.2
1167 05:20:26.245006 Sending with 10 millisecond of delay
1169 05:20:29.972167 => tftpboot 0x01080000 965284/tftp-deploy-r1pigjom/kernel/uImage
1170 05:20:29.983079 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:13)
1171 05:20:29.984152 tftpboot 0x01080000 965284/tftp-deploy-r1pigjom/kernel/uImage
1172 05:20:29.984634 Speed: 1000, full duplex
1173 05:20:29.985069 Using ethernet@ff3f0000 device
1174 05:20:29.986119 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 05:20:29.991599 Filename '965284/tftp-deploy-r1pigjom/kernel/uImage'.
1176 05:20:29.995577 Load address: 0x1080000
1177 05:20:33.082324 Loading: *################################################## 43.6 MiB
1178 05:20:33.082782 14.1 MiB/s
1179 05:20:33.083007 done
1180 05:20:33.086926 Bytes transferred = 45713984 (2b98a40 hex)
1181 05:20:33.087476 Sending with 10 millisecond of delay
1183 05:20:37.778076 => tftpboot 0x08000000 965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
1184 05:20:37.788870 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1185 05:20:37.789805 tftpboot 0x08000000 965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot
1186 05:20:37.790277 Speed: 1000, full duplex
1187 05:20:37.790689 Using ethernet@ff3f0000 device
1188 05:20:37.791788 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 05:20:37.803503 Filename '965284/tftp-deploy-r1pigjom/ramdisk/ramdisk.cpio.gz.uboot'.
1190 05:20:37.804119 Load address: 0x8000000
1191 05:20:44.629920 Loading: *######T ########################################### UDP wrong checksum 00000005 00005b7a
1192 05:20:49.631236 T UDP wrong checksum 00000005 00005b7a
1193 05:20:59.634423 T T UDP wrong checksum 00000005 00005b7a
1194 05:21:06.430443 T UDP wrong checksum 000000ff 00008567
1195 05:21:06.471480 UDP wrong checksum 000000ff 0000115a
1196 05:21:19.638416 T T T UDP wrong checksum 00000005 00005b7a
1197 05:21:34.642589 T T
1198 05:21:34.643266 Retry count exceeded; starting again
1200 05:21:34.644928 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1203 05:21:34.647008 end: 2.4 uboot-commands (duration 00:01:52) [common]
1205 05:21:34.648630 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1207 05:21:34.649754 end: 2 uboot-action (duration 00:01:52) [common]
1209 05:21:34.651400 Cleaning after the job
1210 05:21:34.652031 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/ramdisk
1211 05:21:34.653310 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/kernel
1212 05:21:34.685829 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/dtb
1213 05:21:34.687153 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/nfsrootfs
1214 05:21:34.799086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965284/tftp-deploy-r1pigjom/modules
1215 05:21:34.820565 start: 4.1 power-off (timeout 00:00:30) [common]
1216 05:21:34.821258 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1217 05:21:34.856716 >> OK - accepted request
1218 05:21:34.858827 Returned 0 in 0 seconds
1219 05:21:34.959531 end: 4.1 power-off (duration 00:00:00) [common]
1221 05:21:34.960480 start: 4.2 read-feedback (timeout 00:10:00) [common]
1222 05:21:34.961114 Listened to connection for namespace 'common' for up to 1s
1223 05:21:35.962066 Finalising connection for namespace 'common'
1224 05:21:35.962541 Disconnecting from shell: Finalise
1225 05:21:35.962828 =>
1226 05:21:36.063462 end: 4.2 read-feedback (duration 00:00:01) [common]
1227 05:21:36.063813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/965284
1228 05:21:39.555320 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/965284
1229 05:21:39.555938 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.