Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:11:03.415025 lava-dispatcher, installed at version: 2024.01
2 05:11:03.416021 start: 0 validate
3 05:11:03.416641 Start time: 2024-11-09 05:11:03.416603+00:00 (UTC)
4 05:11:03.417313 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:11:03.417971 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:11:03.465416 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:11:03.466054 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:11:03.496802 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:11:03.497441 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 05:11:03.531629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:11:03.532165 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:11:03.563178 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:11:03.563679 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-256-gebd9c70be2b2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:11:03.601610 validate duration: 0.19
16 05:11:03.602484 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:11:03.602813 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:11:03.603132 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:11:03.603711 Not decompressing ramdisk as can be used compressed.
20 05:11:03.604202 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 05:11:03.604496 saving as /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/ramdisk/initrd.cpio.gz
22 05:11:03.604776 total size: 5628140 (5 MB)
23 05:11:03.644727 progress 0 % (0 MB)
24 05:11:03.649002 progress 5 % (0 MB)
25 05:11:03.653339 progress 10 % (0 MB)
26 05:11:03.657257 progress 15 % (0 MB)
27 05:11:03.662148 progress 20 % (1 MB)
28 05:11:03.665914 progress 25 % (1 MB)
29 05:11:03.670075 progress 30 % (1 MB)
30 05:11:03.674367 progress 35 % (1 MB)
31 05:11:03.678201 progress 40 % (2 MB)
32 05:11:03.682268 progress 45 % (2 MB)
33 05:11:03.686082 progress 50 % (2 MB)
34 05:11:03.690373 progress 55 % (2 MB)
35 05:11:03.694606 progress 60 % (3 MB)
36 05:11:03.698439 progress 65 % (3 MB)
37 05:11:03.702482 progress 70 % (3 MB)
38 05:11:03.706214 progress 75 % (4 MB)
39 05:11:03.710284 progress 80 % (4 MB)
40 05:11:03.713949 progress 85 % (4 MB)
41 05:11:03.717955 progress 90 % (4 MB)
42 05:11:03.721917 progress 95 % (5 MB)
43 05:11:03.725333 progress 100 % (5 MB)
44 05:11:03.725995 5 MB downloaded in 0.12 s (44.28 MB/s)
45 05:11:03.726545 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:11:03.727457 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:11:03.727758 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:11:03.728047 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:11:03.728531 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/kernel/Image
51 05:11:03.728777 saving as /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/kernel/Image
52 05:11:03.728984 total size: 45713920 (43 MB)
53 05:11:03.729192 No compression specified
54 05:11:03.768998 progress 0 % (0 MB)
55 05:11:03.796941 progress 5 % (2 MB)
56 05:11:03.825878 progress 10 % (4 MB)
57 05:11:03.854389 progress 15 % (6 MB)
58 05:11:03.882650 progress 20 % (8 MB)
59 05:11:03.910504 progress 25 % (10 MB)
60 05:11:03.939041 progress 30 % (13 MB)
61 05:11:03.967351 progress 35 % (15 MB)
62 05:11:03.995729 progress 40 % (17 MB)
63 05:11:04.024267 progress 45 % (19 MB)
64 05:11:04.052657 progress 50 % (21 MB)
65 05:11:04.081157 progress 55 % (24 MB)
66 05:11:04.117171 progress 60 % (26 MB)
67 05:11:04.154193 progress 65 % (28 MB)
68 05:11:04.183712 progress 70 % (30 MB)
69 05:11:04.211825 progress 75 % (32 MB)
70 05:11:04.239895 progress 80 % (34 MB)
71 05:11:04.267659 progress 85 % (37 MB)
72 05:11:04.295856 progress 90 % (39 MB)
73 05:11:04.323797 progress 95 % (41 MB)
74 05:11:04.351392 progress 100 % (43 MB)
75 05:11:04.351922 43 MB downloaded in 0.62 s (69.99 MB/s)
76 05:11:04.352438 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:11:04.353254 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:11:04.353527 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:11:04.353791 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:11:04.354253 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 05:11:04.354518 saving as /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/dtb/meson-g12b-a311d-libretech-cc.dtb
83 05:11:04.354726 total size: 54703 (0 MB)
84 05:11:04.354932 No compression specified
85 05:11:04.397972 progress 59 % (0 MB)
86 05:11:04.398817 progress 100 % (0 MB)
87 05:11:04.399354 0 MB downloaded in 0.04 s (1.17 MB/s)
88 05:11:04.399810 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:11:04.400676 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:11:04.400939 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:11:04.401200 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:11:04.401649 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 05:11:04.401888 saving as /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/nfsrootfs/full.rootfs.tar
95 05:11:04.402090 total size: 474398908 (452 MB)
96 05:11:04.402299 Using unxz to decompress xz
97 05:11:04.440704 progress 0 % (0 MB)
98 05:11:05.543311 progress 5 % (22 MB)
99 05:11:06.990056 progress 10 % (45 MB)
100 05:11:07.435256 progress 15 % (67 MB)
101 05:11:08.269141 progress 20 % (90 MB)
102 05:11:08.795283 progress 25 % (113 MB)
103 05:11:09.171174 progress 30 % (135 MB)
104 05:11:09.797315 progress 35 % (158 MB)
105 05:11:10.721182 progress 40 % (181 MB)
106 05:11:11.510643 progress 45 % (203 MB)
107 05:11:12.063598 progress 50 % (226 MB)
108 05:11:12.681791 progress 55 % (248 MB)
109 05:11:13.895734 progress 60 % (271 MB)
110 05:11:15.380398 progress 65 % (294 MB)
111 05:11:17.050672 progress 70 % (316 MB)
112 05:11:20.158917 progress 75 % (339 MB)
113 05:11:22.623758 progress 80 % (361 MB)
114 05:11:25.619624 progress 85 % (384 MB)
115 05:11:28.874456 progress 90 % (407 MB)
116 05:11:32.120248 progress 95 % (429 MB)
117 05:11:35.357888 progress 100 % (452 MB)
118 05:11:35.371894 452 MB downloaded in 30.97 s (14.61 MB/s)
119 05:11:35.372684 end: 1.4.1 http-download (duration 00:00:31) [common]
121 05:11:35.373596 end: 1.4 download-retry (duration 00:00:31) [common]
122 05:11:35.373890 start: 1.5 download-retry (timeout 00:09:28) [common]
123 05:11:35.374174 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 05:11:35.374942 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-256-gebd9c70be2b2/arm64/defconfig/gcc-12/modules.tar.xz
125 05:11:35.375284 saving as /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/modules/modules.tar
126 05:11:35.375496 total size: 11607448 (11 MB)
127 05:11:35.375714 Using unxz to decompress xz
128 05:11:35.423218 progress 0 % (0 MB)
129 05:11:35.493966 progress 5 % (0 MB)
130 05:11:35.570473 progress 10 % (1 MB)
131 05:11:35.667749 progress 15 % (1 MB)
132 05:11:35.762346 progress 20 % (2 MB)
133 05:11:35.847432 progress 25 % (2 MB)
134 05:11:35.926878 progress 30 % (3 MB)
135 05:11:36.004747 progress 35 % (3 MB)
136 05:11:36.083390 progress 40 % (4 MB)
137 05:11:36.189981 progress 45 % (5 MB)
138 05:11:36.277451 progress 50 % (5 MB)
139 05:11:36.356273 progress 55 % (6 MB)
140 05:11:36.441831 progress 60 % (6 MB)
141 05:11:36.523013 progress 65 % (7 MB)
142 05:11:36.599512 progress 70 % (7 MB)
143 05:11:36.680935 progress 75 % (8 MB)
144 05:11:36.764043 progress 80 % (8 MB)
145 05:11:36.843883 progress 85 % (9 MB)
146 05:11:36.923649 progress 90 % (9 MB)
147 05:11:37.003441 progress 95 % (10 MB)
148 05:11:37.081653 progress 100 % (11 MB)
149 05:11:37.092807 11 MB downloaded in 1.72 s (6.45 MB/s)
150 05:11:37.094011 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:11:37.096165 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:11:37.096858 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 05:11:37.097560 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 05:11:53.116965 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/965275/extract-nfsrootfs-btmlblym
156 05:11:53.117555 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 05:11:53.117846 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 05:11:53.118450 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o
159 05:11:53.118887 makedir: /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin
160 05:11:53.119208 makedir: /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/tests
161 05:11:53.119520 makedir: /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/results
162 05:11:53.119846 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-add-keys
163 05:11:53.120396 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-add-sources
164 05:11:53.120917 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-background-process-start
165 05:11:53.121439 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-background-process-stop
166 05:11:53.122008 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-common-functions
167 05:11:53.122521 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-echo-ipv4
168 05:11:53.123006 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-install-packages
169 05:11:53.123510 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-installed-packages
170 05:11:53.124001 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-os-build
171 05:11:53.124516 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-probe-channel
172 05:11:53.125098 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-probe-ip
173 05:11:53.125596 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-target-ip
174 05:11:53.126070 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-target-mac
175 05:11:53.126539 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-target-storage
176 05:11:53.127016 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-case
177 05:11:53.127488 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-event
178 05:11:53.127947 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-feedback
179 05:11:53.128444 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-raise
180 05:11:53.128926 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-reference
181 05:11:53.129420 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-runner
182 05:11:53.129902 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-set
183 05:11:53.130367 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-test-shell
184 05:11:53.130842 Updating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-install-packages (oe)
185 05:11:53.131367 Updating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/bin/lava-installed-packages (oe)
186 05:11:53.131799 Creating /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/environment
187 05:11:53.132197 LAVA metadata
188 05:11:53.132456 - LAVA_JOB_ID=965275
189 05:11:53.132669 - LAVA_DISPATCHER_IP=192.168.6.2
190 05:11:53.133017 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 05:11:53.133953 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 05:11:53.134259 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 05:11:53.134465 skipped lava-vland-overlay
194 05:11:53.134702 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 05:11:53.134952 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 05:11:53.135165 skipped lava-multinode-overlay
197 05:11:53.135403 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 05:11:53.135650 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 05:11:53.135894 Loading test definitions
200 05:11:53.136194 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 05:11:53.136413 Using /lava-965275 at stage 0
202 05:11:53.137553 uuid=965275_1.6.2.4.1 testdef=None
203 05:11:53.137853 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 05:11:53.138109 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 05:11:53.139809 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 05:11:53.140605 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 05:11:53.142718 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 05:11:53.143531 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 05:11:53.145580 runner path: /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 965275_1.6.2.4.1
212 05:11:53.146121 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 05:11:53.146863 Creating lava-test-runner.conf files
215 05:11:53.147058 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/965275/lava-overlay-g3bvl17o/lava-965275/0 for stage 0
216 05:11:53.147382 - 0_v4l2-decoder-conformance-vp9
217 05:11:53.147713 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 05:11:53.148001 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 05:11:53.169663 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 05:11:53.170026 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 05:11:53.170278 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 05:11:53.170543 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 05:11:53.170799 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 05:11:53.811650 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 05:11:53.812149 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 05:11:53.812403 extracting modules file /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965275/extract-nfsrootfs-btmlblym
227 05:11:55.171367 extracting modules file /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk
228 05:11:56.550416 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 05:11:56.550896 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 05:11:56.551179 [common] Applying overlay to NFS
231 05:11:56.551391 [common] Applying overlay /var/lib/lava/dispatcher/tmp/965275/compress-overlay-0_stf66b/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/965275/extract-nfsrootfs-btmlblym
232 05:11:56.580413 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 05:11:56.580824 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 05:11:56.581094 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 05:11:56.581321 Converting downloaded kernel to a uImage
236 05:11:56.581637 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/kernel/Image /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/kernel/uImage
237 05:11:57.138253 output: Image Name:
238 05:11:57.138683 output: Created: Sat Nov 9 05:11:56 2024
239 05:11:57.138890 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 05:11:57.139094 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 05:11:57.139294 output: Load Address: 01080000
242 05:11:57.139492 output: Entry Point: 01080000
243 05:11:57.139688 output:
244 05:11:57.140052 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 05:11:57.140337 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 05:11:57.140608 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 05:11:57.140865 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 05:11:57.141120 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 05:11:57.141385 Building ramdisk /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk
250 05:11:59.519808 >> 166792 blocks
251 05:12:07.297478 Adding RAMdisk u-boot header.
252 05:12:07.298202 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk.cpio.gz.uboot
253 05:12:07.560762 output: Image Name:
254 05:12:07.561654 output: Created: Sat Nov 9 05:12:07 2024
255 05:12:07.561937 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 05:12:07.562153 output: Data Size: 23434285 Bytes = 22885.04 KiB = 22.35 MiB
257 05:12:07.562356 output: Load Address: 00000000
258 05:12:07.562570 output: Entry Point: 00000000
259 05:12:07.562793 output:
260 05:12:07.563855 rename /var/lib/lava/dispatcher/tmp/965275/extract-overlay-ramdisk-o_c5_31d/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
261 05:12:07.564705 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 05:12:07.565220 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 05:12:07.565583 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 05:12:07.565863 No LXC device requested
265 05:12:07.566205 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 05:12:07.566733 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 05:12:07.567242 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 05:12:07.567662 Checking files for TFTP limit of 4294967296 bytes.
269 05:12:07.570450 end: 1 tftp-deploy (duration 00:01:04) [common]
270 05:12:07.571089 start: 2 uboot-action (timeout 00:05:00) [common]
271 05:12:07.571632 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 05:12:07.572195 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 05:12:07.572712 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 05:12:07.573167 Using kernel file from prepare-kernel: 965275/tftp-deploy-islwe_rh/kernel/uImage
275 05:12:07.573525 substitutions:
276 05:12:07.573754 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 05:12:07.573966 - {DTB_ADDR}: 0x01070000
278 05:12:07.574174 - {DTB}: 965275/tftp-deploy-islwe_rh/dtb/meson-g12b-a311d-libretech-cc.dtb
279 05:12:07.574377 - {INITRD}: 965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
280 05:12:07.574592 - {KERNEL_ADDR}: 0x01080000
281 05:12:07.574812 - {KERNEL}: 965275/tftp-deploy-islwe_rh/kernel/uImage
282 05:12:07.575012 - {LAVA_MAC}: None
283 05:12:07.575236 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/965275/extract-nfsrootfs-btmlblym
284 05:12:07.575443 - {NFS_SERVER_IP}: 192.168.6.2
285 05:12:07.575672 - {PRESEED_CONFIG}: None
286 05:12:07.576016 - {PRESEED_LOCAL}: None
287 05:12:07.576460 - {RAMDISK_ADDR}: 0x08000000
288 05:12:07.576892 - {RAMDISK}: 965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
289 05:12:07.577303 - {ROOT_PART}: None
290 05:12:07.577702 - {ROOT}: None
291 05:12:07.578023 - {SERVER_IP}: 192.168.6.2
292 05:12:07.578301 - {TEE_ADDR}: 0x83000000
293 05:12:07.578540 - {TEE}: None
294 05:12:07.578752 Parsed boot commands:
295 05:12:07.578950 - setenv autoload no
296 05:12:07.579156 - setenv initrd_high 0xffffffff
297 05:12:07.579536 - setenv fdt_high 0xffffffff
298 05:12:07.579922 - dhcp
299 05:12:07.580364 - setenv serverip 192.168.6.2
300 05:12:07.580758 - tftpboot 0x01080000 965275/tftp-deploy-islwe_rh/kernel/uImage
301 05:12:07.581152 - tftpboot 0x08000000 965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
302 05:12:07.581568 - tftpboot 0x01070000 965275/tftp-deploy-islwe_rh/dtb/meson-g12b-a311d-libretech-cc.dtb
303 05:12:07.581810 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/965275/extract-nfsrootfs-btmlblym,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 05:12:07.582026 - bootm 0x01080000 0x08000000 0x01070000
305 05:12:07.582330 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 05:12:07.583795 start: 2.3 connect-device (timeout 00:05:00) [common]
308 05:12:07.584225 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 05:12:07.597737 Setting prompt string to ['lava-test: # ']
310 05:12:07.599295 end: 2.3 connect-device (duration 00:00:00) [common]
311 05:12:07.599950 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 05:12:07.600635 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 05:12:07.601232 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 05:12:07.602493 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 05:12:07.638204 >> OK - accepted request
316 05:12:07.640946 Returned 0 in 0 seconds
317 05:12:07.742826 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 05:12:07.745345 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 05:12:07.746547 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 05:12:07.747681 Setting prompt string to ['Hit any key to stop autoboot']
322 05:12:07.748720 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 05:12:07.751581 Trying 192.168.56.21...
324 05:12:07.752588 Connected to conserv1.
325 05:12:07.753462 Escape character is '^]'.
326 05:12:07.754312
327 05:12:07.755186 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 05:12:07.756153
329 05:12:19.400438 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 05:12:19.401109 bl2_stage_init 0x01
331 05:12:19.401719 bl2_stage_init 0x81
332 05:12:19.406138 hw id: 0x0000 - pwm id 0x01
333 05:12:19.406682 bl2_stage_init 0xc1
334 05:12:19.407181 bl2_stage_init 0x02
335 05:12:19.407642
336 05:12:19.411790 L0:00000000
337 05:12:19.412398 L1:20000703
338 05:12:19.412882 L2:00008067
339 05:12:19.413326 L3:14000000
340 05:12:19.414666 B2:00402000
341 05:12:19.415210 B1:e0f83180
342 05:12:19.415687
343 05:12:19.416199 TE: 58124
344 05:12:19.416664
345 05:12:19.425828 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 05:12:19.426357
347 05:12:19.426802 Board ID = 1
348 05:12:19.427240 Set A53 clk to 24M
349 05:12:19.427674 Set A73 clk to 24M
350 05:12:19.431326 Set clk81 to 24M
351 05:12:19.431821 A53 clk: 1200 MHz
352 05:12:19.432304 A73 clk: 1200 MHz
353 05:12:19.436982 CLK81: 166.6M
354 05:12:19.437502 smccc: 00012a92
355 05:12:19.442584 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 05:12:19.443105 board id: 1
357 05:12:19.451146 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 05:12:19.461705 fw parse done
359 05:12:19.467839 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 05:12:19.510334 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 05:12:19.521234 PIEI prepare done
362 05:12:19.521794 fastboot data load
363 05:12:19.522251 fastboot data verify
364 05:12:19.526865 verify result: 266
365 05:12:19.532516 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 05:12:19.533084 LPDDR4 probe
367 05:12:19.533563 ddr clk to 1584MHz
368 05:12:19.540416 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 05:12:19.577748
370 05:12:19.578376 dmc_version 0001
371 05:12:19.584481 Check phy result
372 05:12:19.590346 INFO : End of CA training
373 05:12:19.590926 INFO : End of initialization
374 05:12:19.595874 INFO : Training has run successfully!
375 05:12:19.596434 Check phy result
376 05:12:19.601588 INFO : End of initialization
377 05:12:19.602232 INFO : End of read enable training
378 05:12:19.604857 INFO : End of fine write leveling
379 05:12:19.610468 INFO : End of Write leveling coarse delay
380 05:12:19.616094 INFO : Training has run successfully!
381 05:12:19.616698 Check phy result
382 05:12:19.617265 INFO : End of initialization
383 05:12:19.621543 INFO : End of read dq deskew training
384 05:12:19.627224 INFO : End of MPR read delay center optimization
385 05:12:19.627809 INFO : End of write delay center optimization
386 05:12:19.632801 INFO : End of read delay center optimization
387 05:12:19.638414 INFO : End of max read latency training
388 05:12:19.638991 INFO : Training has run successfully!
389 05:12:19.644020 1D training succeed
390 05:12:19.649886 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 05:12:19.697580 Check phy result
392 05:12:19.698305 INFO : End of initialization
393 05:12:19.720101 INFO : End of 2D read delay Voltage center optimization
394 05:12:19.740296 INFO : End of 2D read delay Voltage center optimization
395 05:12:19.791689 INFO : End of 2D write delay Voltage center optimization
396 05:12:19.841716 INFO : End of 2D write delay Voltage center optimization
397 05:12:19.847306 INFO : Training has run successfully!
398 05:12:19.847868
399 05:12:19.848448 channel==0
400 05:12:19.852912 RxClkDly_Margin_A0==88 ps 9
401 05:12:19.853481 TxDqDly_Margin_A0==98 ps 10
402 05:12:19.858508 RxClkDly_Margin_A1==78 ps 8
403 05:12:19.859077 TxDqDly_Margin_A1==98 ps 10
404 05:12:19.859623 TrainedVREFDQ_A0==74
405 05:12:19.864128 TrainedVREFDQ_A1==75
406 05:12:19.864701 VrefDac_Margin_A0==25
407 05:12:19.865236 DeviceVref_Margin_A0==40
408 05:12:19.869656 VrefDac_Margin_A1==25
409 05:12:19.870188 DeviceVref_Margin_A1==39
410 05:12:19.870655
411 05:12:19.871117
412 05:12:19.875258 channel==1
413 05:12:19.875800 RxClkDly_Margin_A0==98 ps 10
414 05:12:19.876291 TxDqDly_Margin_A0==88 ps 9
415 05:12:19.881068 RxClkDly_Margin_A1==98 ps 10
416 05:12:19.881995 TxDqDly_Margin_A1==88 ps 9
417 05:12:19.886638 TrainedVREFDQ_A0==77
418 05:12:19.887621 TrainedVREFDQ_A1==77
419 05:12:19.888592 VrefDac_Margin_A0==22
420 05:12:19.892134 DeviceVref_Margin_A0==37
421 05:12:19.892678 VrefDac_Margin_A1==22
422 05:12:19.897808 DeviceVref_Margin_A1==37
423 05:12:19.898646
424 05:12:19.899114 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 05:12:19.899553
426 05:12:19.931214 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 05:12:19.931891 2D training succeed
428 05:12:19.936903 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 05:12:19.942415 auto size-- 65535DDR cs0 size: 2048MB
430 05:12:19.942994 DDR cs1 size: 2048MB
431 05:12:19.947963 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 05:12:19.948495 cs0 DataBus test pass
433 05:12:19.953631 cs1 DataBus test pass
434 05:12:19.954125 cs0 AddrBus test pass
435 05:12:19.954570 cs1 AddrBus test pass
436 05:12:19.955007
437 05:12:19.959217 100bdlr_step_size ps== 420
438 05:12:19.959806 result report
439 05:12:19.964862 boot times 0Enable ddr reg access
440 05:12:19.970177 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 05:12:19.983589 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 05:12:20.556748 0.0;M3 CHK:0;cm4_sp_mode 0
443 05:12:20.557493 MVN_1=0x00000000
444 05:12:20.562211 MVN_2=0x00000000
445 05:12:20.567961 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 05:12:20.568640 OPS=0x10
447 05:12:20.569104 ring efuse init
448 05:12:20.569635 chipver efuse init
449 05:12:20.576282 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 05:12:20.576829 [0.018961 Inits done]
451 05:12:20.577369 secure task start!
452 05:12:20.583844 high task start!
453 05:12:20.584407 low task start!
454 05:12:20.584872 run into bl31
455 05:12:20.590421 NOTICE: BL31: v1.3(release):4fc40b1
456 05:12:20.598369 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 05:12:20.598934 NOTICE: BL31: G12A normal boot!
458 05:12:20.623487 NOTICE: BL31: BL33 decompress pass
459 05:12:20.629148 ERROR: Error initializing runtime service opteed_fast
460 05:12:21.861916
461 05:12:21.862687
462 05:12:21.870650 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 05:12:21.871630
464 05:12:21.872588 Model: Libre Computer AML-A311D-CC Alta
465 05:12:22.078981 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 05:12:22.102342 DRAM: 2 GiB (effective 3.8 GiB)
467 05:12:22.245204 Core: 408 devices, 31 uclasses, devicetree: separate
468 05:12:22.251180 WDT: Not starting watchdog@f0d0
469 05:12:22.283404 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 05:12:22.295889 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 05:12:22.300829 ** Bad device specification mmc 0 **
472 05:12:22.311175 Card did not respond to voltage select! : -110
473 05:12:22.318889 ** Bad device specification mmc 0 **
474 05:12:22.319555 Couldn't find partition mmc 0
475 05:12:22.327208 Card did not respond to voltage select! : -110
476 05:12:22.332701 ** Bad device specification mmc 0 **
477 05:12:22.333232 Couldn't find partition mmc 0
478 05:12:22.337672 Error: could not access storage.
479 05:12:23.601242 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 05:12:23.601923 bl2_stage_init 0x01
481 05:12:23.602423 bl2_stage_init 0x81
482 05:12:23.606681 hw id: 0x0000 - pwm id 0x01
483 05:12:23.607292 bl2_stage_init 0xc1
484 05:12:23.607870 bl2_stage_init 0x02
485 05:12:23.608477
486 05:12:23.612350 L0:00000000
487 05:12:23.612944 L1:20000703
488 05:12:23.613480 L2:00008067
489 05:12:23.614018 L3:14000000
490 05:12:23.615420 B2:00402000
491 05:12:23.616050 B1:e0f83180
492 05:12:23.616597
493 05:12:23.617155 TE: 58159
494 05:12:23.617691
495 05:12:23.626635 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 05:12:23.627225
497 05:12:23.627778 Board ID = 1
498 05:12:23.628353 Set A53 clk to 24M
499 05:12:23.628888 Set A73 clk to 24M
500 05:12:23.632332 Set clk81 to 24M
501 05:12:23.632919 A53 clk: 1200 MHz
502 05:12:23.633465 A73 clk: 1200 MHz
503 05:12:23.635675 CLK81: 166.6M
504 05:12:23.636289 smccc: 00012ab5
505 05:12:23.641299 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 05:12:23.646867 board id: 1
507 05:12:23.652044 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 05:12:23.662440 fw parse done
509 05:12:23.668420 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 05:12:23.711060 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 05:12:23.721908 PIEI prepare done
512 05:12:23.722470 fastboot data load
513 05:12:23.722963 fastboot data verify
514 05:12:23.727543 verify result: 266
515 05:12:23.733118 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 05:12:23.733638 LPDDR4 probe
517 05:12:23.734121 ddr clk to 1584MHz
518 05:12:23.741212 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 05:12:23.778507
520 05:12:23.779073 dmc_version 0001
521 05:12:23.785128 Check phy result
522 05:12:23.790916 INFO : End of CA training
523 05:12:23.791420 INFO : End of initialization
524 05:12:23.796528 INFO : Training has run successfully!
525 05:12:23.797032 Check phy result
526 05:12:23.802077 INFO : End of initialization
527 05:12:23.802590 INFO : End of read enable training
528 05:12:23.807737 INFO : End of fine write leveling
529 05:12:23.813388 INFO : End of Write leveling coarse delay
530 05:12:23.813901 INFO : Training has run successfully!
531 05:12:23.814351 Check phy result
532 05:12:23.818964 INFO : End of initialization
533 05:12:23.819471 INFO : End of read dq deskew training
534 05:12:23.824581 INFO : End of MPR read delay center optimization
535 05:12:23.830028 INFO : End of write delay center optimization
536 05:12:23.835721 INFO : End of read delay center optimization
537 05:12:23.836205 INFO : End of max read latency training
538 05:12:23.841348 INFO : Training has run successfully!
539 05:12:23.841850 1D training succeed
540 05:12:23.850518 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 05:12:23.898101 Check phy result
542 05:12:23.898608 INFO : End of initialization
543 05:12:23.920561 INFO : End of 2D read delay Voltage center optimization
544 05:12:23.940632 INFO : End of 2D read delay Voltage center optimization
545 05:12:23.992638 INFO : End of 2D write delay Voltage center optimization
546 05:12:24.041802 INFO : End of 2D write delay Voltage center optimization
547 05:12:24.047343 INFO : Training has run successfully!
548 05:12:24.047824
549 05:12:24.048296 channel==0
550 05:12:24.052922 RxClkDly_Margin_A0==88 ps 9
551 05:12:24.053402 TxDqDly_Margin_A0==98 ps 10
552 05:12:24.056349 RxClkDly_Margin_A1==78 ps 8
553 05:12:24.056800 TxDqDly_Margin_A1==98 ps 10
554 05:12:24.062013 TrainedVREFDQ_A0==74
555 05:12:24.062462 TrainedVREFDQ_A1==75
556 05:12:24.062872 VrefDac_Margin_A0==24
557 05:12:24.067482 DeviceVref_Margin_A0==40
558 05:12:24.067934 VrefDac_Margin_A1==26
559 05:12:24.073109 DeviceVref_Margin_A1==39
560 05:12:24.073566
561 05:12:24.073982
562 05:12:24.074387 channel==1
563 05:12:24.074786 RxClkDly_Margin_A0==98 ps 10
564 05:12:24.076524 TxDqDly_Margin_A0==88 ps 9
565 05:12:24.082264 RxClkDly_Margin_A1==98 ps 10
566 05:12:24.082781 TxDqDly_Margin_A1==88 ps 9
567 05:12:24.083203 TrainedVREFDQ_A0==76
568 05:12:24.087841 TrainedVREFDQ_A1==77
569 05:12:24.088356 VrefDac_Margin_A0==22
570 05:12:24.093345 DeviceVref_Margin_A0==38
571 05:12:24.093804 VrefDac_Margin_A1==23
572 05:12:24.094214 DeviceVref_Margin_A1==37
573 05:12:24.094612
574 05:12:24.102144 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 05:12:24.102603
576 05:12:24.130133 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 05:12:24.130636 2D training succeed
578 05:12:24.141390 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 05:12:24.141910 auto size-- 65535DDR cs0 size: 2048MB
580 05:12:24.142334 DDR cs1 size: 2048MB
581 05:12:24.146943 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 05:12:24.147425 cs0 DataBus test pass
583 05:12:24.152611 cs1 DataBus test pass
584 05:12:24.153071 cs0 AddrBus test pass
585 05:12:24.158320 cs1 AddrBus test pass
586 05:12:24.158782
587 05:12:24.159198 100bdlr_step_size ps== 420
588 05:12:24.159615 result report
589 05:12:24.163736 boot times 0Enable ddr reg access
590 05:12:24.170404 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 05:12:24.183753 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 05:12:24.755811 0.0;M3 CHK:0;cm4_sp_mode 0
593 05:12:24.756470 MVN_1=0x00000000
594 05:12:24.761206 MVN_2=0x00000000
595 05:12:24.767023 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 05:12:24.767571 OPS=0x10
597 05:12:24.768080 ring efuse init
598 05:12:24.768497 chipver efuse init
599 05:12:24.772537 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 05:12:24.778285 [0.018961 Inits done]
601 05:12:24.778817 secure task start!
602 05:12:24.779219 high task start!
603 05:12:24.782748 low task start!
604 05:12:24.783247 run into bl31
605 05:12:24.789342 NOTICE: BL31: v1.3(release):4fc40b1
606 05:12:24.797162 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 05:12:24.797624 NOTICE: BL31: G12A normal boot!
608 05:12:24.822487 NOTICE: BL31: BL33 decompress pass
609 05:12:24.828261 ERROR: Error initializing runtime service opteed_fast
610 05:12:26.061105
611 05:12:26.061546
612 05:12:26.069540 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 05:12:26.069883
614 05:12:26.070135 Model: Libre Computer AML-A311D-CC Alta
615 05:12:26.278057 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 05:12:26.301352 DRAM: 2 GiB (effective 3.8 GiB)
617 05:12:26.444398 Core: 408 devices, 31 uclasses, devicetree: separate
618 05:12:26.450221 WDT: Not starting watchdog@f0d0
619 05:12:26.482612 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 05:12:26.494951 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 05:12:26.499902 ** Bad device specification mmc 0 **
622 05:12:26.510294 Card did not respond to voltage select! : -110
623 05:12:26.517912 ** Bad device specification mmc 0 **
624 05:12:26.518444 Couldn't find partition mmc 0
625 05:12:26.526297 Card did not respond to voltage select! : -110
626 05:12:26.531874 ** Bad device specification mmc 0 **
627 05:12:26.532564 Couldn't find partition mmc 0
628 05:12:26.536841 Error: could not access storage.
629 05:12:26.879397 Net: eth0: ethernet@ff3f0000
630 05:12:26.879824 starting USB...
631 05:12:27.131110 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 05:12:27.131519 Starting the controller
633 05:12:27.138030 USB XHCI 1.10
634 05:12:28.850105 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 05:12:28.850866 bl2_stage_init 0x81
636 05:12:28.855580 hw id: 0x0000 - pwm id 0x01
637 05:12:28.856259 bl2_stage_init 0xc1
638 05:12:28.856779 bl2_stage_init 0x02
639 05:12:28.857322
640 05:12:28.861141 L0:00000000
641 05:12:28.861727 L1:20000703
642 05:12:28.862291 L2:00008067
643 05:12:28.862794 L3:14000000
644 05:12:28.863326 B2:00402000
645 05:12:28.866796 B1:e0f83180
646 05:12:28.867340
647 05:12:28.867803 TE: 58150
648 05:12:28.868292
649 05:12:28.872419 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 05:12:28.872979
651 05:12:28.873498 Board ID = 1
652 05:12:28.877939 Set A53 clk to 24M
653 05:12:28.878541 Set A73 clk to 24M
654 05:12:28.878986 Set clk81 to 24M
655 05:12:28.883579 A53 clk: 1200 MHz
656 05:12:28.884187 A73 clk: 1200 MHz
657 05:12:28.884737 CLK81: 166.6M
658 05:12:28.885226 smccc: 00012aab
659 05:12:28.889229 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 05:12:28.894705 board id: 1
661 05:12:28.900504 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 05:12:28.911167 fw parse done
663 05:12:28.917200 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 05:12:28.959772 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 05:12:28.970673 PIEI prepare done
666 05:12:28.971295 fastboot data load
667 05:12:28.971757 fastboot data verify
668 05:12:28.976352 verify result: 266
669 05:12:28.982033 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 05:12:28.982562 LPDDR4 probe
671 05:12:28.983015 ddr clk to 1584MHz
672 05:12:28.989944 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 05:12:29.027488
674 05:12:29.028513 dmc_version 0001
675 05:12:29.034031 Check phy result
676 05:12:29.040051 INFO : End of CA training
677 05:12:29.040774 INFO : End of initialization
678 05:12:29.045396 INFO : Training has run successfully!
679 05:12:29.046030 Check phy result
680 05:12:29.051001 INFO : End of initialization
681 05:12:29.051592 INFO : End of read enable training
682 05:12:29.054323 INFO : End of fine write leveling
683 05:12:29.060072 INFO : End of Write leveling coarse delay
684 05:12:29.065489 INFO : Training has run successfully!
685 05:12:29.066062 Check phy result
686 05:12:29.066599 INFO : End of initialization
687 05:12:29.071139 INFO : End of read dq deskew training
688 05:12:29.076713 INFO : End of MPR read delay center optimization
689 05:12:29.077287 INFO : End of write delay center optimization
690 05:12:29.082267 INFO : End of read delay center optimization
691 05:12:29.087884 INFO : End of max read latency training
692 05:12:29.088515 INFO : Training has run successfully!
693 05:12:29.093485 1D training succeed
694 05:12:29.099349 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 05:12:29.146946 Check phy result
696 05:12:29.147554 INFO : End of initialization
697 05:12:29.168724 INFO : End of 2D read delay Voltage center optimization
698 05:12:29.188993 INFO : End of 2D read delay Voltage center optimization
699 05:12:29.241249 INFO : End of 2D write delay Voltage center optimization
700 05:12:29.290545 INFO : End of 2D write delay Voltage center optimization
701 05:12:29.296256 INFO : Training has run successfully!
702 05:12:29.296838
703 05:12:29.297291 channel==0
704 05:12:29.301623 RxClkDly_Margin_A0==88 ps 9
705 05:12:29.302212 TxDqDly_Margin_A0==98 ps 10
706 05:12:29.307177 RxClkDly_Margin_A1==88 ps 9
707 05:12:29.307693 TxDqDly_Margin_A1==98 ps 10
708 05:12:29.308222 TrainedVREFDQ_A0==74
709 05:12:29.312963 TrainedVREFDQ_A1==74
710 05:12:29.313511 VrefDac_Margin_A0==25
711 05:12:29.313980 DeviceVref_Margin_A0==40
712 05:12:29.318521 VrefDac_Margin_A1==25
713 05:12:29.319388 DeviceVref_Margin_A1==40
714 05:12:29.320393
715 05:12:29.321256
716 05:12:29.324401 channel==1
717 05:12:29.325220 RxClkDly_Margin_A0==98 ps 10
718 05:12:29.326066 TxDqDly_Margin_A0==98 ps 10
719 05:12:29.329695 RxClkDly_Margin_A1==98 ps 10
720 05:12:29.330237 TxDqDly_Margin_A1==88 ps 9
721 05:12:29.335122 TrainedVREFDQ_A0==77
722 05:12:29.335766 TrainedVREFDQ_A1==77
723 05:12:29.336365 VrefDac_Margin_A0==22
724 05:12:29.340812 DeviceVref_Margin_A0==37
725 05:12:29.341333 VrefDac_Margin_A1==22
726 05:12:29.346455 DeviceVref_Margin_A1==37
727 05:12:29.346972
728 05:12:29.347504 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 05:12:29.352104
730 05:12:29.380169 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
731 05:12:29.380831 2D training succeed
732 05:12:29.385732 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 05:12:29.391308 auto size-- 65535DDR cs0 size: 2048MB
734 05:12:29.392319 DDR cs1 size: 2048MB
735 05:12:29.397065 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 05:12:29.397963 cs0 DataBus test pass
737 05:12:29.402477 cs1 DataBus test pass
738 05:12:29.403013 cs0 AddrBus test pass
739 05:12:29.403469 cs1 AddrBus test pass
740 05:12:29.403921
741 05:12:29.408148 100bdlr_step_size ps== 420
742 05:12:29.408909 result report
743 05:12:29.413654 boot times 0Enable ddr reg access
744 05:12:29.419128 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 05:12:29.432451 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 05:12:30.005947 0.0;M3 CHK:0;cm4_sp_mode 0
747 05:12:30.006755 MVN_1=0x00000000
748 05:12:30.011495 MVN_2=0x00000000
749 05:12:30.017267 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 05:12:30.017877 OPS=0x10
751 05:12:30.018391 ring efuse init
752 05:12:30.018834 chipver efuse init
753 05:12:30.022845 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 05:12:30.028466 [0.018960 Inits done]
755 05:12:30.029000 secure task start!
756 05:12:30.029542 high task start!
757 05:12:30.033112 low task start!
758 05:12:30.033734 run into bl31
759 05:12:30.039677 NOTICE: BL31: v1.3(release):4fc40b1
760 05:12:30.047468 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 05:12:30.048034 NOTICE: BL31: G12A normal boot!
762 05:12:30.072929 NOTICE: BL31: BL33 decompress pass
763 05:12:30.078583 ERROR: Error initializing runtime service opteed_fast
764 05:12:31.311609
765 05:12:31.312722
766 05:12:31.319907 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 05:12:31.320689
768 05:12:31.321160 Model: Libre Computer AML-A311D-CC Alta
769 05:12:31.527373 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 05:12:31.551091 DRAM: 2 GiB (effective 3.8 GiB)
771 05:12:31.694679 Core: 408 devices, 31 uclasses, devicetree: separate
772 05:12:31.699664 WDT: Not starting watchdog@f0d0
773 05:12:31.732665 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 05:12:31.745188 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 05:12:31.749069 ** Bad device specification mmc 0 **
776 05:12:31.760371 Card did not respond to voltage select! : -110
777 05:12:31.768030 ** Bad device specification mmc 0 **
778 05:12:31.768329 Couldn't find partition mmc 0
779 05:12:31.776386 Card did not respond to voltage select! : -110
780 05:12:31.781930 ** Bad device specification mmc 0 **
781 05:12:31.782190 Couldn't find partition mmc 0
782 05:12:31.786754 Error: could not access storage.
783 05:12:32.129372 Net: eth0: ethernet@ff3f0000
784 05:12:32.129780 starting USB...
785 05:12:32.381346 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 05:12:32.381785 Starting the controller
787 05:12:32.388274 USB XHCI 1.10
788 05:12:34.550073 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 05:12:34.550573 bl2_stage_init 0x01
790 05:12:34.550812 bl2_stage_init 0x81
791 05:12:34.555720 hw id: 0x0000 - pwm id 0x01
792 05:12:34.556058 bl2_stage_init 0xc1
793 05:12:34.556286 bl2_stage_init 0x02
794 05:12:34.556549
795 05:12:34.561213 L0:00000000
796 05:12:34.561515 L1:20000703
797 05:12:34.561769 L2:00008067
798 05:12:34.561997 L3:14000000
799 05:12:34.566867 B2:00402000
800 05:12:34.567154 B1:e0f83180
801 05:12:34.567419
802 05:12:34.567628 TE: 58167
803 05:12:34.567885
804 05:12:34.572482 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 05:12:34.572825
806 05:12:34.573078 Board ID = 1
807 05:12:34.578016 Set A53 clk to 24M
808 05:12:34.578276 Set A73 clk to 24M
809 05:12:34.578526 Set clk81 to 24M
810 05:12:34.583696 A53 clk: 1200 MHz
811 05:12:34.584025 A73 clk: 1200 MHz
812 05:12:34.584251 CLK81: 166.6M
813 05:12:34.584454 smccc: 00012abe
814 05:12:34.589146 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 05:12:34.594918 board id: 1
816 05:12:34.600831 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 05:12:34.611336 fw parse done
818 05:12:34.617410 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 05:12:34.659811 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 05:12:34.670733 PIEI prepare done
821 05:12:34.671223 fastboot data load
822 05:12:34.671650 fastboot data verify
823 05:12:34.676394 verify result: 266
824 05:12:34.681935 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 05:12:34.682423 LPDDR4 probe
826 05:12:34.682843 ddr clk to 1584MHz
827 05:12:34.689983 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 05:12:34.727243
829 05:12:34.727756 dmc_version 0001
830 05:12:34.733896 Check phy result
831 05:12:34.739723 INFO : End of CA training
832 05:12:34.740241 INFO : End of initialization
833 05:12:34.745378 INFO : Training has run successfully!
834 05:12:34.745869 Check phy result
835 05:12:34.750940 INFO : End of initialization
836 05:12:34.751430 INFO : End of read enable training
837 05:12:34.756634 INFO : End of fine write leveling
838 05:12:34.762141 INFO : End of Write leveling coarse delay
839 05:12:34.762630 INFO : Training has run successfully!
840 05:12:34.763064 Check phy result
841 05:12:34.767719 INFO : End of initialization
842 05:12:34.768261 INFO : End of read dq deskew training
843 05:12:34.773382 INFO : End of MPR read delay center optimization
844 05:12:34.778903 INFO : End of write delay center optimization
845 05:12:34.784629 INFO : End of read delay center optimization
846 05:12:34.785129 INFO : End of max read latency training
847 05:12:34.790156 INFO : Training has run successfully!
848 05:12:34.790649 1D training succeed
849 05:12:34.798317 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 05:12:34.846967 Check phy result
851 05:12:34.847533 INFO : End of initialization
852 05:12:34.868640 INFO : End of 2D read delay Voltage center optimization
853 05:12:34.888954 INFO : End of 2D read delay Voltage center optimization
854 05:12:34.941136 INFO : End of 2D write delay Voltage center optimization
855 05:12:34.990414 INFO : End of 2D write delay Voltage center optimization
856 05:12:34.996080 INFO : Training has run successfully!
857 05:12:34.996688
858 05:12:34.997153 channel==0
859 05:12:35.001596 RxClkDly_Margin_A0==88 ps 9
860 05:12:35.002217 TxDqDly_Margin_A0==98 ps 10
861 05:12:35.007240 RxClkDly_Margin_A1==88 ps 9
862 05:12:35.007913 TxDqDly_Margin_A1==98 ps 10
863 05:12:35.008432 TrainedVREFDQ_A0==74
864 05:12:35.012861 TrainedVREFDQ_A1==74
865 05:12:35.013504 VrefDac_Margin_A0==25
866 05:12:35.014024 DeviceVref_Margin_A0==40
867 05:12:35.018465 VrefDac_Margin_A1==25
868 05:12:35.019085 DeviceVref_Margin_A1==40
869 05:12:35.019590
870 05:12:35.020121
871 05:12:35.024059 channel==1
872 05:12:35.024667 RxClkDly_Margin_A0==98 ps 10
873 05:12:35.025190 TxDqDly_Margin_A0==98 ps 10
874 05:12:35.029636 RxClkDly_Margin_A1==88 ps 9
875 05:12:35.030254 TxDqDly_Margin_A1==88 ps 9
876 05:12:35.035213 TrainedVREFDQ_A0==77
877 05:12:35.035815 TrainedVREFDQ_A1==77
878 05:12:35.036367 VrefDac_Margin_A0==22
879 05:12:35.040879 DeviceVref_Margin_A0==37
880 05:12:35.041485 VrefDac_Margin_A1==24
881 05:12:35.046410 DeviceVref_Margin_A1==37
882 05:12:35.047004
883 05:12:35.047524 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 05:12:35.048061
885 05:12:35.079954 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 05:12:35.080636 2D training succeed
887 05:12:35.085589 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 05:12:35.091265 auto size-- 65535DDR cs0 size: 2048MB
889 05:12:35.091883 DDR cs1 size: 2048MB
890 05:12:35.096900 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 05:12:35.097503 cs0 DataBus test pass
892 05:12:35.102440 cs1 DataBus test pass
893 05:12:35.103047 cs0 AddrBus test pass
894 05:12:35.103556 cs1 AddrBus test pass
895 05:12:35.104090
896 05:12:35.108065 100bdlr_step_size ps== 420
897 05:12:35.108676 result report
898 05:12:35.113651 boot times 0Enable ddr reg access
899 05:12:35.118954 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 05:12:35.132448 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 05:12:35.706106 0.0;M3 CHK:0;cm4_sp_mode 0
902 05:12:35.706832 MVN_1=0x00000000
903 05:12:35.711579 MVN_2=0x00000000
904 05:12:35.717373 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 05:12:35.717959 OPS=0x10
906 05:12:35.718419 ring efuse init
907 05:12:35.718911 chipver efuse init
908 05:12:35.722967 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 05:12:35.728578 [0.018961 Inits done]
910 05:12:35.729161 secure task start!
911 05:12:35.729677 high task start!
912 05:12:35.733123 low task start!
913 05:12:35.733704 run into bl31
914 05:12:35.739888 NOTICE: BL31: v1.3(release):4fc40b1
915 05:12:35.747631 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 05:12:35.748234 NOTICE: BL31: G12A normal boot!
917 05:12:35.772977 NOTICE: BL31: BL33 decompress pass
918 05:12:35.778720 ERROR: Error initializing runtime service opteed_fast
919 05:12:37.011472
920 05:12:37.011888
921 05:12:37.019858 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 05:12:37.020180
923 05:12:37.020410 Model: Libre Computer AML-A311D-CC Alta
924 05:12:37.228285 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 05:12:37.251665 DRAM: 2 GiB (effective 3.8 GiB)
926 05:12:37.394683 Core: 408 devices, 31 uclasses, devicetree: separate
927 05:12:37.400544 WDT: Not starting watchdog@f0d0
928 05:12:37.432851 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 05:12:37.445256 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 05:12:37.450218 ** Bad device specification mmc 0 **
931 05:12:37.460562 Card did not respond to voltage select! : -110
932 05:12:37.468222 ** Bad device specification mmc 0 **
933 05:12:37.468504 Couldn't find partition mmc 0
934 05:12:37.476550 Card did not respond to voltage select! : -110
935 05:12:37.482067 ** Bad device specification mmc 0 **
936 05:12:37.482343 Couldn't find partition mmc 0
937 05:12:37.487095 Error: could not access storage.
938 05:12:37.829617 Net: eth0: ethernet@ff3f0000
939 05:12:37.830034 starting USB...
940 05:12:38.081424 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 05:12:38.081840 Starting the controller
942 05:12:38.088350 USB XHCI 1.10
943 05:12:39.949839 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
944 05:12:39.950479 bl2_stage_init 0x01
945 05:12:39.950937 bl2_stage_init 0x81
946 05:12:39.955457 hw id: 0x0000 - pwm id 0x01
947 05:12:39.955966 bl2_stage_init 0xc1
948 05:12:39.956468 bl2_stage_init 0x02
949 05:12:39.956908
950 05:12:39.960940 L0:00000000
951 05:12:39.961443 L1:20000703
952 05:12:39.961889 L2:00008067
953 05:12:39.962328 L3:14000000
954 05:12:39.964072 B2:00402000
955 05:12:39.964572 B1:e0f83180
956 05:12:39.965014
957 05:12:39.965451 TE: 58167
958 05:12:39.965887
959 05:12:39.975171 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 05:12:39.975690
961 05:12:39.976177 Board ID = 1
962 05:12:39.976620 Set A53 clk to 24M
963 05:12:39.977057 Set A73 clk to 24M
964 05:12:39.980859 Set clk81 to 24M
965 05:12:39.981360 A53 clk: 1200 MHz
966 05:12:39.981807 A73 clk: 1200 MHz
967 05:12:39.984237 CLK81: 166.6M
968 05:12:39.984735 smccc: 00012abd
969 05:12:39.989792 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 05:12:39.995456 board id: 1
971 05:12:40.000576 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 05:12:40.011133 fw parse done
973 05:12:40.017128 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 05:12:40.058779 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 05:12:40.070674 PIEI prepare done
976 05:12:40.071181 fastboot data load
977 05:12:40.071617 fastboot data verify
978 05:12:40.076251 verify result: 266
979 05:12:40.081843 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 05:12:40.082346 LPDDR4 probe
981 05:12:40.082782 ddr clk to 1584MHz
982 05:12:40.089804 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 05:12:40.127136
984 05:12:40.127668 dmc_version 0001
985 05:12:40.133838 Check phy result
986 05:12:40.139629 INFO : End of CA training
987 05:12:40.140157 INFO : End of initialization
988 05:12:40.145269 INFO : Training has run successfully!
989 05:12:40.145773 Check phy result
990 05:12:40.150899 INFO : End of initialization
991 05:12:40.151398 INFO : End of read enable training
992 05:12:40.156448 INFO : End of fine write leveling
993 05:12:40.162098 INFO : End of Write leveling coarse delay
994 05:12:40.162601 INFO : Training has run successfully!
995 05:12:40.163045 Check phy result
996 05:12:40.167665 INFO : End of initialization
997 05:12:40.168197 INFO : End of read dq deskew training
998 05:12:40.173238 INFO : End of MPR read delay center optimization
999 05:12:40.178864 INFO : End of write delay center optimization
1000 05:12:40.184479 INFO : End of read delay center optimization
1001 05:12:40.184982 INFO : End of max read latency training
1002 05:12:40.190075 INFO : Training has run successfully!
1003 05:12:40.190576 1D training succeed
1004 05:12:40.199252 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 05:12:40.246752 Check phy result
1006 05:12:40.247278 INFO : End of initialization
1007 05:12:40.268480 INFO : End of 2D read delay Voltage center optimization
1008 05:12:40.288768 INFO : End of 2D read delay Voltage center optimization
1009 05:12:40.340751 INFO : End of 2D write delay Voltage center optimization
1010 05:12:40.390208 INFO : End of 2D write delay Voltage center optimization
1011 05:12:40.395766 INFO : Training has run successfully!
1012 05:12:40.396384
1013 05:12:40.396840 channel==0
1014 05:12:40.401387 RxClkDly_Margin_A0==88 ps 9
1015 05:12:40.401971 TxDqDly_Margin_A0==98 ps 10
1016 05:12:40.404678 RxClkDly_Margin_A1==88 ps 9
1017 05:12:40.405216 TxDqDly_Margin_A1==98 ps 10
1018 05:12:40.410168 TrainedVREFDQ_A0==74
1019 05:12:40.410725 TrainedVREFDQ_A1==74
1020 05:12:40.415902 VrefDac_Margin_A0==25
1021 05:12:40.416745 DeviceVref_Margin_A0==40
1022 05:12:40.417314 VrefDac_Margin_A1==25
1023 05:12:40.421487 DeviceVref_Margin_A1==40
1024 05:12:40.422141
1025 05:12:40.422662
1026 05:12:40.423119 channel==1
1027 05:12:40.423624 RxClkDly_Margin_A0==98 ps 10
1028 05:12:40.427045 TxDqDly_Margin_A0==88 ps 9
1029 05:12:40.427700 RxClkDly_Margin_A1==98 ps 10
1030 05:12:40.432702 TxDqDly_Margin_A1==88 ps 9
1031 05:12:40.433377 TrainedVREFDQ_A0==76
1032 05:12:40.433908 TrainedVREFDQ_A1==77
1033 05:12:40.438181 VrefDac_Margin_A0==22
1034 05:12:40.438829 DeviceVref_Margin_A0==38
1035 05:12:40.443843 VrefDac_Margin_A1==24
1036 05:12:40.444546 DeviceVref_Margin_A1==37
1037 05:12:40.445076
1038 05:12:40.449429 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 05:12:40.450080
1040 05:12:40.477410 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1041 05:12:40.483028 2D training succeed
1042 05:12:40.488660 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 05:12:40.489355 auto size-- 65535DDR cs0 size: 2048MB
1044 05:12:40.494294 DDR cs1 size: 2048MB
1045 05:12:40.494980 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 05:12:40.499842 cs0 DataBus test pass
1047 05:12:40.500571 cs1 DataBus test pass
1048 05:12:40.501106 cs0 AddrBus test pass
1049 05:12:40.505438 cs1 AddrBus test pass
1050 05:12:40.506077
1051 05:12:40.506604 100bdlr_step_size ps== 420
1052 05:12:40.507127 result report
1053 05:12:40.510969 boot times 0Enable ddr reg access
1054 05:12:40.518738 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 05:12:40.532230 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 05:12:41.105827 0.0;M3 CHK:0;cm4_sp_mode 0
1057 05:12:41.106527 MVN_1=0x00000000
1058 05:12:41.111322 MVN_2=0x00000000
1059 05:12:41.117032 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 05:12:41.117564 OPS=0x10
1061 05:12:41.118022 ring efuse init
1062 05:12:41.118477 chipver efuse init
1063 05:12:41.125306 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 05:12:41.125897 [0.018961 Inits done]
1065 05:12:41.126408 secure task start!
1066 05:12:41.132834 high task start!
1067 05:12:41.133391 low task start!
1068 05:12:41.133901 run into bl31
1069 05:12:41.139629 NOTICE: BL31: v1.3(release):4fc40b1
1070 05:12:41.147305 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 05:12:41.147889 NOTICE: BL31: G12A normal boot!
1072 05:12:41.172693 NOTICE: BL31: BL33 decompress pass
1073 05:12:41.178393 ERROR: Error initializing runtime service opteed_fast
1074 05:12:42.411413
1075 05:12:42.412639
1076 05:12:42.419861 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 05:12:42.420942
1078 05:12:42.421709 Model: Libre Computer AML-A311D-CC Alta
1079 05:12:42.628329 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 05:12:42.651618 DRAM: 2 GiB (effective 3.8 GiB)
1081 05:12:42.794454 Core: 408 devices, 31 uclasses, devicetree: separate
1082 05:12:42.800371 WDT: Not starting watchdog@f0d0
1083 05:12:42.832576 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 05:12:42.845141 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 05:12:42.850062 ** Bad device specification mmc 0 **
1086 05:12:42.860493 Card did not respond to voltage select! : -110
1087 05:12:42.868123 ** Bad device specification mmc 0 **
1088 05:12:42.869004 Couldn't find partition mmc 0
1089 05:12:42.876388 Card did not respond to voltage select! : -110
1090 05:12:42.881887 ** Bad device specification mmc 0 **
1091 05:12:42.882419 Couldn't find partition mmc 0
1092 05:12:42.886905 Error: could not access storage.
1093 05:12:43.229337 Net: eth0: ethernet@ff3f0000
1094 05:12:43.230085 starting USB...
1095 05:12:43.481244 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 05:12:43.481938 Starting the controller
1097 05:12:43.488134 USB XHCI 1.10
1098 05:12:45.045386 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 05:12:45.053638 scanning usb for storage devices... 0 Storage Device(s) found
1101 05:12:45.105559 Hit any key to stop autoboot: 1
1102 05:12:45.106423 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1103 05:12:45.107199 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1104 05:12:45.107767 Setting prompt string to ['=>']
1105 05:12:45.108439 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1106 05:12:45.121148 0
1107 05:12:45.122090 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 05:12:45.122625 Sending with 10 millisecond of delay
1110 05:12:46.258173 => setenv autoload no
1111 05:12:46.268964 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1112 05:12:46.273788 setenv autoload no
1113 05:12:46.274515 Sending with 10 millisecond of delay
1115 05:12:48.071020 => setenv initrd_high 0xffffffff
1116 05:12:48.081823 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1117 05:12:48.082688 setenv initrd_high 0xffffffff
1118 05:12:48.083398 Sending with 10 millisecond of delay
1120 05:12:49.699354 => setenv fdt_high 0xffffffff
1121 05:12:49.710156 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1122 05:12:49.710957 setenv fdt_high 0xffffffff
1123 05:12:49.711659 Sending with 10 millisecond of delay
1125 05:12:50.003440 => dhcp
1126 05:12:50.014184 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 05:12:50.015015 dhcp
1128 05:12:50.015445 Speed: 1000, full duplex
1129 05:12:50.015851 BOOTP broadcast 1
1130 05:12:50.028494 DHCP client bound to address 192.168.6.27 (14 ms)
1131 05:12:50.029238 Sending with 10 millisecond of delay
1133 05:12:51.705401 => setenv serverip 192.168.6.2
1134 05:12:51.716159 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1135 05:12:51.717006 setenv serverip 192.168.6.2
1136 05:12:51.717687 Sending with 10 millisecond of delay
1138 05:12:55.440574 => tftpboot 0x01080000 965275/tftp-deploy-islwe_rh/kernel/uImage
1139 05:12:55.451388 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1140 05:12:55.452298 tftpboot 0x01080000 965275/tftp-deploy-islwe_rh/kernel/uImage
1141 05:12:55.452774 Speed: 1000, full duplex
1142 05:12:55.453215 Using ethernet@ff3f0000 device
1143 05:12:55.454259 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 05:12:55.459747 Filename '965275/tftp-deploy-islwe_rh/kernel/uImage'.
1145 05:12:55.463604 Load address: 0x1080000
1146 05:12:58.342475 Loading: *################################################## 43.6 MiB
1147 05:12:58.343093 15.1 MiB/s
1148 05:12:58.343526 done
1149 05:12:58.347111 Bytes transferred = 45713984 (2b98a40 hex)
1150 05:12:58.347902 Sending with 10 millisecond of delay
1152 05:13:03.034832 => tftpboot 0x08000000 965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
1153 05:13:03.045612 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1154 05:13:03.046416 tftpboot 0x08000000 965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot
1155 05:13:03.046856 Speed: 1000, full duplex
1156 05:13:03.047264 Using ethernet@ff3f0000 device
1157 05:13:03.048394 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 05:13:03.060415 Filename '965275/tftp-deploy-islwe_rh/ramdisk/ramdisk.cpio.gz.uboot'.
1159 05:13:03.060900 Load address: 0x8000000
1160 05:13:09.572551 Loading: *####################T ############################# UDP wrong checksum 00000005 00000ab6
1161 05:13:14.573128 T UDP wrong checksum 00000005 00000ab6
1162 05:13:24.576616 T T UDP wrong checksum 00000005 00000ab6
1163 05:13:28.799088 UDP wrong checksum 000000ff 000000a8
1164 05:13:28.838854 UDP wrong checksum 000000ff 00009c9a
1165 05:13:44.580279 T T T T UDP wrong checksum 00000005 00000ab6
1166 05:13:59.584464 T T
1167 05:13:59.585131 Retry count exceeded; starting again
1169 05:13:59.586669 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1172 05:13:59.588844 end: 2.4 uboot-commands (duration 00:01:52) [common]
1174 05:13:59.590433 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1176 05:13:59.591608 end: 2 uboot-action (duration 00:01:52) [common]
1178 05:13:59.593286 Cleaning after the job
1179 05:13:59.593881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/ramdisk
1180 05:13:59.595265 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/kernel
1181 05:13:59.626556 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/dtb
1182 05:13:59.627871 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/nfsrootfs
1183 05:13:59.889416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/965275/tftp-deploy-islwe_rh/modules
1184 05:13:59.911482 start: 4.1 power-off (timeout 00:00:30) [common]
1185 05:13:59.912235 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1186 05:13:59.947516 >> OK - accepted request
1187 05:13:59.949661 Returned 0 in 0 seconds
1188 05:14:00.050499 end: 4.1 power-off (duration 00:00:00) [common]
1190 05:14:00.051576 start: 4.2 read-feedback (timeout 00:10:00) [common]
1191 05:14:00.052369 Listened to connection for namespace 'common' for up to 1s
1192 05:14:01.052714 Finalising connection for namespace 'common'
1193 05:14:01.053499 Disconnecting from shell: Finalise
1194 05:14:01.054064 =>
1195 05:14:01.155165 end: 4.2 read-feedback (duration 00:00:01) [common]
1196 05:14:01.155881 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/965275
1197 05:14:03.723217 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/965275
1198 05:14:03.723823 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.