Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:38:54.665363 lava-dispatcher, installed at version: 2024.01
2 22:38:54.666105 start: 0 validate
3 22:38:54.666552 Start time: 2024-11-11 22:38:54.666523+00:00 (UTC)
4 22:38:54.667095 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:38:54.667611 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 22:38:54.705435 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:38:54.705993 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:38:54.737555 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:38:54.738162 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:38:55.790887 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:38:55.791387 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 22:38:55.830241 validate duration: 1.16
14 22:38:55.831120 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 22:38:55.831448 start: 1.1 download-retry (timeout 00:10:00) [common]
16 22:38:55.831927 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 22:38:55.832600 Not decompressing ramdisk as can be used compressed.
18 22:38:55.833038 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 22:38:55.833312 saving as /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/ramdisk/rootfs.cpio.gz
20 22:38:55.833596 total size: 8181887 (7 MB)
21 22:38:55.868183 progress 0 % (0 MB)
22 22:38:55.879829 progress 5 % (0 MB)
23 22:38:55.891060 progress 10 % (0 MB)
24 22:38:55.901272 progress 15 % (1 MB)
25 22:38:55.906459 progress 20 % (1 MB)
26 22:38:55.912570 progress 25 % (1 MB)
27 22:38:55.917788 progress 30 % (2 MB)
28 22:38:55.923386 progress 35 % (2 MB)
29 22:38:55.928578 progress 40 % (3 MB)
30 22:38:55.934106 progress 45 % (3 MB)
31 22:38:55.939286 progress 50 % (3 MB)
32 22:38:55.944878 progress 55 % (4 MB)
33 22:38:55.950018 progress 60 % (4 MB)
34 22:38:55.955592 progress 65 % (5 MB)
35 22:38:55.960741 progress 70 % (5 MB)
36 22:38:55.966226 progress 75 % (5 MB)
37 22:38:55.971322 progress 80 % (6 MB)
38 22:38:55.976796 progress 85 % (6 MB)
39 22:38:55.982001 progress 90 % (7 MB)
40 22:38:55.987212 progress 95 % (7 MB)
41 22:38:55.991925 progress 100 % (7 MB)
42 22:38:55.992617 7 MB downloaded in 0.16 s (49.07 MB/s)
43 22:38:55.993162 end: 1.1.1 http-download (duration 00:00:00) [common]
45 22:38:55.994095 end: 1.1 download-retry (duration 00:00:00) [common]
46 22:38:55.994410 start: 1.2 download-retry (timeout 00:10:00) [common]
47 22:38:55.994692 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 22:38:55.995179 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/kernel/Image
49 22:38:55.995454 saving as /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/kernel/Image
50 22:38:55.995673 total size: 45713920 (43 MB)
51 22:38:55.995891 No compression specified
52 22:38:56.027770 progress 0 % (0 MB)
53 22:38:56.054831 progress 5 % (2 MB)
54 22:38:56.082270 progress 10 % (4 MB)
55 22:38:56.110237 progress 15 % (6 MB)
56 22:38:56.137325 progress 20 % (8 MB)
57 22:38:56.164190 progress 25 % (10 MB)
58 22:38:56.191325 progress 30 % (13 MB)
59 22:38:56.218420 progress 35 % (15 MB)
60 22:38:56.245528 progress 40 % (17 MB)
61 22:38:56.272458 progress 45 % (19 MB)
62 22:38:56.299639 progress 50 % (21 MB)
63 22:38:56.327533 progress 55 % (24 MB)
64 22:38:56.354958 progress 60 % (26 MB)
65 22:38:56.382348 progress 65 % (28 MB)
66 22:38:56.409606 progress 70 % (30 MB)
67 22:38:56.436735 progress 75 % (32 MB)
68 22:38:56.464026 progress 80 % (34 MB)
69 22:38:56.490750 progress 85 % (37 MB)
70 22:38:56.517904 progress 90 % (39 MB)
71 22:38:56.545138 progress 95 % (41 MB)
72 22:38:56.571603 progress 100 % (43 MB)
73 22:38:56.572187 43 MB downloaded in 0.58 s (75.62 MB/s)
74 22:38:56.572688 end: 1.2.1 http-download (duration 00:00:01) [common]
76 22:38:56.573526 end: 1.2 download-retry (duration 00:00:01) [common]
77 22:38:56.573816 start: 1.3 download-retry (timeout 00:09:59) [common]
78 22:38:56.574089 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 22:38:56.574585 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 22:38:56.574872 saving as /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 22:38:56.575089 total size: 53209 (0 MB)
82 22:38:56.575308 No compression specified
83 22:38:56.613449 progress 61 % (0 MB)
84 22:38:56.614293 progress 100 % (0 MB)
85 22:38:56.614855 0 MB downloaded in 0.04 s (1.28 MB/s)
86 22:38:56.615347 end: 1.3.1 http-download (duration 00:00:00) [common]
88 22:38:56.616270 end: 1.3 download-retry (duration 00:00:00) [common]
89 22:38:56.616564 start: 1.4 download-retry (timeout 00:09:59) [common]
90 22:38:56.616847 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 22:38:56.617341 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/modules.tar.xz
92 22:38:56.617614 saving as /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/modules/modules.tar
93 22:38:56.617835 total size: 11609460 (11 MB)
94 22:38:56.618059 Using unxz to decompress xz
95 22:38:56.653193 progress 0 % (0 MB)
96 22:38:56.719491 progress 5 % (0 MB)
97 22:38:56.794004 progress 10 % (1 MB)
98 22:38:56.890351 progress 15 % (1 MB)
99 22:38:56.982009 progress 20 % (2 MB)
100 22:38:57.063539 progress 25 % (2 MB)
101 22:38:57.140524 progress 30 % (3 MB)
102 22:38:57.220528 progress 35 % (3 MB)
103 22:38:57.293851 progress 40 % (4 MB)
104 22:38:57.371396 progress 45 % (5 MB)
105 22:38:57.456457 progress 50 % (5 MB)
106 22:38:57.534454 progress 55 % (6 MB)
107 22:38:57.620885 progress 60 % (6 MB)
108 22:38:57.702112 progress 65 % (7 MB)
109 22:38:57.783050 progress 70 % (7 MB)
110 22:38:57.861549 progress 75 % (8 MB)
111 22:38:57.945689 progress 80 % (8 MB)
112 22:38:58.026678 progress 85 % (9 MB)
113 22:38:58.105614 progress 90 % (9 MB)
114 22:38:58.183926 progress 95 % (10 MB)
115 22:38:58.261868 progress 100 % (11 MB)
116 22:38:58.273234 11 MB downloaded in 1.66 s (6.69 MB/s)
117 22:38:58.273862 end: 1.4.1 http-download (duration 00:00:02) [common]
119 22:38:58.274680 end: 1.4 download-retry (duration 00:00:02) [common]
120 22:38:58.274949 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 22:38:58.275213 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 22:38:58.275457 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 22:38:58.275711 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 22:38:58.276589 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1
125 22:38:58.277518 makedir: /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin
126 22:38:58.278203 makedir: /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/tests
127 22:38:58.278872 makedir: /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/results
128 22:38:58.279549 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-add-keys
129 22:38:58.280618 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-add-sources
130 22:38:58.281663 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-background-process-start
131 22:38:58.282680 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-background-process-stop
132 22:38:58.283743 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-common-functions
133 22:38:58.284828 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-echo-ipv4
134 22:38:58.285863 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-install-packages
135 22:38:58.286978 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-installed-packages
136 22:38:58.288022 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-os-build
137 22:38:58.289043 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-probe-channel
138 22:38:58.290026 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-probe-ip
139 22:38:58.291004 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-target-ip
140 22:38:58.292012 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-target-mac
141 22:38:58.293019 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-target-storage
142 22:38:58.294012 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-case
143 22:38:58.294991 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-event
144 22:38:58.295960 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-feedback
145 22:38:58.296994 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-raise
146 22:38:58.297967 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-reference
147 22:38:58.298946 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-runner
148 22:38:58.299923 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-set
149 22:38:58.300964 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-test-shell
150 22:38:58.301957 Updating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-install-packages (oe)
151 22:38:58.303032 Updating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/bin/lava-installed-packages (oe)
152 22:38:58.303933 Creating /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/environment
153 22:38:58.304747 LAVA metadata
154 22:38:58.305281 - LAVA_JOB_ID=977194
155 22:38:58.305751 - LAVA_DISPATCHER_IP=192.168.6.2
156 22:38:58.306495 start: 1.5.2.1 ssh-authorize (timeout 00:09:58) [common]
157 22:38:58.308552 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 22:38:58.309187 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:58) [common]
159 22:38:58.309599 skipped lava-vland-overlay
160 22:38:58.310077 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 22:38:58.310577 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:58) [common]
162 22:38:58.310999 skipped lava-multinode-overlay
163 22:38:58.311472 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 22:38:58.311965 start: 1.5.2.4 test-definition (timeout 00:09:58) [common]
165 22:38:58.312472 Loading test definitions
166 22:38:58.313019 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:58) [common]
167 22:38:58.313453 Using /lava-977194 at stage 0
168 22:38:58.315767 uuid=977194_1.5.2.4.1 testdef=None
169 22:38:58.316285 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 22:38:58.316566 start: 1.5.2.4.2 test-overlay (timeout 00:09:58) [common]
171 22:38:58.318496 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 22:38:58.319320 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:58) [common]
174 22:38:58.321694 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 22:38:58.322542 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:58) [common]
177 22:38:58.324822 runner path: /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/0/tests/0_dmesg test_uuid 977194_1.5.2.4.1
178 22:38:58.325428 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 22:38:58.326207 Creating lava-test-runner.conf files
181 22:38:58.326411 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977194/lava-overlay-n9hxrmx1/lava-977194/0 for stage 0
182 22:38:58.326770 - 0_dmesg
183 22:38:58.327132 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 22:38:58.327411 start: 1.5.2.5 compress-overlay (timeout 00:09:58) [common]
185 22:38:58.352259 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 22:38:58.352717 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 22:38:58.352981 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 22:38:58.353250 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 22:38:58.353514 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 22:38:59.279963 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 22:38:59.280792 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
192 22:38:59.281326 extracting modules file /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk
193 22:39:00.786971 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 22:39:00.787494 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 22:39:00.787777 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977194/compress-overlay-oqfh2v18/overlay-1.5.2.5.tar.gz to ramdisk
196 22:39:00.788011 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977194/compress-overlay-oqfh2v18/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk
197 22:39:00.819284 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 22:39:00.819760 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 22:39:00.820072 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 22:39:00.820315 Converting downloaded kernel to a uImage
201 22:39:00.820634 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/kernel/Image /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/kernel/uImage
202 22:39:01.295356 output: Image Name:
203 22:39:01.295862 output: Created: Mon Nov 11 22:39:00 2024
204 22:39:01.296183 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 22:39:01.296440 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 22:39:01.296685 output: Load Address: 01080000
207 22:39:01.296919 output: Entry Point: 01080000
208 22:39:01.297160 output:
209 22:39:01.297568 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 22:39:01.297896 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 22:39:01.298231 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 22:39:01.298538 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 22:39:01.298854 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 22:39:01.299180 Building ramdisk /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk
215 22:39:03.800569 >> 181576 blocks
216 22:39:12.327742 Adding RAMdisk u-boot header.
217 22:39:12.328226 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk.cpio.gz.uboot
218 22:39:12.609613 output: Image Name:
219 22:39:12.610037 output: Created: Mon Nov 11 22:39:12 2024
220 22:39:12.610457 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 22:39:12.610874 output: Data Size: 26054265 Bytes = 25443.62 KiB = 24.85 MiB
222 22:39:12.611275 output: Load Address: 00000000
223 22:39:12.611669 output: Entry Point: 00000000
224 22:39:12.612110 output:
225 22:39:12.613214 rename /var/lib/lava/dispatcher/tmp/977194/extract-overlay-ramdisk-nbmkcuf_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
226 22:39:12.613934 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 22:39:12.614475 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 22:39:12.615002 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 22:39:12.615456 No LXC device requested
230 22:39:12.615959 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 22:39:12.616517 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 22:39:12.617015 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 22:39:12.617438 Checking files for TFTP limit of 4294967296 bytes.
234 22:39:12.620101 end: 1 tftp-deploy (duration 00:00:17) [common]
235 22:39:12.620678 start: 2 uboot-action (timeout 00:05:00) [common]
236 22:39:12.621205 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 22:39:12.621711 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 22:39:12.622213 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 22:39:12.622738 Using kernel file from prepare-kernel: 977194/tftp-deploy-k1ux5kty/kernel/uImage
240 22:39:12.623341 substitutions:
241 22:39:12.623747 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 22:39:12.624183 - {DTB_ADDR}: 0x01070000
243 22:39:12.624583 - {DTB}: 977194/tftp-deploy-k1ux5kty/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 22:39:12.624983 - {INITRD}: 977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
245 22:39:12.625379 - {KERNEL_ADDR}: 0x01080000
246 22:39:12.625770 - {KERNEL}: 977194/tftp-deploy-k1ux5kty/kernel/uImage
247 22:39:12.626163 - {LAVA_MAC}: None
248 22:39:12.626595 - {PRESEED_CONFIG}: None
249 22:39:12.626990 - {PRESEED_LOCAL}: None
250 22:39:12.627378 - {RAMDISK_ADDR}: 0x08000000
251 22:39:12.627760 - {RAMDISK}: 977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
252 22:39:12.628190 - {ROOT_PART}: None
253 22:39:12.628583 - {ROOT}: None
254 22:39:12.628971 - {SERVER_IP}: 192.168.6.2
255 22:39:12.629365 - {TEE_ADDR}: 0x83000000
256 22:39:12.629749 - {TEE}: None
257 22:39:12.630137 Parsed boot commands:
258 22:39:12.630517 - setenv autoload no
259 22:39:12.630906 - setenv initrd_high 0xffffffff
260 22:39:12.631293 - setenv fdt_high 0xffffffff
261 22:39:12.631680 - dhcp
262 22:39:12.632095 - setenv serverip 192.168.6.2
263 22:39:12.632490 - tftpboot 0x01080000 977194/tftp-deploy-k1ux5kty/kernel/uImage
264 22:39:12.632886 - tftpboot 0x08000000 977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
265 22:39:12.633274 - tftpboot 0x01070000 977194/tftp-deploy-k1ux5kty/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 22:39:12.633660 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 22:39:12.634054 - bootm 0x01080000 0x08000000 0x01070000
268 22:39:12.634551 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 22:39:12.636052 start: 2.3 connect-device (timeout 00:05:00) [common]
271 22:39:12.636509 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 22:39:12.650064 Setting prompt string to ['lava-test: # ']
273 22:39:12.651525 end: 2.3 connect-device (duration 00:00:00) [common]
274 22:39:12.652165 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 22:39:12.652742 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 22:39:12.653284 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 22:39:12.654406 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 22:39:12.701612 >> OK - accepted request
279 22:39:12.703806 Returned 0 in 0 seconds
280 22:39:12.804992 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 22:39:12.806642 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 22:39:12.807221 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 22:39:12.807721 Setting prompt string to ['Hit any key to stop autoboot']
285 22:39:12.808233 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 22:39:12.809807 Trying 192.168.56.21...
287 22:39:12.810303 Connected to conserv1.
288 22:39:12.810728 Escape character is '^]'.
289 22:39:12.811157
290 22:39:12.811589 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 22:39:12.812043
292 22:39:20.237922 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 22:39:20.238558 bl2_stage_init 0x01
294 22:39:20.239002 bl2_stage_init 0x81
295 22:39:20.243446 hw id: 0x0000 - pwm id 0x01
296 22:39:20.243921 bl2_stage_init 0xc1
297 22:39:20.246928 bl2_stage_init 0x02
298 22:39:20.247379
299 22:39:20.247802 L0:00000000
300 22:39:20.248246 L1:00000703
301 22:39:20.252475 L2:00008067
302 22:39:20.252912 L3:15000000
303 22:39:20.253318 S1:00000000
304 22:39:20.253717 B2:20282000
305 22:39:20.254108 B1:a0f83180
306 22:39:20.254498
307 22:39:20.258174 TE: 70511
308 22:39:20.258610
309 22:39:20.263780 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 22:39:20.264261
311 22:39:20.264670 Board ID = 1
312 22:39:20.265070 Set cpu clk to 24M
313 22:39:20.269305 Set clk81 to 24M
314 22:39:20.269730 Use GP1_pll as DSU clk.
315 22:39:20.270133 DSU clk: 1200 Mhz
316 22:39:20.274912 CPU clk: 1200 MHz
317 22:39:20.275364 Set clk81 to 166.6M
318 22:39:20.280539 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 22:39:20.280990 board id: 1
320 22:39:20.289669 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 22:39:20.300514 fw parse done
322 22:39:20.306474 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 22:39:20.349613 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 22:39:20.360786 PIEI prepare done
325 22:39:20.361283 fastboot data load
326 22:39:20.361706 fastboot data verify
327 22:39:20.366328 verify result: 266
328 22:39:20.371947 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 22:39:20.372445 LPDDR4 probe
330 22:39:20.372856 ddr clk to 1584MHz
331 22:39:20.379925 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 22:39:20.417852
333 22:39:20.418314 dmc_version 0001
334 22:39:20.424714 Check phy result
335 22:39:20.430678 INFO : End of CA training
336 22:39:20.431138 INFO : End of initialization
337 22:39:20.436295 INFO : Training has run successfully!
338 22:39:20.436739 Check phy result
339 22:39:20.441870 INFO : End of initialization
340 22:39:20.442356 INFO : End of read enable training
341 22:39:20.447465 INFO : End of fine write leveling
342 22:39:20.453057 INFO : End of Write leveling coarse delay
343 22:39:20.453499 INFO : Training has run successfully!
344 22:39:20.453926 Check phy result
345 22:39:20.458638 INFO : End of initialization
346 22:39:20.459092 INFO : End of read dq deskew training
347 22:39:20.464249 INFO : End of MPR read delay center optimization
348 22:39:20.469858 INFO : End of write delay center optimization
349 22:39:20.475464 INFO : End of read delay center optimization
350 22:39:20.475908 INFO : End of max read latency training
351 22:39:20.481038 INFO : Training has run successfully!
352 22:39:20.481490 1D training succeed
353 22:39:20.490264 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 22:39:20.538726 Check phy result
355 22:39:20.539274 INFO : End of initialization
356 22:39:20.566090 INFO : End of 2D read delay Voltage center optimization
357 22:39:20.590105 INFO : End of 2D read delay Voltage center optimization
358 22:39:20.646888 INFO : End of 2D write delay Voltage center optimization
359 22:39:20.700793 INFO : End of 2D write delay Voltage center optimization
360 22:39:20.706413 INFO : Training has run successfully!
361 22:39:20.706870
362 22:39:20.707279 channel==0
363 22:39:20.711954 RxClkDly_Margin_A0==88 ps 9
364 22:39:20.712435 TxDqDly_Margin_A0==88 ps 9
365 22:39:20.717652 RxClkDly_Margin_A1==88 ps 9
366 22:39:20.718089 TxDqDly_Margin_A1==98 ps 10
367 22:39:20.718493 TrainedVREFDQ_A0==74
368 22:39:20.723168 TrainedVREFDQ_A1==74
369 22:39:20.723623 VrefDac_Margin_A0==24
370 22:39:20.724054 DeviceVref_Margin_A0==40
371 22:39:20.728789 VrefDac_Margin_A1==22
372 22:39:20.729295 DeviceVref_Margin_A1==40
373 22:39:20.729712
374 22:39:20.730113
375 22:39:20.730510 channel==1
376 22:39:20.734364 RxClkDly_Margin_A0==78 ps 8
377 22:39:20.734802 TxDqDly_Margin_A0==88 ps 9
378 22:39:20.739946 RxClkDly_Margin_A1==88 ps 9
379 22:39:20.740410 TxDqDly_Margin_A1==78 ps 8
380 22:39:20.745663 TrainedVREFDQ_A0==75
381 22:39:20.746100 TrainedVREFDQ_A1==75
382 22:39:20.746503 VrefDac_Margin_A0==22
383 22:39:20.751171 DeviceVref_Margin_A0==39
384 22:39:20.751606 VrefDac_Margin_A1==23
385 22:39:20.752034 DeviceVref_Margin_A1==38
386 22:39:20.756758
387 22:39:20.757199 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 22:39:20.757601
389 22:39:20.790386 soc_vref_reg_value 0x 00000019 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000019 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000062
390 22:39:20.790968 2D training succeed
391 22:39:20.795930 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 22:39:20.801657 auto size-- 65535DDR cs0 size: 2048MB
393 22:39:20.802095 DDR cs1 size: 2048MB
394 22:39:20.807177 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 22:39:20.807621 cs0 DataBus test pass
396 22:39:20.812761 cs1 DataBus test pass
397 22:39:20.813200 cs0 AddrBus test pass
398 22:39:20.813597 cs1 AddrBus test pass
399 22:39:20.813987
400 22:39:20.818358 100bdlr_step_size ps== 471
401 22:39:20.818804 result report
402 22:39:20.823952 boot times 0Enable ddr reg access
403 22:39:20.829076 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 22:39:20.842939 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 22:39:21.503862 bl2z: ptr: 05129330, size: 00001e40
406 22:39:21.511807 0.0;M3 CHK:0;cm4_sp_mode 0
407 22:39:21.512316 MVN_1=0x00000000
408 22:39:21.512729 MVN_2=0x00000000
409 22:39:21.523248 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 22:39:21.523704 OPS=0x04
411 22:39:21.524154 ring efuse init
412 22:39:21.526171 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 22:39:21.532261 [0.017354 Inits done]
414 22:39:21.532769 secure task start!
415 22:39:21.533182 high task start!
416 22:39:21.533580 low task start!
417 22:39:21.536545 run into bl31
418 22:39:21.545189 NOTICE: BL31: v1.3(release):4fc40b1
419 22:39:21.552987 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 22:39:21.553450 NOTICE: BL31: G12A normal boot!
421 22:39:21.568497 NOTICE: BL31: BL33 decompress pass
422 22:39:21.574183 ERROR: Error initializing runtime service opteed_fast
423 22:39:24.286409 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 22:39:24.287043 bl2_stage_init 0x01
425 22:39:24.287478 bl2_stage_init 0x81
426 22:39:24.292026 hw id: 0x0000 - pwm id 0x01
427 22:39:24.292504 bl2_stage_init 0xc1
428 22:39:24.297608 bl2_stage_init 0x02
429 22:39:24.298115
430 22:39:24.298518 L0:00000000
431 22:39:24.298909 L1:00000703
432 22:39:24.299296 L2:00008067
433 22:39:24.299680 L3:15000000
434 22:39:24.303157 S1:00000000
435 22:39:24.303579 B2:20282000
436 22:39:24.303967 B1:a0f83180
437 22:39:24.304385
438 22:39:24.304769 TE: 69383
439 22:39:24.305153
440 22:39:24.308769 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 22:39:24.309196
442 22:39:24.314362 Board ID = 1
443 22:39:24.314779 Set cpu clk to 24M
444 22:39:24.315163 Set clk81 to 24M
445 22:39:24.320038 Use GP1_pll as DSU clk.
446 22:39:24.320473 DSU clk: 1200 Mhz
447 22:39:24.320863 CPU clk: 1200 MHz
448 22:39:24.325565 Set clk81 to 166.6M
449 22:39:24.331142 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 22:39:24.331561 board id: 1
451 22:39:24.338358 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 22:39:24.349098 fw parse done
453 22:39:24.354982 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 22:39:24.396748 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 22:39:24.408728 PIEI prepare done
456 22:39:24.409265 fastboot data load
457 22:39:24.409670 fastboot data verify
458 22:39:24.414146 verify result: 266
459 22:39:24.419756 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 22:39:24.420254 LPDDR4 probe
461 22:39:24.420648 ddr clk to 1584MHz
462 22:39:24.427716 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 22:39:24.465046
464 22:39:24.465622 dmc_version 0001
465 22:39:24.471629 Check phy result
466 22:39:24.477541 INFO : End of CA training
467 22:39:24.477981 INFO : End of initialization
468 22:39:24.483179 INFO : Training has run successfully!
469 22:39:24.483730 Check phy result
470 22:39:24.488759 INFO : End of initialization
471 22:39:24.489219 INFO : End of read enable training
472 22:39:24.494405 INFO : End of fine write leveling
473 22:39:24.499957 INFO : End of Write leveling coarse delay
474 22:39:24.500416 INFO : Training has run successfully!
475 22:39:24.500821 Check phy result
476 22:39:24.505560 INFO : End of initialization
477 22:39:24.505989 INFO : End of read dq deskew training
478 22:39:24.511154 INFO : End of MPR read delay center optimization
479 22:39:24.516736 INFO : End of write delay center optimization
480 22:39:24.522342 INFO : End of read delay center optimization
481 22:39:24.522764 INFO : End of max read latency training
482 22:39:24.527957 INFO : Training has run successfully!
483 22:39:24.528417 1D training succeed
484 22:39:24.537218 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 22:39:24.584807 Check phy result
486 22:39:24.585402 INFO : End of initialization
487 22:39:24.607105 INFO : End of 2D read delay Voltage center optimization
488 22:39:24.626262 INFO : End of 2D read delay Voltage center optimization
489 22:39:24.678128 INFO : End of 2D write delay Voltage center optimization
490 22:39:24.727293 INFO : End of 2D write delay Voltage center optimization
491 22:39:24.732885 INFO : Training has run successfully!
492 22:39:24.733345
493 22:39:24.733753 channel==0
494 22:39:24.738486 RxClkDly_Margin_A0==88 ps 9
495 22:39:24.738926 TxDqDly_Margin_A0==88 ps 9
496 22:39:24.744074 RxClkDly_Margin_A1==88 ps 9
497 22:39:24.744579 TxDqDly_Margin_A1==98 ps 10
498 22:39:24.745001 TrainedVREFDQ_A0==74
499 22:39:24.749715 TrainedVREFDQ_A1==74
500 22:39:24.750164 VrefDac_Margin_A0==24
501 22:39:24.750569 DeviceVref_Margin_A0==40
502 22:39:24.755302 VrefDac_Margin_A1==23
503 22:39:24.755734 DeviceVref_Margin_A1==40
504 22:39:24.756177
505 22:39:24.756576
506 22:39:24.756970 channel==1
507 22:39:24.760881 RxClkDly_Margin_A0==78 ps 8
508 22:39:24.761305 TxDqDly_Margin_A0==88 ps 9
509 22:39:24.766562 RxClkDly_Margin_A1==78 ps 8
510 22:39:24.766994 TxDqDly_Margin_A1==88 ps 9
511 22:39:24.772234 TrainedVREFDQ_A0==76
512 22:39:24.772666 TrainedVREFDQ_A1==75
513 22:39:24.773074 VrefDac_Margin_A0==22
514 22:39:24.777694 DeviceVref_Margin_A0==38
515 22:39:24.778137 VrefDac_Margin_A1==22
516 22:39:24.778539 DeviceVref_Margin_A1==39
517 22:39:24.783293
518 22:39:24.783725 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 22:39:24.784163
520 22:39:24.816874 soc_vref_reg_value 0x 00000019 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000019 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
521 22:39:24.817417 2D training succeed
522 22:39:24.822470 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 22:39:24.828083 auto size-- 65535DDR cs0 size: 2048MB
524 22:39:24.828556 DDR cs1 size: 2048MB
525 22:39:24.833698 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 22:39:24.834138 cs0 DataBus test pass
527 22:39:24.839274 cs1 DataBus test pass
528 22:39:24.839708 cs0 AddrBus test pass
529 22:39:24.840147 cs1 AddrBus test pass
530 22:39:24.840545
531 22:39:24.844911 100bdlr_step_size ps== 478
532 22:39:24.845420 result report
533 22:39:24.850485 boot times 0Enable ddr reg access
534 22:39:24.855554 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 22:39:24.869427 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 22:39:25.526172 bl2z: ptr: 05129330, size: 00001e40
537 22:39:25.533655 0.0;M3 CHK:0;cm4_sp_mode 0
538 22:39:25.534122 MVN_1=0x00000000
539 22:39:25.534531 MVN_2=0x00000000
540 22:39:25.545024 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 22:39:25.545552 OPS=0x04
542 22:39:25.545975 ring efuse init
543 22:39:25.547901 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 22:39:25.554378 [0.017319 Inits done]
545 22:39:25.554909 secure task start!
546 22:39:25.555324 high task start!
547 22:39:25.555726 low task start!
548 22:39:25.558651 run into bl31
549 22:39:25.567319 NOTICE: BL31: v1.3(release):4fc40b1
550 22:39:25.575071 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 22:39:25.575547 NOTICE: BL31: G12A normal boot!
552 22:39:25.590555 NOTICE: BL31: BL33 decompress pass
553 22:39:25.596235 ERROR: Error initializing runtime service opteed_fast
554 22:39:26.989637 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 22:39:26.990222 bl2_stage_init 0x01
556 22:39:26.990639 bl2_stage_init 0x81
557 22:39:26.995160 hw id: 0x0000 - pwm id 0x01
558 22:39:26.995612 bl2_stage_init 0xc1
559 22:39:27.000842 bl2_stage_init 0x02
560 22:39:27.001288
561 22:39:27.001702 L0:00000000
562 22:39:27.002105 L1:00000703
563 22:39:27.002500 L2:00008067
564 22:39:27.002899 L3:15000000
565 22:39:27.006438 S1:00000000
566 22:39:27.006874 B2:20282000
567 22:39:27.007279 B1:a0f83180
568 22:39:27.007674
569 22:39:27.008106 TE: 70966
570 22:39:27.008509
571 22:39:27.011967 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 22:39:27.012433
573 22:39:27.017604 Board ID = 1
574 22:39:27.018054 Set cpu clk to 24M
575 22:39:27.018454 Set clk81 to 24M
576 22:39:27.023776 Use GP1_pll as DSU clk.
577 22:39:27.024271 DSU clk: 1200 Mhz
578 22:39:27.024677 CPU clk: 1200 MHz
579 22:39:27.028799 Set clk81 to 166.6M
580 22:39:27.034425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 22:39:27.034861 board id: 1
582 22:39:27.041612 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 22:39:27.052264 fw parse done
584 22:39:27.058287 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 22:39:27.100935 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 22:39:27.111822 PIEI prepare done
587 22:39:27.112308 fastboot data load
588 22:39:27.112723 fastboot data verify
589 22:39:27.117405 verify result: 266
590 22:39:27.123006 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 22:39:27.123449 LPDDR4 probe
592 22:39:27.123855 ddr clk to 1584MHz
593 22:39:27.130978 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 22:39:27.168283
595 22:39:27.168805 dmc_version 0001
596 22:39:27.174940 Check phy result
597 22:39:27.180836 INFO : End of CA training
598 22:39:27.181277 INFO : End of initialization
599 22:39:27.186434 INFO : Training has run successfully!
600 22:39:27.186889 Check phy result
601 22:39:27.192073 INFO : End of initialization
602 22:39:27.192529 INFO : End of read enable training
603 22:39:27.197666 INFO : End of fine write leveling
604 22:39:27.203230 INFO : End of Write leveling coarse delay
605 22:39:27.203664 INFO : Training has run successfully!
606 22:39:27.204100 Check phy result
607 22:39:27.208828 INFO : End of initialization
608 22:39:27.209258 INFO : End of read dq deskew training
609 22:39:27.214420 INFO : End of MPR read delay center optimization
610 22:39:27.220057 INFO : End of write delay center optimization
611 22:39:27.225644 INFO : End of read delay center optimization
612 22:39:27.226079 INFO : End of max read latency training
613 22:39:27.231206 INFO : Training has run successfully!
614 22:39:27.231632 1D training succeed
615 22:39:27.240415 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 22:39:27.288069 Check phy result
617 22:39:27.288601 INFO : End of initialization
618 22:39:27.310421 INFO : End of 2D read delay Voltage center optimization
619 22:39:27.329542 INFO : End of 2D read delay Voltage center optimization
620 22:39:27.381503 INFO : End of 2D write delay Voltage center optimization
621 22:39:27.430714 INFO : End of 2D write delay Voltage center optimization
622 22:39:27.436205 INFO : Training has run successfully!
623 22:39:27.436657
624 22:39:27.437075 channel==0
625 22:39:27.441817 RxClkDly_Margin_A0==78 ps 8
626 22:39:27.442317 TxDqDly_Margin_A0==98 ps 10
627 22:39:27.447349 RxClkDly_Margin_A1==69 ps 7
628 22:39:27.447793 TxDqDly_Margin_A1==88 ps 9
629 22:39:27.448249 TrainedVREFDQ_A0==76
630 22:39:27.452943 TrainedVREFDQ_A1==74
631 22:39:27.453376 VrefDac_Margin_A0==25
632 22:39:27.453777 DeviceVref_Margin_A0==38
633 22:39:27.458576 VrefDac_Margin_A1==23
634 22:39:27.459044 DeviceVref_Margin_A1==40
635 22:39:27.459453
636 22:39:27.459856
637 22:39:27.460287 channel==1
638 22:39:27.464198 RxClkDly_Margin_A0==88 ps 9
639 22:39:27.464643 TxDqDly_Margin_A0==78 ps 8
640 22:39:27.469725 RxClkDly_Margin_A1==78 ps 8
641 22:39:27.470157 TxDqDly_Margin_A1==88 ps 9
642 22:39:27.475360 TrainedVREFDQ_A0==77
643 22:39:27.475800 TrainedVREFDQ_A1==78
644 22:39:27.476240 VrefDac_Margin_A0==23
645 22:39:27.480947 DeviceVref_Margin_A0==37
646 22:39:27.481382 VrefDac_Margin_A1==23
647 22:39:27.481781 DeviceVref_Margin_A1==36
648 22:39:27.486541
649 22:39:27.486993 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 22:39:27.487397
651 22:39:27.520158 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
652 22:39:27.520658 2D training succeed
653 22:39:27.525743 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 22:39:27.531341 auto size-- 65535DDR cs0 size: 2048MB
655 22:39:27.531780 DDR cs1 size: 2048MB
656 22:39:27.536924 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 22:39:27.537361 cs0 DataBus test pass
658 22:39:27.542567 cs1 DataBus test pass
659 22:39:27.543039 cs0 AddrBus test pass
660 22:39:27.543449 cs1 AddrBus test pass
661 22:39:27.543842
662 22:39:27.548159 100bdlr_step_size ps== 478
663 22:39:27.548622 result report
664 22:39:27.553736 boot times 0Enable ddr reg access
665 22:39:27.558861 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 22:39:27.572644 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 22:39:28.227416 bl2z: ptr: 05129330, size: 00001e40
668 22:39:28.234031 0.0;M3 CHK:0;cm4_sp_mode 0
669 22:39:28.234596 MVN_1=0x00000000
670 22:39:28.235032 MVN_2=0x00000000
671 22:39:28.245490 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 22:39:28.246026 OPS=0x04
673 22:39:28.246457 ring efuse init
674 22:39:28.251170 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 22:39:28.251689 [0.017319 Inits done]
676 22:39:28.252148 secure task start!
677 22:39:28.258403 high task start!
678 22:39:28.258904 low task start!
679 22:39:28.259326 run into bl31
680 22:39:28.267023 NOTICE: BL31: v1.3(release):4fc40b1
681 22:39:28.274829 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 22:39:28.275337 NOTICE: BL31: G12A normal boot!
683 22:39:28.290451 NOTICE: BL31: BL33 decompress pass
684 22:39:28.296096 ERROR: Error initializing runtime service opteed_fast
685 22:39:29.090300
686 22:39:29.090934
687 22:39:29.095632 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 22:39:29.096154
689 22:39:29.099118 Model: Libre Computer AML-S905D3-CC Solitude
690 22:39:29.246052 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 22:39:29.261380 DRAM: 2 GiB (effective 3.8 GiB)
692 22:39:29.362321 Core: 406 devices, 33 uclasses, devicetree: separate
693 22:39:29.368272 WDT: Not starting watchdog@f0d0
694 22:39:29.393349 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 22:39:29.405632 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 22:39:29.409554 ** Bad device specification mmc 0 **
697 22:39:29.420444 Card did not respond to voltage select! : -110
698 22:39:29.427327 ** Bad device specification mmc 0 **
699 22:39:29.427798 Couldn't find partition mmc 0
700 22:39:29.436562 Card did not respond to voltage select! : -110
701 22:39:29.442052 ** Bad device specification mmc 0 **
702 22:39:29.442530 Couldn't find partition mmc 0
703 22:39:29.446235 Error: could not access storage.
704 22:39:29.743482 Net: eth0: ethernet@ff3f0000
705 22:39:29.744111 starting USB...
706 22:39:29.988085 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 22:39:29.988458 Starting the controller
708 22:39:29.995031 USB XHCI 1.10
709 22:39:31.549091 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 22:39:31.557083 scanning usb for storage devices... 0 Storage Device(s) found
712 22:39:31.608134 Hit any key to stop autoboot: 1
713 22:39:31.609310 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 22:39:31.610080 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 22:39:31.610513 Setting prompt string to ['=>']
716 22:39:31.610914 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 22:39:31.623152 0
718 22:39:31.623949 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 22:39:31.725050 => setenv autoload no
721 22:39:31.725817 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 22:39:31.730287 setenv autoload no
724 22:39:31.831335 => setenv initrd_high 0xffffffff
725 22:39:31.832178 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 22:39:31.836525 setenv initrd_high 0xffffffff
728 22:39:31.937804 => setenv fdt_high 0xffffffff
729 22:39:31.938372 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 22:39:31.942927 setenv fdt_high 0xffffffff
732 22:39:32.044017 => dhcp
733 22:39:32.044540 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 22:39:32.049300 dhcp
735 22:39:32.654744 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 22:39:32.655159 Speed: 1000, full duplex
737 22:39:32.655433 BOOTP broadcast 1
738 22:39:32.903529 BOOTP broadcast 2
739 22:39:32.914902 DHCP client bound to address 192.168.6.21 (259 ms)
741 22:39:33.016400 => setenv serverip 192.168.6.2
742 22:39:33.017336 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
743 22:39:33.021696 setenv serverip 192.168.6.2
745 22:39:33.123153 => tftpboot 0x01080000 977194/tftp-deploy-k1ux5kty/kernel/uImage
746 22:39:33.124115 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
747 22:39:33.130803 tftpboot 0x01080000 977194/tftp-deploy-k1ux5kty/kernel/uImage
748 22:39:33.131253 Speed: 1000, full duplex
749 22:39:33.131652 Using ethernet@ff3f0000 device
750 22:39:33.136161 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
751 22:39:33.141654 Filename '977194/tftp-deploy-k1ux5kty/kernel/uImage'.
752 22:39:33.145608 Load address: 0x1080000
753 22:39:35.975264 Loading: *################################################## 43.6 MiB
754 22:39:35.975754 15.4 MiB/s
755 22:39:35.976138 done
756 22:39:35.979782 Bytes transferred = 45713984 (2b98a40 hex)
758 22:39:36.081422 => tftpboot 0x08000000 977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
759 22:39:36.082168 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
760 22:39:36.088873 tftpboot 0x08000000 977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot
761 22:39:36.089394 Speed: 1000, full duplex
762 22:39:36.089789 Using ethernet@ff3f0000 device
763 22:39:36.094372 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
764 22:39:36.104218 Filename '977194/tftp-deploy-k1ux5kty/ramdisk/ramdisk.cpio.gz.uboot'.
765 22:39:36.104792 Load address: 0x8000000
766 22:39:37.751834 Loading: *################################################# UDP wrong checksum 00000005 0000c9de
767 22:39:42.753286 T UDP wrong checksum 00000005 0000c9de
768 22:39:52.755494 T T UDP wrong checksum 00000005 0000c9de
769 22:40:12.759566 T T T T UDP wrong checksum 00000005 0000c9de
770 22:40:32.764173 T T T
771 22:40:32.764756 Retry count exceeded; starting again
773 22:40:32.766162 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
776 22:40:32.767976 end: 2.4 uboot-commands (duration 00:01:20) [common]
778 22:40:32.769426 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
780 22:40:32.770425 end: 2 uboot-action (duration 00:01:20) [common]
782 22:40:32.771895 Cleaning after the job
783 22:40:32.772475 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/ramdisk
784 22:40:32.774256 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/kernel
785 22:40:32.818045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/dtb
786 22:40:32.818773 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977194/tftp-deploy-k1ux5kty/modules
787 22:40:32.836855 start: 4.1 power-off (timeout 00:00:30) [common]
788 22:40:32.837438 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
789 22:40:32.869549 >> OK - accepted request
790 22:40:32.871666 Returned 0 in 0 seconds
791 22:40:32.972690 end: 4.1 power-off (duration 00:00:00) [common]
793 22:40:32.974248 start: 4.2 read-feedback (timeout 00:10:00) [common]
794 22:40:32.975330 Listened to connection for namespace 'common' for up to 1s
795 22:40:33.975817 Finalising connection for namespace 'common'
796 22:40:33.976623 Disconnecting from shell: Finalise
797 22:40:33.977148 =>
798 22:40:34.078178 end: 4.2 read-feedback (duration 00:00:01) [common]
799 22:40:34.078861 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977194
800 22:40:34.349868 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977194
801 22:40:34.350464 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.