Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:01:34.844077 lava-dispatcher, installed at version: 2024.01
2 23:01:34.844901 start: 0 validate
3 23:01:34.845380 Start time: 2024-11-11 23:01:34.845350+00:00 (UTC)
4 23:01:34.845922 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:01:34.846455 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:01:34.891913 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:01:34.892495 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:01:34.920001 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:01:34.920668 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:01:34.951223 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:01:34.951740 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:01:34.982881 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:01:34.983389 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:01:35.022797 validate duration: 0.18
16 23:01:35.023650 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:01:35.023966 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:01:35.024303 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:01:35.024881 Not decompressing ramdisk as can be used compressed.
20 23:01:35.025322 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:01:35.025595 saving as /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/ramdisk/initrd.cpio.gz
22 23:01:35.025850 total size: 5628140 (5 MB)
23 23:01:35.066220 progress 0 % (0 MB)
24 23:01:35.074540 progress 5 % (0 MB)
25 23:01:35.082311 progress 10 % (0 MB)
26 23:01:35.088754 progress 15 % (0 MB)
27 23:01:35.092911 progress 20 % (1 MB)
28 23:01:35.096591 progress 25 % (1 MB)
29 23:01:35.100691 progress 30 % (1 MB)
30 23:01:35.104693 progress 35 % (1 MB)
31 23:01:35.108386 progress 40 % (2 MB)
32 23:01:35.112437 progress 45 % (2 MB)
33 23:01:35.116119 progress 50 % (2 MB)
34 23:01:35.120186 progress 55 % (2 MB)
35 23:01:35.124192 progress 60 % (3 MB)
36 23:01:35.127724 progress 65 % (3 MB)
37 23:01:35.131879 progress 70 % (3 MB)
38 23:01:35.135504 progress 75 % (4 MB)
39 23:01:35.139408 progress 80 % (4 MB)
40 23:01:35.142891 progress 85 % (4 MB)
41 23:01:35.146590 progress 90 % (4 MB)
42 23:01:35.150270 progress 95 % (5 MB)
43 23:01:35.153577 progress 100 % (5 MB)
44 23:01:35.154239 5 MB downloaded in 0.13 s (41.81 MB/s)
45 23:01:35.154800 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:01:35.155694 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:01:35.156004 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:01:35.156288 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:01:35.156750 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/kernel/Image
51 23:01:35.157020 saving as /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/kernel/Image
52 23:01:35.157233 total size: 45713920 (43 MB)
53 23:01:35.157444 No compression specified
54 23:01:35.196204 progress 0 % (0 MB)
55 23:01:35.224189 progress 5 % (2 MB)
56 23:01:35.251826 progress 10 % (4 MB)
57 23:01:35.279307 progress 15 % (6 MB)
58 23:01:35.307832 progress 20 % (8 MB)
59 23:01:35.337774 progress 25 % (10 MB)
60 23:01:35.370005 progress 30 % (13 MB)
61 23:01:35.398398 progress 35 % (15 MB)
62 23:01:35.426351 progress 40 % (17 MB)
63 23:01:35.453469 progress 45 % (19 MB)
64 23:01:35.481218 progress 50 % (21 MB)
65 23:01:35.508878 progress 55 % (24 MB)
66 23:01:35.536251 progress 60 % (26 MB)
67 23:01:35.563626 progress 65 % (28 MB)
68 23:01:35.591237 progress 70 % (30 MB)
69 23:01:35.618833 progress 75 % (32 MB)
70 23:01:35.646744 progress 80 % (34 MB)
71 23:01:35.674006 progress 85 % (37 MB)
72 23:01:35.701924 progress 90 % (39 MB)
73 23:01:35.729588 progress 95 % (41 MB)
74 23:01:35.756559 progress 100 % (43 MB)
75 23:01:35.757117 43 MB downloaded in 0.60 s (72.68 MB/s)
76 23:01:35.757599 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:01:35.758424 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:01:35.758699 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:01:35.758963 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:01:35.759421 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:01:35.759703 saving as /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:01:35.759910 total size: 54703 (0 MB)
84 23:01:35.760145 No compression specified
85 23:01:35.803834 progress 59 % (0 MB)
86 23:01:35.804733 progress 100 % (0 MB)
87 23:01:35.805289 0 MB downloaded in 0.05 s (1.15 MB/s)
88 23:01:35.805767 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:01:35.806588 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:01:35.806850 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:01:35.807113 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:01:35.807571 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:01:35.807818 saving as /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/nfsrootfs/full.rootfs.tar
95 23:01:35.808051 total size: 474398908 (452 MB)
96 23:01:35.808266 Using unxz to decompress xz
97 23:01:35.848216 progress 0 % (0 MB)
98 23:01:36.956139 progress 5 % (22 MB)
99 23:01:38.406356 progress 10 % (45 MB)
100 23:01:38.839527 progress 15 % (67 MB)
101 23:01:39.678508 progress 20 % (90 MB)
102 23:01:40.216827 progress 25 % (113 MB)
103 23:01:40.575276 progress 30 % (135 MB)
104 23:01:41.178431 progress 35 % (158 MB)
105 23:01:42.057167 progress 40 % (181 MB)
106 23:01:42.792305 progress 45 % (203 MB)
107 23:01:43.345058 progress 50 % (226 MB)
108 23:01:43.988726 progress 55 % (248 MB)
109 23:01:45.201383 progress 60 % (271 MB)
110 23:01:46.679575 progress 65 % (294 MB)
111 23:01:48.343237 progress 70 % (316 MB)
112 23:01:51.517010 progress 75 % (339 MB)
113 23:01:53.951764 progress 80 % (361 MB)
114 23:01:56.825697 progress 85 % (384 MB)
115 23:01:59.989768 progress 90 % (407 MB)
116 23:02:03.150331 progress 95 % (429 MB)
117 23:02:06.296141 progress 100 % (452 MB)
118 23:02:06.309214 452 MB downloaded in 30.50 s (14.83 MB/s)
119 23:02:06.310218 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:02:06.311953 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:02:06.312577 start: 1.5 download-retry (timeout 00:09:29) [common]
123 23:02:06.313136 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 23:02:06.314232 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/modules.tar.xz
125 23:02:06.314750 saving as /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/modules/modules.tar
126 23:02:06.315192 total size: 11609460 (11 MB)
127 23:02:06.315646 Using unxz to decompress xz
128 23:02:06.361802 progress 0 % (0 MB)
129 23:02:06.428044 progress 5 % (0 MB)
130 23:02:06.501807 progress 10 % (1 MB)
131 23:02:06.596603 progress 15 % (1 MB)
132 23:02:06.688351 progress 20 % (2 MB)
133 23:02:06.768546 progress 25 % (2 MB)
134 23:02:06.879973 progress 30 % (3 MB)
135 23:02:06.968910 progress 35 % (3 MB)
136 23:02:07.042549 progress 40 % (4 MB)
137 23:02:07.119632 progress 45 % (5 MB)
138 23:02:07.205415 progress 50 % (5 MB)
139 23:02:07.283673 progress 55 % (6 MB)
140 23:02:07.369274 progress 60 % (6 MB)
141 23:02:07.448695 progress 65 % (7 MB)
142 23:02:07.527920 progress 70 % (7 MB)
143 23:02:07.604881 progress 75 % (8 MB)
144 23:02:07.686886 progress 80 % (8 MB)
145 23:02:07.765983 progress 85 % (9 MB)
146 23:02:07.843655 progress 90 % (9 MB)
147 23:02:07.922699 progress 95 % (10 MB)
148 23:02:07.999118 progress 100 % (11 MB)
149 23:02:08.010370 11 MB downloaded in 1.70 s (6.53 MB/s)
150 23:02:08.011255 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:02:08.012968 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:02:08.013520 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 23:02:08.014065 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 23:02:24.253623 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977191/extract-nfsrootfs-kfxsri15
156 23:02:24.254232 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:02:24.254520 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:02:24.255236 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5
159 23:02:24.255694 makedir: /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin
160 23:02:24.256099 makedir: /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/tests
161 23:02:24.256442 makedir: /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/results
162 23:02:24.256776 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-add-keys
163 23:02:24.257304 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-add-sources
164 23:02:24.257817 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-background-process-start
165 23:02:24.258320 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-background-process-stop
166 23:02:24.258851 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-common-functions
167 23:02:24.259391 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-echo-ipv4
168 23:02:24.259917 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-install-packages
169 23:02:24.260480 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-installed-packages
170 23:02:24.260964 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-os-build
171 23:02:24.261438 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-probe-channel
172 23:02:24.261914 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-probe-ip
173 23:02:24.262387 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-target-ip
174 23:02:24.262854 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-target-mac
175 23:02:24.263342 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-target-storage
176 23:02:24.263851 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-case
177 23:02:24.264370 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-event
178 23:02:24.264848 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-feedback
179 23:02:24.265320 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-raise
180 23:02:24.265790 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-reference
181 23:02:24.266256 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-runner
182 23:02:24.266804 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-set
183 23:02:24.267310 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-test-shell
184 23:02:24.267822 Updating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-install-packages (oe)
185 23:02:24.268404 Updating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/bin/lava-installed-packages (oe)
186 23:02:24.268849 Creating /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/environment
187 23:02:24.269218 LAVA metadata
188 23:02:24.269476 - LAVA_JOB_ID=977191
189 23:02:24.269691 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:02:24.270042 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:02:24.270989 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:02:24.271299 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:02:24.271505 skipped lava-vland-overlay
194 23:02:24.271747 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:02:24.272032 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:02:24.272255 skipped lava-multinode-overlay
197 23:02:24.272499 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:02:24.272750 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:02:24.273001 Loading test definitions
200 23:02:24.273276 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:02:24.273496 Using /lava-977191 at stage 0
202 23:02:24.274623 uuid=977191_1.6.2.4.1 testdef=None
203 23:02:24.274924 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:02:24.275186 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:02:24.276949 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:02:24.277743 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:02:24.279867 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:02:24.280718 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:02:24.282770 runner path: /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 977191_1.6.2.4.1
212 23:02:24.283311 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:02:24.284091 Creating lava-test-runner.conf files
215 23:02:24.284297 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977191/lava-overlay-z9nv8cc5/lava-977191/0 for stage 0
216 23:02:24.284651 - 0_v4l2-decoder-conformance-h264
217 23:02:24.284996 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:02:24.285266 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:02:24.306616 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:02:24.306990 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:02:24.307246 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:02:24.307510 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:02:24.307771 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:02:24.919139 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:02:24.919614 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 23:02:24.919864 extracting modules file /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977191/extract-nfsrootfs-kfxsri15
227 23:02:26.269403 extracting modules file /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk
228 23:02:27.656516 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:02:27.656996 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 23:02:27.657276 [common] Applying overlay to NFS
231 23:02:27.657491 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977191/compress-overlay-okwpb1ij/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977191/extract-nfsrootfs-kfxsri15
232 23:02:27.686781 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:02:27.687147 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 23:02:27.687417 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 23:02:27.687643 Converting downloaded kernel to a uImage
236 23:02:27.687954 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/kernel/Image /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/kernel/uImage
237 23:02:28.166814 output: Image Name:
238 23:02:28.167240 output: Created: Mon Nov 11 23:02:27 2024
239 23:02:28.167450 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:02:28.167658 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:02:28.167862 output: Load Address: 01080000
242 23:02:28.168104 output: Entry Point: 01080000
243 23:02:28.168307 output:
244 23:02:28.168645 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:02:28.168912 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:02:28.169179 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 23:02:28.169430 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:02:28.169687 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 23:02:28.169940 Building ramdisk /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk
250 23:02:30.303905 >> 166793 blocks
251 23:02:38.005858 Adding RAMdisk u-boot header.
252 23:02:38.006565 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk.cpio.gz.uboot
253 23:02:38.315311 output: Image Name:
254 23:02:38.315761 output: Created: Mon Nov 11 23:02:38 2024
255 23:02:38.316049 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:02:38.316485 output: Data Size: 23432291 Bytes = 22883.10 KiB = 22.35 MiB
257 23:02:38.316893 output: Load Address: 00000000
258 23:02:38.317314 output: Entry Point: 00000000
259 23:02:38.317707 output:
260 23:02:38.318914 rename /var/lib/lava/dispatcher/tmp/977191/extract-overlay-ramdisk-rgnkmmya/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
261 23:02:38.319695 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:02:38.320291 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 23:02:38.320826 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 23:02:38.321304 No LXC device requested
265 23:02:38.321809 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:02:38.322312 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 23:02:38.322797 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:02:38.323205 Checking files for TFTP limit of 4294967296 bytes.
269 23:02:38.325916 end: 1 tftp-deploy (duration 00:01:03) [common]
270 23:02:38.326512 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:02:38.327028 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:02:38.327518 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:02:38.328044 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:02:38.328548 Using kernel file from prepare-kernel: 977191/tftp-deploy-ln07rslh/kernel/uImage
275 23:02:38.329169 substitutions:
276 23:02:38.329571 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:02:38.329969 - {DTB_ADDR}: 0x01070000
278 23:02:38.330363 - {DTB}: 977191/tftp-deploy-ln07rslh/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:02:38.330754 - {INITRD}: 977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
280 23:02:38.331146 - {KERNEL_ADDR}: 0x01080000
281 23:02:38.331533 - {KERNEL}: 977191/tftp-deploy-ln07rslh/kernel/uImage
282 23:02:38.331920 - {LAVA_MAC}: None
283 23:02:38.332370 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977191/extract-nfsrootfs-kfxsri15
284 23:02:38.332768 - {NFS_SERVER_IP}: 192.168.6.2
285 23:02:38.333155 - {PRESEED_CONFIG}: None
286 23:02:38.333543 - {PRESEED_LOCAL}: None
287 23:02:38.333930 - {RAMDISK_ADDR}: 0x08000000
288 23:02:38.334310 - {RAMDISK}: 977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
289 23:02:38.334694 - {ROOT_PART}: None
290 23:02:38.335075 - {ROOT}: None
291 23:02:38.335457 - {SERVER_IP}: 192.168.6.2
292 23:02:38.335840 - {TEE_ADDR}: 0x83000000
293 23:02:38.336247 - {TEE}: None
294 23:02:38.336632 Parsed boot commands:
295 23:02:38.337006 - setenv autoload no
296 23:02:38.337390 - setenv initrd_high 0xffffffff
297 23:02:38.337770 - setenv fdt_high 0xffffffff
298 23:02:38.338156 - dhcp
299 23:02:38.338565 - setenv serverip 192.168.6.2
300 23:02:38.338988 - tftpboot 0x01080000 977191/tftp-deploy-ln07rslh/kernel/uImage
301 23:02:38.339392 - tftpboot 0x08000000 977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
302 23:02:38.339799 - tftpboot 0x01070000 977191/tftp-deploy-ln07rslh/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:02:38.340251 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977191/extract-nfsrootfs-kfxsri15,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:02:38.340676 - bootm 0x01080000 0x08000000 0x01070000
305 23:02:38.341209 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:02:38.342850 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:02:38.343337 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:02:38.357475 Setting prompt string to ['lava-test: # ']
310 23:02:38.359363 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:02:38.360066 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:02:38.360699 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:02:38.361250 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:02:38.362482 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:02:38.398702 >> OK - accepted request
316 23:02:38.400952 Returned 0 in 0 seconds
317 23:02:38.502037 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:02:38.503695 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:02:38.504365 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:02:38.504965 Setting prompt string to ['Hit any key to stop autoboot']
322 23:02:38.505499 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:02:38.507220 Trying 192.168.56.21...
324 23:02:38.507741 Connected to conserv1.
325 23:02:38.508218 Escape character is '^]'.
326 23:02:38.508665
327 23:02:38.509123 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:02:38.509540
329 23:02:50.190318 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:02:50.190935 bl2_stage_init 0x01
331 23:02:50.191350 bl2_stage_init 0x81
332 23:02:50.195837 hw id: 0x0000 - pwm id 0x01
333 23:02:50.196325 bl2_stage_init 0xc1
334 23:02:50.196723 bl2_stage_init 0x02
335 23:02:50.197112
336 23:02:50.201580 L0:00000000
337 23:02:50.202012 L1:20000703
338 23:02:50.202403 L2:00008067
339 23:02:50.202787 L3:14000000
340 23:02:50.207097 B2:00402000
341 23:02:50.207520 B1:e0f83180
342 23:02:50.207916
343 23:02:50.208349 TE: 58124
344 23:02:50.208736
345 23:02:50.212594 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:02:50.213012
347 23:02:50.213401 Board ID = 1
348 23:02:50.218197 Set A53 clk to 24M
349 23:02:50.218608 Set A73 clk to 24M
350 23:02:50.218989 Set clk81 to 24M
351 23:02:50.223829 A53 clk: 1200 MHz
352 23:02:50.224270 A73 clk: 1200 MHz
353 23:02:50.224655 CLK81: 166.6M
354 23:02:50.225033 smccc: 00012a92
355 23:02:50.229495 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:02:50.235019 board id: 1
357 23:02:50.240895 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:02:50.251516 fw parse done
359 23:02:50.256590 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:02:50.300096 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:02:50.311069 PIEI prepare done
362 23:02:50.311489 fastboot data load
363 23:02:50.311878 fastboot data verify
364 23:02:50.316681 verify result: 266
365 23:02:50.322321 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:02:50.322740 LPDDR4 probe
367 23:02:50.323130 ddr clk to 1584MHz
368 23:02:50.330237 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:02:50.367610
370 23:02:50.368219 dmc_version 0001
371 23:02:50.374270 Check phy result
372 23:02:50.380028 INFO : End of CA training
373 23:02:50.380449 INFO : End of initialization
374 23:02:50.385648 INFO : Training has run successfully!
375 23:02:50.386058 Check phy result
376 23:02:50.391216 INFO : End of initialization
377 23:02:50.391644 INFO : End of read enable training
378 23:02:50.394545 INFO : End of fine write leveling
379 23:02:50.400180 INFO : End of Write leveling coarse delay
380 23:02:50.405753 INFO : Training has run successfully!
381 23:02:50.406163 Check phy result
382 23:02:50.406552 INFO : End of initialization
383 23:02:50.411315 INFO : End of read dq deskew training
384 23:02:50.414695 INFO : End of MPR read delay center optimization
385 23:02:50.420247 INFO : End of write delay center optimization
386 23:02:50.425898 INFO : End of read delay center optimization
387 23:02:50.426334 INFO : End of max read latency training
388 23:02:50.431551 INFO : Training has run successfully!
389 23:02:50.431960 1D training succeed
390 23:02:50.439302 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:02:50.487230 Check phy result
392 23:02:50.487676 INFO : End of initialization
393 23:02:50.508997 INFO : End of 2D read delay Voltage center optimization
394 23:02:50.529214 INFO : End of 2D read delay Voltage center optimization
395 23:02:50.581291 INFO : End of 2D write delay Voltage center optimization
396 23:02:50.630670 INFO : End of 2D write delay Voltage center optimization
397 23:02:50.636336 INFO : Training has run successfully!
398 23:02:50.636762
399 23:02:50.637158 channel==0
400 23:02:50.641903 RxClkDly_Margin_A0==88 ps 9
401 23:02:50.642311 TxDqDly_Margin_A0==98 ps 10
402 23:02:50.647401 RxClkDly_Margin_A1==88 ps 9
403 23:02:50.647805 TxDqDly_Margin_A1==98 ps 10
404 23:02:50.648254 TrainedVREFDQ_A0==74
405 23:02:50.653104 TrainedVREFDQ_A1==74
406 23:02:50.653516 VrefDac_Margin_A0==25
407 23:02:50.653905 DeviceVref_Margin_A0==40
408 23:02:50.658669 VrefDac_Margin_A1==25
409 23:02:50.659074 DeviceVref_Margin_A1==40
410 23:02:50.659461
411 23:02:50.659845
412 23:02:50.664278 channel==1
413 23:02:50.664691 RxClkDly_Margin_A0==98 ps 10
414 23:02:50.665078 TxDqDly_Margin_A0==98 ps 10
415 23:02:50.669786 RxClkDly_Margin_A1==88 ps 9
416 23:02:50.670196 TxDqDly_Margin_A1==88 ps 9
417 23:02:50.675449 TrainedVREFDQ_A0==77
418 23:02:50.675858 TrainedVREFDQ_A1==77
419 23:02:50.676281 VrefDac_Margin_A0==22
420 23:02:50.681118 DeviceVref_Margin_A0==37
421 23:02:50.681526 VrefDac_Margin_A1==24
422 23:02:50.686664 DeviceVref_Margin_A1==37
423 23:02:50.687065
424 23:02:50.687457 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:02:50.687842
426 23:02:50.720278 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 23:02:50.720753 2D training succeed
428 23:02:50.725876 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:02:50.731346 auto size-- 65535DDR cs0 size: 2048MB
430 23:02:50.731760 DDR cs1 size: 2048MB
431 23:02:50.736909 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:02:50.737317 cs0 DataBus test pass
433 23:02:50.742559 cs1 DataBus test pass
434 23:02:50.742967 cs0 AddrBus test pass
435 23:02:50.743349 cs1 AddrBus test pass
436 23:02:50.743730
437 23:02:50.748171 100bdlr_step_size ps== 420
438 23:02:50.748588 result report
439 23:02:50.753762 boot times 0Enable ddr reg access
440 23:02:50.759131 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:02:50.772636 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:02:51.346287 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:02:51.346886 MVN_1=0x00000000
444 23:02:51.351708 MVN_2=0x00000000
445 23:02:51.357466 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:02:51.357896 OPS=0x10
447 23:02:51.358293 ring efuse init
448 23:02:51.358681 chipver efuse init
449 23:02:51.363150 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:02:51.368641 [0.018961 Inits done]
451 23:02:51.369060 secure task start!
452 23:02:51.369450 high task start!
453 23:02:51.373310 low task start!
454 23:02:51.373731 run into bl31
455 23:02:51.379839 NOTICE: BL31: v1.3(release):4fc40b1
456 23:02:51.387611 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:02:51.388078 NOTICE: BL31: G12A normal boot!
458 23:02:51.413043 NOTICE: BL31: BL33 decompress pass
459 23:02:51.418719 ERROR: Error initializing runtime service opteed_fast
460 23:02:52.651628
461 23:02:52.652318
462 23:02:52.659977 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:02:52.660437
464 23:02:52.660842 Model: Libre Computer AML-A311D-CC Alta
465 23:02:52.868375 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:02:52.891857 DRAM: 2 GiB (effective 3.8 GiB)
467 23:02:53.034898 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:02:53.040642 WDT: Not starting watchdog@f0d0
469 23:02:53.072862 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:02:53.085411 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:02:53.090027 ** Bad device specification mmc 0 **
472 23:02:53.100633 Card did not respond to voltage select! : -110
473 23:02:53.108394 ** Bad device specification mmc 0 **
474 23:02:53.108824 Couldn't find partition mmc 0
475 23:02:53.116673 Card did not respond to voltage select! : -110
476 23:02:53.122194 ** Bad device specification mmc 0 **
477 23:02:53.122625 Couldn't find partition mmc 0
478 23:02:53.127196 Error: could not access storage.
479 23:02:54.390645 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:02:54.391279 bl2_stage_init 0x01
481 23:02:54.391707 bl2_stage_init 0x81
482 23:02:54.396186 hw id: 0x0000 - pwm id 0x01
483 23:02:54.396730 bl2_stage_init 0xc1
484 23:02:54.397133 bl2_stage_init 0x02
485 23:02:54.397527
486 23:02:54.401758 L0:00000000
487 23:02:54.402231 L1:20000703
488 23:02:54.402625 L2:00008067
489 23:02:54.403015 L3:14000000
490 23:02:54.404622 B2:00402000
491 23:02:54.405068 B1:e0f83180
492 23:02:54.405461
493 23:02:54.405851 TE: 58124
494 23:02:54.406240
495 23:02:54.415917 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:02:54.416408
497 23:02:54.416811 Board ID = 1
498 23:02:54.417201 Set A53 clk to 24M
499 23:02:54.417590 Set A73 clk to 24M
500 23:02:54.421691 Set clk81 to 24M
501 23:02:54.422229 A53 clk: 1200 MHz
502 23:02:54.422628 A73 clk: 1200 MHz
503 23:02:54.424781 CLK81: 166.6M
504 23:02:54.425224 smccc: 00012a91
505 23:02:54.430464 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:02:54.436063 board id: 1
507 23:02:54.441136 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:02:54.452025 fw parse done
509 23:02:54.459569 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:02:54.499800 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:02:54.511516 PIEI prepare done
512 23:02:54.512023 fastboot data load
513 23:02:54.512456 fastboot data verify
514 23:02:54.517098 verify result: 266
515 23:02:54.522663 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:02:54.523119 LPDDR4 probe
517 23:02:54.523534 ddr clk to 1584MHz
518 23:02:54.530713 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:02:54.567083
520 23:02:54.567563 dmc_version 0001
521 23:02:54.574660 Check phy result
522 23:02:54.580534 INFO : End of CA training
523 23:02:54.580966 INFO : End of initialization
524 23:02:54.586223 INFO : Training has run successfully!
525 23:02:54.586674 Check phy result
526 23:02:54.646131 INFO : End of initialization
527 23:02:54.646605 INFO : End of read enable training
528 23:02:54.647003 INFO : End of fine write leveling
529 23:02:54.647394 INFO : End of Write leveling coarse delay
530 23:02:54.647783 INFO : Training has run successfully!
531 23:02:54.648226 Check phy result
532 23:02:54.648617 INFO : End of initialization
533 23:02:54.649003 INFO : End of read dq deskew training
534 23:02:54.649388 INFO : End of MPR read delay center optimization
535 23:02:54.649775 INFO : End of write delay center optimization
536 23:02:54.650158 INFO : End of read delay center optimization
537 23:02:54.650543 INFO : End of max read latency training
538 23:02:54.650931 INFO : Training has run successfully!
539 23:02:54.651317 1D training succeed
540 23:02:54.651710 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:02:54.686893 Check phy result
542 23:02:54.687375 INFO : End of initialization
543 23:02:54.710226 INFO : End of 2D read delay Voltage center optimization
544 23:02:54.734496 INFO : End of 2D read delay Voltage center optimization
545 23:02:54.782308 INFO : End of 2D write delay Voltage center optimization
546 23:02:54.831510 INFO : End of 2D write delay Voltage center optimization
547 23:02:54.836926 INFO : Training has run successfully!
548 23:02:54.837403
549 23:02:54.837805 channel==0
550 23:02:54.842470 RxClkDly_Margin_A0==88 ps 9
551 23:02:54.842914 TxDqDly_Margin_A0==98 ps 10
552 23:02:54.848112 RxClkDly_Margin_A1==88 ps 9
553 23:02:54.848543 TxDqDly_Margin_A1==98 ps 10
554 23:02:54.848940 TrainedVREFDQ_A0==74
555 23:02:54.853686 TrainedVREFDQ_A1==74
556 23:02:54.854113 VrefDac_Margin_A0==25
557 23:02:54.854505 DeviceVref_Margin_A0==40
558 23:02:54.859237 VrefDac_Margin_A1==25
559 23:02:54.859655 DeviceVref_Margin_A1==40
560 23:02:54.860078
561 23:02:54.860473
562 23:02:54.864856 channel==1
563 23:02:54.865273 RxClkDly_Margin_A0==98 ps 10
564 23:02:54.865661 TxDqDly_Margin_A0==98 ps 10
565 23:02:54.870494 RxClkDly_Margin_A1==88 ps 9
566 23:02:54.870909 TxDqDly_Margin_A1==88 ps 9
567 23:02:54.876167 TrainedVREFDQ_A0==77
568 23:02:54.876581 TrainedVREFDQ_A1==77
569 23:02:54.876973 VrefDac_Margin_A0==22
570 23:02:54.881666 DeviceVref_Margin_A0==37
571 23:02:54.882080 VrefDac_Margin_A1==24
572 23:02:54.887306 DeviceVref_Margin_A1==37
573 23:02:54.887737
574 23:02:54.888161 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:02:54.888552
576 23:02:54.920923 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 23:02:54.921382 2D training succeed
578 23:02:54.926471 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:02:54.932093 auto size-- 65535DDR cs0 size: 2048MB
580 23:02:54.932512 DDR cs1 size: 2048MB
581 23:02:54.937708 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:02:54.938126 cs0 DataBus test pass
583 23:02:54.943240 cs1 DataBus test pass
584 23:02:54.943652 cs0 AddrBus test pass
585 23:02:54.944076 cs1 AddrBus test pass
586 23:02:54.944465
587 23:02:54.948890 100bdlr_step_size ps== 420
588 23:02:54.949316 result report
589 23:02:54.954513 boot times 0Enable ddr reg access
590 23:02:54.959811 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:02:54.973316 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:02:55.545425 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:02:55.546060 MVN_1=0x00000000
594 23:02:55.550867 MVN_2=0x00000000
595 23:02:55.556612 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:02:55.557097 OPS=0x10
597 23:02:55.557536 ring efuse init
598 23:02:55.557948 chipver efuse init
599 23:02:55.564819 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:02:55.565289 [0.018961 Inits done]
601 23:02:55.572363 secure task start!
602 23:02:55.572781 high task start!
603 23:02:55.573169 low task start!
604 23:02:55.573553 run into bl31
605 23:02:55.579035 NOTICE: BL31: v1.3(release):4fc40b1
606 23:02:55.586825 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:02:55.587250 NOTICE: BL31: G12A normal boot!
608 23:02:55.612281 NOTICE: BL31: BL33 decompress pass
609 23:02:55.617970 ERROR: Error initializing runtime service opteed_fast
610 23:02:56.851045
611 23:02:56.851664
612 23:02:56.859453 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:02:56.859898
614 23:02:56.860350 Model: Libre Computer AML-A311D-CC Alta
615 23:02:57.067774 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:02:57.091233 DRAM: 2 GiB (effective 3.8 GiB)
617 23:02:57.234081 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:02:57.240020 WDT: Not starting watchdog@f0d0
619 23:02:57.272205 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:02:57.284703 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:02:57.289661 ** Bad device specification mmc 0 **
622 23:02:57.300069 Card did not respond to voltage select! : -110
623 23:02:57.307684 ** Bad device specification mmc 0 **
624 23:02:57.308164 Couldn't find partition mmc 0
625 23:02:57.316051 Card did not respond to voltage select! : -110
626 23:02:57.321540 ** Bad device specification mmc 0 **
627 23:02:57.321991 Couldn't find partition mmc 0
628 23:02:57.326650 Error: could not access storage.
629 23:02:57.669152 Net: eth0: ethernet@ff3f0000
630 23:02:57.669761 starting USB...
631 23:02:57.920752 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:02:57.921200 Starting the controller
633 23:02:57.927894 USB XHCI 1.10
634 23:02:59.640917 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:02:59.641528 bl2_stage_init 0x01
636 23:02:59.641948 bl2_stage_init 0x81
637 23:02:59.646342 hw id: 0x0000 - pwm id 0x01
638 23:02:59.646798 bl2_stage_init 0xc1
639 23:02:59.647207 bl2_stage_init 0x02
640 23:02:59.647612
641 23:02:59.652048 L0:00000000
642 23:02:59.652481 L1:20000703
643 23:02:59.652885 L2:00008067
644 23:02:59.653280 L3:14000000
645 23:02:59.657632 B2:00402000
646 23:02:59.658058 B1:e0f83180
647 23:02:59.658458
648 23:02:59.658855 TE: 58124
649 23:02:59.659252
650 23:02:59.663256 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:02:59.663703
652 23:02:59.664145 Board ID = 1
653 23:02:59.668897 Set A53 clk to 24M
654 23:02:59.669326 Set A73 clk to 24M
655 23:02:59.669728 Set clk81 to 24M
656 23:02:59.674411 A53 clk: 1200 MHz
657 23:02:59.674833 A73 clk: 1200 MHz
658 23:02:59.675234 CLK81: 166.6M
659 23:02:59.675633 smccc: 00012a92
660 23:02:59.680045 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:02:59.685583 board id: 1
662 23:02:59.690785 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:02:59.702033 fw parse done
664 23:02:59.708057 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:02:59.749683 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:02:59.761502 PIEI prepare done
667 23:02:59.761930 fastboot data load
668 23:02:59.762335 fastboot data verify
669 23:02:59.767118 verify result: 266
670 23:02:59.772827 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:02:59.773286 LPDDR4 probe
672 23:02:59.773703 ddr clk to 1584MHz
673 23:02:59.780787 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:02:59.818202
675 23:02:59.818841 dmc_version 0001
676 23:02:59.824897 Check phy result
677 23:02:59.830860 INFO : End of CA training
678 23:02:59.831631 INFO : End of initialization
679 23:02:59.840821 INFO : Training has run successfully!
680 23:02:59.841461 Check phy result
681 23:02:59.842394 INFO : End of initialization
682 23:02:59.842746 INFO : End of read enable training
683 23:02:59.845272 INFO : End of fine write leveling
684 23:02:59.852539 INFO : End of Write leveling coarse delay
685 23:02:59.856522 INFO : Training has run successfully!
686 23:02:59.857622 Check phy result
687 23:02:59.857994 INFO : End of initialization
688 23:02:59.862122 INFO : End of read dq deskew training
689 23:02:59.871703 INFO : End of MPR read delay center optimization
690 23:02:59.872418 INFO : End of write delay center optimization
691 23:02:59.873338 INFO : End of read delay center optimization
692 23:02:59.879473 INFO : End of max read latency training
693 23:02:59.880044 INFO : Training has run successfully!
694 23:02:59.884531 1D training succeed
695 23:02:59.890512 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:02:59.937952 Check phy result
697 23:02:59.938565 INFO : End of initialization
698 23:02:59.960326 INFO : End of 2D read delay Voltage center optimization
699 23:02:59.980532 INFO : End of 2D read delay Voltage center optimization
700 23:03:00.032610 INFO : End of 2D write delay Voltage center optimization
701 23:03:00.081987 INFO : End of 2D write delay Voltage center optimization
702 23:03:00.087542 INFO : Training has run successfully!
703 23:03:00.088041
704 23:03:00.088453 channel==0
705 23:03:00.093113 RxClkDly_Margin_A0==88 ps 9
706 23:03:00.093576 TxDqDly_Margin_A0==98 ps 10
707 23:03:00.098681 RxClkDly_Margin_A1==78 ps 8
708 23:03:00.099131 TxDqDly_Margin_A1==98 ps 10
709 23:03:00.099535 TrainedVREFDQ_A0==74
710 23:03:00.104366 TrainedVREFDQ_A1==74
711 23:03:00.104812 VrefDac_Margin_A0==24
712 23:03:00.105209 DeviceVref_Margin_A0==40
713 23:03:00.109916 VrefDac_Margin_A1==25
714 23:03:00.110366 DeviceVref_Margin_A1==40
715 23:03:00.110763
716 23:03:00.111155
717 23:03:00.115471 channel==1
718 23:03:00.115909 RxClkDly_Margin_A0==98 ps 10
719 23:03:00.116336 TxDqDly_Margin_A0==98 ps 10
720 23:03:00.121098 RxClkDly_Margin_A1==88 ps 9
721 23:03:00.121547 TxDqDly_Margin_A1==88 ps 9
722 23:03:00.126668 TrainedVREFDQ_A0==77
723 23:03:00.127110 TrainedVREFDQ_A1==77
724 23:03:00.127507 VrefDac_Margin_A0==22
725 23:03:00.132373 DeviceVref_Margin_A0==37
726 23:03:00.132817 VrefDac_Margin_A1==24
727 23:03:00.137916 DeviceVref_Margin_A1==37
728 23:03:00.138354
729 23:03:00.138748 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:03:00.139132
731 23:03:00.171474 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 23:03:00.171962 2D training succeed
733 23:03:00.177121 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:03:00.182672 auto size-- 65535DDR cs0 size: 2048MB
735 23:03:00.183117 DDR cs1 size: 2048MB
736 23:03:00.188373 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:03:00.188815 cs0 DataBus test pass
738 23:03:00.193915 cs1 DataBus test pass
739 23:03:00.194351 cs0 AddrBus test pass
740 23:03:00.194742 cs1 AddrBus test pass
741 23:03:00.195129
742 23:03:00.199492 100bdlr_step_size ps== 420
743 23:03:00.199946 result report
744 23:03:00.205093 boot times 0Enable ddr reg access
745 23:03:00.210439 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:03:00.223931 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:03:00.797553 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:03:00.798159 MVN_1=0x00000000
749 23:03:00.803009 MVN_2=0x00000000
750 23:03:00.808923 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:03:00.809394 OPS=0x10
752 23:03:00.809790 ring efuse init
753 23:03:00.810175 chipver efuse init
754 23:03:00.814390 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:03:00.819969 [0.018961 Inits done]
756 23:03:00.820570 secure task start!
757 23:03:00.820966 high task start!
758 23:03:00.824536 low task start!
759 23:03:00.824982 run into bl31
760 23:03:00.831187 NOTICE: BL31: v1.3(release):4fc40b1
761 23:03:00.839031 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:03:00.839484 NOTICE: BL31: G12A normal boot!
763 23:03:00.864403 NOTICE: BL31: BL33 decompress pass
764 23:03:00.870050 ERROR: Error initializing runtime service opteed_fast
765 23:03:02.102970
766 23:03:02.103581
767 23:03:02.111334 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:03:02.111805
769 23:03:02.112242 Model: Libre Computer AML-A311D-CC Alta
770 23:03:02.319723 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:03:02.343215 DRAM: 2 GiB (effective 3.8 GiB)
772 23:03:02.486239 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:03:02.492030 WDT: Not starting watchdog@f0d0
774 23:03:02.524223 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:03:02.536666 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:03:02.541694 ** Bad device specification mmc 0 **
777 23:03:02.552010 Card did not respond to voltage select! : -110
778 23:03:02.559689 ** Bad device specification mmc 0 **
779 23:03:02.560163 Couldn't find partition mmc 0
780 23:03:02.568153 Card did not respond to voltage select! : -110
781 23:03:02.573519 ** Bad device specification mmc 0 **
782 23:03:02.573964 Couldn't find partition mmc 0
783 23:03:02.578570 Error: could not access storage.
784 23:03:02.921170 Net: eth0: ethernet@ff3f0000
785 23:03:02.921638 starting USB...
786 23:03:03.172954 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:03:03.173674 Starting the controller
788 23:03:03.179809 USB XHCI 1.10
789 23:03:05.342428 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:03:05.343089 bl2_stage_init 0x01
791 23:03:05.343535 bl2_stage_init 0x81
792 23:03:05.348059 hw id: 0x0000 - pwm id 0x01
793 23:03:05.348588 bl2_stage_init 0xc1
794 23:03:05.349012 bl2_stage_init 0x02
795 23:03:05.349417
796 23:03:05.353686 L0:00000000
797 23:03:05.354195 L1:20000703
798 23:03:05.354617 L2:00008067
799 23:03:05.355024 L3:14000000
800 23:03:05.356558 B2:00402000
801 23:03:05.358208 B1:e0f83180
802 23:03:05.358624
803 23:03:05.359037 TE: 58159
804 23:03:05.359440
805 23:03:05.367625 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:03:05.368214
807 23:03:05.368661 Board ID = 1
808 23:03:05.369070 Set A53 clk to 24M
809 23:03:05.369473 Set A73 clk to 24M
810 23:03:05.373321 Set clk81 to 24M
811 23:03:05.373841 A53 clk: 1200 MHz
812 23:03:05.374261 A73 clk: 1200 MHz
813 23:03:05.376757 CLK81: 166.6M
814 23:03:05.377251 smccc: 00012ab5
815 23:03:05.382277 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:03:05.387889 board id: 1
817 23:03:05.393091 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:03:05.403728 fw parse done
819 23:03:05.409801 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:03:05.452208 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:03:05.463336 PIEI prepare done
822 23:03:05.463846 fastboot data load
823 23:03:05.464327 fastboot data verify
824 23:03:05.468864 verify result: 266
825 23:03:05.474375 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:03:05.474869 LPDDR4 probe
827 23:03:05.477000 ddr clk to 1584MHz
828 23:03:05.482360 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:03:05.519508
830 23:03:05.520062 dmc_version 0001
831 23:03:05.526343 Check phy result
832 23:03:05.532249 INFO : End of CA training
833 23:03:05.532752 INFO : End of initialization
834 23:03:05.537777 INFO : Training has run successfully!
835 23:03:05.538266 Check phy result
836 23:03:05.543378 INFO : End of initialization
837 23:03:05.543878 INFO : End of read enable training
838 23:03:05.548994 INFO : End of fine write leveling
839 23:03:05.554608 INFO : End of Write leveling coarse delay
840 23:03:05.555113 INFO : Training has run successfully!
841 23:03:05.555530 Check phy result
842 23:03:05.560242 INFO : End of initialization
843 23:03:05.560737 INFO : End of read dq deskew training
844 23:03:05.565833 INFO : End of MPR read delay center optimization
845 23:03:05.571443 INFO : End of write delay center optimization
846 23:03:05.577026 INFO : End of read delay center optimization
847 23:03:05.577530 INFO : End of max read latency training
848 23:03:05.582606 INFO : Training has run successfully!
849 23:03:05.583097 1D training succeed
850 23:03:05.591778 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:03:05.638809 Check phy result
852 23:03:05.639323 INFO : End of initialization
853 23:03:05.661183 INFO : End of 2D read delay Voltage center optimization
854 23:03:05.681488 INFO : End of 2D read delay Voltage center optimization
855 23:03:05.733528 INFO : End of 2D write delay Voltage center optimization
856 23:03:05.783064 INFO : End of 2D write delay Voltage center optimization
857 23:03:05.788457 INFO : Training has run successfully!
858 23:03:05.788977
859 23:03:05.789390 channel==0
860 23:03:05.794043 RxClkDly_Margin_A0==88 ps 9
861 23:03:05.794557 TxDqDly_Margin_A0==98 ps 10
862 23:03:05.797296 RxClkDly_Margin_A1==88 ps 9
863 23:03:05.797786 TxDqDly_Margin_A1==98 ps 10
864 23:03:05.802837 TrainedVREFDQ_A0==74
865 23:03:05.803339 TrainedVREFDQ_A1==74
866 23:03:05.808587 VrefDac_Margin_A0==25
867 23:03:05.809149 DeviceVref_Margin_A0==40
868 23:03:05.809560 VrefDac_Margin_A1==25
869 23:03:05.814012 DeviceVref_Margin_A1==40
870 23:03:05.814554
871 23:03:05.814947
872 23:03:05.815331 channel==1
873 23:03:05.815710 RxClkDly_Margin_A0==98 ps 10
874 23:03:05.817575 TxDqDly_Margin_A0==98 ps 10
875 23:03:05.823147 RxClkDly_Margin_A1==88 ps 9
876 23:03:05.823643 TxDqDly_Margin_A1==88 ps 9
877 23:03:05.824075 TrainedVREFDQ_A0==77
878 23:03:05.828665 TrainedVREFDQ_A1==77
879 23:03:05.829172 VrefDac_Margin_A0==22
880 23:03:05.834433 DeviceVref_Margin_A0==37
881 23:03:05.834922 VrefDac_Margin_A1==24
882 23:03:05.835310 DeviceVref_Margin_A1==37
883 23:03:05.835693
884 23:03:05.839932 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:03:05.840457
886 23:03:05.873311 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 23:03:05.873896 2D training succeed
888 23:03:05.879006 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:03:05.884595 auto size-- 65535DDR cs0 size: 2048MB
890 23:03:05.885090 DDR cs1 size: 2048MB
891 23:03:05.890170 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:03:05.890673 cs0 DataBus test pass
893 23:03:05.891059 cs1 DataBus test pass
894 23:03:05.895837 cs0 AddrBus test pass
895 23:03:05.896377 cs1 AddrBus test pass
896 23:03:05.896769
897 23:03:05.901417 100bdlr_step_size ps== 420
898 23:03:05.901918 result report
899 23:03:05.902307 boot times 0Enable ddr reg access
900 23:03:05.911231 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:03:05.924752 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:03:06.498358 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:03:06.499003 MVN_1=0x00000000
904 23:03:06.503852 MVN_2=0x00000000
905 23:03:06.509626 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:03:06.510155 OPS=0x10
907 23:03:06.510564 ring efuse init
908 23:03:06.510961 chipver efuse init
909 23:03:06.517745 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:03:06.518302 [0.018961 Inits done]
911 23:03:06.525328 secure task start!
912 23:03:06.525838 high task start!
913 23:03:06.526242 low task start!
914 23:03:06.526637 run into bl31
915 23:03:06.532049 NOTICE: BL31: v1.3(release):4fc40b1
916 23:03:06.539817 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:03:06.540379 NOTICE: BL31: G12A normal boot!
918 23:03:06.565159 NOTICE: BL31: BL33 decompress pass
919 23:03:06.570880 ERROR: Error initializing runtime service opteed_fast
920 23:03:07.803786
921 23:03:07.804481
922 23:03:07.812217 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:03:07.812761
924 23:03:07.813195 Model: Libre Computer AML-A311D-CC Alta
925 23:03:08.020556 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:03:08.044089 DRAM: 2 GiB (effective 3.8 GiB)
927 23:03:08.186996 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:03:08.192831 WDT: Not starting watchdog@f0d0
929 23:03:08.225038 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:03:08.237466 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:03:08.241530 ** Bad device specification mmc 0 **
932 23:03:08.252964 Card did not respond to voltage select! : -110
933 23:03:08.260514 ** Bad device specification mmc 0 **
934 23:03:08.260971 Couldn't find partition mmc 0
935 23:03:08.268991 Card did not respond to voltage select! : -110
936 23:03:08.274361 ** Bad device specification mmc 0 **
937 23:03:08.274816 Couldn't find partition mmc 0
938 23:03:08.279414 Error: could not access storage.
939 23:03:08.623265 Net: eth0: ethernet@ff3f0000
940 23:03:08.623843 starting USB...
941 23:03:08.875104 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:03:08.875671 Starting the controller
943 23:03:08.882152 USB XHCI 1.10
944 23:03:10.436632 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 23:03:10.445067 scanning usb for storage devices... 0 Storage Device(s) found
947 23:03:10.496544 Hit any key to stop autoboot: 1
948 23:03:10.497550 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 23:03:10.498153 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 23:03:10.498643 Setting prompt string to ['=>']
951 23:03:10.499120 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 23:03:10.512479 0
953 23:03:10.513386 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 23:03:10.513901 Sending with 10 millisecond of delay
956 23:03:11.648520 => setenv autoload no
957 23:03:11.659327 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 23:03:11.664163 setenv autoload no
959 23:03:11.664884 Sending with 10 millisecond of delay
961 23:03:13.461492 => setenv initrd_high 0xffffffff
962 23:03:13.472282 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 23:03:13.473135 setenv initrd_high 0xffffffff
964 23:03:13.473835 Sending with 10 millisecond of delay
966 23:03:15.090043 => setenv fdt_high 0xffffffff
967 23:03:15.100811 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 23:03:15.101667 setenv fdt_high 0xffffffff
969 23:03:15.102367 Sending with 10 millisecond of delay
971 23:03:15.394200 => dhcp
972 23:03:15.404979 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 23:03:15.405849 dhcp
974 23:03:15.406283 Speed: 1000, full duplex
975 23:03:15.406690 BOOTP broadcast 1
976 23:03:15.420384 DHCP client bound to address 192.168.6.27 (15 ms)
977 23:03:15.421158 Sending with 10 millisecond of delay
979 23:03:17.097555 => setenv serverip 192.168.6.2
980 23:03:17.108352 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 23:03:17.109223 setenv serverip 192.168.6.2
982 23:03:17.109899 Sending with 10 millisecond of delay
984 23:03:20.834056 => tftpboot 0x01080000 977191/tftp-deploy-ln07rslh/kernel/uImage
985 23:03:20.844635 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 23:03:20.845176 tftpboot 0x01080000 977191/tftp-deploy-ln07rslh/kernel/uImage
987 23:03:20.845415 Speed: 1000, full duplex
988 23:03:20.845615 Using ethernet@ff3f0000 device
989 23:03:20.847073 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 23:03:20.852629 Filename '977191/tftp-deploy-ln07rslh/kernel/uImage'.
991 23:03:20.856640 Load address: 0x1080000
992 23:03:23.773836 Loading: *################################################## 43.6 MiB
993 23:03:23.774490 14.9 MiB/s
994 23:03:23.774965 done
995 23:03:23.778402 Bytes transferred = 45713984 (2b98a40 hex)
996 23:03:23.779227 Sending with 10 millisecond of delay
998 23:03:28.466086 => tftpboot 0x08000000 977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
999 23:03:28.476903 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 23:03:28.477809 tftpboot 0x08000000 977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot
1001 23:03:28.478293 Speed: 1000, full duplex
1002 23:03:28.478758 Using ethernet@ff3f0000 device
1003 23:03:28.479526 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 23:03:28.491284 Filename '977191/tftp-deploy-ln07rslh/ramdisk/ramdisk.cpio.gz.uboot'.
1005 23:03:28.491788 Load address: 0x8000000
1006 23:03:28.590703 Loading: *## UDP wrong checksum 000000ff 0000031d
1007 23:03:28.659765 ### UDP wrong checksum 000000ff 00009c0f
1008 23:03:35.426019 ##########T ################################## UDP wrong checksum 00000005 00003f4d
1009 23:03:40.427653 T UDP wrong checksum 00000005 00003f4d
1010 23:03:47.978449 T UDP wrong checksum 000000ff 0000cab3
1011 23:03:47.988214 UDP wrong checksum 000000ff 000061a6
1012 23:03:50.429091 UDP wrong checksum 00000005 00003f4d
1013 23:03:57.043251 T T UDP wrong checksum 000000ff 00009b00
1014 23:03:57.083264 UDP wrong checksum 000000ff 00002df3
1015 23:04:10.432936 T T UDP wrong checksum 00000005 00003f4d
1016 23:04:25.438995 T T T
1017 23:04:25.439617 Retry count exceeded; starting again
1019 23:04:25.441144 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1022 23:04:25.443007 end: 2.4 uboot-commands (duration 00:01:47) [common]
1024 23:04:25.444418 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1026 23:04:25.445407 end: 2 uboot-action (duration 00:01:47) [common]
1028 23:04:25.446857 Cleaning after the job
1029 23:04:25.447383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/ramdisk
1030 23:04:25.448638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/kernel
1031 23:04:25.492759 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/dtb
1032 23:04:25.493538 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/nfsrootfs
1033 23:04:25.804439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977191/tftp-deploy-ln07rslh/modules
1034 23:04:25.825269 start: 4.1 power-off (timeout 00:00:30) [common]
1035 23:04:25.825950 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1036 23:04:25.860641 >> OK - accepted request
1037 23:04:25.862704 Returned 0 in 0 seconds
1038 23:04:25.963565 end: 4.1 power-off (duration 00:00:00) [common]
1040 23:04:25.964660 start: 4.2 read-feedback (timeout 00:10:00) [common]
1041 23:04:25.965494 Listened to connection for namespace 'common' for up to 1s
1042 23:04:26.966066 Finalising connection for namespace 'common'
1043 23:04:26.966818 Disconnecting from shell: Finalise
1044 23:04:26.967331 =>
1045 23:04:27.068416 end: 4.2 read-feedback (duration 00:00:01) [common]
1046 23:04:27.069155 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977191
1047 23:04:30.783341 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977191
1048 23:04:30.784006 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.