Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:04:55.048366 lava-dispatcher, installed at version: 2024.01
2 23:04:55.049213 start: 0 validate
3 23:04:55.049700 Start time: 2024-11-11 23:04:55.049670+00:00 (UTC)
4 23:04:55.050233 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:04:55.050779 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:04:55.092831 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:04:55.093369 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:04:55.123682 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:04:55.124340 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:04:55.153537 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:04:55.154025 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:04:55.190249 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:04:55.191045 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:04:55.236534 validate duration: 0.19
16 23:04:55.237445 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:04:55.237799 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:04:55.238131 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:04:55.238737 Not decompressing ramdisk as can be used compressed.
20 23:04:55.239209 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:04:55.239517 saving as /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/ramdisk/initrd.cpio.gz
22 23:04:55.239798 total size: 5628140 (5 MB)
23 23:04:55.276899 progress 0 % (0 MB)
24 23:04:55.286272 progress 5 % (0 MB)
25 23:04:55.293325 progress 10 % (0 MB)
26 23:04:55.297442 progress 15 % (0 MB)
27 23:04:55.301630 progress 20 % (1 MB)
28 23:04:55.305494 progress 25 % (1 MB)
29 23:04:55.309793 progress 30 % (1 MB)
30 23:04:55.314018 progress 35 % (1 MB)
31 23:04:55.317818 progress 40 % (2 MB)
32 23:04:55.321992 progress 45 % (2 MB)
33 23:04:55.325838 progress 50 % (2 MB)
34 23:04:55.330074 progress 55 % (2 MB)
35 23:04:55.334195 progress 60 % (3 MB)
36 23:04:55.338043 progress 65 % (3 MB)
37 23:04:55.342186 progress 70 % (3 MB)
38 23:04:55.345986 progress 75 % (4 MB)
39 23:04:55.350131 progress 80 % (4 MB)
40 23:04:55.353879 progress 85 % (4 MB)
41 23:04:55.358066 progress 90 % (4 MB)
42 23:04:55.362130 progress 95 % (5 MB)
43 23:04:55.365562 progress 100 % (5 MB)
44 23:04:55.366280 5 MB downloaded in 0.13 s (42.44 MB/s)
45 23:04:55.366887 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:04:55.367852 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:04:55.368215 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:04:55.368526 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:04:55.369042 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/kernel/Image
51 23:04:55.369337 saving as /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/kernel/Image
52 23:04:55.369575 total size: 45713920 (43 MB)
53 23:04:55.369807 No compression specified
54 23:04:55.403785 progress 0 % (0 MB)
55 23:04:55.431910 progress 5 % (2 MB)
56 23:04:55.461921 progress 10 % (4 MB)
57 23:04:55.491788 progress 15 % (6 MB)
58 23:04:55.522297 progress 20 % (8 MB)
59 23:04:55.551673 progress 25 % (10 MB)
60 23:04:55.579162 progress 30 % (13 MB)
61 23:04:55.607156 progress 35 % (15 MB)
62 23:04:55.634972 progress 40 % (17 MB)
63 23:04:55.662604 progress 45 % (19 MB)
64 23:04:55.690498 progress 50 % (21 MB)
65 23:04:55.718572 progress 55 % (24 MB)
66 23:04:55.746823 progress 60 % (26 MB)
67 23:04:55.774366 progress 65 % (28 MB)
68 23:04:55.802132 progress 70 % (30 MB)
69 23:04:55.830313 progress 75 % (32 MB)
70 23:04:55.860097 progress 80 % (34 MB)
71 23:04:55.888140 progress 85 % (37 MB)
72 23:04:55.915957 progress 90 % (39 MB)
73 23:04:55.944115 progress 95 % (41 MB)
74 23:04:55.971440 progress 100 % (43 MB)
75 23:04:55.971996 43 MB downloaded in 0.60 s (72.37 MB/s)
76 23:04:55.972513 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:04:55.973366 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:04:55.973662 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:04:55.973942 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:04:55.974429 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:04:55.974712 saving as /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:04:55.974932 total size: 54703 (0 MB)
84 23:04:55.975150 No compression specified
85 23:04:56.011938 progress 59 % (0 MB)
86 23:04:56.012850 progress 100 % (0 MB)
87 23:04:56.013439 0 MB downloaded in 0.04 s (1.36 MB/s)
88 23:04:56.013931 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:04:56.014795 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:04:56.015076 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:04:56.015352 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:04:56.015824 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:04:56.016107 saving as /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/nfsrootfs/full.rootfs.tar
95 23:04:56.016328 total size: 474398908 (452 MB)
96 23:04:56.016555 Using unxz to decompress xz
97 23:04:56.053522 progress 0 % (0 MB)
98 23:04:57.156088 progress 5 % (22 MB)
99 23:04:58.617200 progress 10 % (45 MB)
100 23:04:59.076538 progress 15 % (67 MB)
101 23:04:59.865080 progress 20 % (90 MB)
102 23:05:00.381895 progress 25 % (113 MB)
103 23:05:00.755308 progress 30 % (135 MB)
104 23:05:01.371526 progress 35 % (158 MB)
105 23:05:02.322440 progress 40 % (181 MB)
106 23:05:03.221327 progress 45 % (203 MB)
107 23:05:04.028917 progress 50 % (226 MB)
108 23:05:04.697005 progress 55 % (248 MB)
109 23:05:05.916612 progress 60 % (271 MB)
110 23:05:07.405168 progress 65 % (294 MB)
111 23:05:09.046107 progress 70 % (316 MB)
112 23:05:12.138402 progress 75 % (339 MB)
113 23:05:14.561466 progress 80 % (361 MB)
114 23:05:17.449728 progress 85 % (384 MB)
115 23:05:20.592639 progress 90 % (407 MB)
116 23:05:23.968195 progress 95 % (429 MB)
117 23:05:27.092516 progress 100 % (452 MB)
118 23:05:27.105385 452 MB downloaded in 31.09 s (14.55 MB/s)
119 23:05:27.106317 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:05:27.108141 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:05:27.108718 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:05:27.109285 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:05:27.110314 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/modules.tar.xz
125 23:05:27.110829 saving as /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/modules/modules.tar
126 23:05:27.111279 total size: 11609460 (11 MB)
127 23:05:27.111737 Using unxz to decompress xz
128 23:05:27.156751 progress 0 % (0 MB)
129 23:05:27.222764 progress 5 % (0 MB)
130 23:05:27.296762 progress 10 % (1 MB)
131 23:05:27.392542 progress 15 % (1 MB)
132 23:05:27.482867 progress 20 % (2 MB)
133 23:05:27.563156 progress 25 % (2 MB)
134 23:05:27.638496 progress 30 % (3 MB)
135 23:05:27.716688 progress 35 % (3 MB)
136 23:05:27.788628 progress 40 % (4 MB)
137 23:05:27.864423 progress 45 % (5 MB)
138 23:05:27.947634 progress 50 % (5 MB)
139 23:05:28.024232 progress 55 % (6 MB)
140 23:05:28.108558 progress 60 % (6 MB)
141 23:05:28.189363 progress 65 % (7 MB)
142 23:05:28.269427 progress 70 % (7 MB)
143 23:05:28.347617 progress 75 % (8 MB)
144 23:05:28.430950 progress 80 % (8 MB)
145 23:05:28.510576 progress 85 % (9 MB)
146 23:05:28.589798 progress 90 % (9 MB)
147 23:05:28.666848 progress 95 % (10 MB)
148 23:05:28.743528 progress 100 % (11 MB)
149 23:05:28.754704 11 MB downloaded in 1.64 s (6.74 MB/s)
150 23:05:28.755287 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:05:28.756443 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:05:28.757046 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 23:05:28.757624 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 23:05:44.018566 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977220/extract-nfsrootfs-x0ztqyii
156 23:05:44.019177 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 23:05:44.019467 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:05:44.020214 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea
159 23:05:44.020679 makedir: /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin
160 23:05:44.021004 makedir: /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/tests
161 23:05:44.021315 makedir: /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/results
162 23:05:44.021648 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-add-keys
163 23:05:44.022219 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-add-sources
164 23:05:44.022755 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-background-process-start
165 23:05:44.023254 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-background-process-stop
166 23:05:44.023784 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-common-functions
167 23:05:44.024328 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-echo-ipv4
168 23:05:44.024823 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-install-packages
169 23:05:44.025312 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-installed-packages
170 23:05:44.025784 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-os-build
171 23:05:44.026287 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-probe-channel
172 23:05:44.026793 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-probe-ip
173 23:05:44.027267 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-target-ip
174 23:05:44.027738 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-target-mac
175 23:05:44.028246 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-target-storage
176 23:05:44.028737 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-case
177 23:05:44.029218 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-event
178 23:05:44.029686 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-feedback
179 23:05:44.030195 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-raise
180 23:05:44.030687 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-reference
181 23:05:44.031259 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-runner
182 23:05:44.031751 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-set
183 23:05:44.032275 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-test-shell
184 23:05:44.032764 Updating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-install-packages (oe)
185 23:05:44.033293 Updating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/bin/lava-installed-packages (oe)
186 23:05:44.033732 Creating /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/environment
187 23:05:44.034096 LAVA metadata
188 23:05:44.034353 - LAVA_JOB_ID=977220
189 23:05:44.034567 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:05:44.034923 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:05:44.035865 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:05:44.036214 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:05:44.036425 skipped lava-vland-overlay
194 23:05:44.036667 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:05:44.036919 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:05:44.037137 skipped lava-multinode-overlay
197 23:05:44.037378 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:05:44.037629 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:05:44.037876 Loading test definitions
200 23:05:44.038156 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:05:44.038378 Using /lava-977220 at stage 0
202 23:05:44.039529 uuid=977220_1.6.2.4.1 testdef=None
203 23:05:44.039837 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:05:44.040128 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:05:44.041849 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:05:44.042630 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:05:44.044785 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:05:44.045616 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:05:44.047651 runner path: /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 977220_1.6.2.4.1
212 23:05:44.048246 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:05:44.049006 Creating lava-test-runner.conf files
215 23:05:44.049206 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977220/lava-overlay-4fh0dyea/lava-977220/0 for stage 0
216 23:05:44.049549 - 0_v4l2-decoder-conformance-h265
217 23:05:44.049909 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:05:44.050182 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:05:44.071503 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:05:44.071845 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:05:44.072134 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:05:44.072401 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:05:44.072663 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:05:44.678802 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:05:44.679275 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 23:05:44.679526 extracting modules file /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977220/extract-nfsrootfs-x0ztqyii
227 23:05:46.026112 extracting modules file /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk
228 23:05:47.408825 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:05:47.409312 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 23:05:47.409592 [common] Applying overlay to NFS
231 23:05:47.409806 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977220/compress-overlay-jfh2yl1m/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977220/extract-nfsrootfs-x0ztqyii
232 23:05:47.438824 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:05:47.439195 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 23:05:47.439508 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 23:05:47.439746 Converting downloaded kernel to a uImage
236 23:05:47.440079 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/kernel/Image /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/kernel/uImage
237 23:05:47.930824 output: Image Name:
238 23:05:47.931242 output: Created: Mon Nov 11 23:05:47 2024
239 23:05:47.931455 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:05:47.931661 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:05:47.931864 output: Load Address: 01080000
242 23:05:47.932107 output: Entry Point: 01080000
243 23:05:47.932311 output:
244 23:05:47.932656 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:05:47.932923 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:05:47.933189 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 23:05:47.933440 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:05:47.933696 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 23:05:47.933947 Building ramdisk /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk
250 23:05:50.173624 >> 166793 blocks
251 23:05:57.864416 Adding RAMdisk u-boot header.
252 23:05:57.865093 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk.cpio.gz.uboot
253 23:05:58.110471 output: Image Name:
254 23:05:58.110890 output: Created: Mon Nov 11 23:05:57 2024
255 23:05:58.111107 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:05:58.111315 output: Data Size: 23431943 Bytes = 22882.76 KiB = 22.35 MiB
257 23:05:58.111518 output: Load Address: 00000000
258 23:05:58.111718 output: Entry Point: 00000000
259 23:05:58.111917 output:
260 23:05:58.113007 rename /var/lib/lava/dispatcher/tmp/977220/extract-overlay-ramdisk-ejs_alp5/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
261 23:05:58.113787 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:05:58.114389 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 23:05:58.114972 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 23:05:58.115475 No LXC device requested
265 23:05:58.116056 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:05:58.116633 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 23:05:58.117179 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:05:58.117632 Checking files for TFTP limit of 4294967296 bytes.
269 23:05:58.120587 end: 1 tftp-deploy (duration 00:01:03) [common]
270 23:05:58.121214 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:05:58.121788 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:05:58.122332 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:05:58.122882 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:05:58.123456 Using kernel file from prepare-kernel: 977220/tftp-deploy-uk7h45p8/kernel/uImage
275 23:05:58.124173 substitutions:
276 23:05:58.124630 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:05:58.125072 - {DTB_ADDR}: 0x01070000
278 23:05:58.125508 - {DTB}: 977220/tftp-deploy-uk7h45p8/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:05:58.125948 - {INITRD}: 977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
280 23:05:58.126383 - {KERNEL_ADDR}: 0x01080000
281 23:05:58.126813 - {KERNEL}: 977220/tftp-deploy-uk7h45p8/kernel/uImage
282 23:05:58.127244 - {LAVA_MAC}: None
283 23:05:58.127712 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977220/extract-nfsrootfs-x0ztqyii
284 23:05:58.128182 - {NFS_SERVER_IP}: 192.168.6.2
285 23:05:58.128613 - {PRESEED_CONFIG}: None
286 23:05:58.129041 - {PRESEED_LOCAL}: None
287 23:05:58.129466 - {RAMDISK_ADDR}: 0x08000000
288 23:05:58.129888 - {RAMDISK}: 977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
289 23:05:58.130313 - {ROOT_PART}: None
290 23:05:58.130737 - {ROOT}: None
291 23:05:58.131157 - {SERVER_IP}: 192.168.6.2
292 23:05:58.131581 - {TEE_ADDR}: 0x83000000
293 23:05:58.132197 - {TEE}: None
294 23:05:58.132670 Parsed boot commands:
295 23:05:58.133094 - setenv autoload no
296 23:05:58.133521 - setenv initrd_high 0xffffffff
297 23:05:58.133946 - setenv fdt_high 0xffffffff
298 23:05:58.134371 - dhcp
299 23:05:58.134790 - setenv serverip 192.168.6.2
300 23:05:58.135213 - tftpboot 0x01080000 977220/tftp-deploy-uk7h45p8/kernel/uImage
301 23:05:58.135638 - tftpboot 0x08000000 977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
302 23:05:58.136094 - tftpboot 0x01070000 977220/tftp-deploy-uk7h45p8/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:05:58.136526 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977220/extract-nfsrootfs-x0ztqyii,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:05:58.136967 - bootm 0x01080000 0x08000000 0x01070000
305 23:05:58.137516 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:05:58.139147 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:05:58.139604 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:05:58.156066 Setting prompt string to ['lava-test: # ']
310 23:05:58.157639 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:05:58.158285 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:05:58.158868 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:05:58.159445 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:05:58.160704 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:05:58.196276 >> OK - accepted request
316 23:05:58.198342 Returned 0 in 0 seconds
317 23:05:58.299476 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:05:58.301216 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:05:58.301846 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:05:58.302407 Setting prompt string to ['Hit any key to stop autoboot']
322 23:05:58.302914 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:05:58.304620 Trying 192.168.56.21...
324 23:05:58.305139 Connected to conserv1.
325 23:05:58.305598 Escape character is '^]'.
326 23:05:58.306057
327 23:05:58.306523 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 23:05:58.306974
329 23:06:10.162091 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:06:10.162751 bl2_stage_init 0x01
331 23:06:10.163214 bl2_stage_init 0x81
332 23:06:10.167677 hw id: 0x0000 - pwm id 0x01
333 23:06:10.168203 bl2_stage_init 0xc1
334 23:06:10.168644 bl2_stage_init 0x02
335 23:06:10.169074
336 23:06:10.173160 L0:00000000
337 23:06:10.173673 L1:20000703
338 23:06:10.174110 L2:00008067
339 23:06:10.174539 L3:14000000
340 23:06:10.176184 B2:00402000
341 23:06:10.176668 B1:e0f83180
342 23:06:10.177113
343 23:06:10.177547 TE: 58124
344 23:06:10.177979
345 23:06:10.187265 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:06:10.187749
347 23:06:10.188230 Board ID = 1
348 23:06:10.188659 Set A53 clk to 24M
349 23:06:10.189086 Set A73 clk to 24M
350 23:06:10.192841 Set clk81 to 24M
351 23:06:10.193300 A53 clk: 1200 MHz
352 23:06:10.193730 A73 clk: 1200 MHz
353 23:06:10.198354 CLK81: 166.6M
354 23:06:10.198806 smccc: 00012a92
355 23:06:10.204010 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:06:10.204472 board id: 1
357 23:06:10.212762 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:06:10.223125 fw parse done
359 23:06:10.229065 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:06:10.271684 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:06:10.282587 PIEI prepare done
362 23:06:10.283048 fastboot data load
363 23:06:10.283483 fastboot data verify
364 23:06:10.288226 verify result: 266
365 23:06:10.293827 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:06:10.294283 LPDDR4 probe
367 23:06:10.294712 ddr clk to 1584MHz
368 23:06:10.301793 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:06:10.339145
370 23:06:10.339554 dmc_version 0001
371 23:06:10.345753 Check phy result
372 23:06:10.351587 INFO : End of CA training
373 23:06:10.351898 INFO : End of initialization
374 23:06:10.357166 INFO : Training has run successfully!
375 23:06:10.357439 Check phy result
376 23:06:10.362815 INFO : End of initialization
377 23:06:10.363088 INFO : End of read enable training
378 23:06:10.368496 INFO : End of fine write leveling
379 23:06:10.374027 INFO : End of Write leveling coarse delay
380 23:06:10.374364 INFO : Training has run successfully!
381 23:06:10.374567 Check phy result
382 23:06:10.379579 INFO : End of initialization
383 23:06:10.379811 INFO : End of read dq deskew training
384 23:06:10.385133 INFO : End of MPR read delay center optimization
385 23:06:10.390711 INFO : End of write delay center optimization
386 23:06:10.397358 INFO : End of read delay center optimization
387 23:06:10.397584 INFO : End of max read latency training
388 23:06:10.402051 INFO : Training has run successfully!
389 23:06:10.402270 1D training succeed
390 23:06:10.411185 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:06:10.458840 Check phy result
392 23:06:10.459346 INFO : End of initialization
393 23:06:10.481357 INFO : End of 2D read delay Voltage center optimization
394 23:06:10.501701 INFO : End of 2D read delay Voltage center optimization
395 23:06:10.553709 INFO : End of 2D write delay Voltage center optimization
396 23:06:10.603039 INFO : End of 2D write delay Voltage center optimization
397 23:06:10.608635 INFO : Training has run successfully!
398 23:06:10.609092
399 23:06:10.609544 channel==0
400 23:06:10.614226 RxClkDly_Margin_A0==88 ps 9
401 23:06:10.614682 TxDqDly_Margin_A0==98 ps 10
402 23:06:10.617598 RxClkDly_Margin_A1==88 ps 9
403 23:06:10.618049 TxDqDly_Margin_A1==88 ps 9
404 23:06:10.623123 TrainedVREFDQ_A0==74
405 23:06:10.623579 TrainedVREFDQ_A1==74
406 23:06:10.624061 VrefDac_Margin_A0==24
407 23:06:10.628707 DeviceVref_Margin_A0==40
408 23:06:10.629161 VrefDac_Margin_A1==26
409 23:06:10.634536 DeviceVref_Margin_A1==40
410 23:06:10.634987
411 23:06:10.635417
412 23:06:10.635844 channel==1
413 23:06:10.636308 RxClkDly_Margin_A0==98 ps 10
414 23:06:10.639899 TxDqDly_Margin_A0==88 ps 9
415 23:06:10.640381 RxClkDly_Margin_A1==88 ps 9
416 23:06:10.645557 TxDqDly_Margin_A1==88 ps 9
417 23:06:10.646011 TrainedVREFDQ_A0==76
418 23:06:10.646446 TrainedVREFDQ_A1==77
419 23:06:10.651080 VrefDac_Margin_A0==22
420 23:06:10.651534 DeviceVref_Margin_A0==38
421 23:06:10.656666 VrefDac_Margin_A1==24
422 23:06:10.657112 DeviceVref_Margin_A1==37
423 23:06:10.657536
424 23:06:10.662292 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:06:10.662753
426 23:06:10.690289 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 23:06:10.695862 2D training succeed
428 23:06:10.701624 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:06:10.702088 auto size-- 65535DDR cs0 size: 2048MB
430 23:06:10.707068 DDR cs1 size: 2048MB
431 23:06:10.707521 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:06:10.712676 cs0 DataBus test pass
433 23:06:10.713127 cs1 DataBus test pass
434 23:06:10.713559 cs0 AddrBus test pass
435 23:06:10.718305 cs1 AddrBus test pass
436 23:06:10.718754
437 23:06:10.719188 100bdlr_step_size ps== 420
438 23:06:10.719625 result report
439 23:06:10.723890 boot times 0Enable ddr reg access
440 23:06:10.731385 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:06:10.744838 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:06:11.318652 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:06:11.319098 MVN_1=0x00000000
444 23:06:11.324043 MVN_2=0x00000000
445 23:06:11.329776 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:06:11.330209 OPS=0x10
447 23:06:11.330469 ring efuse init
448 23:06:11.330687 chipver efuse init
449 23:06:11.338018 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:06:11.338356 [0.018961 Inits done]
451 23:06:11.345600 secure task start!
452 23:06:11.346129 high task start!
453 23:06:11.346509 low task start!
454 23:06:11.346766 run into bl31
455 23:06:11.352226 NOTICE: BL31: v1.3(release):4fc40b1
456 23:06:11.360067 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:06:11.360509 NOTICE: BL31: G12A normal boot!
458 23:06:11.385425 NOTICE: BL31: BL33 decompress pass
459 23:06:11.391005 ERROR: Error initializing runtime service opteed_fast
460 23:06:12.624048
461 23:06:12.624746
462 23:06:12.632503 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:06:12.633002
464 23:06:12.633460 Model: Libre Computer AML-A311D-CC Alta
465 23:06:12.840849 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:06:12.864189 DRAM: 2 GiB (effective 3.8 GiB)
467 23:06:13.007200 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:06:13.013058 WDT: Not starting watchdog@f0d0
469 23:06:13.045347 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:06:13.057786 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:06:13.062737 ** Bad device specification mmc 0 **
472 23:06:13.073076 Card did not respond to voltage select! : -110
473 23:06:13.080729 ** Bad device specification mmc 0 **
474 23:06:13.081220 Couldn't find partition mmc 0
475 23:06:13.089049 Card did not respond to voltage select! : -110
476 23:06:13.094584 ** Bad device specification mmc 0 **
477 23:06:13.095056 Couldn't find partition mmc 0
478 23:06:13.099638 Error: could not access storage.
479 23:06:14.362227 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:06:14.362663 bl2_stage_init 0x01
481 23:06:14.362892 bl2_stage_init 0x81
482 23:06:14.367642 hw id: 0x0000 - pwm id 0x01
483 23:06:14.368127 bl2_stage_init 0xc1
484 23:06:14.368478 bl2_stage_init 0x02
485 23:06:14.368809
486 23:06:14.373292 L0:00000000
487 23:06:14.373648 L1:20000703
488 23:06:14.373875 L2:00008067
489 23:06:14.374088 L3:14000000
490 23:06:14.376083 B2:00402000
491 23:06:14.376314 B1:e0f83180
492 23:06:14.376526
493 23:06:14.376734 TE: 58124
494 23:06:14.376940
495 23:06:14.387162 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:06:14.387394
497 23:06:14.387607 Board ID = 1
498 23:06:14.387812 Set A53 clk to 24M
499 23:06:14.388038 Set A73 clk to 24M
500 23:06:14.392803 Set clk81 to 24M
501 23:06:14.393030 A53 clk: 1200 MHz
502 23:06:14.393237 A73 clk: 1200 MHz
503 23:06:14.398400 CLK81: 166.6M
504 23:06:14.398644 smccc: 00012a91
505 23:06:14.404058 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:06:14.404290 board id: 1
507 23:06:14.409584 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:06:14.423398 fw parse done
509 23:06:14.429339 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:06:14.472088 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:06:14.482958 PIEI prepare done
512 23:06:14.483442 fastboot data load
513 23:06:14.483894 fastboot data verify
514 23:06:14.488705 verify result: 266
515 23:06:14.494185 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:06:14.494670 LPDDR4 probe
517 23:06:14.495118 ddr clk to 1584MHz
518 23:06:14.502100 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:06:14.539354
520 23:06:14.539850 dmc_version 0001
521 23:06:14.546020 Check phy result
522 23:06:14.552037 INFO : End of CA training
523 23:06:14.552510 INFO : End of initialization
524 23:06:14.557503 INFO : Training has run successfully!
525 23:06:14.557972 Check phy result
526 23:06:14.563158 INFO : End of initialization
527 23:06:14.563621 INFO : End of read enable training
528 23:06:14.568666 INFO : End of fine write leveling
529 23:06:14.574280 INFO : End of Write leveling coarse delay
530 23:06:14.574758 INFO : Training has run successfully!
531 23:06:14.575200 Check phy result
532 23:06:14.579880 INFO : End of initialization
533 23:06:14.580403 INFO : End of read dq deskew training
534 23:06:14.585493 INFO : End of MPR read delay center optimization
535 23:06:14.591144 INFO : End of write delay center optimization
536 23:06:14.596729 INFO : End of read delay center optimization
537 23:06:14.597194 INFO : End of max read latency training
538 23:06:14.602321 INFO : Training has run successfully!
539 23:06:14.602788 1D training succeed
540 23:06:14.611534 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:06:14.659081 Check phy result
542 23:06:14.659587 INFO : End of initialization
543 23:06:14.681126 INFO : End of 2D read delay Voltage center optimization
544 23:06:14.701055 INFO : End of 2D read delay Voltage center optimization
545 23:06:14.753103 INFO : End of 2D write delay Voltage center optimization
546 23:06:14.802430 INFO : End of 2D write delay Voltage center optimization
547 23:06:14.808068 INFO : Training has run successfully!
548 23:06:14.808591
549 23:06:14.809065 channel==0
550 23:06:14.813594 RxClkDly_Margin_A0==88 ps 9
551 23:06:14.814130 TxDqDly_Margin_A0==98 ps 10
552 23:06:14.819216 RxClkDly_Margin_A1==88 ps 9
553 23:06:14.819737 TxDqDly_Margin_A1==98 ps 10
554 23:06:14.820265 TrainedVREFDQ_A0==74
555 23:06:14.824789 TrainedVREFDQ_A1==75
556 23:06:14.825300 VrefDac_Margin_A0==25
557 23:06:14.825764 DeviceVref_Margin_A0==40
558 23:06:14.830375 VrefDac_Margin_A1==25
559 23:06:14.830880 DeviceVref_Margin_A1==39
560 23:06:14.831342
561 23:06:14.831794
562 23:06:14.836054 channel==1
563 23:06:14.836564 RxClkDly_Margin_A0==88 ps 9
564 23:06:14.837024 TxDqDly_Margin_A0==98 ps 10
565 23:06:14.841580 RxClkDly_Margin_A1==98 ps 10
566 23:06:14.842080 TxDqDly_Margin_A1==88 ps 9
567 23:06:14.847225 TrainedVREFDQ_A0==77
568 23:06:14.847749 TrainedVREFDQ_A1==77
569 23:06:14.848259 VrefDac_Margin_A0==22
570 23:06:14.852781 DeviceVref_Margin_A0==37
571 23:06:14.853277 VrefDac_Margin_A1==22
572 23:06:14.858356 DeviceVref_Margin_A1==37
573 23:06:14.858876
574 23:06:14.859338 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:06:14.859799
576 23:06:14.892087 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 23:06:14.892741 2D training succeed
578 23:06:14.897577 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:06:14.903167 auto size-- 65535DDR cs0 size: 2048MB
580 23:06:14.903691 DDR cs1 size: 2048MB
581 23:06:14.908800 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:06:14.909405 cs0 DataBus test pass
583 23:06:14.914422 cs1 DataBus test pass
584 23:06:14.915011 cs0 AddrBus test pass
585 23:06:14.915504 cs1 AddrBus test pass
586 23:06:14.915959
587 23:06:14.920069 100bdlr_step_size ps== 420
588 23:06:14.920612 result report
589 23:06:14.925579 boot times 0Enable ddr reg access
590 23:06:14.930914 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:06:14.944447 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:06:15.518367 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:06:15.518977 MVN_1=0x00000000
594 23:06:15.523806 MVN_2=0x00000000
595 23:06:15.529623 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:06:15.530178 OPS=0x10
597 23:06:15.530668 ring efuse init
598 23:06:15.531164 chipver efuse init
599 23:06:15.537778 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:06:15.538299 [0.018960 Inits done]
601 23:06:15.538735 secure task start!
602 23:06:15.545350 high task start!
603 23:06:15.545824 low task start!
604 23:06:15.546258 run into bl31
605 23:06:15.551965 NOTICE: BL31: v1.3(release):4fc40b1
606 23:06:15.559794 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:06:15.560312 NOTICE: BL31: G12A normal boot!
608 23:06:15.585134 NOTICE: BL31: BL33 decompress pass
609 23:06:15.590907 ERROR: Error initializing runtime service opteed_fast
610 23:06:16.823828
611 23:06:16.824538
612 23:06:16.832191 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:06:16.832693
614 23:06:16.833150 Model: Libre Computer AML-A311D-CC Alta
615 23:06:17.040657 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:06:17.064034 DRAM: 2 GiB (effective 3.8 GiB)
617 23:06:17.206973 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:06:17.212799 WDT: Not starting watchdog@f0d0
619 23:06:17.245020 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:06:17.257574 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:06:17.262447 ** Bad device specification mmc 0 **
622 23:06:17.272780 Card did not respond to voltage select! : -110
623 23:06:17.280420 ** Bad device specification mmc 0 **
624 23:06:17.280898 Couldn't find partition mmc 0
625 23:06:17.288799 Card did not respond to voltage select! : -110
626 23:06:17.294222 ** Bad device specification mmc 0 **
627 23:06:17.294699 Couldn't find partition mmc 0
628 23:06:17.299399 Error: could not access storage.
629 23:06:17.643070 Net: eth0: ethernet@ff3f0000
630 23:06:17.643669 starting USB...
631 23:06:17.894935 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:06:17.895510 Starting the controller
633 23:06:17.901699 USB XHCI 1.10
634 23:06:19.612293 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:06:19.612911 bl2_stage_init 0x01
636 23:06:19.613369 bl2_stage_init 0x81
637 23:06:19.617892 hw id: 0x0000 - pwm id 0x01
638 23:06:19.618404 bl2_stage_init 0xc1
639 23:06:19.618898 bl2_stage_init 0x02
640 23:06:19.619375
641 23:06:19.623468 L0:00000000
642 23:06:19.624058 L1:20000703
643 23:06:19.624523 L2:00008067
644 23:06:19.624971 L3:14000000
645 23:06:19.626360 B2:00402000
646 23:06:19.626866 B1:e0f83180
647 23:06:19.627346
648 23:06:19.627817 TE: 58124
649 23:06:19.628303
650 23:06:19.637545 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:06:19.638124
652 23:06:19.638590 Board ID = 1
653 23:06:19.639035 Set A53 clk to 24M
654 23:06:19.639474 Set A73 clk to 24M
655 23:06:19.642385 Set clk81 to 24M
656 23:06:19.645779 A53 clk: 1200 MHz
657 23:06:19.646283 A73 clk: 1200 MHz
658 23:06:19.646732 CLK81: 166.6M
659 23:06:19.647172 smccc: 00012a92
660 23:06:19.651405 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:06:19.657018 board id: 1
662 23:06:19.663165 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:06:19.673485 fw parse done
664 23:06:19.679416 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:06:19.722067 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:06:19.733234 PIEI prepare done
667 23:06:19.733829 fastboot data load
668 23:06:19.734304 fastboot data verify
669 23:06:19.738696 verify result: 266
670 23:06:19.744211 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:06:19.744605 LPDDR4 probe
672 23:06:19.744825 ddr clk to 1584MHz
673 23:06:19.752197 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:06:19.789469
675 23:06:19.789883 dmc_version 0001
676 23:06:19.796249 Check phy result
677 23:06:19.801992 INFO : End of CA training
678 23:06:19.802546 INFO : End of initialization
679 23:06:19.807535 INFO : Training has run successfully!
680 23:06:19.808039 Check phy result
681 23:06:19.813138 INFO : End of initialization
682 23:06:19.813623 INFO : End of read enable training
683 23:06:19.818859 INFO : End of fine write leveling
684 23:06:19.824445 INFO : End of Write leveling coarse delay
685 23:06:19.825053 INFO : Training has run successfully!
686 23:06:19.825539 Check phy result
687 23:06:19.832299 INFO : End of initialization
688 23:06:19.833050 INFO : End of read dq deskew training
689 23:06:19.835491 INFO : End of MPR read delay center optimization
690 23:06:19.841075 INFO : End of write delay center optimization
691 23:06:19.846655 INFO : End of read delay center optimization
692 23:06:19.847151 INFO : End of max read latency training
693 23:06:19.852277 INFO : Training has run successfully!
694 23:06:19.852765 1D training succeed
695 23:06:19.861449 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:06:19.909154 Check phy result
697 23:06:19.909737 INFO : End of initialization
698 23:06:19.930954 INFO : End of 2D read delay Voltage center optimization
699 23:06:19.951149 INFO : End of 2D read delay Voltage center optimization
700 23:06:20.003337 INFO : End of 2D write delay Voltage center optimization
701 23:06:20.052646 INFO : End of 2D write delay Voltage center optimization
702 23:06:20.058078 INFO : Training has run successfully!
703 23:06:20.058559
704 23:06:20.058970 channel==0
705 23:06:20.063646 RxClkDly_Margin_A0==88 ps 9
706 23:06:20.064155 TxDqDly_Margin_A0==98 ps 10
707 23:06:20.069251 RxClkDly_Margin_A1==88 ps 9
708 23:06:20.069706 TxDqDly_Margin_A1==98 ps 10
709 23:06:20.070106 TrainedVREFDQ_A0==74
710 23:06:20.074841 TrainedVREFDQ_A1==75
711 23:06:20.075303 VrefDac_Margin_A0==25
712 23:06:20.075698 DeviceVref_Margin_A0==40
713 23:06:20.080415 VrefDac_Margin_A1==25
714 23:06:20.080869 DeviceVref_Margin_A1==39
715 23:06:20.081261
716 23:06:20.081670
717 23:06:20.086021 channel==1
718 23:06:20.086473 RxClkDly_Margin_A0==98 ps 10
719 23:06:20.086870 TxDqDly_Margin_A0==98 ps 10
720 23:06:20.091589 RxClkDly_Margin_A1==88 ps 9
721 23:06:20.092073 TxDqDly_Margin_A1==88 ps 9
722 23:06:20.097200 TrainedVREFDQ_A0==77
723 23:06:20.097659 TrainedVREFDQ_A1==77
724 23:06:20.098056 VrefDac_Margin_A0==23
725 23:06:20.102822 DeviceVref_Margin_A0==37
726 23:06:20.103278 VrefDac_Margin_A1==24
727 23:06:20.108428 DeviceVref_Margin_A1==37
728 23:06:20.108902
729 23:06:20.109306 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:06:20.109695
731 23:06:20.142029 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000018 dram_vref_reg_value 0x 00000060
732 23:06:20.142530 2D training succeed
733 23:06:20.147624 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:06:20.153211 auto size-- 65535DDR cs0 size: 2048MB
735 23:06:20.153677 DDR cs1 size: 2048MB
736 23:06:20.158850 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:06:20.159316 cs0 DataBus test pass
738 23:06:20.164426 cs1 DataBus test pass
739 23:06:20.164881 cs0 AddrBus test pass
740 23:06:20.165276 cs1 AddrBus test pass
741 23:06:20.165664
742 23:06:20.170017 100bdlr_step_size ps== 420
743 23:06:20.170476 result report
744 23:06:20.175609 boot times 0Enable ddr reg access
745 23:06:20.181003 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:06:20.194497 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:06:20.768239 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:06:20.768867 MVN_1=0x00000000
749 23:06:20.773587 MVN_2=0x00000000
750 23:06:20.779378 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:06:20.779886 OPS=0x10
752 23:06:20.780343 ring efuse init
753 23:06:20.780737 chipver efuse init
754 23:06:20.784973 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:06:20.790523 [0.018961 Inits done]
756 23:06:20.790947 secure task start!
757 23:06:20.791337 high task start!
758 23:06:20.795155 low task start!
759 23:06:20.795566 run into bl31
760 23:06:20.801763 NOTICE: BL31: v1.3(release):4fc40b1
761 23:06:20.809588 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:06:20.810006 NOTICE: BL31: G12A normal boot!
763 23:06:20.834971 NOTICE: BL31: BL33 decompress pass
764 23:06:20.840629 ERROR: Error initializing runtime service opteed_fast
765 23:06:22.073655
766 23:06:22.074257
767 23:06:22.081984 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:06:22.082429
769 23:06:22.082838 Model: Libre Computer AML-A311D-CC Alta
770 23:06:22.290389 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:06:22.313760 DRAM: 2 GiB (effective 3.8 GiB)
772 23:06:22.456856 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:06:22.462626 WDT: Not starting watchdog@f0d0
774 23:06:22.494920 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:06:22.507307 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:06:22.512278 ** Bad device specification mmc 0 **
777 23:06:22.522629 Card did not respond to voltage select! : -110
778 23:06:22.530258 ** Bad device specification mmc 0 **
779 23:06:22.530715 Couldn't find partition mmc 0
780 23:06:22.538640 Card did not respond to voltage select! : -110
781 23:06:22.544160 ** Bad device specification mmc 0 **
782 23:06:22.544593 Couldn't find partition mmc 0
783 23:06:22.549204 Error: could not access storage.
784 23:06:22.891687 Net: eth0: ethernet@ff3f0000
785 23:06:22.892243 starting USB...
786 23:06:23.143516 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:06:23.144039 Starting the controller
788 23:06:23.150427 USB XHCI 1.10
789 23:06:25.312280 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:06:25.312865 bl2_stage_init 0x01
791 23:06:25.313296 bl2_stage_init 0x81
792 23:06:25.317816 hw id: 0x0000 - pwm id 0x01
793 23:06:25.318264 bl2_stage_init 0xc1
794 23:06:25.318678 bl2_stage_init 0x02
795 23:06:25.319079
796 23:06:25.323361 L0:00000000
797 23:06:25.323797 L1:20000703
798 23:06:25.324305 L2:00008067
799 23:06:25.324717 L3:14000000
800 23:06:25.329026 B2:00402000
801 23:06:25.329462 B1:e0f83180
802 23:06:25.329865
803 23:06:25.330267 TE: 58124
804 23:06:25.330665
805 23:06:25.334600 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:06:25.335051
807 23:06:25.335460 Board ID = 1
808 23:06:25.340220 Set A53 clk to 24M
809 23:06:25.340667 Set A73 clk to 24M
810 23:06:25.341075 Set clk81 to 24M
811 23:06:25.345831 A53 clk: 1200 MHz
812 23:06:25.346285 A73 clk: 1200 MHz
813 23:06:25.346689 CLK81: 166.6M
814 23:06:25.347084 smccc: 00012a92
815 23:06:25.351451 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:06:25.357114 board id: 1
817 23:06:25.362079 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:06:25.373652 fw parse done
819 23:06:25.379529 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:06:25.422042 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:06:25.433017 PIEI prepare done
822 23:06:25.433481 fastboot data load
823 23:06:25.433898 fastboot data verify
824 23:06:25.438626 verify result: 266
825 23:06:25.444205 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:06:25.444642 LPDDR4 probe
827 23:06:25.445046 ddr clk to 1584MHz
828 23:06:25.452179 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:06:25.489475
830 23:06:25.489939 dmc_version 0001
831 23:06:25.496092 Check phy result
832 23:06:25.501977 INFO : End of CA training
833 23:06:25.502416 INFO : End of initialization
834 23:06:25.507603 INFO : Training has run successfully!
835 23:06:25.508072 Check phy result
836 23:06:25.513165 INFO : End of initialization
837 23:06:25.513594 INFO : End of read enable training
838 23:06:25.516482 INFO : End of fine write leveling
839 23:06:25.522056 INFO : End of Write leveling coarse delay
840 23:06:25.527656 INFO : Training has run successfully!
841 23:06:25.528113 Check phy result
842 23:06:25.528518 INFO : End of initialization
843 23:06:25.533270 INFO : End of read dq deskew training
844 23:06:25.536616 INFO : End of MPR read delay center optimization
845 23:06:25.542159 INFO : End of write delay center optimization
846 23:06:25.547759 INFO : End of read delay center optimization
847 23:06:25.548216 INFO : End of max read latency training
848 23:06:25.553362 INFO : Training has run successfully!
849 23:06:25.553794 1D training succeed
850 23:06:25.561522 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:06:25.609133 Check phy result
852 23:06:25.609576 INFO : End of initialization
853 23:06:25.630872 INFO : End of 2D read delay Voltage center optimization
854 23:06:25.650255 INFO : End of 2D read delay Voltage center optimization
855 23:06:25.702303 INFO : End of 2D write delay Voltage center optimization
856 23:06:25.751693 INFO : End of 2D write delay Voltage center optimization
857 23:06:25.757239 INFO : Training has run successfully!
858 23:06:25.757669
859 23:06:25.758075 channel==0
860 23:06:25.762849 RxClkDly_Margin_A0==88 ps 9
861 23:06:25.763277 TxDqDly_Margin_A0==98 ps 10
862 23:06:25.768482 RxClkDly_Margin_A1==88 ps 9
863 23:06:25.768916 TxDqDly_Margin_A1==98 ps 10
864 23:06:25.769324 TrainedVREFDQ_A0==74
865 23:06:25.774044 TrainedVREFDQ_A1==74
866 23:06:25.774544 VrefDac_Margin_A0==25
867 23:06:25.774957 DeviceVref_Margin_A0==40
868 23:06:25.779657 VrefDac_Margin_A1==25
869 23:06:25.780153 DeviceVref_Margin_A1==40
870 23:06:25.780542
871 23:06:25.780925
872 23:06:25.785231 channel==1
873 23:06:25.785644 RxClkDly_Margin_A0==98 ps 10
874 23:06:25.786029 TxDqDly_Margin_A0==98 ps 10
875 23:06:25.790797 RxClkDly_Margin_A1==88 ps 9
876 23:06:25.791213 TxDqDly_Margin_A1==88 ps 9
877 23:06:25.796375 TrainedVREFDQ_A0==77
878 23:06:25.796788 TrainedVREFDQ_A1==77
879 23:06:25.797179 VrefDac_Margin_A0==23
880 23:06:25.802001 DeviceVref_Margin_A0==37
881 23:06:25.802411 VrefDac_Margin_A1==24
882 23:06:25.807618 DeviceVref_Margin_A1==37
883 23:06:25.808073
884 23:06:25.808464 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:06:25.808847
886 23:06:25.841230 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000017 00000016 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 23:06:25.841682 2D training succeed
888 23:06:25.846788 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:06:25.852475 auto size-- 65535DDR cs0 size: 2048MB
890 23:06:25.852887 DDR cs1 size: 2048MB
891 23:06:25.857986 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:06:25.858397 cs0 DataBus test pass
893 23:06:25.863638 cs1 DataBus test pass
894 23:06:25.864084 cs0 AddrBus test pass
895 23:06:25.864473 cs1 AddrBus test pass
896 23:06:25.864853
897 23:06:25.869193 100bdlr_step_size ps== 420
898 23:06:25.869611 result report
899 23:06:25.874791 boot times 0Enable ddr reg access
900 23:06:25.880164 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:06:25.893666 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:06:26.466789 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:06:26.467377 MVN_1=0x00000000
904 23:06:26.472215 MVN_2=0x00000000
905 23:06:26.477974 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:06:26.478412 OPS=0x10
907 23:06:26.478820 ring efuse init
908 23:06:26.479222 chipver efuse init
909 23:06:26.483612 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:06:26.489225 [0.018961 Inits done]
911 23:06:26.489667 secure task start!
912 23:06:26.490068 high task start!
913 23:06:26.492887 low task start!
914 23:06:26.493306 run into bl31
915 23:06:26.500426 NOTICE: BL31: v1.3(release):4fc40b1
916 23:06:26.507267 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:06:26.507704 NOTICE: BL31: G12A normal boot!
918 23:06:26.533607 NOTICE: BL31: BL33 decompress pass
919 23:06:26.538382 ERROR: Error initializing runtime service opteed_fast
920 23:06:27.772263
921 23:06:27.772851
922 23:06:27.780548 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:06:27.780995
924 23:06:27.781414 Model: Libre Computer AML-A311D-CC Alta
925 23:06:27.989088 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:06:28.012453 DRAM: 2 GiB (effective 3.8 GiB)
927 23:06:28.155408 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:06:28.161256 WDT: Not starting watchdog@f0d0
929 23:06:28.193511 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:06:28.205974 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:06:28.210512 ** Bad device specification mmc 0 **
932 23:06:28.221279 Card did not respond to voltage select! : -110
933 23:06:28.229025 ** Bad device specification mmc 0 **
934 23:06:28.229453 Couldn't find partition mmc 0
935 23:06:28.237237 Card did not respond to voltage select! : -110
936 23:06:28.242817 ** Bad device specification mmc 0 **
937 23:06:28.243253 Couldn't find partition mmc 0
938 23:06:28.247888 Error: could not access storage.
939 23:06:28.590383 Net: eth0: ethernet@ff3f0000
940 23:06:28.590937 starting USB...
941 23:06:28.842131 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:06:28.842619 Starting the controller
943 23:06:28.848172 USB XHCI 1.10
944 23:06:30.403467 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 23:06:30.410814 scanning usb for storage devices... 0 Storage Device(s) found
947 23:06:30.462394 Hit any key to stop autoboot: 1
948 23:06:30.463179 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 23:06:30.463774 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 23:06:30.464284 Setting prompt string to ['=>']
951 23:06:30.464772 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 23:06:30.468195 0
953 23:06:30.469041 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 23:06:30.469526 Sending with 10 millisecond of delay
956 23:06:31.604082 => setenv autoload no
957 23:06:31.614841 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 23:06:31.619713 setenv autoload no
959 23:06:31.620453 Sending with 10 millisecond of delay
961 23:06:33.417183 => setenv initrd_high 0xffffffff
962 23:06:33.428012 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 23:06:33.428844 setenv initrd_high 0xffffffff
964 23:06:33.429551 Sending with 10 millisecond of delay
966 23:06:35.048166 => setenv fdt_high 0xffffffff
967 23:06:35.058928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 23:06:35.059446 setenv fdt_high 0xffffffff
969 23:06:35.059956 Sending with 10 millisecond of delay
971 23:06:35.351814 => dhcp
972 23:06:35.362630 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 23:06:35.363442 dhcp
974 23:06:35.363873 Speed: 1000, full duplex
975 23:06:35.364325 BOOTP broadcast 1
976 23:06:35.371110 DHCP client bound to address 192.168.6.27 (8 ms)
977 23:06:35.371831 Sending with 10 millisecond of delay
979 23:06:37.048397 => setenv serverip 192.168.6.2
980 23:06:37.058992 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 23:06:37.059573 setenv serverip 192.168.6.2
982 23:06:37.060060 Sending with 10 millisecond of delay
984 23:06:40.782629 => tftpboot 0x01080000 977220/tftp-deploy-uk7h45p8/kernel/uImage
985 23:06:40.793417 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 23:06:40.794235 tftpboot 0x01080000 977220/tftp-deploy-uk7h45p8/kernel/uImage
987 23:06:40.794693 Speed: 1000, full duplex
988 23:06:40.795105 Using ethernet@ff3f0000 device
989 23:06:40.796320 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 23:06:40.801736 Filename '977220/tftp-deploy-uk7h45p8/kernel/uImage'.
991 23:06:40.805716 Load address: 0x1080000
992 23:06:43.612276 Loading: *################################################## 43.6 MiB
993 23:06:43.612896 15.5 MiB/s
994 23:06:43.613326 done
995 23:06:43.616868 Bytes transferred = 45713984 (2b98a40 hex)
996 23:06:43.617661 Sending with 10 millisecond of delay
998 23:06:48.303203 => tftpboot 0x08000000 977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
999 23:06:48.313996 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 23:06:48.314850 tftpboot 0x08000000 977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot
1001 23:06:48.315296 Speed: 1000, full duplex
1002 23:06:48.315709 Using ethernet@ff3f0000 device
1003 23:06:48.317010 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 23:06:48.328789 Filename '977220/tftp-deploy-uk7h45p8/ramdisk/ramdisk.cpio.gz.uboot'.
1005 23:06:48.329300 Load address: 0x8000000
1006 23:06:55.306424 Loading: *###################T ############################## UDP wrong checksum 00000005 00008445
1007 23:07:00.307355 T UDP wrong checksum 00000005 00008445
1008 23:07:02.190038 UDP wrong checksum 000000ff 00001a18
1009 23:07:02.230981 UDP wrong checksum 000000ff 0000b60a
1010 23:07:10.310477 T T UDP wrong checksum 00000005 00008445
1011 23:07:16.630650 T UDP wrong checksum 000000ff 0000c9da
1012 23:07:16.692089 UDP wrong checksum 000000ff 000062cd
1013 23:07:30.313969 T T T UDP wrong checksum 00000005 00008445
1014 23:07:45.318412 T T
1015 23:07:45.318855 Retry count exceeded; starting again
1017 23:07:45.320575 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 23:07:45.321562 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 23:07:45.322289 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 23:07:45.322864 end: 2 uboot-action (duration 00:01:47) [common]
1026 23:07:45.323688 Cleaning after the job
1027 23:07:45.325535 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/ramdisk
1028 23:07:45.326689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/kernel
1029 23:07:45.352885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/dtb
1030 23:07:45.353706 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/nfsrootfs
1031 23:07:45.668662 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977220/tftp-deploy-uk7h45p8/modules
1032 23:07:45.689736 start: 4.1 power-off (timeout 00:00:30) [common]
1033 23:07:45.690466 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 23:07:45.724614 >> OK - accepted request
1035 23:07:45.726836 Returned 0 in 0 seconds
1036 23:07:45.827711 end: 4.1 power-off (duration 00:00:00) [common]
1038 23:07:45.828817 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 23:07:45.829522 Listened to connection for namespace 'common' for up to 1s
1040 23:07:46.830089 Finalising connection for namespace 'common'
1041 23:07:46.830608 Disconnecting from shell: Finalise
1042 23:07:46.830909 =>
1043 23:07:46.931730 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 23:07:46.932500 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977220
1045 23:07:49.469571 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977220
1046 23:07:49.470180 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.