Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:57:34.687195 lava-dispatcher, installed at version: 2024.01
2 22:57:34.687951 start: 0 validate
3 22:57:34.688442 Start time: 2024-11-11 22:57:34.688412+00:00 (UTC)
4 22:57:34.688974 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:57:34.689500 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:57:34.734562 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:57:34.735139 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:57:34.770149 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:57:34.770801 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:57:34.805272 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:57:34.805775 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:57:34.838991 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:57:34.839456 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc6-263-g52cf5128e13ea%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:57:34.880141 validate duration: 0.19
16 22:57:34.881001 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:57:34.881357 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:57:34.881676 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:57:34.882291 Not decompressing ramdisk as can be used compressed.
20 22:57:34.882770 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 22:57:34.883072 saving as /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/ramdisk/initrd.cpio.gz
22 22:57:34.883350 total size: 5628140 (5 MB)
23 22:57:34.925551 progress 0 % (0 MB)
24 22:57:34.932342 progress 5 % (0 MB)
25 22:57:34.940454 progress 10 % (0 MB)
26 22:57:34.947548 progress 15 % (0 MB)
27 22:57:34.955613 progress 20 % (1 MB)
28 22:57:34.959558 progress 25 % (1 MB)
29 22:57:34.963579 progress 30 % (1 MB)
30 22:57:34.967656 progress 35 % (1 MB)
31 22:57:34.971438 progress 40 % (2 MB)
32 22:57:34.975467 progress 45 % (2 MB)
33 22:57:34.979079 progress 50 % (2 MB)
34 22:57:34.983240 progress 55 % (2 MB)
35 22:57:34.987286 progress 60 % (3 MB)
36 22:57:34.990938 progress 65 % (3 MB)
37 22:57:34.995149 progress 70 % (3 MB)
38 22:57:34.999088 progress 75 % (4 MB)
39 22:57:35.003278 progress 80 % (4 MB)
40 22:57:35.007040 progress 85 % (4 MB)
41 22:57:35.011165 progress 90 % (4 MB)
42 22:57:35.015137 progress 95 % (5 MB)
43 22:57:35.018552 progress 100 % (5 MB)
44 22:57:35.019247 5 MB downloaded in 0.14 s (39.50 MB/s)
45 22:57:35.019808 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:57:35.020782 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:57:35.021105 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:57:35.021402 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:57:35.021898 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/kernel/Image
51 22:57:35.022190 saving as /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/kernel/Image
52 22:57:35.022412 total size: 45713920 (43 MB)
53 22:57:35.022631 No compression specified
54 22:57:35.063139 progress 0 % (0 MB)
55 22:57:35.091259 progress 5 % (2 MB)
56 22:57:35.120285 progress 10 % (4 MB)
57 22:57:35.148734 progress 15 % (6 MB)
58 22:57:35.177161 progress 20 % (8 MB)
59 22:57:35.205600 progress 25 % (10 MB)
60 22:57:35.234006 progress 30 % (13 MB)
61 22:57:35.263332 progress 35 % (15 MB)
62 22:57:35.292218 progress 40 % (17 MB)
63 22:57:35.322433 progress 45 % (19 MB)
64 22:57:35.354018 progress 50 % (21 MB)
65 22:57:35.382646 progress 55 % (24 MB)
66 22:57:35.412001 progress 60 % (26 MB)
67 22:57:35.440088 progress 65 % (28 MB)
68 22:57:35.468494 progress 70 % (30 MB)
69 22:57:35.497357 progress 75 % (32 MB)
70 22:57:35.526171 progress 80 % (34 MB)
71 22:57:35.555134 progress 85 % (37 MB)
72 22:57:35.583387 progress 90 % (39 MB)
73 22:57:35.612722 progress 95 % (41 MB)
74 22:57:35.640956 progress 100 % (43 MB)
75 22:57:35.641464 43 MB downloaded in 0.62 s (70.43 MB/s)
76 22:57:35.641935 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:57:35.642751 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:57:35.643022 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:57:35.643285 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:57:35.643739 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:57:35.644036 saving as /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:57:35.644245 total size: 53209 (0 MB)
84 22:57:35.644453 No compression specified
85 22:57:35.681816 progress 61 % (0 MB)
86 22:57:35.682648 progress 100 % (0 MB)
87 22:57:35.683172 0 MB downloaded in 0.04 s (1.30 MB/s)
88 22:57:35.683627 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:57:35.684472 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:57:35.684736 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:57:35.684995 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:57:35.685440 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 22:57:35.685679 saving as /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/nfsrootfs/full.rootfs.tar
95 22:57:35.685881 total size: 474398908 (452 MB)
96 22:57:35.686088 Using unxz to decompress xz
97 22:57:35.727311 progress 0 % (0 MB)
98 22:57:36.877879 progress 5 % (22 MB)
99 22:57:38.382829 progress 10 % (45 MB)
100 22:57:38.821091 progress 15 % (67 MB)
101 22:57:39.641529 progress 20 % (90 MB)
102 22:57:40.181385 progress 25 % (113 MB)
103 22:57:40.562461 progress 30 % (135 MB)
104 22:57:41.192506 progress 35 % (158 MB)
105 22:57:42.026428 progress 40 % (181 MB)
106 22:57:42.779073 progress 45 % (203 MB)
107 22:57:43.346934 progress 50 % (226 MB)
108 22:57:43.985714 progress 55 % (248 MB)
109 22:57:45.181378 progress 60 % (271 MB)
110 22:57:46.608216 progress 65 % (294 MB)
111 22:57:48.190745 progress 70 % (316 MB)
112 22:57:51.445585 progress 75 % (339 MB)
113 22:57:53.893648 progress 80 % (361 MB)
114 22:57:56.779577 progress 85 % (384 MB)
115 22:57:59.905860 progress 90 % (407 MB)
116 22:58:03.114763 progress 95 % (429 MB)
117 22:58:06.358371 progress 100 % (452 MB)
118 22:58:06.371626 452 MB downloaded in 30.69 s (14.74 MB/s)
119 22:58:06.372254 end: 1.4.1 http-download (duration 00:00:31) [common]
121 22:58:06.373145 end: 1.4 download-retry (duration 00:00:31) [common]
122 22:58:06.373448 start: 1.5 download-retry (timeout 00:09:29) [common]
123 22:58:06.373750 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 22:58:06.374264 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc6-263-g52cf5128e13ea/arm64/defconfig/gcc-12/modules.tar.xz
125 22:58:06.374542 saving as /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/modules/modules.tar
126 22:58:06.374766 total size: 11609460 (11 MB)
127 22:58:06.375011 Using unxz to decompress xz
128 22:58:06.411120 progress 0 % (0 MB)
129 22:58:06.477974 progress 5 % (0 MB)
130 22:58:06.551419 progress 10 % (1 MB)
131 22:58:06.646145 progress 15 % (1 MB)
132 22:58:06.736193 progress 20 % (2 MB)
133 22:58:06.816041 progress 25 % (2 MB)
134 22:58:06.891003 progress 30 % (3 MB)
135 22:58:06.968819 progress 35 % (3 MB)
136 22:58:07.040742 progress 40 % (4 MB)
137 22:58:07.116428 progress 45 % (5 MB)
138 22:58:07.199561 progress 50 % (5 MB)
139 22:58:07.275750 progress 55 % (6 MB)
140 22:58:07.360351 progress 60 % (6 MB)
141 22:58:07.441300 progress 65 % (7 MB)
142 22:58:07.521311 progress 70 % (7 MB)
143 22:58:07.598857 progress 75 % (8 MB)
144 22:58:07.681378 progress 80 % (8 MB)
145 22:58:07.760700 progress 85 % (9 MB)
146 22:58:07.838309 progress 90 % (9 MB)
147 22:58:07.915210 progress 95 % (10 MB)
148 22:58:07.991959 progress 100 % (11 MB)
149 22:58:08.003195 11 MB downloaded in 1.63 s (6.80 MB/s)
150 22:58:08.003771 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:58:08.005392 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:58:08.005965 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 22:58:08.006532 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 22:58:23.642183 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977246/extract-nfsrootfs-zrkkk26m
156 22:58:23.642782 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:58:23.643066 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 22:58:23.643784 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0
159 22:58:23.644271 makedir: /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin
160 22:58:23.644600 makedir: /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/tests
161 22:58:23.644911 makedir: /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/results
162 22:58:23.645245 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-add-keys
163 22:58:23.645768 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-add-sources
164 22:58:23.646382 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-background-process-start
165 22:58:23.646937 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-background-process-stop
166 22:58:23.647490 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-common-functions
167 22:58:23.647973 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-echo-ipv4
168 22:58:23.648490 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-install-packages
169 22:58:23.648966 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-installed-packages
170 22:58:23.649432 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-os-build
171 22:58:23.649896 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-probe-channel
172 22:58:23.650363 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-probe-ip
173 22:58:23.650861 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-target-ip
174 22:58:23.651364 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-target-mac
175 22:58:23.651846 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-target-storage
176 22:58:23.652406 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-case
177 22:58:23.652887 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-event
178 22:58:23.653418 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-feedback
179 22:58:23.653892 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-raise
180 22:58:23.654366 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-reference
181 22:58:23.654869 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-runner
182 22:58:23.655383 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-set
183 22:58:23.655853 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-test-shell
184 22:58:23.656377 Updating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-install-packages (oe)
185 22:58:23.656907 Updating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/bin/lava-installed-packages (oe)
186 22:58:23.657345 Creating /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/environment
187 22:58:23.657708 LAVA metadata
188 22:58:23.657965 - LAVA_JOB_ID=977246
189 22:58:23.658176 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:58:23.658531 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 22:58:23.659490 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:58:23.659800 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 22:58:23.660068 skipped lava-vland-overlay
194 22:58:23.660316 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:58:23.660566 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 22:58:23.660779 skipped lava-multinode-overlay
197 22:58:23.661015 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:58:23.661259 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 22:58:23.661502 Loading test definitions
200 22:58:23.661771 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 22:58:23.661985 Using /lava-977246 at stage 0
202 22:58:23.663142 uuid=977246_1.6.2.4.1 testdef=None
203 22:58:23.663453 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:58:23.663712 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 22:58:23.665443 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:58:23.666220 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 22:58:23.668332 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:58:23.669150 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 22:58:23.671171 runner path: /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 977246_1.6.2.4.1
212 22:58:23.671708 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:58:23.672485 Creating lava-test-runner.conf files
215 22:58:23.672685 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977246/lava-overlay-m23qo5_0/lava-977246/0 for stage 0
216 22:58:23.673015 - 0_v4l2-decoder-conformance-vp9
217 22:58:23.673355 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:58:23.673622 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 22:58:23.694505 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:58:23.694879 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 22:58:23.695136 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:58:23.695399 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:58:23.695655 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 22:58:24.383964 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:58:24.384463 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 22:58:24.384708 extracting modules file /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977246/extract-nfsrootfs-zrkkk26m
227 22:58:25.729234 extracting modules file /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk
228 22:58:27.104936 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:58:27.105408 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 22:58:27.105696 [common] Applying overlay to NFS
231 22:58:27.105911 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977246/compress-overlay-swcwh5ko/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977246/extract-nfsrootfs-zrkkk26m
232 22:58:27.134880 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:58:27.135264 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 22:58:27.135532 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 22:58:27.135758 Converting downloaded kernel to a uImage
236 22:58:27.136078 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/kernel/Image /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/kernel/uImage
237 22:58:27.615615 output: Image Name:
238 22:58:27.616069 output: Created: Mon Nov 11 22:58:27 2024
239 22:58:27.616282 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:58:27.616487 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 22:58:27.616688 output: Load Address: 01080000
242 22:58:27.616887 output: Entry Point: 01080000
243 22:58:27.617084 output:
244 22:58:27.617420 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:58:27.617687 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:58:27.617952 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 22:58:27.618203 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:58:27.618459 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 22:58:27.618709 Building ramdisk /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk
250 22:58:29.759449 >> 166793 blocks
251 22:58:37.444070 Adding RAMdisk u-boot header.
252 22:58:37.444765 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk.cpio.gz.uboot
253 22:58:37.707107 output: Image Name:
254 22:58:37.707513 output: Created: Mon Nov 11 22:58:37 2024
255 22:58:37.707725 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:58:37.707929 output: Data Size: 23431735 Bytes = 22882.55 KiB = 22.35 MiB
257 22:58:37.708405 output: Load Address: 00000000
258 22:58:37.708848 output: Entry Point: 00000000
259 22:58:37.709299 output:
260 22:58:37.710314 rename /var/lib/lava/dispatcher/tmp/977246/extract-overlay-ramdisk-zf5hoy4w/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
261 22:58:37.711073 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:58:37.711661 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 22:58:37.712278 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 22:58:37.712776 No LXC device requested
265 22:58:37.713323 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:58:37.713875 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 22:58:37.714415 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:58:37.714866 Checking files for TFTP limit of 4294967296 bytes.
269 22:58:37.717804 end: 1 tftp-deploy (duration 00:01:03) [common]
270 22:58:37.718436 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:58:37.719004 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:58:37.719547 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:58:37.720125 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:58:37.720702 Using kernel file from prepare-kernel: 977246/tftp-deploy-ihuxcyxd/kernel/uImage
275 22:58:37.721386 substitutions:
276 22:58:37.721828 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:58:37.722262 - {DTB_ADDR}: 0x01070000
278 22:58:37.722694 - {DTB}: 977246/tftp-deploy-ihuxcyxd/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 22:58:37.723128 - {INITRD}: 977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
280 22:58:37.723560 - {KERNEL_ADDR}: 0x01080000
281 22:58:37.724017 - {KERNEL}: 977246/tftp-deploy-ihuxcyxd/kernel/uImage
282 22:58:37.724458 - {LAVA_MAC}: None
283 22:58:37.724930 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977246/extract-nfsrootfs-zrkkk26m
284 22:58:37.725363 - {NFS_SERVER_IP}: 192.168.6.2
285 22:58:37.725791 - {PRESEED_CONFIG}: None
286 22:58:37.726216 - {PRESEED_LOCAL}: None
287 22:58:37.726640 - {RAMDISK_ADDR}: 0x08000000
288 22:58:37.727064 - {RAMDISK}: 977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
289 22:58:37.727489 - {ROOT_PART}: None
290 22:58:37.727911 - {ROOT}: None
291 22:58:37.728368 - {SERVER_IP}: 192.168.6.2
292 22:58:37.728793 - {TEE_ADDR}: 0x83000000
293 22:58:37.729219 - {TEE}: None
294 22:58:37.729645 Parsed boot commands:
295 22:58:37.730062 - setenv autoload no
296 22:58:37.730487 - setenv initrd_high 0xffffffff
297 22:58:37.730913 - setenv fdt_high 0xffffffff
298 22:58:37.731336 - dhcp
299 22:58:37.731759 - setenv serverip 192.168.6.2
300 22:58:37.732217 - tftpboot 0x01080000 977246/tftp-deploy-ihuxcyxd/kernel/uImage
301 22:58:37.732645 - tftpboot 0x08000000 977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
302 22:58:37.733068 - tftpboot 0x01070000 977246/tftp-deploy-ihuxcyxd/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 22:58:37.733492 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977246/extract-nfsrootfs-zrkkk26m,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:58:37.733929 - bootm 0x01080000 0x08000000 0x01070000
305 22:58:37.734469 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:58:37.736110 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:58:37.736574 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 22:58:37.752019 Setting prompt string to ['lava-test: # ']
310 22:58:37.753629 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:58:37.754263 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:58:37.754850 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:58:37.755410 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:58:37.756666 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 22:58:37.794826 >> OK - accepted request
316 22:58:37.797224 Returned 0 in 0 seconds
317 22:58:37.898483 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:58:37.900375 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:58:37.901012 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:58:37.901584 Setting prompt string to ['Hit any key to stop autoboot']
322 22:58:37.902089 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:58:37.903798 Trying 192.168.56.21...
324 22:58:37.904367 Connected to conserv1.
325 22:58:37.904828 Escape character is '^]'.
326 22:58:37.905282
327 22:58:37.905747 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 22:58:37.906200
329 22:58:44.663507 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 22:58:44.664273 bl2_stage_init 0x01
331 22:58:44.664777 bl2_stage_init 0x81
332 22:58:44.668840 hw id: 0x0000 - pwm id 0x01
333 22:58:44.669487 bl2_stage_init 0xc1
334 22:58:44.674093 bl2_stage_init 0x02
335 22:58:44.674706
336 22:58:44.675240 L0:00000000
337 22:58:44.675791 L1:00000703
338 22:58:44.676364 L2:00008067
339 22:58:44.676905 L3:15000000
340 22:58:44.679626 S1:00000000
341 22:58:44.680179 B2:20282000
342 22:58:44.680678 B1:a0f83180
343 22:58:44.681143
344 22:58:44.681600 TE: 67623
345 22:58:44.682055
346 22:58:44.685250 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 22:58:44.690834
348 22:58:44.691417 Board ID = 1
349 22:58:44.691918 Set cpu clk to 24M
350 22:58:44.692425 Set clk81 to 24M
351 22:58:44.696340 Use GP1_pll as DSU clk.
352 22:58:44.696878 DSU clk: 1200 Mhz
353 22:58:44.697340 CPU clk: 1200 MHz
354 22:58:44.702022 Set clk81 to 166.6M
355 22:58:44.707570 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 22:58:44.708201 board id: 1
357 22:58:44.715231 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:58:44.725799 fw parse done
359 22:58:44.731748 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:58:44.774373 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:58:44.785432 PIEI prepare done
362 22:58:44.786094 fastboot data load
363 22:58:44.786598 fastboot data verify
364 22:58:44.790978 verify result: 266
365 22:58:44.796668 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 22:58:44.797337 LPDDR4 probe
367 22:58:44.797806 ddr clk to 1584MHz
368 22:58:44.804319 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:58:44.841732
370 22:58:44.842386 dmc_version 0001
371 22:58:44.848593 Check phy result
372 22:58:44.854557 INFO : End of CA training
373 22:58:44.855188 INFO : End of initialization
374 22:58:44.859922 INFO : Training has run successfully!
375 22:58:44.860541 Check phy result
376 22:58:44.865698 INFO : End of initialization
377 22:58:44.866378 INFO : End of read enable training
378 22:58:44.871214 INFO : End of fine write leveling
379 22:58:44.876733 INFO : End of Write leveling coarse delay
380 22:58:44.877282 INFO : Training has run successfully!
381 22:58:44.877742 Check phy result
382 22:58:44.882405 INFO : End of initialization
383 22:58:44.882971 INFO : End of read dq deskew training
384 22:58:44.887857 INFO : End of MPR read delay center optimization
385 22:58:44.893620 INFO : End of write delay center optimization
386 22:58:44.899394 INFO : End of read delay center optimization
387 22:58:44.899777 INFO : End of max read latency training
388 22:58:44.904875 INFO : Training has run successfully!
389 22:58:44.905154 1D training succeed
390 22:58:44.914077 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:58:44.962170 Check phy result
392 22:58:44.962852 INFO : End of initialization
393 22:58:44.983794 INFO : End of 2D read delay Voltage center optimization
394 22:58:45.003110 INFO : End of 2D read delay Voltage center optimization
395 22:58:45.055166 INFO : End of 2D write delay Voltage center optimization
396 22:58:45.104416 INFO : End of 2D write delay Voltage center optimization
397 22:58:45.109661 INFO : Training has run successfully!
398 22:58:45.110179
399 22:58:45.110650 channel==0
400 22:58:45.115261 RxClkDly_Margin_A0==69 ps 7
401 22:58:45.115794 TxDqDly_Margin_A0==98 ps 10
402 22:58:45.120843 RxClkDly_Margin_A1==88 ps 9
403 22:58:45.121338 TxDqDly_Margin_A1==98 ps 10
404 22:58:45.121786 TrainedVREFDQ_A0==74
405 22:58:45.126481 TrainedVREFDQ_A1==74
406 22:58:45.126966 VrefDac_Margin_A0==24
407 22:58:45.127408 DeviceVref_Margin_A0==40
408 22:58:45.132134 VrefDac_Margin_A1==22
409 22:58:45.132607 DeviceVref_Margin_A1==40
410 22:58:45.133043
411 22:58:45.133477
412 22:58:45.137698 channel==1
413 22:58:45.138178 RxClkDly_Margin_A0==78 ps 8
414 22:58:45.138617 TxDqDly_Margin_A0==98 ps 10
415 22:58:45.143281 RxClkDly_Margin_A1==78 ps 8
416 22:58:45.143750 TxDqDly_Margin_A1==78 ps 8
417 22:58:45.148897 TrainedVREFDQ_A0==78
418 22:58:45.149368 TrainedVREFDQ_A1==75
419 22:58:45.149806 VrefDac_Margin_A0==22
420 22:58:45.154495 DeviceVref_Margin_A0==36
421 22:58:45.154967 VrefDac_Margin_A1==22
422 22:58:45.160086 DeviceVref_Margin_A1==39
423 22:58:45.160551
424 22:58:45.160989 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:58:45.161425
426 22:58:45.193661 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
427 22:58:45.194400 2D training succeed
428 22:58:45.199160 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:58:45.204758 auto size-- 65535DDR cs0 size: 2048MB
430 22:58:45.205262 DDR cs1 size: 2048MB
431 22:58:45.210357 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:58:45.210837 cs0 DataBus test pass
433 22:58:45.216039 cs1 DataBus test pass
434 22:58:45.216598 cs0 AddrBus test pass
435 22:58:45.217043 cs1 AddrBus test pass
436 22:58:45.217474
437 22:58:45.221610 100bdlr_step_size ps== 478
438 22:58:45.222119 result report
439 22:58:45.227167 boot times 0Enable ddr reg access
440 22:58:45.231731 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:58:45.246378 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 22:58:45.901928 bl2z: ptr: 05129330, size: 00001e40
443 22:58:45.908457 0.0;M3 CHK:0;cm4_sp_mode 0
444 22:58:45.908819 MVN_1=0x00000000
445 22:58:45.909071 MVN_2=0x00000000
446 22:58:45.919960 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 22:58:45.920391 OPS=0x04
448 22:58:45.920654 ring efuse init
449 22:58:45.925755 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 22:58:45.926381 [0.017318 Inits done]
451 22:58:45.926835 secure task start!
452 22:58:45.933499 high task start!
453 22:58:45.934091 low task start!
454 22:58:45.934552 run into bl31
455 22:58:45.942355 NOTICE: BL31: v1.3(release):4fc40b1
456 22:58:45.950082 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 22:58:45.950761 NOTICE: BL31: G12A normal boot!
458 22:58:45.965592 NOTICE: BL31: BL33 decompress pass
459 22:58:45.971256 ERROR: Error initializing runtime service opteed_fast
460 22:58:48.718294 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 22:58:48.718962 bl2_stage_init 0x01
462 22:58:48.719446 bl2_stage_init 0x81
463 22:58:48.724064 hw id: 0x0000 - pwm id 0x01
464 22:58:48.724608 bl2_stage_init 0xc1
465 22:58:48.729414 bl2_stage_init 0x02
466 22:58:48.729964
467 22:58:48.730475 L0:00000000
468 22:58:48.730948 L1:00000703
469 22:58:48.731395 L2:00008067
470 22:58:48.731825 L3:15000000
471 22:58:48.735096 S1:00000000
472 22:58:48.735595 B2:20282000
473 22:58:48.736067 B1:a0f83180
474 22:58:48.736502
475 22:58:48.736932 TE: 72383
476 22:58:48.737361
477 22:58:48.740540 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 22:58:48.741031
479 22:58:48.746169 Board ID = 1
480 22:58:48.746648 Set cpu clk to 24M
481 22:58:48.747078 Set clk81 to 24M
482 22:58:48.751809 Use GP1_pll as DSU clk.
483 22:58:48.752338 DSU clk: 1200 Mhz
484 22:58:48.752773 CPU clk: 1200 MHz
485 22:58:48.757357 Set clk81 to 166.6M
486 22:58:48.763108 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 22:58:48.763611 board id: 1
488 22:58:48.770199 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 22:58:48.781225 fw parse done
490 22:58:48.786934 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 22:58:48.829519 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 22:58:48.840438 PIEI prepare done
493 22:58:48.840936 fastboot data load
494 22:58:48.841379 fastboot data verify
495 22:58:48.846014 verify result: 266
496 22:58:48.851634 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 22:58:48.852240 LPDDR4 probe
498 22:58:48.852689 ddr clk to 1584MHz
499 22:58:48.859606 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 22:58:48.896878
501 22:58:48.897418 dmc_version 0001
502 22:58:48.903563 Check phy result
503 22:58:48.909551 INFO : End of CA training
504 22:58:48.910086 INFO : End of initialization
505 22:58:48.915114 INFO : Training has run successfully!
506 22:58:48.915629 Check phy result
507 22:58:48.920650 INFO : End of initialization
508 22:58:48.921155 INFO : End of read enable training
509 22:58:48.926252 INFO : End of fine write leveling
510 22:58:48.931871 INFO : End of Write leveling coarse delay
511 22:58:48.932421 INFO : Training has run successfully!
512 22:58:48.932883 Check phy result
513 22:58:48.937469 INFO : End of initialization
514 22:58:48.937992 INFO : End of read dq deskew training
515 22:58:48.943097 INFO : End of MPR read delay center optimization
516 22:58:48.948677 INFO : End of write delay center optimization
517 22:58:48.954472 INFO : End of read delay center optimization
518 22:58:48.955023 INFO : End of max read latency training
519 22:58:48.959880 INFO : Training has run successfully!
520 22:58:48.960440 1D training succeed
521 22:58:48.969000 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 22:58:49.016662 Check phy result
523 22:58:49.017233 INFO : End of initialization
524 22:58:49.039059 INFO : End of 2D read delay Voltage center optimization
525 22:58:49.057977 INFO : End of 2D read delay Voltage center optimization
526 22:58:49.110022 INFO : End of 2D write delay Voltage center optimization
527 22:58:49.159300 INFO : End of 2D write delay Voltage center optimization
528 22:58:49.164777 INFO : Training has run successfully!
529 22:58:49.165283
530 22:58:49.165739 channel==0
531 22:58:49.170388 RxClkDly_Margin_A0==78 ps 8
532 22:58:49.170899 TxDqDly_Margin_A0==98 ps 10
533 22:58:49.175952 RxClkDly_Margin_A1==88 ps 9
534 22:58:49.176513 TxDqDly_Margin_A1==98 ps 10
535 22:58:49.176971 TrainedVREFDQ_A0==74
536 22:58:49.181605 TrainedVREFDQ_A1==74
537 22:58:49.182129 VrefDac_Margin_A0==25
538 22:58:49.182584 DeviceVref_Margin_A0==40
539 22:58:49.187265 VrefDac_Margin_A1==23
540 22:58:49.187769 DeviceVref_Margin_A1==40
541 22:58:49.188263
542 22:58:49.188710
543 22:58:49.192810 channel==1
544 22:58:49.193322 RxClkDly_Margin_A0==88 ps 9
545 22:58:49.193940 TxDqDly_Margin_A0==98 ps 10
546 22:58:49.198472 RxClkDly_Margin_A1==78 ps 8
547 22:58:49.199021 TxDqDly_Margin_A1==78 ps 8
548 22:58:49.204048 TrainedVREFDQ_A0==78
549 22:58:49.204582 TrainedVREFDQ_A1==75
550 22:58:49.205026 VrefDac_Margin_A0==22
551 22:58:49.209554 DeviceVref_Margin_A0==36
552 22:58:49.210048 VrefDac_Margin_A1==22
553 22:58:49.215231 DeviceVref_Margin_A1==39
554 22:58:49.215740
555 22:58:49.216226 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 22:58:49.216664
557 22:58:49.248730 soc_vref_reg_value 0x 00000019 00000019 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
558 22:58:49.249278 2D training succeed
559 22:58:49.254356 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 22:58:49.260042 auto size-- 65535DDR cs0 size: 2048MB
561 22:58:49.260567 DDR cs1 size: 2048MB
562 22:58:49.265599 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 22:58:49.266120 cs0 DataBus test pass
564 22:58:49.271271 cs1 DataBus test pass
565 22:58:49.271776 cs0 AddrBus test pass
566 22:58:49.272262 cs1 AddrBus test pass
567 22:58:49.272704
568 22:58:49.276766 100bdlr_step_size ps== 478
569 22:58:49.277278 result report
570 22:58:49.282364 boot times 0Enable ddr reg access
571 22:58:49.287633 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 22:58:49.300555 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 22:58:49.956527 bl2z: ptr: 05129330, size: 00001e40
574 22:58:49.963001 0.0;M3 CHK:0;cm4_sp_mode 0
575 22:58:49.963536 MVN_1=0x00000000
576 22:58:49.964048 MVN_2=0x00000000
577 22:58:49.974425 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 22:58:49.974941 OPS=0x04
579 22:58:49.975403 ring efuse init
580 22:58:49.980099 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 22:58:49.980622 [0.017319 Inits done]
582 22:58:49.981076 secure task start!
583 22:58:49.987674 high task start!
584 22:58:49.988214 low task start!
585 22:58:49.988667 run into bl31
586 22:58:49.996336 NOTICE: BL31: v1.3(release):4fc40b1
587 22:58:50.004091 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 22:58:50.004613 NOTICE: BL31: G12A normal boot!
589 22:58:50.019595 NOTICE: BL31: BL33 decompress pass
590 22:58:50.025277 ERROR: Error initializing runtime service opteed_fast
591 22:58:51.414827 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 22:58:51.415482 bl2_stage_init 0x01
593 22:58:51.415948 bl2_stage_init 0x81
594 22:58:51.420437 hw id: 0x0000 - pwm id 0x01
595 22:58:51.420979 bl2_stage_init 0xc1
596 22:58:51.421468 bl2_stage_init 0x02
597 22:58:51.421933
598 22:58:51.426062 L0:00000000
599 22:58:51.426581 L1:00000703
600 22:58:51.427032 L2:00008067
601 22:58:51.427500 L3:15000000
602 22:58:51.427974 S1:00000000
603 22:58:51.428813 B2:20282000
604 22:58:51.433299 B1:a0f83180
605 22:58:51.433831
606 22:58:51.434302 TE: 69025
607 22:58:51.434760
608 22:58:51.438920 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 22:58:51.439490
610 22:58:51.439961 Board ID = 1
611 22:58:51.444493 Set cpu clk to 24M
612 22:58:51.444969 Set clk81 to 24M
613 22:58:51.445393 Use GP1_pll as DSU clk.
614 22:58:51.450051 DSU clk: 1200 Mhz
615 22:58:51.450549 CPU clk: 1200 MHz
616 22:58:51.450969 Set clk81 to 166.6M
617 22:58:51.455565 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 22:58:51.456052 board id: 1
619 22:58:51.465150 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 22:58:51.476895 fw parse done
621 22:58:51.482955 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 22:58:51.525191 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 22:58:51.536976 PIEI prepare done
624 22:58:51.537453 fastboot data load
625 22:58:51.537880 fastboot data verify
626 22:58:51.542596 verify result: 266
627 22:58:51.548222 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 22:58:51.548693 LPDDR4 probe
629 22:58:51.549114 ddr clk to 1584MHz
630 22:58:51.556211 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 22:58:51.593884
632 22:58:51.594384 dmc_version 0001
633 22:58:51.600914 Check phy result
634 22:58:51.606904 INFO : End of CA training
635 22:58:51.607368 INFO : End of initialization
636 22:58:51.612532 INFO : Training has run successfully!
637 22:58:51.613011 Check phy result
638 22:58:51.618107 INFO : End of initialization
639 22:58:51.618565 INFO : End of read enable training
640 22:58:51.621500 INFO : End of fine write leveling
641 22:58:51.627014 INFO : End of Write leveling coarse delay
642 22:58:51.632643 INFO : Training has run successfully!
643 22:58:51.633107 Check phy result
644 22:58:51.633522 INFO : End of initialization
645 22:58:51.638254 INFO : End of read dq deskew training
646 22:58:51.641559 INFO : End of MPR read delay center optimization
647 22:58:51.647222 INFO : End of write delay center optimization
648 22:58:51.652757 INFO : End of read delay center optimization
649 22:58:51.653223 INFO : End of max read latency training
650 22:58:51.658485 INFO : Training has run successfully!
651 22:58:51.658943 1D training succeed
652 22:58:51.666549 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 22:58:51.714813 Check phy result
654 22:58:51.715323 INFO : End of initialization
655 22:58:51.742185 INFO : End of 2D read delay Voltage center optimization
656 22:58:51.766220 INFO : End of 2D read delay Voltage center optimization
657 22:58:51.822989 INFO : End of 2D write delay Voltage center optimization
658 22:58:51.877015 INFO : End of 2D write delay Voltage center optimization
659 22:58:51.882584 INFO : Training has run successfully!
660 22:58:51.883044
661 22:58:51.883462 channel==0
662 22:58:51.888213 RxClkDly_Margin_A0==78 ps 8
663 22:58:51.888668 TxDqDly_Margin_A0==88 ps 9
664 22:58:51.891520 RxClkDly_Margin_A1==88 ps 9
665 22:58:51.891970 TxDqDly_Margin_A1==88 ps 9
666 22:58:51.897098 TrainedVREFDQ_A0==74
667 22:58:51.897556 TrainedVREFDQ_A1==75
668 22:58:51.897975 VrefDac_Margin_A0==25
669 22:58:51.902682 DeviceVref_Margin_A0==40
670 22:58:51.903142 VrefDac_Margin_A1==23
671 22:58:51.908345 DeviceVref_Margin_A1==39
672 22:58:51.908802
673 22:58:51.909213
674 22:58:51.909613 channel==1
675 22:58:51.910007 RxClkDly_Margin_A0==78 ps 8
676 22:58:51.913966 TxDqDly_Margin_A0==98 ps 10
677 22:58:51.914422 RxClkDly_Margin_A1==78 ps 8
678 22:58:51.919647 TxDqDly_Margin_A1==98 ps 10
679 22:58:51.920142 TrainedVREFDQ_A0==78
680 22:58:51.920563 TrainedVREFDQ_A1==78
681 22:58:51.925114 VrefDac_Margin_A0==22
682 22:58:51.925574 DeviceVref_Margin_A0==36
683 22:58:51.930720 VrefDac_Margin_A1==22
684 22:58:51.931175 DeviceVref_Margin_A1==36
685 22:58:51.931583
686 22:58:51.936329 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 22:58:51.936788
688 22:58:51.964329 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 22:58:51.969905 2D training succeed
690 22:58:51.975606 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 22:58:51.976109 auto size-- 65535DDR cs0 size: 2048MB
692 22:58:51.981231 DDR cs1 size: 2048MB
693 22:58:51.981699 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 22:58:51.986723 cs0 DataBus test pass
695 22:58:51.987179 cs1 DataBus test pass
696 22:58:51.987587 cs0 AddrBus test pass
697 22:58:51.992341 cs1 AddrBus test pass
698 22:58:51.992795
699 22:58:51.993211 100bdlr_step_size ps== 471
700 22:58:51.993626 result report
701 22:58:51.997919 boot times 0Enable ddr reg access
702 22:58:52.005428 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 22:58:52.019231 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 22:58:52.678656 bl2z: ptr: 05129330, size: 00001e40
705 22:58:52.686788 0.0;M3 CHK:0;cm4_sp_mode 0
706 22:58:52.687292 MVN_1=0x00000000
707 22:58:52.687718 MVN_2=0x00000000
708 22:58:52.698342 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 22:58:52.698819 OPS=0x04
710 22:58:52.699244 ring efuse init
711 22:58:52.703903 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 22:58:52.704396 [0.017354 Inits done]
713 22:58:52.704816 secure task start!
714 22:58:52.711794 high task start!
715 22:58:52.712285 low task start!
716 22:58:52.712699 run into bl31
717 22:58:52.720586 NOTICE: BL31: v1.3(release):4fc40b1
718 22:58:52.728370 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 22:58:52.728858 NOTICE: BL31: G12A normal boot!
720 22:58:52.743803 NOTICE: BL31: BL33 decompress pass
721 22:58:52.748983 ERROR: Error initializing runtime service opteed_fast
722 22:58:53.544899
723 22:58:53.545531
724 22:58:53.550301 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 22:58:53.550815
726 22:58:53.553846 Model: Libre Computer AML-S905D3-CC Solitude
727 22:58:53.700895 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 22:58:53.716209 DRAM: 2 GiB (effective 3.8 GiB)
729 22:58:53.817126 Core: 406 devices, 33 uclasses, devicetree: separate
730 22:58:53.823053 WDT: Not starting watchdog@f0d0
731 22:58:53.848122 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 22:58:53.860332 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 22:58:53.865350 ** Bad device specification mmc 0 **
734 22:58:53.875366 Card did not respond to voltage select! : -110
735 22:58:53.883023 ** Bad device specification mmc 0 **
736 22:58:53.883460 Couldn't find partition mmc 0
737 22:58:53.891341 Card did not respond to voltage select! : -110
738 22:58:53.896875 ** Bad device specification mmc 0 **
739 22:58:53.897308 Couldn't find partition mmc 0
740 22:58:53.901908 Error: could not access storage.
741 22:58:54.198337 Net: eth0: ethernet@ff3f0000
742 22:58:54.198912 starting USB...
743 22:58:54.443107 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 22:58:54.443705 Starting the controller
745 22:58:54.449992 USB XHCI 1.10
746 22:58:56.004304 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 22:58:56.012527 scanning usb for storage devices... 0 Storage Device(s) found
749 22:58:56.064071 Hit any key to stop autoboot: 1
750 22:58:56.064934 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 22:58:56.065523 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
752 22:58:56.066001 Setting prompt string to ['=>']
753 22:58:56.066482 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
754 22:58:56.078499 0
755 22:58:56.079373 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 22:58:56.180662 => setenv autoload no
758 22:58:56.181292 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
759 22:58:56.186013 setenv autoload no
761 22:58:56.287413 => setenv initrd_high 0xffffffff
762 22:58:56.288040 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 22:58:56.292440 setenv initrd_high 0xffffffff
765 22:58:56.393839 => setenv fdt_high 0xffffffff
766 22:58:56.394479 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 22:58:56.399069 setenv fdt_high 0xffffffff
769 22:58:56.500573 => dhcp
770 22:58:56.501250 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 22:58:56.505325 dhcp
772 22:58:57.111059 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 22:58:57.111638 Speed: 1000, full duplex
774 22:58:57.112097 BOOTP broadcast 1
775 22:58:57.358892 BOOTP broadcast 2
776 22:58:57.379623 DHCP client bound to address 192.168.6.21 (268 ms)
778 22:58:57.481147 => setenv serverip 192.168.6.2
779 22:58:57.481800 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 22:58:57.486383 setenv serverip 192.168.6.2
782 22:58:57.587782 => tftpboot 0x01080000 977246/tftp-deploy-ihuxcyxd/kernel/uImage
783 22:58:57.588508 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
784 22:58:57.595206 tftpboot 0x01080000 977246/tftp-deploy-ihuxcyxd/kernel/uImage
785 22:58:57.595677 Speed: 1000, full duplex
786 22:58:57.596136 Using ethernet@ff3f0000 device
787 22:58:57.600913 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 22:58:57.606354 Filename '977246/tftp-deploy-ihuxcyxd/kernel/uImage'.
789 22:58:57.610160 Load address: 0x1080000
790 22:58:58.682089 Loading: *################## UDP wrong checksum 000000ff 000067be
791 22:58:58.733551 # UDP wrong checksum 000000ff 0000fab0
792 22:59:00.182137 ########################## UDP wrong checksum 000000ff 00006a5c
793 22:59:00.221006 # UDP wrong checksum 000000ff 0000f44e
794 22:59:00.454449 #### 43.6 MiB
795 22:59:00.455045 15.3 MiB/s
796 22:59:00.455467 done
797 22:59:00.458628 Bytes transferred = 45713984 (2b98a40 hex)
799 22:59:00.560082 => tftpboot 0x08000000 977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
800 22:59:00.560807 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
801 22:59:00.567669 tftpboot 0x08000000 977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot
802 22:59:00.568158 Speed: 1000, full duplex
803 22:59:00.568570 Using ethernet@ff3f0000 device
804 22:59:00.573144 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
805 22:59:00.582945 Filename '977246/tftp-deploy-ihuxcyxd/ramdisk/ramdisk.cpio.gz.uboot'.
806 22:59:00.583452 Load address: 0x8000000
807 22:59:02.055690 Loading: *################################################# UDP wrong checksum 00000005 00000691
808 22:59:17.057628 T T T UDP wrong checksum 00000005 00000691
809 22:59:37.061153 T T T T UDP wrong checksum 00000005 00000691
810 22:59:40.452462 UDP wrong checksum 000000ff 00006b4c
811 22:59:40.492777 UDP wrong checksum 000000ff 0000043f
812 22:59:55.407229 T T T UDP wrong checksum 000000ff 000082fe
813 22:59:55.438504 UDP wrong checksum 000000ff 000019f1
814 22:59:57.066497
815 22:59:57.067073 Retry count exceeded; starting again
817 22:59:57.068261 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
820 22:59:57.070206 end: 2.4 uboot-commands (duration 00:01:19) [common]
822 22:59:57.071404 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
824 22:59:57.072235 end: 2 uboot-action (duration 00:01:19) [common]
826 22:59:57.073490 Cleaning after the job
827 22:59:57.073933 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/ramdisk
828 22:59:57.075008 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/kernel
829 22:59:57.106867 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/dtb
830 22:59:57.107943 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/nfsrootfs
831 22:59:57.438145 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977246/tftp-deploy-ihuxcyxd/modules
832 22:59:57.458619 start: 4.1 power-off (timeout 00:00:30) [common]
833 22:59:57.459333 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
834 22:59:57.492894 >> OK - accepted request
835 22:59:57.494838 Returned 0 in 0 seconds
836 22:59:57.595569 end: 4.1 power-off (duration 00:00:00) [common]
838 22:59:57.596511 start: 4.2 read-feedback (timeout 00:10:00) [common]
839 22:59:57.597170 Listened to connection for namespace 'common' for up to 1s
840 22:59:58.598099 Finalising connection for namespace 'common'
841 22:59:58.598589 Disconnecting from shell: Finalise
842 22:59:58.598862 =>
843 22:59:58.699508 end: 4.2 read-feedback (duration 00:00:01) [common]
844 22:59:58.699869 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977246
845 23:00:01.197690 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977246
846 23:00:01.198307 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.