Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:46:13.838794 lava-dispatcher, installed at version: 2024.01
2 21:46:13.839579 start: 0 validate
3 21:46:13.840056 Start time: 2024-10-31 21:46:13.840026+00:00 (UTC)
4 21:46:13.840606 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:46:13.841141 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:46:13.880681 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:46:13.881261 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-54-gb69ef01da0f2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:46:13.916105 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:46:13.916751 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-54-gb69ef01da0f2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:46:13.951337 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:46:13.951814 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:46:13.982930 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:46:13.983424 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-54-gb69ef01da0f2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:46:14.021376 validate duration: 0.18
16 21:46:14.022204 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:46:14.022536 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:46:14.022831 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:46:14.023426 Not decompressing ramdisk as can be used compressed.
20 21:46:14.023889 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 21:46:14.024206 saving as /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/ramdisk/initrd.cpio.gz
22 21:46:14.024485 total size: 5628182 (5 MB)
23 21:46:14.064688 progress 0 % (0 MB)
24 21:46:14.072542 progress 5 % (0 MB)
25 21:46:14.080374 progress 10 % (0 MB)
26 21:46:14.085878 progress 15 % (0 MB)
27 21:46:14.090115 progress 20 % (1 MB)
28 21:46:14.093901 progress 25 % (1 MB)
29 21:46:14.098093 progress 30 % (1 MB)
30 21:46:14.102360 progress 35 % (1 MB)
31 21:46:14.106092 progress 40 % (2 MB)
32 21:46:14.110197 progress 45 % (2 MB)
33 21:46:14.113888 progress 50 % (2 MB)
34 21:46:14.117942 progress 55 % (2 MB)
35 21:46:14.122221 progress 60 % (3 MB)
36 21:46:14.126022 progress 65 % (3 MB)
37 21:46:14.130073 progress 70 % (3 MB)
38 21:46:14.133922 progress 75 % (4 MB)
39 21:46:14.138039 progress 80 % (4 MB)
40 21:46:14.141717 progress 85 % (4 MB)
41 21:46:14.145705 progress 90 % (4 MB)
42 21:46:14.149463 progress 95 % (5 MB)
43 21:46:14.152793 progress 100 % (5 MB)
44 21:46:14.153461 5 MB downloaded in 0.13 s (41.62 MB/s)
45 21:46:14.154034 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:46:14.154955 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:46:14.155267 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:46:14.155557 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:46:14.156071 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-54-gb69ef01da0f2/arm64/defconfig/gcc-12/kernel/Image
51 21:46:14.156338 saving as /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/kernel/Image
52 21:46:14.156558 total size: 45713920 (43 MB)
53 21:46:14.156777 No compression specified
54 21:46:14.196792 progress 0 % (0 MB)
55 21:46:14.224593 progress 5 % (2 MB)
56 21:46:14.252095 progress 10 % (4 MB)
57 21:46:14.279722 progress 15 % (6 MB)
58 21:46:14.307371 progress 20 % (8 MB)
59 21:46:14.334512 progress 25 % (10 MB)
60 21:46:14.361945 progress 30 % (13 MB)
61 21:46:14.389413 progress 35 % (15 MB)
62 21:46:14.416979 progress 40 % (17 MB)
63 21:46:14.443909 progress 45 % (19 MB)
64 21:46:14.471186 progress 50 % (21 MB)
65 21:46:14.499049 progress 55 % (24 MB)
66 21:46:14.526153 progress 60 % (26 MB)
67 21:46:14.552915 progress 65 % (28 MB)
68 21:46:14.581123 progress 70 % (30 MB)
69 21:46:14.609367 progress 75 % (32 MB)
70 21:46:14.637563 progress 80 % (34 MB)
71 21:46:14.665307 progress 85 % (37 MB)
72 21:46:14.693278 progress 90 % (39 MB)
73 21:46:14.720398 progress 95 % (41 MB)
74 21:46:14.746884 progress 100 % (43 MB)
75 21:46:14.747422 43 MB downloaded in 0.59 s (73.79 MB/s)
76 21:46:14.747901 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:46:14.748749 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:46:14.749026 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:46:14.749289 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:46:14.749752 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-54-gb69ef01da0f2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 21:46:14.749994 saving as /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 21:46:14.750202 total size: 53209 (0 MB)
84 21:46:14.750408 No compression specified
85 21:46:14.783058 progress 61 % (0 MB)
86 21:46:14.783900 progress 100 % (0 MB)
87 21:46:14.784473 0 MB downloaded in 0.03 s (1.48 MB/s)
88 21:46:14.784938 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:46:14.785735 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:46:14.785995 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:46:14.786255 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:46:14.786717 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 21:46:14.786955 saving as /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/nfsrootfs/full.rootfs.tar
95 21:46:14.787156 total size: 107552908 (102 MB)
96 21:46:14.787361 Using unxz to decompress xz
97 21:46:14.826017 progress 0 % (0 MB)
98 21:46:15.469221 progress 5 % (5 MB)
99 21:46:16.198210 progress 10 % (10 MB)
100 21:46:16.918191 progress 15 % (15 MB)
101 21:46:17.678320 progress 20 % (20 MB)
102 21:46:18.251798 progress 25 % (25 MB)
103 21:46:18.871450 progress 30 % (30 MB)
104 21:46:19.615390 progress 35 % (35 MB)
105 21:46:20.017342 progress 40 % (41 MB)
106 21:46:20.485583 progress 45 % (46 MB)
107 21:46:21.175590 progress 50 % (51 MB)
108 21:46:21.855315 progress 55 % (56 MB)
109 21:46:22.604283 progress 60 % (61 MB)
110 21:46:23.353048 progress 65 % (66 MB)
111 21:46:24.082389 progress 70 % (71 MB)
112 21:46:24.844230 progress 75 % (76 MB)
113 21:46:25.520019 progress 80 % (82 MB)
114 21:46:26.220317 progress 85 % (87 MB)
115 21:46:26.986626 progress 90 % (92 MB)
116 21:46:27.693534 progress 95 % (97 MB)
117 21:46:28.426747 progress 100 % (102 MB)
118 21:46:28.438602 102 MB downloaded in 13.65 s (7.51 MB/s)
119 21:46:28.439472 end: 1.4.1 http-download (duration 00:00:14) [common]
121 21:46:28.441083 end: 1.4 download-retry (duration 00:00:14) [common]
122 21:46:28.441592 start: 1.5 download-retry (timeout 00:09:46) [common]
123 21:46:28.442093 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 21:46:28.442893 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-54-gb69ef01da0f2/arm64/defconfig/gcc-12/modules.tar.xz
125 21:46:28.443358 saving as /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/modules/modules.tar
126 21:46:28.443756 total size: 11610020 (11 MB)
127 21:46:28.444199 Using unxz to decompress xz
128 21:46:28.487108 progress 0 % (0 MB)
129 21:46:28.554554 progress 5 % (0 MB)
130 21:46:28.629544 progress 10 % (1 MB)
131 21:46:28.723907 progress 15 % (1 MB)
132 21:46:28.814759 progress 20 % (2 MB)
133 21:46:28.905753 progress 25 % (2 MB)
134 21:46:28.999366 progress 30 % (3 MB)
135 21:46:29.089013 progress 35 % (3 MB)
136 21:46:29.178213 progress 40 % (4 MB)
137 21:46:29.283130 progress 45 % (5 MB)
138 21:46:29.379762 progress 50 % (5 MB)
139 21:46:29.473642 progress 55 % (6 MB)
140 21:46:29.569843 progress 60 % (6 MB)
141 21:46:29.670075 progress 65 % (7 MB)
142 21:46:29.754280 progress 70 % (7 MB)
143 21:46:29.829943 progress 75 % (8 MB)
144 21:46:29.912600 progress 80 % (8 MB)
145 21:46:29.992616 progress 85 % (9 MB)
146 21:46:30.061172 progress 90 % (9 MB)
147 21:46:30.159871 progress 95 % (10 MB)
148 21:46:30.257945 progress 100 % (11 MB)
149 21:46:30.269872 11 MB downloaded in 1.83 s (6.06 MB/s)
150 21:46:30.270454 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:46:30.271274 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:46:30.271543 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 21:46:30.271810 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 21:46:39.901951 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/918795/extract-nfsrootfs-2netx35z
156 21:46:39.902554 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 21:46:39.902843 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 21:46:39.903586 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h
159 21:46:39.904139 makedir: /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin
160 21:46:39.904511 makedir: /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/tests
161 21:46:39.904829 makedir: /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/results
162 21:46:39.905166 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-add-keys
163 21:46:39.905692 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-add-sources
164 21:46:39.906185 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-background-process-start
165 21:46:39.906679 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-background-process-stop
166 21:46:39.907199 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-common-functions
167 21:46:39.907704 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-echo-ipv4
168 21:46:39.908211 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-install-packages
169 21:46:39.908706 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-installed-packages
170 21:46:39.909182 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-os-build
171 21:46:39.909655 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-probe-channel
172 21:46:39.910133 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-probe-ip
173 21:46:39.910616 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-target-ip
174 21:46:39.911113 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-target-mac
175 21:46:39.911605 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-target-storage
176 21:46:39.912118 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-case
177 21:46:39.912608 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-event
178 21:46:39.913102 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-feedback
179 21:46:39.913649 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-raise
180 21:46:39.914167 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-reference
181 21:46:39.914677 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-runner
182 21:46:39.915191 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-set
183 21:46:39.915700 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-test-shell
184 21:46:39.916235 Updating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-install-packages (oe)
185 21:46:39.916807 Updating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/bin/lava-installed-packages (oe)
186 21:46:39.917298 Creating /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/environment
187 21:46:39.917699 LAVA metadata
188 21:46:39.917983 - LAVA_JOB_ID=918795
189 21:46:39.918211 - LAVA_DISPATCHER_IP=192.168.6.2
190 21:46:39.918586 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 21:46:39.919569 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 21:46:39.919891 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 21:46:39.920141 skipped lava-vland-overlay
194 21:46:39.920402 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 21:46:39.920675 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 21:46:39.920904 skipped lava-multinode-overlay
197 21:46:39.921159 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 21:46:39.921421 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 21:46:39.921682 Loading test definitions
200 21:46:39.921970 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 21:46:39.922198 Using /lava-918795 at stage 0
202 21:46:39.923387 uuid=918795_1.6.2.4.1 testdef=None
203 21:46:39.923697 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 21:46:39.923975 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 21:46:39.925845 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 21:46:39.926649 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 21:46:39.928945 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 21:46:39.929789 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 21:46:39.932044 runner path: /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/0/tests/0_dmesg test_uuid 918795_1.6.2.4.1
212 21:46:39.932644 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 21:46:39.933428 Creating lava-test-runner.conf files
215 21:46:39.933640 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/918795/lava-overlay-kkwwa39h/lava-918795/0 for stage 0
216 21:46:39.934012 - 0_dmesg
217 21:46:39.934380 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 21:46:39.934664 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 21:46:39.956092 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 21:46:39.956495 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 21:46:39.956778 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 21:46:39.957064 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 21:46:39.957340 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 21:46:40.605770 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 21:46:40.606273 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 21:46:40.606522 extracting modules file /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/918795/extract-nfsrootfs-2netx35z
227 21:46:42.093471 extracting modules file /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk
228 21:46:43.501025 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 21:46:43.501517 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 21:46:43.501814 [common] Applying overlay to NFS
231 21:46:43.502035 [common] Applying overlay /var/lib/lava/dispatcher/tmp/918795/compress-overlay-xk8o1jhg/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/918795/extract-nfsrootfs-2netx35z
232 21:46:43.531667 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 21:46:43.532104 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 21:46:43.532402 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 21:46:43.532644 Converting downloaded kernel to a uImage
236 21:46:43.532963 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/kernel/Image /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/kernel/uImage
237 21:46:44.072783 output: Image Name:
238 21:46:44.073203 output: Created: Thu Oct 31 21:46:43 2024
239 21:46:44.073409 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 21:46:44.073614 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 21:46:44.073814 output: Load Address: 01080000
242 21:46:44.074012 output: Entry Point: 01080000
243 21:46:44.074208 output:
244 21:46:44.074541 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 21:46:44.074807 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 21:46:44.075079 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 21:46:44.075332 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 21:46:44.075588 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 21:46:44.075856 Building ramdisk /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk
250 21:46:46.291269 >> 166774 blocks
251 21:46:53.978504 Adding RAMdisk u-boot header.
252 21:46:53.979155 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk.cpio.gz.uboot
253 21:46:54.217558 output: Image Name:
254 21:46:54.218171 output: Created: Thu Oct 31 21:46:53 2024
255 21:46:54.218612 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 21:46:54.219029 output: Data Size: 23428665 Bytes = 22879.56 KiB = 22.34 MiB
257 21:46:54.219425 output: Load Address: 00000000
258 21:46:54.219814 output: Entry Point: 00000000
259 21:46:54.220260 output:
260 21:46:54.221217 rename /var/lib/lava/dispatcher/tmp/918795/extract-overlay-ramdisk-sr9yw7qk/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
261 21:46:54.221926 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 21:46:54.222464 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 21:46:54.222990 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 21:46:54.223439 No LXC device requested
265 21:46:54.223935 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 21:46:54.224481 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 21:46:54.224969 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 21:46:54.225374 Checking files for TFTP limit of 4294967296 bytes.
269 21:46:54.228047 end: 1 tftp-deploy (duration 00:00:40) [common]
270 21:46:54.228628 start: 2 uboot-action (timeout 00:05:00) [common]
271 21:46:54.229145 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 21:46:54.229633 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 21:46:54.230124 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 21:46:54.230641 Using kernel file from prepare-kernel: 918795/tftp-deploy-7exrqvm1/kernel/uImage
275 21:46:54.231256 substitutions:
276 21:46:54.231653 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 21:46:54.232080 - {DTB_ADDR}: 0x01070000
278 21:46:54.232476 - {DTB}: 918795/tftp-deploy-7exrqvm1/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 21:46:54.232868 - {INITRD}: 918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
280 21:46:54.233258 - {KERNEL_ADDR}: 0x01080000
281 21:46:54.233642 - {KERNEL}: 918795/tftp-deploy-7exrqvm1/kernel/uImage
282 21:46:54.234025 - {LAVA_MAC}: None
283 21:46:54.234447 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/918795/extract-nfsrootfs-2netx35z
284 21:46:54.234837 - {NFS_SERVER_IP}: 192.168.6.2
285 21:46:54.235218 - {PRESEED_CONFIG}: None
286 21:46:54.235601 - {PRESEED_LOCAL}: None
287 21:46:54.236003 - {RAMDISK_ADDR}: 0x08000000
288 21:46:54.236393 - {RAMDISK}: 918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
289 21:46:54.236780 - {ROOT_PART}: None
290 21:46:54.237164 - {ROOT}: None
291 21:46:54.237546 - {SERVER_IP}: 192.168.6.2
292 21:46:54.237922 - {TEE_ADDR}: 0x83000000
293 21:46:54.238300 - {TEE}: None
294 21:46:54.238681 Parsed boot commands:
295 21:46:54.239053 - setenv autoload no
296 21:46:54.239431 - setenv initrd_high 0xffffffff
297 21:46:54.239810 - setenv fdt_high 0xffffffff
298 21:46:54.240217 - dhcp
299 21:46:54.240594 - setenv serverip 192.168.6.2
300 21:46:54.240971 - tftpboot 0x01080000 918795/tftp-deploy-7exrqvm1/kernel/uImage
301 21:46:54.241345 - tftpboot 0x08000000 918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
302 21:46:54.241725 - tftpboot 0x01070000 918795/tftp-deploy-7exrqvm1/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 21:46:54.242104 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/918795/extract-nfsrootfs-2netx35z,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 21:46:54.242498 - bootm 0x01080000 0x08000000 0x01070000
305 21:46:54.243010 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 21:46:54.244699 start: 2.3 connect-device (timeout 00:05:00) [common]
308 21:46:54.245144 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 21:46:54.259569 Setting prompt string to ['lava-test: # ']
310 21:46:54.261148 end: 2.3 connect-device (duration 00:00:00) [common]
311 21:46:54.261798 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 21:46:54.262404 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 21:46:54.263143 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 21:46:54.264369 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 21:46:54.301287 >> OK - accepted request
316 21:46:54.303760 Returned 0 in 0 seconds
317 21:46:54.404909 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 21:46:54.406509 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 21:46:54.407089 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 21:46:54.407598 Setting prompt string to ['Hit any key to stop autoboot']
322 21:46:54.408113 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 21:46:54.409679 Trying 192.168.56.21...
324 21:46:54.410148 Connected to conserv1.
325 21:46:54.410552 Escape character is '^]'.
326 21:46:54.410959
327 21:46:54.411379 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 21:46:54.411791
329 21:47:02.169993 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 21:47:02.170455 bl2_stage_init 0x01
331 21:47:02.170684 bl2_stage_init 0x81
332 21:47:02.175517 hw id: 0x0000 - pwm id 0x01
333 21:47:02.175963 bl2_stage_init 0xc1
334 21:47:02.181048 bl2_stage_init 0x02
335 21:47:02.181541
336 21:47:02.181875 L0:00000000
337 21:47:02.182102 L1:00000703
338 21:47:02.182310 L2:00008067
339 21:47:02.182517 L3:15000000
340 21:47:02.183078 S1:00000000
341 21:47:02.188303 B2:20282000
342 21:47:02.188795 B1:a0f83180
343 21:47:02.189127
344 21:47:02.189454 TE: 66985
345 21:47:02.189769
346 21:47:02.193854 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 21:47:02.194364
348 21:47:02.194636 Board ID = 1
349 21:47:02.199577 Set cpu clk to 24M
350 21:47:02.199912 Set clk81 to 24M
351 21:47:02.200153 Use GP1_pll as DSU clk.
352 21:47:02.202905 DSU clk: 1200 Mhz
353 21:47:02.203201 CPU clk: 1200 MHz
354 21:47:02.208414 Set clk81 to 166.6M
355 21:47:02.213959 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 21:47:02.214298 board id: 1
357 21:47:02.221835 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 21:47:02.232527 fw parse done
359 21:47:02.238427 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 21:47:02.281072 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 21:47:02.292042 PIEI prepare done
362 21:47:02.292461 fastboot data load
363 21:47:02.292696 fastboot data verify
364 21:47:02.297548 verify result: 266
365 21:47:02.303128 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 21:47:02.303416 LPDDR4 probe
367 21:47:02.303625 ddr clk to 1584MHz
368 21:47:02.311116 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 21:47:02.348565
370 21:47:02.348987 dmc_version 0001
371 21:47:02.355113 Check phy result
372 21:47:02.361045 INFO : End of CA training
373 21:47:02.361359 INFO : End of initialization
374 21:47:02.366599 INFO : Training has run successfully!
375 21:47:02.366876 Check phy result
376 21:47:02.372185 INFO : End of initialization
377 21:47:02.372461 INFO : End of read enable training
378 21:47:02.377796 INFO : End of fine write leveling
379 21:47:02.383352 INFO : End of Write leveling coarse delay
380 21:47:02.383629 INFO : Training has run successfully!
381 21:47:02.383836 Check phy result
382 21:47:02.388948 INFO : End of initialization
383 21:47:02.389240 INFO : End of read dq deskew training
384 21:47:02.394602 INFO : End of MPR read delay center optimization
385 21:47:02.400169 INFO : End of write delay center optimization
386 21:47:02.405797 INFO : End of read delay center optimization
387 21:47:02.406069 INFO : End of max read latency training
388 21:47:02.411356 INFO : Training has run successfully!
389 21:47:02.411644 1D training succeed
390 21:47:02.420700 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 21:47:02.468285 Check phy result
392 21:47:02.468677 INFO : End of initialization
393 21:47:02.490605 INFO : End of 2D read delay Voltage center optimization
394 21:47:02.509807 INFO : End of 2D read delay Voltage center optimization
395 21:47:02.564778 INFO : End of 2D write delay Voltage center optimization
396 21:47:02.610982 INFO : End of 2D write delay Voltage center optimization
397 21:47:02.616443 INFO : Training has run successfully!
398 21:47:02.616797
399 21:47:02.617024 channel==0
400 21:47:02.622006 RxClkDly_Margin_A0==78 ps 8
401 21:47:02.622328 TxDqDly_Margin_A0==98 ps 10
402 21:47:02.627951 RxClkDly_Margin_A1==88 ps 9
403 21:47:02.628336 TxDqDly_Margin_A1==98 ps 10
404 21:47:02.628556 TrainedVREFDQ_A0==74
405 21:47:02.633414 TrainedVREFDQ_A1==74
406 21:47:02.633738 VrefDac_Margin_A0==24
407 21:47:02.633940 DeviceVref_Margin_A0==40
408 21:47:02.638881 VrefDac_Margin_A1==22
409 21:47:02.639314 DeviceVref_Margin_A1==40
410 21:47:02.639566
411 21:47:02.639813
412 21:47:02.644555 channel==1
413 21:47:02.644978 RxClkDly_Margin_A0==88 ps 9
414 21:47:02.645344 TxDqDly_Margin_A0==98 ps 10
415 21:47:02.650155 RxClkDly_Margin_A1==78 ps 8
416 21:47:02.650583 TxDqDly_Margin_A1==78 ps 8
417 21:47:02.655900 TrainedVREFDQ_A0==75
418 21:47:02.656385 TrainedVREFDQ_A1==75
419 21:47:02.656711 VrefDac_Margin_A0==22
420 21:47:02.661464 DeviceVref_Margin_A0==39
421 21:47:02.661906 VrefDac_Margin_A1==22
422 21:47:02.666960 DeviceVref_Margin_A1==38
423 21:47:02.667647
424 21:47:02.668230 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 21:47:02.668758
426 21:47:02.700509 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 21:47:02.701296 2D training succeed
428 21:47:02.705937 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 21:47:02.711724 auto size-- 65535DDR cs0 size: 2048MB
430 21:47:02.712334 DDR cs1 size: 2048MB
431 21:47:02.717093 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 21:47:02.717444 cs0 DataBus test pass
433 21:47:02.722954 cs1 DataBus test pass
434 21:47:02.724579 cs0 AddrBus test pass
435 21:47:02.725171 cs1 AddrBus test pass
436 21:47:02.725646
437 21:47:02.728382 100bdlr_step_size ps== 478
438 21:47:02.728900 result report
439 21:47:02.734287 boot times 0Enable ddr reg access
440 21:47:02.738368 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 21:47:02.753060 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 21:47:03.407626 bl2z: ptr: 05129330, size: 00001e40
443 21:47:03.414249 0.0;M3 CHK:0;cm4_sp_mode 0
444 21:47:03.414755 MVN_1=0x00000000
445 21:47:03.415153 MVN_2=0x00000000
446 21:47:03.425779 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 21:47:03.426242 OPS=0x04
448 21:47:03.426648 ring efuse init
449 21:47:03.428924 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 21:47:03.434604 [0.017320 Inits done]
451 21:47:03.435035 secure task start!
452 21:47:03.435422 high task start!
453 21:47:03.435809 low task start!
454 21:47:03.438869 run into bl31
455 21:47:03.447279 NOTICE: BL31: v1.3(release):4fc40b1
456 21:47:03.455123 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 21:47:03.455560 NOTICE: BL31: G12A normal boot!
458 21:47:03.470763 NOTICE: BL31: BL33 decompress pass
459 21:47:03.476489 ERROR: Error initializing runtime service opteed_fast
460 21:47:04.723268 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 21:47:04.723846 bl2_stage_init 0x01
462 21:47:04.724298 bl2_stage_init 0x81
463 21:47:04.728879 hw id: 0x0000 - pwm id 0x01
464 21:47:04.729457 bl2_stage_init 0xc1
465 21:47:04.734409 bl2_stage_init 0x02
466 21:47:04.734923
467 21:47:04.735382 L0:00000000
468 21:47:04.735818 L1:00000703
469 21:47:04.736301 L2:00008067
470 21:47:04.736737 L3:15000000
471 21:47:04.740101 S1:00000000
472 21:47:04.740593 B2:20282000
473 21:47:04.741027 B1:a0f83180
474 21:47:04.741460
475 21:47:04.741889 TE: 68897
476 21:47:04.742321
477 21:47:04.745652 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 21:47:04.746144
479 21:47:04.751127 Board ID = 1
480 21:47:04.751612 Set cpu clk to 24M
481 21:47:04.752076 Set clk81 to 24M
482 21:47:04.754611 Use GP1_pll as DSU clk.
483 21:47:04.755094 DSU clk: 1200 Mhz
484 21:47:04.760201 CPU clk: 1200 MHz
485 21:47:04.760598 Set clk81 to 166.6M
486 21:47:04.765853 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 21:47:04.766262 board id: 1
488 21:47:04.775215 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 21:47:04.786154 fw parse done
490 21:47:04.792131 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 21:47:04.835161 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 21:47:04.846202 PIEI prepare done
493 21:47:04.846680 fastboot data load
494 21:47:04.847078 fastboot data verify
495 21:47:04.851776 verify result: 266
496 21:47:04.857360 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 21:47:04.857810 LPDDR4 probe
498 21:47:04.858204 ddr clk to 1584MHz
499 21:47:06.220064 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd000� SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 21:47:06.220706 bl2_stage_init 0x01
501 21:47:06.221145 bl2_stage_init 0x81
502 21:47:06.225415 hw id: 0x0000 - pwm id 0x01
503 21:47:06.225875 bl2_stage_init 0xc1
504 21:47:06.231030 bl2_stage_init 0x02
505 21:47:06.231525
506 21:47:06.231950 L0:00000000
507 21:47:06.232463 L1:00000703
508 21:47:06.232879 L2:00008067
509 21:47:06.233302 L3:15000000
510 21:47:06.236717 S1:00000000
511 21:47:06.237202 B2:20282000
512 21:47:06.237645 B1:a0f83180
513 21:47:06.238065
514 21:47:06.238497 TE: 67223
515 21:47:06.238926
516 21:47:06.242189 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 21:47:06.242716
518 21:47:06.247922 Board ID = 1
519 21:47:06.248441 Set cpu clk to 24M
520 21:47:06.248864 Set clk81 to 24M
521 21:47:06.253397 Use GP1_pll as DSU clk.
522 21:47:06.253880 DSU clk: 1200 Mhz
523 21:47:06.254314 CPU clk: 1200 MHz
524 21:47:06.258996 Set clk81 to 166.6M
525 21:47:06.264687 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 21:47:06.265180 board id: 1
527 21:47:06.272192 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 21:47:06.282776 fw parse done
529 21:47:06.288691 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 21:47:06.331843 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 21:47:06.343142 PIEI prepare done
532 21:47:06.343648 fastboot data load
533 21:47:06.344100 fastboot data verify
534 21:47:06.348609 verify result: 266
535 21:47:06.354184 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 21:47:06.354671 LPDDR4 probe
537 21:47:06.355087 ddr clk to 1584MHz
538 21:47:06.362179 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 21:47:06.399967
540 21:47:06.400546 dmc_version 0001
541 21:47:06.406919 Check phy result
542 21:47:06.413073 INFO : End of CA training
543 21:47:06.413599 INFO : End of initialization
544 21:47:06.418520 INFO : Training has run successfully!
545 21:47:06.419009 Check phy result
546 21:47:06.424104 INFO : End of initialization
547 21:47:06.424604 INFO : End of read enable training
548 21:47:06.429713 INFO : End of fine write leveling
549 21:47:06.435270 INFO : End of Write leveling coarse delay
550 21:47:06.435751 INFO : Training has run successfully!
551 21:47:06.436242 Check phy result
552 21:47:06.441063 INFO : End of initialization
553 21:47:06.441562 INFO : End of read dq deskew training
554 21:47:06.446524 INFO : End of MPR read delay center optimization
555 21:47:06.452091 INFO : End of write delay center optimization
556 21:47:06.457691 INFO : End of read delay center optimization
557 21:47:06.458168 INFO : End of max read latency training
558 21:47:06.463290 INFO : Training has run successfully!
559 21:47:06.463774 1D training succeed
560 21:47:06.472584 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 21:47:06.520824 Check phy result
562 21:47:06.521384 INFO : End of initialization
563 21:47:06.548275 INFO : End of 2D read delay Voltage center optimization
564 21:47:06.572367 INFO : End of 2D read delay Voltage center optimization
565 21:47:06.629052 INFO : End of 2D write delay Voltage center optimization
566 21:47:06.683181 INFO : End of 2D write delay Voltage center optimization
567 21:47:06.688621 INFO : Training has run successfully!
568 21:47:06.689126
569 21:47:06.689540 channel==0
570 21:47:06.694228 RxClkDly_Margin_A0==78 ps 8
571 21:47:06.694741 TxDqDly_Margin_A0==98 ps 10
572 21:47:06.699850 RxClkDly_Margin_A1==88 ps 9
573 21:47:06.700363 TxDqDly_Margin_A1==98 ps 10
574 21:47:06.700812 TrainedVREFDQ_A0==74
575 21:47:06.705411 TrainedVREFDQ_A1==74
576 21:47:06.705890 VrefDac_Margin_A0==25
577 21:47:06.706322 DeviceVref_Margin_A0==40
578 21:47:06.711109 VrefDac_Margin_A1==23
579 21:47:06.711602 DeviceVref_Margin_A1==40
580 21:47:06.712066
581 21:47:06.712482
582 21:47:06.716618 channel==1
583 21:47:06.717103 RxClkDly_Margin_A0==88 ps 9
584 21:47:06.717527 TxDqDly_Margin_A0==98 ps 10
585 21:47:06.722178 RxClkDly_Margin_A1==78 ps 8
586 21:47:06.722650 TxDqDly_Margin_A1==88 ps 9
587 21:47:06.727799 TrainedVREFDQ_A0==78
588 21:47:06.728309 TrainedVREFDQ_A1==77
589 21:47:06.728737 VrefDac_Margin_A0==23
590 21:47:06.733407 DeviceVref_Margin_A0==36
591 21:47:06.733896 VrefDac_Margin_A1==22
592 21:47:06.739123 DeviceVref_Margin_A1==37
593 21:47:06.739612
594 21:47:06.740058 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 21:47:06.740496
596 21:47:06.772602 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 21:47:06.773180 2D training succeed
598 21:47:06.778191 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 21:47:06.783834 auto size-- 65535DDR cs0 size: 2048MB
600 21:47:06.784325 DDR cs1 size: 2048MB
601 21:47:06.789386 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 21:47:06.789829 cs0 DataBus test pass
603 21:47:06.795101 cs1 DataBus test pass
604 21:47:06.795567 cs0 AddrBus test pass
605 21:47:06.795977 cs1 AddrBus test pass
606 21:47:06.796413
607 21:47:06.800644 100bdlr_step_size ps== 471
608 21:47:06.801149 result report
609 21:47:06.806197 boot times 0Enable ddr reg access
610 21:47:06.811451 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 21:47:06.825359 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 21:47:07.484860 bl2z: ptr: 05129330, size: 00001e40
613 21:47:07.491808 0.0;M3 CHK:0;cm4_sp_mode 0
614 21:47:07.492193 MVN_1=0x00000000
615 21:47:07.492436 MVN_2=0x00000000
616 21:47:07.503286 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 21:47:07.503605 OPS=0x04
618 21:47:07.503838 ring efuse init
619 21:47:07.508919 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 21:47:07.509218 [0.017354 Inits done]
621 21:47:07.509434 secure task start!
622 21:47:07.517032 high task start!
623 21:47:07.517329 low task start!
624 21:47:07.517540 run into bl31
625 21:47:07.525753 NOTICE: BL31: v1.3(release):4fc40b1
626 21:47:07.533468 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 21:47:07.533782 NOTICE: BL31: G12A normal boot!
628 21:47:07.549030 NOTICE: BL31: BL33 decompress pass
629 21:47:07.554721 ERROR: Error initializing runtime service opteed_fast
630 21:47:08.773708 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 21:47:08.774299 bl2_stage_init 0x01
632 21:47:08.774725 bl2_stage_init 0x81
633 21:47:08.779255 hw id: 0x0000 - pwm id 0x01
634 21:47:08.779705 bl2_stage_init 0xc1
635 21:47:08.784900 bl2_stage_init 0x02
636 21:47:08.785367
637 21:47:08.785782 L0:00000000
638 21:47:08.786183 L1:00000703
639 21:47:08.786579 L2:00008067
640 21:47:08.786970 L3:15000000
641 21:47:08.790421 S1:00000000
642 21:47:08.790862 B2:20282000
643 21:47:08.791268 B1:a0f83180
644 21:47:08.791664
645 21:47:08.792093 TE: 70828
646 21:47:08.792498
647 21:47:08.796067 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 21:47:08.796510
649 21:47:08.801628 Board ID = 1
650 21:47:08.802066 Set cpu clk to 24M
651 21:47:08.802469 Set clk81 to 24M
652 21:47:08.807254 Use GP1_pll as DSU clk.
653 21:47:08.807688 DSU clk: 1200 Mhz
654 21:47:08.808123 CPU clk: 1200 MHz
655 21:47:08.812808 Set clk81 to 166.6M
656 21:47:08.818409 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 21:47:08.818849 board id: 1
658 21:47:08.825611 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 21:47:08.836497 fw parse done
660 21:47:08.842480 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 21:47:08.885672 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 21:47:08.896737 PIEI prepare done
663 21:47:08.897179 fastboot data load
664 21:47:08.897589 fastboot data verify
665 21:47:08.902343 verify result: 266
666 21:47:08.907932 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 21:47:08.908412 LPDDR4 probe
668 21:47:08.908820 ddr clk to 1584MHz
669 21:47:08.915902 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 21:47:08.953655
671 21:47:08.954121 dmc_version 0001
672 21:47:08.960709 Check phy result
673 21:47:08.966669 INFO : End of CA training
674 21:47:08.967121 INFO : End of initialization
675 21:47:08.972311 INFO : Training has run successfully!
676 21:47:08.972753 Check phy result
677 21:47:08.977885 INFO : End of initialization
678 21:47:08.978329 INFO : End of read enable training
679 21:47:08.983526 INFO : End of fine write leveling
680 21:47:08.989117 INFO : End of Write leveling coarse delay
681 21:47:08.989567 INFO : Training has run successfully!
682 21:47:08.989977 Check phy result
683 21:47:08.994674 INFO : End of initialization
684 21:47:08.995117 INFO : End of read dq deskew training
685 21:47:09.000304 INFO : End of MPR read delay center optimization
686 21:47:09.005865 INFO : End of write delay center optimization
687 21:47:09.011483 INFO : End of read delay center optimization
688 21:47:09.011925 INFO : End of max read latency training
689 21:47:09.017089 INFO : Training has run successfully!
690 21:47:09.017529 1D training succeed
691 21:47:09.026382 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 21:47:09.074650 Check phy result
693 21:47:09.075108 INFO : End of initialization
694 21:47:09.102123 INFO : End of 2D read delay Voltage center optimization
695 21:47:09.126276 INFO : End of 2D read delay Voltage center optimization
696 21:47:09.182941 INFO : End of 2D write delay Voltage center optimization
697 21:47:09.236864 INFO : End of 2D write delay Voltage center optimization
698 21:47:09.242413 INFO : Training has run successfully!
699 21:47:09.242862
700 21:47:09.243271 channel==0
701 21:47:09.248016 RxClkDly_Margin_A0==78 ps 8
702 21:47:09.248467 TxDqDly_Margin_A0==98 ps 10
703 21:47:09.251390 RxClkDly_Margin_A1==88 ps 9
704 21:47:09.251823 TxDqDly_Margin_A1==88 ps 9
705 21:47:09.256963 TrainedVREFDQ_A0==74
706 21:47:09.257416 TrainedVREFDQ_A1==75
707 21:47:09.257824 VrefDac_Margin_A0==23
708 21:47:09.262521 DeviceVref_Margin_A0==40
709 21:47:09.262952 VrefDac_Margin_A1==23
710 21:47:09.268139 DeviceVref_Margin_A1==39
711 21:47:09.268570
712 21:47:09.268973
713 21:47:09.269372 channel==1
714 21:47:09.269763 RxClkDly_Margin_A0==78 ps 8
715 21:47:09.273774 TxDqDly_Margin_A0==98 ps 10
716 21:47:09.274216 RxClkDly_Margin_A1==78 ps 8
717 21:47:09.279354 TxDqDly_Margin_A1==88 ps 9
718 21:47:09.279791 TrainedVREFDQ_A0==78
719 21:47:09.280231 TrainedVREFDQ_A1==77
720 21:47:09.284990 VrefDac_Margin_A0==22
721 21:47:09.285423 DeviceVref_Margin_A0==36
722 21:47:09.290523 VrefDac_Margin_A1==22
723 21:47:09.290952 DeviceVref_Margin_A1==37
724 21:47:09.291351
725 21:47:09.296130 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 21:47:09.296567
727 21:47:09.324193 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 21:47:09.329719 2D training succeed
729 21:47:09.335359 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 21:47:09.335792 auto size-- 65535DDR cs0 size: 2048MB
731 21:47:09.340913 DDR cs1 size: 2048MB
732 21:47:09.341368 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 21:47:09.346512 cs0 DataBus test pass
734 21:47:09.346946 cs1 DataBus test pass
735 21:47:09.347346 cs0 AddrBus test pass
736 21:47:09.352132 cs1 AddrBus test pass
737 21:47:09.352573
738 21:47:09.352978 100bdlr_step_size ps== 485
739 21:47:09.353384 result report
740 21:47:09.357717 boot times 0Enable ddr reg access
741 21:47:09.365193 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 21:47:09.379016 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 21:47:10.038897 bl2z: ptr: 05129330, size: 00001e40
744 21:47:10.047328 0.0;M3 CHK:0;cm4_sp_mode 0
745 21:47:10.047826 MVN_1=0x00000000
746 21:47:10.048291 MVN_2=0x00000000
747 21:47:10.058676 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 21:47:10.059184 OPS=0x04
749 21:47:10.059577 ring efuse init
750 21:47:10.064352 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 21:47:10.064786 [0.017354 Inits done]
752 21:47:10.065170 secure task start!
753 21:47:10.071806 high task start!
754 21:47:10.072256 low task start!
755 21:47:10.072642 run into bl31
756 21:47:10.080335 NOTICE: BL31: v1.3(release):4fc40b1
757 21:47:10.088293 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 21:47:10.088717 NOTICE: BL31: G12A normal boot!
759 21:47:10.103762 NOTICE: BL31: BL33 decompress pass
760 21:47:10.109459 ERROR: Error initializing runtime service opteed_fast
761 21:47:10.904940
762 21:47:10.905572
763 21:47:10.910337 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 21:47:10.910787
765 21:47:10.913882 Model: Libre Computer AML-S905D3-CC Solitude
766 21:47:11.060916 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 21:47:11.076231 DRAM: 2 GiB (effective 3.8 GiB)
768 21:47:11.177170 Core: 406 devices, 33 uclasses, devicetree: separate
769 21:47:11.182973 WDT: Not starting watchdog@f0d0
770 21:47:11.208250 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 21:47:11.220297 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 21:47:11.225353 ** Bad device specification mmc 0 **
773 21:47:11.235296 Card did not respond to voltage select! : -110
774 21:47:11.242997 ** Bad device specification mmc 0 **
775 21:47:11.243447 Couldn't find partition mmc 0
776 21:47:11.251198 Card did not respond to voltage select! : -110
777 21:47:11.256780 ** Bad device specification mmc 0 **
778 21:47:11.257213 Couldn't find partition mmc 0
779 21:47:11.261883 Error: could not access storage.
780 21:47:11.559504 Net: eth0: ethernet@ff3f0000
781 21:47:11.560111 starting USB...
782 21:47:11.804167 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 21:47:11.804669 Starting the controller
784 21:47:11.811035 USB XHCI 1.10
785 21:47:13.365299 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 21:47:13.373463 scanning usb for storage devices... 0 Storage Device(s) found
788 21:47:13.424646 Hit any key to stop autoboot: 1
789 21:47:13.425449 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 21:47:13.425820 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 21:47:13.426095 Setting prompt string to ['=>']
792 21:47:13.426366 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 21:47:13.439492 0
794 21:47:13.440204 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 21:47:13.541217 => setenv autoload no
797 21:47:13.541928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 21:47:13.546297 setenv autoload no
800 21:47:13.647318 => setenv initrd_high 0xffffffff
801 21:47:13.647871 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 21:47:13.652701 setenv initrd_high 0xffffffff
804 21:47:13.753830 => setenv fdt_high 0xffffffff
805 21:47:13.754608 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
806 21:47:13.759410 setenv fdt_high 0xffffffff
808 21:47:13.860660 => dhcp
809 21:47:13.861414 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 21:47:13.865890 dhcp
811 21:47:14.871563 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 21:47:14.871971 Speed: 1000, full duplex
813 21:47:14.872204 BOOTP broadcast 1
814 21:47:15.119629 BOOTP broadcast 2
815 21:47:15.146286 DHCP client bound to address 192.168.6.21 (274 ms)
817 21:47:15.247810 => setenv serverip 192.168.6.2
818 21:47:15.248580 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
819 21:47:15.253205 setenv serverip 192.168.6.2
821 21:47:15.354617 => tftpboot 0x01080000 918795/tftp-deploy-7exrqvm1/kernel/uImage
822 21:47:15.355341 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
823 21:47:15.362167 tftpboot 0x01080000 918795/tftp-deploy-7exrqvm1/kernel/uImage
824 21:47:15.362629 Speed: 1000, full duplex
825 21:47:15.363025 Using ethernet@ff3f0000 device
826 21:47:15.367659 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 21:47:15.373274 Filename '918795/tftp-deploy-7exrqvm1/kernel/uImage'.
828 21:47:15.377101 Load address: 0x1080000
829 21:47:18.234408 Loading: *################################################## 43.6 MiB
830 21:47:18.235034 15.2 MiB/s
831 21:47:18.235443 done
832 21:47:18.238646 Bytes transferred = 45713984 (2b98a40 hex)
834 21:47:18.340216 => tftpboot 0x08000000 918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
835 21:47:18.341017 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
836 21:47:18.348020 tftpboot 0x08000000 918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot
837 21:47:18.348535 Speed: 1000, full duplex
838 21:47:18.348941 Using ethernet@ff3f0000 device
839 21:47:18.353369 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 21:47:18.363161 Filename '918795/tftp-deploy-7exrqvm1/ramdisk/ramdisk.cpio.gz.uboot'.
841 21:47:18.363711 Load address: 0x8000000
842 21:47:19.835329 Loading: *################################################# UDP wrong checksum 00000005 0000149c
843 21:47:24.836648 T UDP wrong checksum 00000005 0000149c
844 21:47:25.668237 UDP wrong checksum 00000005 000060a5
845 21:47:34.837541 T T UDP wrong checksum 00000005 0000149c
846 21:47:35.359478 UDP wrong checksum 000000ff 0000e22b
847 21:47:35.398753 UDP wrong checksum 000000ff 0000731e
848 21:47:39.290325 UDP wrong checksum 000000ff 000021b4
849 21:47:39.300777 UDP wrong checksum 000000ff 0000b7a6
850 21:47:54.845182 T T T T UDP wrong checksum 00000005 0000149c
851 21:48:14.847376 T T T
852 21:48:14.848094 Retry count exceeded; starting again
854 21:48:14.849633 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
857 21:48:14.851690 end: 2.4 uboot-commands (duration 00:01:21) [common]
859 21:48:14.853442 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
861 21:48:14.854584 end: 2 uboot-action (duration 00:01:21) [common]
863 21:48:14.856276 Cleaning after the job
864 21:48:14.856872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/ramdisk
865 21:48:14.859966 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/kernel
866 21:48:14.914424 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/dtb
867 21:48:14.915719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/nfsrootfs
868 21:48:15.062875 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/918795/tftp-deploy-7exrqvm1/modules
869 21:48:15.083673 start: 4.1 power-off (timeout 00:00:30) [common]
870 21:48:15.084363 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
871 21:48:15.118221 >> OK - accepted request
872 21:48:15.121150 Returned 0 in 0 seconds
873 21:48:15.221859 end: 4.1 power-off (duration 00:00:00) [common]
875 21:48:15.222762 start: 4.2 read-feedback (timeout 00:10:00) [common]
876 21:48:15.223393 Listened to connection for namespace 'common' for up to 1s
877 21:48:16.224325 Finalising connection for namespace 'common'
878 21:48:16.224787 Disconnecting from shell: Finalise
879 21:48:16.225049 =>
880 21:48:16.325708 end: 4.2 read-feedback (duration 00:00:01) [common]
881 21:48:16.326283 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/918795
882 21:48:18.025810 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/918795
883 21:48:18.026401 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.