Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 18:35:12.956601 lava-dispatcher, installed at version: 2024.01
2 18:35:12.957375 start: 0 validate
3 18:35:12.957850 Start time: 2024-11-04 18:35:12.957821+00:00 (UTC)
4 18:35:12.958380 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 18:35:12.958908 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 18:35:12.993944 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 18:35:12.994651 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 18:35:14.031326 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 18:35:14.031968 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 18:35:19.104325 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 18:35:19.104826 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 18:35:19.137425 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 18:35:19.138192 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 18:35:20.186207 validate duration: 7.23
16 18:35:20.187699 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 18:35:20.188344 start: 1.1 download-retry (timeout 00:10:00) [common]
18 18:35:20.188949 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 18:35:20.189892 Not decompressing ramdisk as can be used compressed.
20 18:35:20.190647 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 18:35:20.191169 saving as /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/ramdisk/initrd.cpio.gz
22 18:35:20.191669 total size: 5628182 (5 MB)
23 18:35:20.236924 progress 0 % (0 MB)
24 18:35:20.244722 progress 5 % (0 MB)
25 18:35:20.252795 progress 10 % (0 MB)
26 18:35:20.259824 progress 15 % (0 MB)
27 18:35:20.267533 progress 20 % (1 MB)
28 18:35:20.274493 progress 25 % (1 MB)
29 18:35:20.279250 progress 30 % (1 MB)
30 18:35:20.283418 progress 35 % (1 MB)
31 18:35:20.287033 progress 40 % (2 MB)
32 18:35:20.291082 progress 45 % (2 MB)
33 18:35:20.294769 progress 50 % (2 MB)
34 18:35:20.298871 progress 55 % (2 MB)
35 18:35:20.302874 progress 60 % (3 MB)
36 18:35:20.309331 progress 65 % (3 MB)
37 18:35:20.314260 progress 70 % (3 MB)
38 18:35:20.318722 progress 75 % (4 MB)
39 18:35:20.323751 progress 80 % (4 MB)
40 18:35:20.328247 progress 85 % (4 MB)
41 18:35:20.333027 progress 90 % (4 MB)
42 18:35:20.337491 progress 95 % (5 MB)
43 18:35:20.341486 progress 100 % (5 MB)
44 18:35:20.342308 5 MB downloaded in 0.15 s (35.64 MB/s)
45 18:35:20.343032 end: 1.1.1 http-download (duration 00:00:00) [common]
47 18:35:20.344198 end: 1.1 download-retry (duration 00:00:00) [common]
48 18:35:20.344571 start: 1.2 download-retry (timeout 00:10:00) [common]
49 18:35:20.344908 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 18:35:20.345482 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/kernel/Image
51 18:35:20.345785 saving as /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/kernel/Image
52 18:35:20.346049 total size: 45713920 (43 MB)
53 18:35:20.346323 No compression specified
54 18:35:20.383793 progress 0 % (0 MB)
55 18:35:20.412074 progress 5 % (2 MB)
56 18:35:20.440358 progress 10 % (4 MB)
57 18:35:20.468486 progress 15 % (6 MB)
58 18:35:20.497131 progress 20 % (8 MB)
59 18:35:20.525326 progress 25 % (10 MB)
60 18:35:20.553390 progress 30 % (13 MB)
61 18:35:20.581466 progress 35 % (15 MB)
62 18:35:20.612047 progress 40 % (17 MB)
63 18:35:20.640119 progress 45 % (19 MB)
64 18:35:20.668756 progress 50 % (21 MB)
65 18:35:20.697105 progress 55 % (24 MB)
66 18:35:20.725258 progress 60 % (26 MB)
67 18:35:20.753163 progress 65 % (28 MB)
68 18:35:20.782571 progress 70 % (30 MB)
69 18:35:20.811600 progress 75 % (32 MB)
70 18:35:20.840044 progress 80 % (34 MB)
71 18:35:20.867820 progress 85 % (37 MB)
72 18:35:20.895800 progress 90 % (39 MB)
73 18:35:20.923444 progress 95 % (41 MB)
74 18:35:20.950654 progress 100 % (43 MB)
75 18:35:20.951183 43 MB downloaded in 0.61 s (72.04 MB/s)
76 18:35:20.951657 end: 1.2.1 http-download (duration 00:00:01) [common]
78 18:35:20.952506 end: 1.2 download-retry (duration 00:00:01) [common]
79 18:35:20.952784 start: 1.3 download-retry (timeout 00:09:59) [common]
80 18:35:20.953048 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 18:35:20.953521 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 18:35:20.953799 saving as /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/dtb/meson-g12b-a311d-libretech-cc.dtb
83 18:35:20.954008 total size: 54703 (0 MB)
84 18:35:20.954215 No compression specified
85 18:35:20.988358 progress 59 % (0 MB)
86 18:35:20.989261 progress 100 % (0 MB)
87 18:35:20.989942 0 MB downloaded in 0.04 s (1.45 MB/s)
88 18:35:20.990526 end: 1.3.1 http-download (duration 00:00:00) [common]
90 18:35:20.991385 end: 1.3 download-retry (duration 00:00:00) [common]
91 18:35:20.991654 start: 1.4 download-retry (timeout 00:09:59) [common]
92 18:35:20.991918 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 18:35:20.992428 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 18:35:20.992678 saving as /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/nfsrootfs/full.rootfs.tar
95 18:35:20.992883 total size: 107552908 (102 MB)
96 18:35:20.993090 Using unxz to decompress xz
97 18:35:21.026600 progress 0 % (0 MB)
98 18:35:21.666557 progress 5 % (5 MB)
99 18:35:22.387438 progress 10 % (10 MB)
100 18:35:23.109659 progress 15 % (15 MB)
101 18:35:23.862771 progress 20 % (20 MB)
102 18:35:24.435166 progress 25 % (25 MB)
103 18:35:25.050969 progress 30 % (30 MB)
104 18:35:25.783268 progress 35 % (35 MB)
105 18:35:26.126820 progress 40 % (41 MB)
106 18:35:26.548544 progress 45 % (46 MB)
107 18:35:27.237817 progress 50 % (51 MB)
108 18:35:27.914603 progress 55 % (56 MB)
109 18:35:28.670594 progress 60 % (61 MB)
110 18:35:29.422267 progress 65 % (66 MB)
111 18:35:30.154120 progress 70 % (71 MB)
112 18:35:30.923306 progress 75 % (76 MB)
113 18:35:31.608135 progress 80 % (82 MB)
114 18:35:32.316366 progress 85 % (87 MB)
115 18:35:33.052827 progress 90 % (92 MB)
116 18:35:33.763336 progress 95 % (97 MB)
117 18:35:34.577713 progress 100 % (102 MB)
118 18:35:34.591880 102 MB downloaded in 13.60 s (7.54 MB/s)
119 18:35:34.592774 end: 1.4.1 http-download (duration 00:00:14) [common]
121 18:35:34.594384 end: 1.4 download-retry (duration 00:00:14) [common]
122 18:35:34.594894 start: 1.5 download-retry (timeout 00:09:46) [common]
123 18:35:34.595402 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 18:35:34.596226 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/modules.tar.xz
125 18:35:34.596697 saving as /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/modules/modules.tar
126 18:35:34.597101 total size: 11618336 (11 MB)
127 18:35:34.597516 Using unxz to decompress xz
128 18:35:34.639487 progress 0 % (0 MB)
129 18:35:34.708075 progress 5 % (0 MB)
130 18:35:34.788391 progress 10 % (1 MB)
131 18:35:34.899554 progress 15 % (1 MB)
132 18:35:34.995291 progress 20 % (2 MB)
133 18:35:35.077284 progress 25 % (2 MB)
134 18:35:35.154877 progress 30 % (3 MB)
135 18:35:35.236295 progress 35 % (3 MB)
136 18:35:35.311086 progress 40 % (4 MB)
137 18:35:35.388261 progress 45 % (5 MB)
138 18:35:35.479042 progress 50 % (5 MB)
139 18:35:35.564120 progress 55 % (6 MB)
140 18:35:35.645795 progress 60 % (6 MB)
141 18:35:35.726964 progress 65 % (7 MB)
142 18:35:35.808545 progress 70 % (7 MB)
143 18:35:35.887151 progress 75 % (8 MB)
144 18:35:35.971376 progress 80 % (8 MB)
145 18:35:36.059140 progress 85 % (9 MB)
146 18:35:36.143182 progress 90 % (10 MB)
147 18:35:36.217187 progress 95 % (10 MB)
148 18:35:36.294248 progress 100 % (11 MB)
149 18:35:36.307585 11 MB downloaded in 1.71 s (6.48 MB/s)
150 18:35:36.308361 end: 1.5.1 http-download (duration 00:00:02) [common]
152 18:35:36.310145 end: 1.5 download-retry (duration 00:00:02) [common]
153 18:35:36.310720 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 18:35:36.311285 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 18:35:46.247972 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/935872/extract-nfsrootfs-_icsu0ih
156 18:35:46.248589 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 18:35:46.248887 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 18:35:46.250529 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp
159 18:35:46.251326 makedir: /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin
160 18:35:46.251893 makedir: /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/tests
161 18:35:46.254596 makedir: /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/results
162 18:35:46.255040 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-add-keys
163 18:35:46.256031 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-add-sources
164 18:35:46.256849 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-background-process-start
165 18:35:46.257913 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-background-process-stop
166 18:35:46.258836 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-common-functions
167 18:35:46.259452 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-echo-ipv4
168 18:35:46.260142 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-install-packages
169 18:35:46.261074 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-installed-packages
170 18:35:46.261683 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-os-build
171 18:35:46.262416 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-probe-channel
172 18:35:46.263301 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-probe-ip
173 18:35:46.264348 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-target-ip
174 18:35:46.265410 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-target-mac
175 18:35:46.266427 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-target-storage
176 18:35:46.267441 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-case
177 18:35:46.268451 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-event
178 18:35:46.269123 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-feedback
179 18:35:46.271852 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-raise
180 18:35:46.272774 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-reference
181 18:35:46.273621 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-runner
182 18:35:46.274349 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-set
183 18:35:46.275161 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-test-shell
184 18:35:46.275832 Updating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-install-packages (oe)
185 18:35:46.276774 Updating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/bin/lava-installed-packages (oe)
186 18:35:46.277867 Creating /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/environment
187 18:35:46.278469 LAVA metadata
188 18:35:46.278791 - LAVA_JOB_ID=935872
189 18:35:46.279025 - LAVA_DISPATCHER_IP=192.168.6.2
190 18:35:46.279437 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 18:35:46.280805 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 18:35:46.281234 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 18:35:46.281456 skipped lava-vland-overlay
194 18:35:46.281707 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 18:35:46.281968 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 18:35:46.282201 skipped lava-multinode-overlay
197 18:35:46.282448 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 18:35:46.282702 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 18:35:46.282969 Loading test definitions
200 18:35:46.283258 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 18:35:46.283488 Using /lava-935872 at stage 0
202 18:35:46.286529 uuid=935872_1.6.2.4.1 testdef=None
203 18:35:46.286972 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 18:35:46.287305 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 18:35:46.293120 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 18:35:46.294055 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 18:35:46.297758 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 18:35:46.298650 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 18:35:46.301575 runner path: /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/0/tests/0_dmesg test_uuid 935872_1.6.2.4.1
212 18:35:46.302220 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 18:35:46.303023 Creating lava-test-runner.conf files
215 18:35:46.303233 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/935872/lava-overlay-39c3abqp/lava-935872/0 for stage 0
216 18:35:46.303598 - 0_dmesg
217 18:35:46.303971 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 18:35:46.304349 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 18:35:46.349926 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 18:35:46.350479 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 18:35:46.350830 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 18:35:46.351178 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 18:35:46.351515 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 18:35:47.101974 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 18:35:47.102454 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 18:35:47.102714 extracting modules file /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935872/extract-nfsrootfs-_icsu0ih
227 18:35:48.501863 extracting modules file /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk
228 18:35:49.934749 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 18:35:49.935202 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 18:35:49.935477 [common] Applying overlay to NFS
231 18:35:49.935689 [common] Applying overlay /var/lib/lava/dispatcher/tmp/935872/compress-overlay-_deck50r/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/935872/extract-nfsrootfs-_icsu0ih
232 18:35:49.964731 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 18:35:49.965111 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 18:35:49.965381 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 18:35:49.965607 Converting downloaded kernel to a uImage
236 18:35:49.965910 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/kernel/Image /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/kernel/uImage
237 18:35:50.415672 output: Image Name:
238 18:35:50.416133 output: Created: Mon Nov 4 18:35:49 2024
239 18:35:50.416347 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 18:35:50.416551 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 18:35:50.416752 output: Load Address: 01080000
242 18:35:50.416951 output: Entry Point: 01080000
243 18:35:50.417146 output:
244 18:35:50.417485 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 18:35:50.417756 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 18:35:50.418025 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 18:35:50.418281 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 18:35:50.418543 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 18:35:50.418804 Building ramdisk /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk
250 18:35:52.649407 >> 166774 blocks
251 18:36:00.437183 Adding RAMdisk u-boot header.
252 18:36:00.437846 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk.cpio.gz.uboot
253 18:36:00.697721 output: Image Name:
254 18:36:00.698123 output: Created: Mon Nov 4 18:36:00 2024
255 18:36:00.698339 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 18:36:00.698545 output: Data Size: 23428353 Bytes = 22879.25 KiB = 22.34 MiB
257 18:36:00.698747 output: Load Address: 00000000
258 18:36:00.698947 output: Entry Point: 00000000
259 18:36:00.699143 output:
260 18:36:00.699748 rename /var/lib/lava/dispatcher/tmp/935872/extract-overlay-ramdisk-fymbxgb0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
261 18:36:00.700322 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 18:36:00.700930 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 18:36:00.701546 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 18:36:00.702046 No LXC device requested
265 18:36:00.702599 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 18:36:00.703158 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 18:36:00.703698 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 18:36:00.704188 Checking files for TFTP limit of 4294967296 bytes.
269 18:36:00.707089 end: 1 tftp-deploy (duration 00:00:41) [common]
270 18:36:00.707714 start: 2 uboot-action (timeout 00:05:00) [common]
271 18:36:00.708327 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 18:36:00.708878 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 18:36:00.709426 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 18:36:00.709996 Using kernel file from prepare-kernel: 935872/tftp-deploy-wgnmgj6p/kernel/uImage
275 18:36:00.710675 substitutions:
276 18:36:00.711119 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 18:36:00.711565 - {DTB_ADDR}: 0x01070000
278 18:36:00.712028 - {DTB}: 935872/tftp-deploy-wgnmgj6p/dtb/meson-g12b-a311d-libretech-cc.dtb
279 18:36:00.712475 - {INITRD}: 935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
280 18:36:00.712913 - {KERNEL_ADDR}: 0x01080000
281 18:36:00.713345 - {KERNEL}: 935872/tftp-deploy-wgnmgj6p/kernel/uImage
282 18:36:00.713777 - {LAVA_MAC}: None
283 18:36:00.714255 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/935872/extract-nfsrootfs-_icsu0ih
284 18:36:00.714693 - {NFS_SERVER_IP}: 192.168.6.2
285 18:36:00.715122 - {PRESEED_CONFIG}: None
286 18:36:00.715551 - {PRESEED_LOCAL}: None
287 18:36:00.715976 - {RAMDISK_ADDR}: 0x08000000
288 18:36:00.716440 - {RAMDISK}: 935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
289 18:36:00.716868 - {ROOT_PART}: None
290 18:36:00.717297 - {ROOT}: None
291 18:36:00.717721 - {SERVER_IP}: 192.168.6.2
292 18:36:00.718146 - {TEE_ADDR}: 0x83000000
293 18:36:00.718568 - {TEE}: None
294 18:36:00.718994 Parsed boot commands:
295 18:36:00.719408 - setenv autoload no
296 18:36:00.719829 - setenv initrd_high 0xffffffff
297 18:36:00.720282 - setenv fdt_high 0xffffffff
298 18:36:00.720707 - dhcp
299 18:36:00.721128 - setenv serverip 192.168.6.2
300 18:36:00.721548 - tftpboot 0x01080000 935872/tftp-deploy-wgnmgj6p/kernel/uImage
301 18:36:00.721971 - tftpboot 0x08000000 935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
302 18:36:00.722395 - tftpboot 0x01070000 935872/tftp-deploy-wgnmgj6p/dtb/meson-g12b-a311d-libretech-cc.dtb
303 18:36:00.722822 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/935872/extract-nfsrootfs-_icsu0ih,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 18:36:00.723259 - bootm 0x01080000 0x08000000 0x01070000
305 18:36:00.723800 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 18:36:00.725464 start: 2.3 connect-device (timeout 00:05:00) [common]
308 18:36:00.725921 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 18:36:00.740672 Setting prompt string to ['lava-test: # ']
310 18:36:00.742260 end: 2.3 connect-device (duration 00:00:00) [common]
311 18:36:00.742905 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 18:36:00.743502 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 18:36:00.744304 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 18:36:00.745616 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 18:36:00.783333 >> OK - accepted request
316 18:36:00.785414 Returned 0 in 0 seconds
317 18:36:00.886615 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 18:36:00.888434 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 18:36:00.889051 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 18:36:00.889615 Setting prompt string to ['Hit any key to stop autoboot']
322 18:36:00.890123 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 18:36:00.891809 Trying 192.168.56.21...
324 18:36:00.892365 Connected to conserv1.
325 18:36:00.892828 Escape character is '^]'.
326 18:36:00.893291
327 18:36:00.893752 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 18:36:00.894226
329 18:36:11.941091 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 18:36:11.941781 bl2_stage_init 0x01
331 18:36:11.942283 bl2_stage_init 0x81
332 18:36:11.946795 hw id: 0x0000 - pwm id 0x01
333 18:36:11.947352 bl2_stage_init 0xc1
334 18:36:11.947799 bl2_stage_init 0x02
335 18:36:11.948288
336 18:36:11.952338 L0:00000000
337 18:36:11.952808 L1:20000703
338 18:36:11.953239 L2:00008067
339 18:36:11.953666 L3:14000000
340 18:36:11.955216 B2:00402000
341 18:36:11.955688 B1:e0f83180
342 18:36:11.956153
343 18:36:11.956593 TE: 58124
344 18:36:11.957024
345 18:36:11.966395 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 18:36:11.966869
347 18:36:11.967302 Board ID = 1
348 18:36:11.967728 Set A53 clk to 24M
349 18:36:11.968197 Set A73 clk to 24M
350 18:36:11.972032 Set clk81 to 24M
351 18:36:11.972497 A53 clk: 1200 MHz
352 18:36:11.972929 A73 clk: 1200 MHz
353 18:36:11.977561 CLK81: 166.6M
354 18:36:11.978024 smccc: 00012a92
355 18:36:11.983217 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 18:36:11.983686 board id: 1
357 18:36:11.991963 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 18:36:12.002269 fw parse done
359 18:36:12.008248 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 18:36:12.050910 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 18:36:12.061778 PIEI prepare done
362 18:36:12.062240 fastboot data load
363 18:36:12.062678 fastboot data verify
364 18:36:12.067444 verify result: 266
365 18:36:12.073034 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 18:36:12.073509 LPDDR4 probe
367 18:36:12.073963 ddr clk to 1584MHz
368 18:36:12.081011 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 18:36:12.118285
370 18:36:12.118769 dmc_version 0001
371 18:36:12.124948 Check phy result
372 18:36:12.130847 INFO : End of CA training
373 18:36:12.131332 INFO : End of initialization
374 18:36:12.136425 INFO : Training has run successfully!
375 18:36:12.136922 Check phy result
376 18:36:12.142028 INFO : End of initialization
377 18:36:12.142501 INFO : End of read enable training
378 18:36:12.147648 INFO : End of fine write leveling
379 18:36:12.153349 INFO : End of Write leveling coarse delay
380 18:36:12.153834 INFO : Training has run successfully!
381 18:36:12.154283 Check phy result
382 18:36:12.158873 INFO : End of initialization
383 18:36:12.159350 INFO : End of read dq deskew training
384 18:36:12.164416 INFO : End of MPR read delay center optimization
385 18:36:12.170014 INFO : End of write delay center optimization
386 18:36:12.175613 INFO : End of read delay center optimization
387 18:36:12.176130 INFO : End of max read latency training
388 18:36:12.181192 INFO : Training has run successfully!
389 18:36:12.181663 1D training succeed
390 18:36:12.190376 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 18:36:12.237953 Check phy result
392 18:36:12.238445 INFO : End of initialization
393 18:36:12.259678 INFO : End of 2D read delay Voltage center optimization
394 18:36:12.279744 INFO : End of 2D read delay Voltage center optimization
395 18:36:12.331640 INFO : End of 2D write delay Voltage center optimization
396 18:36:12.380916 INFO : End of 2D write delay Voltage center optimization
397 18:36:12.386447 INFO : Training has run successfully!
398 18:36:12.386926
399 18:36:12.387382 channel==0
400 18:36:12.392105 RxClkDly_Margin_A0==88 ps 9
401 18:36:12.392582 TxDqDly_Margin_A0==98 ps 10
402 18:36:12.397668 RxClkDly_Margin_A1==88 ps 9
403 18:36:12.398137 TxDqDly_Margin_A1==98 ps 10
404 18:36:12.398591 TrainedVREFDQ_A0==74
405 18:36:12.403235 TrainedVREFDQ_A1==74
406 18:36:12.403710 VrefDac_Margin_A0==25
407 18:36:12.404197 DeviceVref_Margin_A0==40
408 18:36:12.408842 VrefDac_Margin_A1==25
409 18:36:12.409313 DeviceVref_Margin_A1==40
410 18:36:12.409755
411 18:36:12.410196
412 18:36:12.414445 channel==1
413 18:36:12.414918 RxClkDly_Margin_A0==98 ps 10
414 18:36:12.415364 TxDqDly_Margin_A0==98 ps 10
415 18:36:12.420069 RxClkDly_Margin_A1==88 ps 9
416 18:36:12.420554 TxDqDly_Margin_A1==88 ps 9
417 18:36:12.425668 TrainedVREFDQ_A0==77
418 18:36:12.426145 TrainedVREFDQ_A1==77
419 18:36:12.426597 VrefDac_Margin_A0==22
420 18:36:12.431225 DeviceVref_Margin_A0==37
421 18:36:12.431691 VrefDac_Margin_A1==24
422 18:36:12.436841 DeviceVref_Margin_A1==37
423 18:36:12.437312
424 18:36:12.437763 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 18:36:12.438207
426 18:36:12.470439 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 18:36:12.471002 2D training succeed
428 18:36:12.476085 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 18:36:12.481680 auto size-- 65535DDR cs0 size: 2048MB
430 18:36:12.482148 DDR cs1 size: 2048MB
431 18:36:12.487266 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 18:36:12.487735 cs0 DataBus test pass
433 18:36:12.492840 cs1 DataBus test pass
434 18:36:12.493306 cs0 AddrBus test pass
435 18:36:12.493752 cs1 AddrBus test pass
436 18:36:12.494191
437 18:36:12.498457 100bdlr_step_size ps== 420
438 18:36:12.498935 result report
439 18:36:12.504069 boot times 0Enable ddr reg access
440 18:36:12.509400 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 18:36:12.522872 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 18:36:13.094836 0.0;M3 CHK:0;cm4_sp_mode 0
443 18:36:13.095400 MVN_1=0x00000000
444 18:36:13.100383 MVN_2=0x00000000
445 18:36:13.106103 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 18:36:13.106591 OPS=0x10
447 18:36:13.107045 ring efuse init
448 18:36:13.107507 chipver efuse init
449 18:36:13.111742 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 18:36:13.117297 [0.018961 Inits done]
451 18:36:13.117777 secure task start!
452 18:36:13.118227 high task start!
453 18:36:13.121892 low task start!
454 18:36:13.122370 run into bl31
455 18:36:13.128502 NOTICE: BL31: v1.3(release):4fc40b1
456 18:36:13.136319 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 18:36:13.136821 NOTICE: BL31: G12A normal boot!
458 18:36:13.161846 NOTICE: BL31: BL33 decompress pass
459 18:36:13.167446 ERROR: Error initializing runtime service opteed_fast
460 18:36:14.400364
461 18:36:14.401049
462 18:36:14.408698 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 18:36:14.409204
464 18:36:14.409670 Model: Libre Computer AML-A311D-CC Alta
465 18:36:14.617233 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 18:36:14.640536 DRAM: 2 GiB (effective 3.8 GiB)
467 18:36:14.783634 Core: 408 devices, 31 uclasses, devicetree: separate
468 18:36:14.789390 WDT: Not starting watchdog@f0d0
469 18:36:14.821634 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 18:36:14.834103 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 18:36:14.839088 ** Bad device specification mmc 0 **
472 18:36:14.849409 Card did not respond to voltage select! : -110
473 18:36:14.857097 ** Bad device specification mmc 0 **
474 18:36:14.857580 Couldn't find partition mmc 0
475 18:36:14.865463 Card did not respond to voltage select! : -110
476 18:36:14.870992 ** Bad device specification mmc 0 **
477 18:36:14.871472 Couldn't find partition mmc 0
478 18:36:14.876074 Error: could not access storage.
479 18:36:16.141452 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 18:36:16.141871 bl2_stage_init 0x01
481 18:36:16.142102 bl2_stage_init 0x81
482 18:36:16.147116 hw id: 0x0000 - pwm id 0x01
483 18:36:16.147383 bl2_stage_init 0xc1
484 18:36:16.147599 bl2_stage_init 0x02
485 18:36:16.147807
486 18:36:16.152618 L0:00000000
487 18:36:16.152879 L1:20000703
488 18:36:16.153092 L2:00008067
489 18:36:16.153311 L3:14000000
490 18:36:16.158218 B2:00402000
491 18:36:16.158469 B1:e0f83180
492 18:36:16.158680
493 18:36:16.158898 TE: 58167
494 18:36:16.159105
495 18:36:16.163795 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 18:36:16.164068
497 18:36:16.164286 Board ID = 1
498 18:36:16.169430 Set A53 clk to 24M
499 18:36:16.169688 Set A73 clk to 24M
500 18:36:16.169905 Set clk81 to 24M
501 18:36:16.175111 A53 clk: 1200 MHz
502 18:36:16.175366 A73 clk: 1200 MHz
503 18:36:16.175579 CLK81: 166.6M
504 18:36:16.175786 smccc: 00012abd
505 18:36:16.180591 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 18:36:16.186186 board id: 1
507 18:36:16.192184 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 18:36:16.202735 fw parse done
509 18:36:16.208693 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 18:36:16.251343 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 18:36:16.262239 PIEI prepare done
512 18:36:16.262499 fastboot data load
513 18:36:16.262717 fastboot data verify
514 18:36:16.268057 verify result: 266
515 18:36:16.273595 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 18:36:16.273915 LPDDR4 probe
517 18:36:16.274154 ddr clk to 1584MHz
518 18:36:16.281517 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 18:36:16.318779
520 18:36:16.319181 dmc_version 0001
521 18:36:16.325427 Check phy result
522 18:36:16.331284 INFO : End of CA training
523 18:36:16.331603 INFO : End of initialization
524 18:36:16.336905 INFO : Training has run successfully!
525 18:36:16.337206 Check phy result
526 18:36:16.342472 INFO : End of initialization
527 18:36:16.342764 INFO : End of read enable training
528 18:36:16.348092 INFO : End of fine write leveling
529 18:36:16.353708 INFO : End of Write leveling coarse delay
530 18:36:16.354033 INFO : Training has run successfully!
531 18:36:16.354274 Check phy result
532 18:36:16.359323 INFO : End of initialization
533 18:36:16.359843 INFO : End of read dq deskew training
534 18:36:16.365047 INFO : End of MPR read delay center optimization
535 18:36:16.370667 INFO : End of write delay center optimization
536 18:36:16.376228 INFO : End of read delay center optimization
537 18:36:16.376747 INFO : End of max read latency training
538 18:36:16.381799 INFO : Training has run successfully!
539 18:36:16.382292 1D training succeed
540 18:36:16.390940 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 18:36:16.438596 Check phy result
542 18:36:16.439144 INFO : End of initialization
543 18:36:16.461032 INFO : End of 2D read delay Voltage center optimization
544 18:36:16.481173 INFO : End of 2D read delay Voltage center optimization
545 18:36:16.533088 INFO : End of 2D write delay Voltage center optimization
546 18:36:16.582232 INFO : End of 2D write delay Voltage center optimization
547 18:36:16.587860 INFO : Training has run successfully!
548 18:36:16.588421
549 18:36:16.588869 channel==0
550 18:36:16.593473 RxClkDly_Margin_A0==88 ps 9
551 18:36:16.593995 TxDqDly_Margin_A0==98 ps 10
552 18:36:16.598986 RxClkDly_Margin_A1==88 ps 9
553 18:36:16.599504 TxDqDly_Margin_A1==98 ps 10
554 18:36:16.599930 TrainedVREFDQ_A0==74
555 18:36:16.604646 TrainedVREFDQ_A1==74
556 18:36:16.605176 VrefDac_Margin_A0==24
557 18:36:16.605599 DeviceVref_Margin_A0==40
558 18:36:16.610259 VrefDac_Margin_A1==24
559 18:36:16.610764 DeviceVref_Margin_A1==40
560 18:36:16.611186
561 18:36:16.611598
562 18:36:16.615850 channel==1
563 18:36:16.616404 RxClkDly_Margin_A0==98 ps 10
564 18:36:16.616833 TxDqDly_Margin_A0==98 ps 10
565 18:36:16.621461 RxClkDly_Margin_A1==88 ps 9
566 18:36:16.621969 TxDqDly_Margin_A1==98 ps 10
567 18:36:16.627008 TrainedVREFDQ_A0==77
568 18:36:16.627517 TrainedVREFDQ_A1==77
569 18:36:16.627940 VrefDac_Margin_A0==22
570 18:36:16.632624 DeviceVref_Margin_A0==37
571 18:36:16.633123 VrefDac_Margin_A1==24
572 18:36:16.638238 DeviceVref_Margin_A1==37
573 18:36:16.638737
574 18:36:16.639162 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 18:36:16.643791
576 18:36:16.671838 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000017 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 18:36:16.672457 2D training succeed
578 18:36:16.677444 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 18:36:16.682931 auto size-- 65535DDR cs0 size: 2048MB
580 18:36:16.683453 DDR cs1 size: 2048MB
581 18:36:16.688632 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 18:36:16.689141 cs0 DataBus test pass
583 18:36:16.694258 cs1 DataBus test pass
584 18:36:16.694782 cs0 AddrBus test pass
585 18:36:16.695207 cs1 AddrBus test pass
586 18:36:16.695622
587 18:36:16.699804 100bdlr_step_size ps== 420
588 18:36:16.700362 result report
589 18:36:16.705408 boot times 0Enable ddr reg access
590 18:36:16.710783 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 18:36:16.724260 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 18:36:17.296481 0.0;M3 CHK:0;cm4_sp_mode 0
593 18:36:17.297103 MVN_1=0x00000000
594 18:36:17.302070 MVN_2=0x00000000
595 18:36:17.307670 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 18:36:17.308363 OPS=0x10
597 18:36:17.308822 ring efuse init
598 18:36:17.309269 chipver efuse init
599 18:36:17.313339 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 18:36:17.318776 [0.018961 Inits done]
601 18:36:17.319354 secure task start!
602 18:36:17.319852 high task start!
603 18:36:17.323590 low task start!
604 18:36:17.324334 run into bl31
605 18:36:17.330113 NOTICE: BL31: v1.3(release):4fc40b1
606 18:36:17.337998 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 18:36:17.338523 NOTICE: BL31: G12A normal boot!
608 18:36:17.363308 NOTICE: BL31: BL33 decompress pass
609 18:36:17.369058 ERROR: Error initializing runtime service opteed_fast
610 18:36:18.601879
611 18:36:18.602347
612 18:36:18.610289 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 18:36:18.610717
614 18:36:18.610998 Model: Libre Computer AML-A311D-CC Alta
615 18:36:18.818975 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 18:36:18.842193 DRAM: 2 GiB (effective 3.8 GiB)
617 18:36:18.985267 Core: 408 devices, 31 uclasses, devicetree: separate
618 18:36:18.991192 WDT: Not starting watchdog@f0d0
619 18:36:19.023733 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 18:36:19.036162 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 18:36:19.040947 ** Bad device specification mmc 0 **
622 18:36:19.051226 Card did not respond to voltage select! : -110
623 18:36:19.058925 ** Bad device specification mmc 0 **
624 18:36:19.059625 Couldn't find partition mmc 0
625 18:36:19.066953 Card did not respond to voltage select! : -110
626 18:36:19.072461 ** Bad device specification mmc 0 **
627 18:36:19.073126 Couldn't find partition mmc 0
628 18:36:19.077486 Error: could not access storage.
629 18:36:19.420152 Net: eth0: ethernet@ff3f0000
630 18:36:19.420835 starting USB...
631 18:36:19.671852 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 18:36:19.672551 Starting the controller
633 18:36:19.678741 USB XHCI 1.10
634 18:36:21.391786 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 18:36:21.392511 bl2_stage_init 0x01
636 18:36:21.392990 bl2_stage_init 0x81
637 18:36:21.397322 hw id: 0x0000 - pwm id 0x01
638 18:36:21.397811 bl2_stage_init 0xc1
639 18:36:21.398266 bl2_stage_init 0x02
640 18:36:21.398714
641 18:36:21.402893 L0:00000000
642 18:36:21.403369 L1:20000703
643 18:36:21.403821 L2:00008067
644 18:36:21.404306 L3:14000000
645 18:36:21.408624 B2:00402000
646 18:36:21.409103 B1:e0f83180
647 18:36:21.409552
648 18:36:21.409993 TE: 58167
649 18:36:21.410438
650 18:36:21.414068 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 18:36:21.414554
652 18:36:21.415007 Board ID = 1
653 18:36:21.419641 Set A53 clk to 24M
654 18:36:21.420141 Set A73 clk to 24M
655 18:36:21.420591 Set clk81 to 24M
656 18:36:21.425284 A53 clk: 1200 MHz
657 18:36:21.425756 A73 clk: 1200 MHz
658 18:36:21.426206 CLK81: 166.6M
659 18:36:21.426645 smccc: 00012abd
660 18:36:21.430818 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 18:36:21.436424 board id: 1
662 18:36:21.442344 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 18:36:21.452946 fw parse done
664 18:36:21.459060 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 18:36:21.501587 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 18:36:21.512547 PIEI prepare done
667 18:36:21.513042 fastboot data load
668 18:36:21.513500 fastboot data verify
669 18:36:21.518100 verify result: 266
670 18:36:21.523694 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 18:36:21.524234 LPDDR4 probe
672 18:36:21.524691 ddr clk to 1584MHz
673 18:36:21.531674 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 18:36:21.568989
675 18:36:21.569473 dmc_version 0001
676 18:36:21.575596 Check phy result
677 18:36:21.581448 INFO : End of CA training
678 18:36:21.581943 INFO : End of initialization
679 18:36:21.587057 INFO : Training has run successfully!
680 18:36:21.587529 Check phy result
681 18:36:21.592714 INFO : End of initialization
682 18:36:21.593197 INFO : End of read enable training
683 18:36:21.596072 INFO : End of fine write leveling
684 18:36:21.601585 INFO : End of Write leveling coarse delay
685 18:36:21.607192 INFO : Training has run successfully!
686 18:36:21.607669 Check phy result
687 18:36:21.608150 INFO : End of initialization
688 18:36:21.612792 INFO : End of read dq deskew training
689 18:36:21.616212 INFO : End of MPR read delay center optimization
690 18:36:21.621729 INFO : End of write delay center optimization
691 18:36:21.627317 INFO : End of read delay center optimization
692 18:36:21.627790 INFO : End of max read latency training
693 18:36:21.632996 INFO : Training has run successfully!
694 18:36:21.633475 1D training succeed
695 18:36:21.641083 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 18:36:21.688626 Check phy result
697 18:36:21.689115 INFO : End of initialization
698 18:36:21.710492 INFO : End of 2D read delay Voltage center optimization
699 18:36:21.730710 INFO : End of 2D read delay Voltage center optimization
700 18:36:21.782800 INFO : End of 2D write delay Voltage center optimization
701 18:36:21.832215 INFO : End of 2D write delay Voltage center optimization
702 18:36:21.837751 INFO : Training has run successfully!
703 18:36:21.838223
704 18:36:21.838680 channel==0
705 18:36:21.843328 RxClkDly_Margin_A0==88 ps 9
706 18:36:21.843814 TxDqDly_Margin_A0==98 ps 10
707 18:36:21.846696 RxClkDly_Margin_A1==88 ps 9
708 18:36:21.847170 TxDqDly_Margin_A1==98 ps 10
709 18:36:21.852250 TrainedVREFDQ_A0==74
710 18:36:21.852724 TrainedVREFDQ_A1==74
711 18:36:21.853173 VrefDac_Margin_A0==25
712 18:36:21.857845 DeviceVref_Margin_A0==40
713 18:36:21.858316 VrefDac_Margin_A1==25
714 18:36:21.863435 DeviceVref_Margin_A1==40
715 18:36:21.863901
716 18:36:21.864394
717 18:36:21.864840 channel==1
718 18:36:21.865278 RxClkDly_Margin_A0==98 ps 10
719 18:36:21.866961 TxDqDly_Margin_A0==88 ps 9
720 18:36:21.872472 RxClkDly_Margin_A1==88 ps 9
721 18:36:21.872948 TxDqDly_Margin_A1==88 ps 9
722 18:36:21.873402 TrainedVREFDQ_A0==77
723 18:36:21.878113 TrainedVREFDQ_A1==77
724 18:36:21.878592 VrefDac_Margin_A0==22
725 18:36:21.883681 DeviceVref_Margin_A0==37
726 18:36:21.884176 VrefDac_Margin_A1==24
727 18:36:21.884627 DeviceVref_Margin_A1==37
728 18:36:21.885069
729 18:36:21.892821 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 18:36:21.893300
731 18:36:21.918540 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
732 18:36:21.924080 2D training succeed
733 18:36:21.927607 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 18:36:21.933021 auto size-- 65535DDR cs0 size: 2048MB
735 18:36:21.933494 DDR cs1 size: 2048MB
736 18:36:21.938632 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 18:36:21.939100 cs0 DataBus test pass
738 18:36:21.944250 cs1 DataBus test pass
739 18:36:21.944723 cs0 AddrBus test pass
740 18:36:21.945173 cs1 AddrBus test pass
741 18:36:21.945615
742 18:36:21.949858 100bdlr_step_size ps== 420
743 18:36:21.950349 result report
744 18:36:21.955431 boot times 0Enable ddr reg access
745 18:36:21.960445 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 18:36:21.973917 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 18:36:22.547101 0.0;M3 CHK:0;cm4_sp_mode 0
748 18:36:22.547703 MVN_1=0x00000000
749 18:36:22.552508 MVN_2=0x00000000
750 18:36:22.558303 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 18:36:22.558854 OPS=0x10
752 18:36:22.559295 ring efuse init
753 18:36:22.559726 chipver efuse init
754 18:36:22.563825 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 18:36:22.569476 [0.018961 Inits done]
756 18:36:22.569948 secure task start!
757 18:36:22.570381 high task start!
758 18:36:22.574165 low task start!
759 18:36:22.574628 run into bl31
760 18:36:22.580621 NOTICE: BL31: v1.3(release):4fc40b1
761 18:36:22.588430 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 18:36:22.588899 NOTICE: BL31: G12A normal boot!
763 18:36:22.613827 NOTICE: BL31: BL33 decompress pass
764 18:36:22.619485 ERROR: Error initializing runtime service opteed_fast
765 18:36:23.852446
766 18:36:23.853078
767 18:36:23.860734 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 18:36:23.861222
769 18:36:23.861684 Model: Libre Computer AML-A311D-CC Alta
770 18:36:24.069173 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 18:36:24.092539 DRAM: 2 GiB (effective 3.8 GiB)
772 18:36:24.235538 Core: 408 devices, 31 uclasses, devicetree: separate
773 18:36:24.241390 WDT: Not starting watchdog@f0d0
774 18:36:24.273643 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 18:36:24.286127 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 18:36:24.291101 ** Bad device specification mmc 0 **
777 18:36:24.301501 Card did not respond to voltage select! : -110
778 18:36:24.309135 ** Bad device specification mmc 0 **
779 18:36:24.309616 Couldn't find partition mmc 0
780 18:36:24.317419 Card did not respond to voltage select! : -110
781 18:36:24.322972 ** Bad device specification mmc 0 **
782 18:36:24.323460 Couldn't find partition mmc 0
783 18:36:24.328091 Error: could not access storage.
784 18:36:24.670542 Net: eth0: ethernet@ff3f0000
785 18:36:24.671082 starting USB...
786 18:36:24.922499 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 18:36:24.923166 Starting the controller
788 18:36:24.929350 USB XHCI 1.10
789 18:36:27.092051 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 18:36:27.092678 bl2_stage_init 0x01
791 18:36:27.093145 bl2_stage_init 0x81
792 18:36:27.097418 hw id: 0x0000 - pwm id 0x01
793 18:36:27.097903 bl2_stage_init 0xc1
794 18:36:27.098355 bl2_stage_init 0x02
795 18:36:27.098797
796 18:36:27.103156 L0:00000000
797 18:36:27.103632 L1:20000703
798 18:36:27.104119 L2:00008067
799 18:36:27.104567 L3:14000000
800 18:36:27.106016 B2:00402000
801 18:36:27.106487 B1:e0f83180
802 18:36:27.106935
803 18:36:27.107383 TE: 58124
804 18:36:27.107828
805 18:36:27.117150 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 18:36:27.117632
807 18:36:27.118078 Board ID = 1
808 18:36:27.118520 Set A53 clk to 24M
809 18:36:27.118955 Set A73 clk to 24M
810 18:36:27.122730 Set clk81 to 24M
811 18:36:27.123204 A53 clk: 1200 MHz
812 18:36:27.123651 A73 clk: 1200 MHz
813 18:36:27.128356 CLK81: 166.6M
814 18:36:27.128829 smccc: 00012a92
815 18:36:27.133966 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 18:36:27.134438 board id: 1
817 18:36:27.142637 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 18:36:27.153131 fw parse done
819 18:36:27.159075 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 18:36:27.201708 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 18:36:27.212695 PIEI prepare done
822 18:36:27.213172 fastboot data load
823 18:36:27.213623 fastboot data verify
824 18:36:27.218172 verify result: 266
825 18:36:27.223776 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 18:36:27.224297 LPDDR4 probe
827 18:36:27.224742 ddr clk to 1584MHz
828 18:36:27.231872 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 18:36:27.269061
830 18:36:27.269543 dmc_version 0001
831 18:36:27.275794 Check phy result
832 18:36:27.281653 INFO : End of CA training
833 18:36:27.282122 INFO : End of initialization
834 18:36:27.287222 INFO : Training has run successfully!
835 18:36:27.287691 Check phy result
836 18:36:27.292795 INFO : End of initialization
837 18:36:27.293265 INFO : End of read enable training
838 18:36:27.296092 INFO : End of fine write leveling
839 18:36:27.301678 INFO : End of Write leveling coarse delay
840 18:36:27.307216 INFO : Training has run successfully!
841 18:36:27.307684 Check phy result
842 18:36:27.308159 INFO : End of initialization
843 18:36:27.312951 INFO : End of read dq deskew training
844 18:36:27.316424 INFO : End of MPR read delay center optimization
845 18:36:27.321805 INFO : End of write delay center optimization
846 18:36:27.327447 INFO : End of read delay center optimization
847 18:36:27.327920 INFO : End of max read latency training
848 18:36:27.333117 INFO : Training has run successfully!
849 18:36:27.333588 1D training succeed
850 18:36:27.341347 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 18:36:27.388803 Check phy result
852 18:36:27.389276 INFO : End of initialization
853 18:36:27.410260 INFO : End of 2D read delay Voltage center optimization
854 18:36:27.430396 INFO : End of 2D read delay Voltage center optimization
855 18:36:27.482309 INFO : End of 2D write delay Voltage center optimization
856 18:36:27.531572 INFO : End of 2D write delay Voltage center optimization
857 18:36:27.537068 INFO : Training has run successfully!
858 18:36:27.537538
859 18:36:27.537995 channel==0
860 18:36:27.542744 RxClkDly_Margin_A0==88 ps 9
861 18:36:27.543213 TxDqDly_Margin_A0==98 ps 10
862 18:36:27.548284 RxClkDly_Margin_A1==88 ps 9
863 18:36:27.548756 TxDqDly_Margin_A1==98 ps 10
864 18:36:27.549220 TrainedVREFDQ_A0==74
865 18:36:27.553899 TrainedVREFDQ_A1==74
866 18:36:27.554413 VrefDac_Margin_A0==25
867 18:36:27.554868 DeviceVref_Margin_A0==40
868 18:36:27.559519 VrefDac_Margin_A1==25
869 18:36:27.560052 DeviceVref_Margin_A1==40
870 18:36:27.560489
871 18:36:27.560919
872 18:36:27.565077 channel==1
873 18:36:27.565539 RxClkDly_Margin_A0==98 ps 10
874 18:36:27.565972 TxDqDly_Margin_A0==98 ps 10
875 18:36:27.570769 RxClkDly_Margin_A1==98 ps 10
876 18:36:27.571227 TxDqDly_Margin_A1==88 ps 9
877 18:36:27.576349 TrainedVREFDQ_A0==77
878 18:36:27.576824 TrainedVREFDQ_A1==77
879 18:36:27.577259 VrefDac_Margin_A0==22
880 18:36:27.581864 DeviceVref_Margin_A0==37
881 18:36:27.582320 VrefDac_Margin_A1==22
882 18:36:27.587454 DeviceVref_Margin_A1==37
883 18:36:27.587910
884 18:36:27.588376 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 18:36:27.593056
886 18:36:27.621084 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 18:36:27.621573 2D training succeed
888 18:36:27.626804 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 18:36:27.632270 auto size-- 65535DDR cs0 size: 2048MB
890 18:36:27.632726 DDR cs1 size: 2048MB
891 18:36:27.637864 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 18:36:27.638323 cs0 DataBus test pass
893 18:36:27.643465 cs1 DataBus test pass
894 18:36:27.643919 cs0 AddrBus test pass
895 18:36:27.644400 cs1 AddrBus test pass
896 18:36:27.644828
897 18:36:27.649075 100bdlr_step_size ps== 420
898 18:36:27.649542 result report
899 18:36:27.654766 boot times 0Enable ddr reg access
900 18:36:27.660109 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 18:36:27.673559 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 18:36:28.245608 0.0;M3 CHK:0;cm4_sp_mode 0
903 18:36:28.246225 MVN_1=0x00000000
904 18:36:28.251059 MVN_2=0x00000000
905 18:36:28.256815 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 18:36:28.257290 OPS=0x10
907 18:36:28.257746 ring efuse init
908 18:36:28.258191 chipver efuse init
909 18:36:28.262398 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 18:36:28.268049 [0.018961 Inits done]
911 18:36:28.268529 secure task start!
912 18:36:28.268982 high task start!
913 18:36:28.272605 low task start!
914 18:36:28.273082 run into bl31
915 18:36:28.279216 NOTICE: BL31: v1.3(release):4fc40b1
916 18:36:28.287025 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 18:36:28.287510 NOTICE: BL31: G12A normal boot!
918 18:36:28.312418 NOTICE: BL31: BL33 decompress pass
919 18:36:28.318155 ERROR: Error initializing runtime service opteed_fast
920 18:36:29.551140
921 18:36:29.551787
922 18:36:29.559403 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 18:36:29.559895
924 18:36:29.560394 Model: Libre Computer AML-A311D-CC Alta
925 18:36:29.767902 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 18:36:29.791209 DRAM: 2 GiB (effective 3.8 GiB)
927 18:36:29.934155 Core: 408 devices, 31 uclasses, devicetree: separate
928 18:36:29.940173 WDT: Not starting watchdog@f0d0
929 18:36:29.972323 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 18:36:29.984794 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 18:36:29.989747 ** Bad device specification mmc 0 **
932 18:36:30.000118 Card did not respond to voltage select! : -110
933 18:36:30.007762 ** Bad device specification mmc 0 **
934 18:36:30.008285 Couldn't find partition mmc 0
935 18:36:30.016109 Card did not respond to voltage select! : -110
936 18:36:30.021612 ** Bad device specification mmc 0 **
937 18:36:30.022110 Couldn't find partition mmc 0
938 18:36:30.026695 Error: could not access storage.
939 18:36:30.370236 Net: eth0: ethernet@ff3f0000
940 18:36:30.370757 starting USB...
941 18:36:30.622081 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 18:36:30.622587 Starting the controller
943 18:36:30.628992 USB XHCI 1.10
944 18:36:32.182995 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 18:36:32.191256 scanning usb for storage devices... 0 Storage Device(s) found
947 18:36:32.242941 Hit any key to stop autoboot: 1
948 18:36:32.244054 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 18:36:32.244740 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 18:36:32.245305 Setting prompt string to ['=>']
951 18:36:32.245892 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 18:36:32.258786 0
953 18:36:32.259853 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 18:36:32.260459 Sending with 10 millisecond of delay
956 18:36:33.395928 => setenv autoload no
957 18:36:33.406832 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 18:36:33.412311 setenv autoload no
959 18:36:33.413097 Sending with 10 millisecond of delay
961 18:36:35.211027 => setenv initrd_high 0xffffffff
962 18:36:35.221879 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 18:36:35.222767 setenv initrd_high 0xffffffff
964 18:36:35.223523 Sending with 10 millisecond of delay
966 18:36:36.839901 => setenv fdt_high 0xffffffff
967 18:36:36.850793 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 18:36:36.851704 setenv fdt_high 0xffffffff
969 18:36:36.852525 Sending with 10 millisecond of delay
971 18:36:37.144553 => dhcp
972 18:36:37.155363 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 18:36:37.156288 dhcp
974 18:36:37.156777 Speed: 1000, full duplex
975 18:36:37.157234 BOOTP broadcast 1
976 18:36:37.321175 DHCP client bound to address 192.168.6.27 (166 ms)
977 18:36:37.322078 Sending with 10 millisecond of delay
979 18:36:38.998768 => setenv serverip 192.168.6.2
980 18:36:39.009601 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 18:36:39.010560 setenv serverip 192.168.6.2
982 18:36:39.011304 Sending with 10 millisecond of delay
984 18:36:42.734664 => tftpboot 0x01080000 935872/tftp-deploy-wgnmgj6p/kernel/uImage
985 18:36:42.745505 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 18:36:42.746444 tftpboot 0x01080000 935872/tftp-deploy-wgnmgj6p/kernel/uImage
987 18:36:42.746957 Speed: 1000, full duplex
988 18:36:42.747422 Using ethernet@ff3f0000 device
989 18:36:42.748218 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 18:36:42.753589 Filename '935872/tftp-deploy-wgnmgj6p/kernel/uImage'.
991 18:36:42.757679 Load address: 0x1080000
992 18:36:45.678504 Loading: *################################################## 43.6 MiB
993 18:36:45.679282 14.9 MiB/s
994 18:36:45.679852 done
995 18:36:45.682945 Bytes transferred = 45713984 (2b98a40 hex)
996 18:36:45.683922 Sending with 10 millisecond of delay
998 18:36:50.371678 => tftpboot 0x08000000 935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
999 18:36:50.382702 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 18:36:50.383748 tftpboot 0x08000000 935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot
1001 18:36:50.384372 Speed: 1000, full duplex
1002 18:36:50.384931 Using ethernet@ff3f0000 device
1003 18:36:50.385772 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 18:36:50.397272 Filename '935872/tftp-deploy-wgnmgj6p/ramdisk/ramdisk.cpio.gz.uboot'.
1005 18:36:50.397693 Load address: 0x8000000
1006 18:36:57.103148 Loading: *#################T ################################ UDP wrong checksum 00000005 00008876
1007 18:36:58.523081 UDP wrong checksum 000000ff 000051bf
1008 18:36:58.537206 UDP wrong checksum 000000ff 0000e5b1
1009 18:37:02.104781 T UDP wrong checksum 00000005 00008876
1010 18:37:12.107013 T T UDP wrong checksum 00000005 00008876
1011 18:37:13.117016 UDP wrong checksum 000000ff 00007e8b
1012 18:37:13.160408 UDP wrong checksum 000000ff 00000a7e
1013 18:37:13.290439 UDP wrong checksum 000000ff 00001fc8
1014 18:37:13.339798 UDP wrong checksum 000000ff 0000b8ba
1015 18:37:26.499467 T T UDP wrong checksum 000000ff 0000c65d
1016 18:37:26.539415 UDP wrong checksum 000000ff 00004b50
1017 18:37:32.111173 T T UDP wrong checksum 00000005 00008876
1018 18:37:43.260303 T T UDP wrong checksum 000000ff 0000b8d9
1019 18:37:43.300820 UDP wrong checksum 000000ff 00004bcc
1020 18:37:47.115250
1021 18:37:47.115882 Retry count exceeded; starting again
1023 18:37:47.117469 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1026 18:37:47.119472 end: 2.4 uboot-commands (duration 00:01:46) [common]
1028 18:37:47.121018 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1030 18:37:47.122193 end: 2 uboot-action (duration 00:01:46) [common]
1032 18:37:47.123895 Cleaning after the job
1033 18:37:47.124546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/ramdisk
1034 18:37:47.125973 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/kernel
1035 18:37:47.174026 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/dtb
1036 18:37:47.174891 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/nfsrootfs
1037 18:37:47.327054 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935872/tftp-deploy-wgnmgj6p/modules
1038 18:37:47.348227 start: 4.1 power-off (timeout 00:00:30) [common]
1039 18:37:47.348893 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1040 18:37:47.382489 >> OK - accepted request
1041 18:37:47.384735 Returned 0 in 0 seconds
1042 18:37:47.485442 end: 4.1 power-off (duration 00:00:00) [common]
1044 18:37:47.486343 start: 4.2 read-feedback (timeout 00:10:00) [common]
1045 18:37:47.486997 Listened to connection for namespace 'common' for up to 1s
1046 18:37:48.487106 Finalising connection for namespace 'common'
1047 18:37:48.487754 Disconnecting from shell: Finalise
1048 18:37:48.488331 =>
1049 18:37:48.589288 end: 4.2 read-feedback (duration 00:00:01) [common]
1050 18:37:48.589880 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/935872
1051 18:37:50.354123 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/935872
1052 18:37:50.354733 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.