Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:18:56.628046 lava-dispatcher, installed at version: 2024.01
2 20:18:56.628846 start: 0 validate
3 20:18:56.629325 Start time: 2024-11-04 20:18:56.629295+00:00 (UTC)
4 20:18:56.629865 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:18:56.630421 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:18:56.676383 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:18:56.677001 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:18:56.709371 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:18:56.710055 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:18:56.743505 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:18:56.744098 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:18:56.780491 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:18:56.781072 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 20:18:56.823793 validate duration: 0.19
16 20:18:56.825447 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:18:56.826083 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:18:56.826706 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:18:56.827722 Not decompressing ramdisk as can be used compressed.
20 20:18:56.828622 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 20:18:56.829177 saving as /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/ramdisk/initrd.cpio.gz
22 20:18:56.829698 total size: 5628169 (5 MB)
23 20:18:56.876875 progress 0 % (0 MB)
24 20:18:56.881520 progress 5 % (0 MB)
25 20:18:56.887767 progress 10 % (0 MB)
26 20:18:56.895060 progress 15 % (0 MB)
27 20:18:56.899856 progress 20 % (1 MB)
28 20:18:56.903617 progress 25 % (1 MB)
29 20:18:56.907828 progress 30 % (1 MB)
30 20:18:56.911977 progress 35 % (1 MB)
31 20:18:56.915764 progress 40 % (2 MB)
32 20:18:56.919960 progress 45 % (2 MB)
33 20:18:56.923640 progress 50 % (2 MB)
34 20:18:56.927762 progress 55 % (2 MB)
35 20:18:56.932801 progress 60 % (3 MB)
36 20:18:56.937409 progress 65 % (3 MB)
37 20:18:56.942749 progress 70 % (3 MB)
38 20:18:56.947533 progress 75 % (4 MB)
39 20:18:56.952766 progress 80 % (4 MB)
40 20:18:56.957501 progress 85 % (4 MB)
41 20:18:56.962010 progress 90 % (4 MB)
42 20:18:56.965956 progress 95 % (5 MB)
43 20:18:56.969308 progress 100 % (5 MB)
44 20:18:56.969965 5 MB downloaded in 0.14 s (38.27 MB/s)
45 20:18:56.970492 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:18:56.971369 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:18:56.971656 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:18:56.971924 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:18:56.972440 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/kernel/Image
51 20:18:56.972712 saving as /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/kernel/Image
52 20:18:56.972923 total size: 45713920 (43 MB)
53 20:18:56.973133 No compression specified
54 20:18:57.017960 progress 0 % (0 MB)
55 20:18:57.046713 progress 5 % (2 MB)
56 20:18:57.076048 progress 10 % (4 MB)
57 20:18:57.104564 progress 15 % (6 MB)
58 20:18:57.133318 progress 20 % (8 MB)
59 20:18:57.161312 progress 25 % (10 MB)
60 20:18:57.190760 progress 30 % (13 MB)
61 20:18:57.220021 progress 35 % (15 MB)
62 20:18:57.248923 progress 40 % (17 MB)
63 20:18:57.277782 progress 45 % (19 MB)
64 20:18:57.306258 progress 50 % (21 MB)
65 20:18:57.335269 progress 55 % (24 MB)
66 20:18:57.364467 progress 60 % (26 MB)
67 20:18:57.392423 progress 65 % (28 MB)
68 20:18:57.421465 progress 70 % (30 MB)
69 20:18:57.449783 progress 75 % (32 MB)
70 20:18:57.479038 progress 80 % (34 MB)
71 20:18:57.507570 progress 85 % (37 MB)
72 20:18:57.536083 progress 90 % (39 MB)
73 20:18:57.567915 progress 95 % (41 MB)
74 20:18:57.596280 progress 100 % (43 MB)
75 20:18:57.596850 43 MB downloaded in 0.62 s (69.88 MB/s)
76 20:18:57.597357 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:18:57.598213 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:18:57.598505 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:18:57.598785 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:18:57.599280 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:18:57.599575 saving as /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:18:57.599795 total size: 54703 (0 MB)
84 20:18:57.600035 No compression specified
85 20:18:57.637722 progress 59 % (0 MB)
86 20:18:57.638605 progress 100 % (0 MB)
87 20:18:57.639204 0 MB downloaded in 0.04 s (1.32 MB/s)
88 20:18:57.639695 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:18:57.640610 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:18:57.640899 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:18:57.641178 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:18:57.641661 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 20:18:57.641926 saving as /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/nfsrootfs/full.rootfs.tar
95 20:18:57.642143 total size: 120894716 (115 MB)
96 20:18:57.642362 Using unxz to decompress xz
97 20:18:57.684364 progress 0 % (0 MB)
98 20:18:58.493084 progress 5 % (5 MB)
99 20:18:59.339214 progress 10 % (11 MB)
100 20:19:00.141645 progress 15 % (17 MB)
101 20:19:00.921613 progress 20 % (23 MB)
102 20:19:01.550758 progress 25 % (28 MB)
103 20:19:02.485697 progress 30 % (34 MB)
104 20:19:03.388427 progress 35 % (40 MB)
105 20:19:03.773411 progress 40 % (46 MB)
106 20:19:04.179055 progress 45 % (51 MB)
107 20:19:05.006328 progress 50 % (57 MB)
108 20:19:05.979142 progress 55 % (63 MB)
109 20:19:06.771548 progress 60 % (69 MB)
110 20:19:07.538883 progress 65 % (74 MB)
111 20:19:08.335539 progress 70 % (80 MB)
112 20:19:09.201312 progress 75 % (86 MB)
113 20:19:10.028592 progress 80 % (92 MB)
114 20:19:10.914994 progress 85 % (98 MB)
115 20:19:11.791223 progress 90 % (103 MB)
116 20:19:12.580844 progress 95 % (109 MB)
117 20:19:13.426427 progress 100 % (115 MB)
118 20:19:13.441338 115 MB downloaded in 15.80 s (7.30 MB/s)
119 20:19:13.442200 end: 1.4.1 http-download (duration 00:00:16) [common]
121 20:19:13.443765 end: 1.4 download-retry (duration 00:00:16) [common]
122 20:19:13.444320 start: 1.5 download-retry (timeout 00:09:43) [common]
123 20:19:13.444823 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 20:19:13.445602 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/modules.tar.xz
125 20:19:13.446049 saving as /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/modules/modules.tar
126 20:19:13.446448 total size: 11618336 (11 MB)
127 20:19:13.446859 Using unxz to decompress xz
128 20:19:13.493341 progress 0 % (0 MB)
129 20:19:13.559841 progress 5 % (0 MB)
130 20:19:13.633941 progress 10 % (1 MB)
131 20:19:13.729145 progress 15 % (1 MB)
132 20:19:13.820418 progress 20 % (2 MB)
133 20:19:13.900719 progress 25 % (2 MB)
134 20:19:13.976664 progress 30 % (3 MB)
135 20:19:14.055809 progress 35 % (3 MB)
136 20:19:14.128586 progress 40 % (4 MB)
137 20:19:14.204992 progress 45 % (5 MB)
138 20:19:14.292328 progress 50 % (5 MB)
139 20:19:14.376764 progress 55 % (6 MB)
140 20:19:14.457437 progress 60 % (6 MB)
141 20:19:14.537588 progress 65 % (7 MB)
142 20:19:14.619594 progress 70 % (7 MB)
143 20:19:14.698523 progress 75 % (8 MB)
144 20:19:14.782685 progress 80 % (8 MB)
145 20:19:14.863034 progress 85 % (9 MB)
146 20:19:14.947044 progress 90 % (10 MB)
147 20:19:15.020723 progress 95 % (10 MB)
148 20:19:15.097873 progress 100 % (11 MB)
149 20:19:15.110323 11 MB downloaded in 1.66 s (6.66 MB/s)
150 20:19:15.111251 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:19:15.113056 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:19:15.113621 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 20:19:15.114182 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 20:19:32.571807 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/935915/extract-nfsrootfs-18jb9fe1
156 20:19:32.572387 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 20:19:32.572678 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 20:19:32.573798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb
159 20:19:32.574315 makedir: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin
160 20:19:32.574679 makedir: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/tests
161 20:19:32.575057 makedir: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/results
162 20:19:32.575446 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-add-keys
163 20:19:32.576142 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-add-sources
164 20:19:32.576709 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-background-process-start
165 20:19:32.577247 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-background-process-stop
166 20:19:32.577800 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-common-functions
167 20:19:32.578381 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-echo-ipv4
168 20:19:32.578908 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-install-packages
169 20:19:32.579400 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-installed-packages
170 20:19:32.579907 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-os-build
171 20:19:32.580474 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-probe-channel
172 20:19:32.580995 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-probe-ip
173 20:19:32.581514 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-target-ip
174 20:19:32.582008 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-target-mac
175 20:19:32.582521 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-target-storage
176 20:19:32.583091 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-case
177 20:19:32.583610 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-event
178 20:19:32.584139 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-feedback
179 20:19:32.584643 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-raise
180 20:19:32.585205 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-reference
181 20:19:32.585712 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-runner
182 20:19:32.586219 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-set
183 20:19:32.586732 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-test-shell
184 20:19:32.587258 Updating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-add-keys (debian)
185 20:19:32.587831 Updating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-add-sources (debian)
186 20:19:32.588405 Updating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-install-packages (debian)
187 20:19:32.588933 Updating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-installed-packages (debian)
188 20:19:32.589467 Updating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/bin/lava-os-build (debian)
189 20:19:32.589957 Creating /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/environment
190 20:19:32.590362 LAVA metadata
191 20:19:32.590630 - LAVA_JOB_ID=935915
192 20:19:32.590845 - LAVA_DISPATCHER_IP=192.168.6.2
193 20:19:32.591225 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 20:19:32.592432 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 20:19:32.592804 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 20:19:32.593011 skipped lava-vland-overlay
197 20:19:32.593249 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 20:19:32.593500 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 20:19:32.593719 skipped lava-multinode-overlay
200 20:19:32.593960 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 20:19:32.594208 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 20:19:32.594466 Loading test definitions
203 20:19:32.594743 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 20:19:32.594960 Using /lava-935915 at stage 0
205 20:19:32.596200 uuid=935915_1.6.2.4.1 testdef=None
206 20:19:32.596536 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 20:19:32.596800 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 20:19:32.598514 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 20:19:32.599326 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 20:19:32.601514 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 20:19:32.602417 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 20:19:32.604490 runner path: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/0/tests/0_timesync-off test_uuid 935915_1.6.2.4.1
215 20:19:32.605180 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 20:19:32.606034 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 20:19:32.606264 Using /lava-935915 at stage 0
219 20:19:32.606638 Fetching tests from https://github.com/kernelci/test-definitions.git
220 20:19:32.606939 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/0/tests/1_kselftest-alsa'
221 20:19:36.026682 Running '/usr/bin/git checkout kernelci.org
222 20:19:36.074591 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 20:19:36.076127 uuid=935915_1.6.2.4.5 testdef=None
224 20:19:36.076803 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 20:19:36.078423 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 20:19:36.084433 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 20:19:36.086192 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 20:19:36.094287 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 20:19:36.096164 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 20:19:36.103865 runner path: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/0/tests/1_kselftest-alsa test_uuid 935915_1.6.2.4.5
234 20:19:36.104521 BOARD='meson-g12b-a311d-libretech-cc'
235 20:19:36.104976 BRANCH='broonie-spi'
236 20:19:36.105408 SKIPFILE='/dev/null'
237 20:19:36.105842 SKIP_INSTALL='True'
238 20:19:36.106272 TESTPROG_URL='http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 20:19:36.106749 TST_CASENAME=''
240 20:19:36.107180 TST_CMDFILES='alsa'
241 20:19:36.108364 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 20:19:36.110066 Creating lava-test-runner.conf files
244 20:19:36.110508 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/935915/lava-overlay-er3zvywb/lava-935915/0 for stage 0
245 20:19:36.111212 - 0_timesync-off
246 20:19:36.111711 - 1_kselftest-alsa
247 20:19:36.112440 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 20:19:36.113033 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 20:19:59.512644 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 20:19:59.513085 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 20:19:59.513348 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 20:19:59.513616 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 20:19:59.513876 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 20:20:00.132266 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 20:20:00.132843 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 20:20:00.133149 extracting modules file /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935915/extract-nfsrootfs-18jb9fe1
257 20:20:01.701432 extracting modules file /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk
258 20:20:03.130876 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 20:20:03.131358 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 20:20:03.131645 [common] Applying overlay to NFS
261 20:20:03.131863 [common] Applying overlay /var/lib/lava/dispatcher/tmp/935915/compress-overlay-teviilpc/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/935915/extract-nfsrootfs-18jb9fe1
262 20:20:06.000505 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 20:20:06.000958 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 20:20:06.001240 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 20:20:06.001473 Converting downloaded kernel to a uImage
266 20:20:06.001784 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/kernel/Image /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/kernel/uImage
267 20:20:06.505631 output: Image Name:
268 20:20:06.506058 output: Created: Mon Nov 4 20:20:06 2024
269 20:20:06.506268 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 20:20:06.506474 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 20:20:06.506675 output: Load Address: 01080000
272 20:20:06.506874 output: Entry Point: 01080000
273 20:20:06.507070 output:
274 20:20:06.507399 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 20:20:06.507664 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 20:20:06.507932 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 20:20:06.508239 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 20:20:06.508500 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 20:20:06.508763 Building ramdisk /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk
280 20:20:08.665734 >> 166774 blocks
281 20:20:16.398373 Adding RAMdisk u-boot header.
282 20:20:16.398800 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk.cpio.gz.uboot
283 20:20:16.637721 output: Image Name:
284 20:20:16.638135 output: Created: Mon Nov 4 20:20:16 2024
285 20:20:16.638350 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 20:20:16.638598 output: Data Size: 23428383 Bytes = 22879.28 KiB = 22.34 MiB
287 20:20:16.639061 output: Load Address: 00000000
288 20:20:16.639500 output: Entry Point: 00000000
289 20:20:16.639955 output:
290 20:20:16.641043 rename /var/lib/lava/dispatcher/tmp/935915/extract-overlay-ramdisk-s6dlccod/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
291 20:20:16.641812 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 20:20:16.642405 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 20:20:16.643024 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 20:20:16.643578 No LXC device requested
295 20:20:16.644173 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 20:20:16.644739 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 20:20:16.645280 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 20:20:16.645730 Checking files for TFTP limit of 4294967296 bytes.
299 20:20:16.648672 end: 1 tftp-deploy (duration 00:01:20) [common]
300 20:20:16.649300 start: 2 uboot-action (timeout 00:05:00) [common]
301 20:20:16.649872 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 20:20:16.650416 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 20:20:16.650962 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 20:20:16.651536 Using kernel file from prepare-kernel: 935915/tftp-deploy-rwn099a7/kernel/uImage
305 20:20:16.652252 substitutions:
306 20:20:16.652737 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 20:20:16.653186 - {DTB_ADDR}: 0x01070000
308 20:20:16.653636 - {DTB}: 935915/tftp-deploy-rwn099a7/dtb/meson-g12b-a311d-libretech-cc.dtb
309 20:20:16.654089 - {INITRD}: 935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
310 20:20:16.654532 - {KERNEL_ADDR}: 0x01080000
311 20:20:16.654965 - {KERNEL}: 935915/tftp-deploy-rwn099a7/kernel/uImage
312 20:20:16.655396 - {LAVA_MAC}: None
313 20:20:16.655870 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/935915/extract-nfsrootfs-18jb9fe1
314 20:20:16.656345 - {NFS_SERVER_IP}: 192.168.6.2
315 20:20:16.656777 - {PRESEED_CONFIG}: None
316 20:20:16.657208 - {PRESEED_LOCAL}: None
317 20:20:16.657635 - {RAMDISK_ADDR}: 0x08000000
318 20:20:16.658063 - {RAMDISK}: 935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
319 20:20:16.658491 - {ROOT_PART}: None
320 20:20:16.658918 - {ROOT}: None
321 20:20:16.659342 - {SERVER_IP}: 192.168.6.2
322 20:20:16.659767 - {TEE_ADDR}: 0x83000000
323 20:20:16.660218 - {TEE}: None
324 20:20:16.660644 Parsed boot commands:
325 20:20:16.661055 - setenv autoload no
326 20:20:16.661478 - setenv initrd_high 0xffffffff
327 20:20:16.661898 - setenv fdt_high 0xffffffff
328 20:20:16.662318 - dhcp
329 20:20:16.662736 - setenv serverip 192.168.6.2
330 20:20:16.663158 - tftpboot 0x01080000 935915/tftp-deploy-rwn099a7/kernel/uImage
331 20:20:16.663586 - tftpboot 0x08000000 935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
332 20:20:16.664035 - tftpboot 0x01070000 935915/tftp-deploy-rwn099a7/dtb/meson-g12b-a311d-libretech-cc.dtb
333 20:20:16.664467 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/935915/extract-nfsrootfs-18jb9fe1,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 20:20:16.664908 - bootm 0x01080000 0x08000000 0x01070000
335 20:20:16.665459 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 20:20:16.667083 start: 2.3 connect-device (timeout 00:05:00) [common]
338 20:20:16.667537 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 20:20:16.683046 Setting prompt string to ['lava-test: # ']
340 20:20:16.684677 end: 2.3 connect-device (duration 00:00:00) [common]
341 20:20:16.685345 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 20:20:16.686166 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 20:20:16.686842 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 20:20:16.688174 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 20:20:16.725931 >> OK - accepted request
346 20:20:16.728172 Returned 0 in 0 seconds
347 20:20:16.829402 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 20:20:16.831178 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 20:20:16.831783 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 20:20:16.832460 Setting prompt string to ['Hit any key to stop autoboot']
352 20:20:16.832964 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 20:20:16.834697 Trying 192.168.56.21...
354 20:20:16.835217 Connected to conserv1.
355 20:20:16.835672 Escape character is '^]'.
356 20:20:16.836167
357 20:20:16.836622 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 20:20:16.837081
359 20:20:27.760475 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
360 20:20:27.761273 bl2_stage_init 0x81
361 20:20:27.765916 hw id: 0x0000 - pwm id 0x01
362 20:20:27.766655 bl2_stage_init 0xc1
363 20:20:27.767171 bl2_stage_init 0x02
364 20:20:27.767639
365 20:20:27.771451 L0:00000000
366 20:20:27.772110 L1:20000703
367 20:20:27.772603 L2:00008067
368 20:20:27.773088 L3:14000000
369 20:20:27.773665 B2:00402000
370 20:20:27.774578 B1:e0f83180
371 20:20:27.775152
372 20:20:27.775718 TE: 58150
373 20:20:27.776253
374 20:20:27.785431 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
375 20:20:27.786018
376 20:20:27.786468 Board ID = 1
377 20:20:27.786931 Set A53 clk to 24M
378 20:20:27.787477 Set A73 clk to 24M
379 20:20:27.791172 Set clk81 to 24M
380 20:20:27.791739 A53 clk: 1200 MHz
381 20:20:27.792236 A73 clk: 1200 MHz
382 20:20:27.794366 CLK81: 166.6M
383 20:20:27.794921 smccc: 00012aac
384 20:20:27.800094 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
385 20:20:27.805563 board id: 1
386 20:20:27.809831 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
387 20:20:27.821469 fw parse done
388 20:20:27.826453 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
389 20:20:27.870012 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
390 20:20:27.881062 PIEI prepare done
391 20:20:27.881376 fastboot data load
392 20:20:27.881587 fastboot data verify
393 20:20:27.886549 verify result: 266
394 20:20:27.892272 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
395 20:20:27.892548 LPDDR4 probe
396 20:20:27.892761 ddr clk to 1584MHz
397 20:20:27.899254 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
398 20:20:27.937503
399 20:20:27.937890 dmc_version 0001
400 20:20:27.944107 Check phy result
401 20:20:27.950011 INFO : End of CA training
402 20:20:27.950274 INFO : End of initialization
403 20:20:27.955519 INFO : Training has run successfully!
404 20:20:27.955763 Check phy result
405 20:20:27.961138 INFO : End of initialization
406 20:20:27.961396 INFO : End of read enable training
407 20:20:27.966733 INFO : End of fine write leveling
408 20:20:27.972322 INFO : End of Write leveling coarse delay
409 20:20:27.972589 INFO : Training has run successfully!
410 20:20:27.972801 Check phy result
411 20:20:27.978009 INFO : End of initialization
412 20:20:27.978282 INFO : End of read dq deskew training
413 20:20:27.983522 INFO : End of MPR read delay center optimization
414 20:20:27.989137 INFO : End of write delay center optimization
415 20:20:27.994729 INFO : End of read delay center optimization
416 20:20:27.994991 INFO : End of max read latency training
417 20:20:28.000328 INFO : Training has run successfully!
418 20:20:28.000592 1D training succeed
419 20:20:28.008999 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
420 20:20:28.057179 Check phy result
421 20:20:28.057528 INFO : End of initialization
422 20:20:28.079605 INFO : End of 2D read delay Voltage center optimization
423 20:20:28.098716 INFO : End of 2D read delay Voltage center optimization
424 20:20:28.151614 INFO : End of 2D write delay Voltage center optimization
425 20:20:28.200852 INFO : End of 2D write delay Voltage center optimization
426 20:20:28.206392 INFO : Training has run successfully!
427 20:20:28.206668
428 20:20:28.206885 channel==0
429 20:20:28.212146 RxClkDly_Margin_A0==88 ps 9
430 20:20:28.212411 TxDqDly_Margin_A0==98 ps 10
431 20:20:28.217610 RxClkDly_Margin_A1==88 ps 9
432 20:20:28.217891 TxDqDly_Margin_A1==98 ps 10
433 20:20:28.218104 TrainedVREFDQ_A0==74
434 20:20:28.223204 TrainedVREFDQ_A1==74
435 20:20:28.223484 VrefDac_Margin_A0==24
436 20:20:28.223693 DeviceVref_Margin_A0==40
437 20:20:28.228784 VrefDac_Margin_A1==25
438 20:20:28.229043 DeviceVref_Margin_A1==40
439 20:20:28.229248
440 20:20:28.229452
441 20:20:28.234381 channel==1
442 20:20:28.234663 RxClkDly_Margin_A0==98 ps 10
443 20:20:28.234878 TxDqDly_Margin_A0==98 ps 10
444 20:20:28.240115 RxClkDly_Margin_A1==98 ps 10
445 20:20:28.240364 TxDqDly_Margin_A1==88 ps 9
446 20:20:28.245558 TrainedVREFDQ_A0==77
447 20:20:28.245805 TrainedVREFDQ_A1==77
448 20:20:28.246013 VrefDac_Margin_A0==22
449 20:20:28.251170 DeviceVref_Margin_A0==37
450 20:20:28.251424 VrefDac_Margin_A1==24
451 20:20:28.256772 DeviceVref_Margin_A1==37
452 20:20:28.257023
453 20:20:28.257228 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
454 20:20:28.262397
455 20:20:28.290398 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
456 20:20:28.290760 2D training succeed
457 20:20:28.296110 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
458 20:20:28.301583 auto size-- 65535DDR cs0 size: 2048MB
459 20:20:28.301834 DDR cs1 size: 2048MB
460 20:20:28.307194 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
461 20:20:28.307454 cs0 DataBus test pass
462 20:20:28.312764 cs1 DataBus test pass
463 20:20:28.313015 cs0 AddrBus test pass
464 20:20:28.313225 cs1 AddrBus test pass
465 20:20:28.313429
466 20:20:28.318380 100bdlr_step_size ps== 420
467 20:20:28.318627 result report
468 20:20:28.324070 boot times 0Enable ddr reg access
469 20:20:28.329407 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
470 20:20:28.342903 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
471 20:20:28.914978 0.0;M3 CHK:0;cm4_sp_mode 0
472 20:20:28.915381 MVN_1=0x00000000
473 20:20:28.920420 MVN_2=0x00000000
474 20:20:28.926213 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
475 20:20:28.926634 OPS=0x10
476 20:20:28.926885 ring efuse init
477 20:20:28.927094 chipver efuse init
478 20:20:28.931765 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
479 20:20:28.937393 [0.018960 Inits done]
480 20:20:28.937762 secure task start!
481 20:20:28.938084 high task start!
482 20:20:28.941981 low task start!
483 20:20:28.942249 run into bl31
484 20:20:28.948642 NOTICE: BL31: v1.3(release):4fc40b1
485 20:20:28.955543 NOTICE: BL31: Built : 15:58:17, May 22 2019
486 20:20:28.955811 NOTICE: BL31: G12A normal boot!
487 20:20:28.981886 NOTICE: BL31: BL33 decompress pass
488 20:20:28.987524 ERROR: Error initializing runtime service opteed_fast
489 20:20:30.220559
490 20:20:30.220975
491 20:20:30.228763 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
492 20:20:30.229160
493 20:20:30.229492 Model: Libre Computer AML-A311D-CC Alta
494 20:20:30.437461 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
495 20:20:30.460810 DRAM: 2 GiB (effective 3.8 GiB)
496 20:20:30.603770 Core: 408 devices, 31 uclasses, devicetree: separate
497 20:20:30.609699 WDT: Not starting watchdog@f0d0
498 20:20:30.641865 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
499 20:20:30.654326 Loading Environment from FAT... Card did not respond to voltage select! : -110
500 20:20:30.659303 ** Bad device specification mmc 0 **
501 20:20:30.669638 Card did not respond to voltage select! : -110
502 20:20:30.677252 ** Bad device specification mmc 0 **
503 20:20:30.677515 Couldn't find partition mmc 0
504 20:20:30.685545 Card did not respond to voltage select! : -110
505 20:20:30.691142 ** Bad device specification mmc 0 **
506 20:20:30.691407 Couldn't find partition mmc 0
507 20:20:30.696218 Error: could not access storage.
508 20:20:31.961010 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
509 20:20:31.961429 bl2_stage_init 0x01
510 20:20:31.961652 bl2_stage_init 0x81
511 20:20:31.966527 hw id: 0x0000 - pwm id 0x01
512 20:20:31.966809 bl2_stage_init 0xc1
513 20:20:31.967018 bl2_stage_init 0x02
514 20:20:31.967217
515 20:20:31.972131 L0:00000000
516 20:20:31.972523 L1:20000703
517 20:20:31.972841 L2:00008067
518 20:20:31.973154 L3:14000000
519 20:20:31.977724 B2:00402000
520 20:20:31.978149 B1:e0f83180
521 20:20:31.978478
522 20:20:31.978707 TE: 58159
523 20:20:31.978913
524 20:20:31.983286 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 20:20:31.983671
526 20:20:31.984025 Board ID = 1
527 20:20:31.988834 Set A53 clk to 24M
528 20:20:31.989225 Set A73 clk to 24M
529 20:20:31.989464 Set clk81 to 24M
530 20:20:31.994428 A53 clk: 1200 MHz
531 20:20:31.994700 A73 clk: 1200 MHz
532 20:20:31.994907 CLK81: 166.6M
533 20:20:31.995109 smccc: 00012ab5
534 20:20:32.000040 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 20:20:32.005596 board id: 1
536 20:20:32.011648 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 20:20:32.022093 fw parse done
538 20:20:32.028039 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 20:20:32.070686 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 20:20:32.081584 PIEI prepare done
541 20:20:32.081889 fastboot data load
542 20:20:32.082105 fastboot data verify
543 20:20:32.087173 verify result: 266
544 20:20:32.092776 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 20:20:32.093181 LPDDR4 probe
546 20:20:32.093522 ddr clk to 1584MHz
547 20:20:32.100759 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 20:20:32.138040
549 20:20:32.138387 dmc_version 0001
550 20:20:32.144695 Check phy result
551 20:20:32.150561 INFO : End of CA training
552 20:20:32.150971 INFO : End of initialization
553 20:20:32.156179 INFO : Training has run successfully!
554 20:20:32.156450 Check phy result
555 20:20:32.161757 INFO : End of initialization
556 20:20:32.162167 INFO : End of read enable training
557 20:20:32.167362 INFO : End of fine write leveling
558 20:20:32.172965 INFO : End of Write leveling coarse delay
559 20:20:32.173239 INFO : Training has run successfully!
560 20:20:32.173451 Check phy result
561 20:20:32.178558 INFO : End of initialization
562 20:20:32.178823 INFO : End of read dq deskew training
563 20:20:32.184174 INFO : End of MPR read delay center optimization
564 20:20:32.189756 INFO : End of write delay center optimization
565 20:20:32.195358 INFO : End of read delay center optimization
566 20:20:32.195628 INFO : End of max read latency training
567 20:20:32.200969 INFO : Training has run successfully!
568 20:20:32.201358 1D training succeed
569 20:20:32.210162 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 20:20:32.257768 Check phy result
571 20:20:32.258139 INFO : End of initialization
572 20:20:32.280200 INFO : End of 2D read delay Voltage center optimization
573 20:20:32.300276 INFO : End of 2D read delay Voltage center optimization
574 20:20:32.352225 INFO : End of 2D write delay Voltage center optimization
575 20:20:32.401973 INFO : End of 2D write delay Voltage center optimization
576 20:20:32.406964 INFO : Training has run successfully!
577 20:20:32.407245
578 20:20:32.407460 channel==0
579 20:20:32.412599 RxClkDly_Margin_A0==88 ps 9
580 20:20:32.412996 TxDqDly_Margin_A0==98 ps 10
581 20:20:32.418337 RxClkDly_Margin_A1==88 ps 9
582 20:20:32.418728 TxDqDly_Margin_A1==98 ps 10
583 20:20:32.419053 TrainedVREFDQ_A0==74
584 20:20:32.423797 TrainedVREFDQ_A1==74
585 20:20:32.424142 VrefDac_Margin_A0==25
586 20:20:32.424621 DeviceVref_Margin_A0==40
587 20:20:32.429415 VrefDac_Margin_A1==25
588 20:20:32.429888 DeviceVref_Margin_A1==40
589 20:20:32.430335
590 20:20:32.430779
591 20:20:32.434995 channel==1
592 20:20:32.435466 RxClkDly_Margin_A0==88 ps 9
593 20:20:32.435914 TxDqDly_Margin_A0==98 ps 10
594 20:20:32.440574 RxClkDly_Margin_A1==88 ps 9
595 20:20:32.441046 TxDqDly_Margin_A1==98 ps 10
596 20:20:32.446207 TrainedVREFDQ_A0==77
597 20:20:32.446693 TrainedVREFDQ_A1==77
598 20:20:32.447140 VrefDac_Margin_A0==22
599 20:20:32.451810 DeviceVref_Margin_A0==37
600 20:20:32.452312 VrefDac_Margin_A1==24
601 20:20:32.457399 DeviceVref_Margin_A1==37
602 20:20:32.457869
603 20:20:32.458315 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 20:20:32.458756
605 20:20:32.490995 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
606 20:20:32.491546 2D training succeed
607 20:20:32.496630 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 20:20:32.502204 auto size-- 65535DDR cs0 size: 2048MB
609 20:20:32.502681 DDR cs1 size: 2048MB
610 20:20:32.507806 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 20:20:32.508312 cs0 DataBus test pass
612 20:20:32.513404 cs1 DataBus test pass
613 20:20:32.513888 cs0 AddrBus test pass
614 20:20:32.514338 cs1 AddrBus test pass
615 20:20:32.514775
616 20:20:32.519022 100bdlr_step_size ps== 420
617 20:20:32.519507 result report
618 20:20:32.524636 boot times 0Enable ddr reg access
619 20:20:32.530143 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 20:20:32.543419 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 20:20:33.115592 0.0;M3 CHK:0;cm4_sp_mode 0
622 20:20:33.116327 MVN_1=0x00000000
623 20:20:33.120966 MVN_2=0x00000000
624 20:20:33.126733 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 20:20:33.127265 OPS=0x10
626 20:20:33.127725 ring efuse init
627 20:20:33.128260 chipver efuse init
628 20:20:33.132325 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 20:20:33.137909 [0.018961 Inits done]
630 20:20:33.138400 secure task start!
631 20:20:33.138840 high task start!
632 20:20:33.142489 low task start!
633 20:20:33.142970 run into bl31
634 20:20:33.149091 NOTICE: BL31: v1.3(release):4fc40b1
635 20:20:33.156899 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 20:20:33.157386 NOTICE: BL31: G12A normal boot!
637 20:20:33.182307 NOTICE: BL31: BL33 decompress pass
638 20:20:33.188012 ERROR: Error initializing runtime service opteed_fast
639 20:20:34.420990
640 20:20:34.421634
641 20:20:34.429250 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 20:20:34.429757
643 20:20:34.430218 Model: Libre Computer AML-A311D-CC Alta
644 20:20:34.637664 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 20:20:34.661064 DRAM: 2 GiB (effective 3.8 GiB)
646 20:20:34.804105 Core: 408 devices, 31 uclasses, devicetree: separate
647 20:20:34.809964 WDT: Not starting watchdog@f0d0
648 20:20:34.842172 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 20:20:34.854629 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 20:20:34.859597 ** Bad device specification mmc 0 **
651 20:20:34.869939 Card did not respond to voltage select! : -110
652 20:20:34.877597 ** Bad device specification mmc 0 **
653 20:20:34.878082 Couldn't find partition mmc 0
654 20:20:34.885931 Card did not respond to voltage select! : -110
655 20:20:34.891455 ** Bad device specification mmc 0 **
656 20:20:34.891960 Couldn't find partition mmc 0
657 20:20:34.896514 Error: could not access storage.
658 20:20:35.238972 Net: eth0: ethernet@ff3f0000
659 20:20:35.239592 starting USB...
660 20:20:35.490838 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 20:20:35.491416 Starting the controller
662 20:20:35.497748 USB XHCI 1.10
663 20:20:37.209626 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 20:20:37.210271 bl2_stage_init 0x01
665 20:20:37.210746 bl2_stage_init 0x81
666 20:20:37.215179 hw id: 0x0000 - pwm id 0x01
667 20:20:37.215675 bl2_stage_init 0xc1
668 20:20:37.216192 bl2_stage_init 0x02
669 20:20:37.216647
670 20:20:37.220752 L0:00000000
671 20:20:37.221231 L1:20000703
672 20:20:37.221677 L2:00008067
673 20:20:37.222120 L3:14000000
674 20:20:37.226445 B2:00402000
675 20:20:37.226927 B1:e0f83180
676 20:20:37.227373
677 20:20:37.227818 TE: 58124
678 20:20:37.228311
679 20:20:37.231957 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 20:20:37.232482
681 20:20:37.232935 Board ID = 1
682 20:20:37.237534 Set A53 clk to 24M
683 20:20:37.238013 Set A73 clk to 24M
684 20:20:37.238461 Set clk81 to 24M
685 20:20:37.243177 A53 clk: 1200 MHz
686 20:20:37.243643 A73 clk: 1200 MHz
687 20:20:37.244125 CLK81: 166.6M
688 20:20:37.244573 smccc: 00012a92
689 20:20:37.248738 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 20:20:37.254257 board id: 1
691 20:20:37.260153 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 20:20:37.270790 fw parse done
693 20:20:37.276758 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 20:20:37.319409 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 20:20:37.330317 PIEI prepare done
696 20:20:37.330800 fastboot data load
697 20:20:37.331258 fastboot data verify
698 20:20:37.335859 verify result: 266
699 20:20:37.341531 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 20:20:37.342013 LPDDR4 probe
701 20:20:37.342459 ddr clk to 1584MHz
702 20:20:37.349537 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 20:20:37.386719
704 20:20:37.387224 dmc_version 0001
705 20:20:37.393503 Check phy result
706 20:20:37.399297 INFO : End of CA training
707 20:20:37.399773 INFO : End of initialization
708 20:20:37.404923 INFO : Training has run successfully!
709 20:20:37.405396 Check phy result
710 20:20:37.410498 INFO : End of initialization
711 20:20:37.410976 INFO : End of read enable training
712 20:20:37.416132 INFO : End of fine write leveling
713 20:20:37.421668 INFO : End of Write leveling coarse delay
714 20:20:37.422145 INFO : Training has run successfully!
715 20:20:37.422594 Check phy result
716 20:20:37.428102 INFO : End of initialization
717 20:20:37.428587 INFO : End of read dq deskew training
718 20:20:37.432942 INFO : End of MPR read delay center optimization
719 20:20:37.438508 INFO : End of write delay center optimization
720 20:20:37.444193 INFO : End of read delay center optimization
721 20:20:37.444664 INFO : End of max read latency training
722 20:20:37.449768 INFO : Training has run successfully!
723 20:20:37.450276 1D training succeed
724 20:20:37.459557 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 20:20:37.506484 Check phy result
726 20:20:37.506963 INFO : End of initialization
727 20:20:37.528194 INFO : End of 2D read delay Voltage center optimization
728 20:20:37.548222 INFO : End of 2D read delay Voltage center optimization
729 20:20:37.600199 INFO : End of 2D write delay Voltage center optimization
730 20:20:37.649362 INFO : End of 2D write delay Voltage center optimization
731 20:20:37.654900 INFO : Training has run successfully!
732 20:20:37.655378
733 20:20:37.655828 channel==0
734 20:20:37.660514 RxClkDly_Margin_A0==88 ps 9
735 20:20:37.660992 TxDqDly_Margin_A0==98 ps 10
736 20:20:37.663881 RxClkDly_Margin_A1==88 ps 9
737 20:20:37.664389 TxDqDly_Margin_A1==98 ps 10
738 20:20:37.669414 TrainedVREFDQ_A0==74
739 20:20:37.669906 TrainedVREFDQ_A1==74
740 20:20:37.670356 VrefDac_Margin_A0==25
741 20:20:37.674926 DeviceVref_Margin_A0==40
742 20:20:37.675396 VrefDac_Margin_A1==25
743 20:20:37.680635 DeviceVref_Margin_A1==40
744 20:20:37.681112
745 20:20:37.681560
746 20:20:37.682002 channel==1
747 20:20:37.682439 RxClkDly_Margin_A0==98 ps 10
748 20:20:37.684204 TxDqDly_Margin_A0==98 ps 10
749 20:20:37.689729 RxClkDly_Margin_A1==98 ps 10
750 20:20:37.690202 TxDqDly_Margin_A1==88 ps 9
751 20:20:37.690650 TrainedVREFDQ_A0==77
752 20:20:37.695419 TrainedVREFDQ_A1==77
753 20:20:37.695895 VrefDac_Margin_A0==22
754 20:20:37.700943 DeviceVref_Margin_A0==37
755 20:20:37.701411 VrefDac_Margin_A1==24
756 20:20:37.701851 DeviceVref_Margin_A1==37
757 20:20:37.702290
758 20:20:37.709976 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 20:20:37.710451
760 20:20:37.735861 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000018 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
761 20:20:37.741515 2D training succeed
762 20:20:37.744961 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 20:20:37.750523 auto size-- 65535DDR cs0 size: 2048MB
764 20:20:37.751032 DDR cs1 size: 2048MB
765 20:20:37.756151 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 20:20:37.756644 cs0 DataBus test pass
767 20:20:37.761654 cs1 DataBus test pass
768 20:20:37.762128 cs0 AddrBus test pass
769 20:20:37.762570 cs1 AddrBus test pass
770 20:20:37.763005
771 20:20:37.765143 100bdlr_step_size ps== 420
772 20:20:37.765636 result report
773 20:20:37.770740 boot times 0Enable ddr reg access
774 20:20:37.777814 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 20:20:37.791368 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 20:20:38.363421 0.0;M3 CHK:0;cm4_sp_mode 0
777 20:20:38.364095 MVN_1=0x00000000
778 20:20:38.368807 MVN_2=0x00000000
779 20:20:38.374618 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 20:20:38.375160 OPS=0x10
781 20:20:38.375599 ring efuse init
782 20:20:38.376077 chipver efuse init
783 20:20:38.382847 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 20:20:38.383335 [0.018961 Inits done]
785 20:20:38.383767 secure task start!
786 20:20:38.390330 high task start!
787 20:20:38.390802 low task start!
788 20:20:38.391234 run into bl31
789 20:20:38.396981 NOTICE: BL31: v1.3(release):4fc40b1
790 20:20:38.404799 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 20:20:38.405266 NOTICE: BL31: G12A normal boot!
792 20:20:38.430287 NOTICE: BL31: BL33 decompress pass
793 20:20:38.435853 ERROR: Error initializing runtime service opteed_fast
794 20:20:39.668792
795 20:20:39.669432
796 20:20:39.677095 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 20:20:39.677588
798 20:20:39.678048 Model: Libre Computer AML-A311D-CC Alta
799 20:20:39.885524 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 20:20:39.908865 DRAM: 2 GiB (effective 3.8 GiB)
801 20:20:40.051879 Core: 408 devices, 31 uclasses, devicetree: separate
802 20:20:40.057764 WDT: Not starting watchdog@f0d0
803 20:20:40.090056 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 20:20:40.102472 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 20:20:40.107402 ** Bad device specification mmc 0 **
806 20:20:40.117764 Card did not respond to voltage select! : -110
807 20:20:40.125391 ** Bad device specification mmc 0 **
808 20:20:40.125890 Couldn't find partition mmc 0
809 20:20:40.133734 Card did not respond to voltage select! : -110
810 20:20:40.139238 ** Bad device specification mmc 0 **
811 20:20:40.139718 Couldn't find partition mmc 0
812 20:20:40.144296 Error: could not access storage.
813 20:20:40.487901 Net: eth0: ethernet@ff3f0000
814 20:20:40.488547 starting USB...
815 20:20:40.739691 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 20:20:40.740310 Starting the controller
817 20:20:40.746613 USB XHCI 1.10
818 20:20:42.939835 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 20:20:42.940547 bl2_stage_init 0x01
820 20:20:42.941016 bl2_stage_init 0x81
821 20:20:42.945263 hw id: 0x0000 - pwm id 0x01
822 20:20:42.945751 bl2_stage_init 0xc1
823 20:20:42.946204 bl2_stage_init 0x02
824 20:20:42.946651
825 20:20:42.950964 L0:00000000
826 20:20:42.951439 L1:20000703
827 20:20:42.951885 L2:00008067
828 20:20:42.952374 L3:14000000
829 20:20:42.956505 B2:00402000
830 20:20:42.956980 B1:e0f83180
831 20:20:42.957423
832 20:20:42.957866 TE: 58159
833 20:20:42.958304
834 20:20:42.962122 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 20:20:42.962598
836 20:20:42.963047 Board ID = 1
837 20:20:42.967758 Set A53 clk to 24M
838 20:20:42.968257 Set A73 clk to 24M
839 20:20:42.968699 Set clk81 to 24M
840 20:20:42.973343 A53 clk: 1200 MHz
841 20:20:42.973861 A73 clk: 1200 MHz
842 20:20:42.974310 CLK81: 166.6M
843 20:20:42.974751 smccc: 00012ab5
844 20:20:42.978824 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 20:20:42.984496 board id: 1
846 20:20:42.990419 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 20:20:43.000867 fw parse done
848 20:20:43.006898 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 20:20:43.049476 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 20:20:43.060361 PIEI prepare done
851 20:20:43.060843 fastboot data load
852 20:20:43.061299 fastboot data verify
853 20:20:43.066038 verify result: 266
854 20:20:43.071656 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 20:20:43.072256 LPDDR4 probe
856 20:20:43.072730 ddr clk to 1584MHz
857 20:20:43.079605 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 20:20:43.116845
859 20:20:43.117373 dmc_version 0001
860 20:20:43.123544 Check phy result
861 20:20:43.129407 INFO : End of CA training
862 20:20:43.129894 INFO : End of initialization
863 20:20:43.135032 INFO : Training has run successfully!
864 20:20:43.135509 Check phy result
865 20:20:43.140588 INFO : End of initialization
866 20:20:43.141071 INFO : End of read enable training
867 20:20:43.146175 INFO : End of fine write leveling
868 20:20:43.151796 INFO : End of Write leveling coarse delay
869 20:20:43.152325 INFO : Training has run successfully!
870 20:20:43.152780 Check phy result
871 20:20:43.157395 INFO : End of initialization
872 20:20:43.157878 INFO : End of read dq deskew training
873 20:20:43.163037 INFO : End of MPR read delay center optimization
874 20:20:43.168612 INFO : End of write delay center optimization
875 20:20:43.174232 INFO : End of read delay center optimization
876 20:20:43.174807 INFO : End of max read latency training
877 20:20:43.179796 INFO : Training has run successfully!
878 20:20:43.180342 1D training succeed
879 20:20:43.188997 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 20:20:43.236540 Check phy result
881 20:20:43.237031 INFO : End of initialization
882 20:20:43.258952 INFO : End of 2D read delay Voltage center optimization
883 20:20:43.279158 INFO : End of 2D read delay Voltage center optimization
884 20:20:43.330969 INFO : End of 2D write delay Voltage center optimization
885 20:20:43.380251 INFO : End of 2D write delay Voltage center optimization
886 20:20:43.385823 INFO : Training has run successfully!
887 20:20:43.386349
888 20:20:43.386804 channel==0
889 20:20:43.391397 RxClkDly_Margin_A0==88 ps 9
890 20:20:43.391902 TxDqDly_Margin_A0==98 ps 10
891 20:20:43.397086 RxClkDly_Margin_A1==88 ps 9
892 20:20:43.397548 TxDqDly_Margin_A1==98 ps 10
893 20:20:43.397981 TrainedVREFDQ_A0==74
894 20:20:43.402604 TrainedVREFDQ_A1==74
895 20:20:43.403066 VrefDac_Margin_A0==24
896 20:20:43.403493 DeviceVref_Margin_A0==40
897 20:20:43.408207 VrefDac_Margin_A1==24
898 20:20:43.408660 DeviceVref_Margin_A1==40
899 20:20:43.409089
900 20:20:43.409514
901 20:20:43.413794 channel==1
902 20:20:43.414243 RxClkDly_Margin_A0==98 ps 10
903 20:20:43.414672 TxDqDly_Margin_A0==88 ps 9
904 20:20:43.419396 RxClkDly_Margin_A1==88 ps 9
905 20:20:43.419904 TxDqDly_Margin_A1==88 ps 9
906 20:20:43.425041 TrainedVREFDQ_A0==77
907 20:20:43.425503 TrainedVREFDQ_A1==77
908 20:20:43.425937 VrefDac_Margin_A0==22
909 20:20:43.430741 DeviceVref_Margin_A0==37
910 20:20:43.431205 VrefDac_Margin_A1==24
911 20:20:43.436270 DeviceVref_Margin_A1==37
912 20:20:43.436791
913 20:20:43.437224 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 20:20:43.437653
915 20:20:43.469790 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 20:20:43.470287 2D training succeed
917 20:20:43.475403 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 20:20:43.480964 auto size-- 65535DDR cs0 size: 2048MB
919 20:20:43.481434 DDR cs1 size: 2048MB
920 20:20:43.486601 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 20:20:43.487066 cs0 DataBus test pass
922 20:20:43.492233 cs1 DataBus test pass
923 20:20:43.492687 cs0 AddrBus test pass
924 20:20:43.493111 cs1 AddrBus test pass
925 20:20:43.493533
926 20:20:43.497791 100bdlr_step_size ps== 420
927 20:20:43.498259 result report
928 20:20:43.503430 boot times 0Enable ddr reg access
929 20:20:43.508649 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 20:20:43.522201 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 20:20:44.094158 0.0;M3 CHK:0;cm4_sp_mode 0
932 20:20:44.094803 MVN_1=0x00000000
933 20:20:44.099574 MVN_2=0x00000000
934 20:20:44.105352 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 20:20:44.105866 OPS=0x10
936 20:20:44.106328 ring efuse init
937 20:20:44.106766 chipver efuse init
938 20:20:44.110926 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 20:20:44.116520 [0.018961 Inits done]
940 20:20:44.116988 secure task start!
941 20:20:44.117427 high task start!
942 20:20:44.121203 low task start!
943 20:20:44.121678 run into bl31
944 20:20:44.127835 NOTICE: BL31: v1.3(release):4fc40b1
945 20:20:44.134693 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 20:20:44.135202 NOTICE: BL31: G12A normal boot!
947 20:20:44.161012 NOTICE: BL31: BL33 decompress pass
948 20:20:44.166698 ERROR: Error initializing runtime service opteed_fast
949 20:20:45.399710
950 20:20:45.400439
951 20:20:45.408075 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 20:20:45.408579
953 20:20:45.409040 Model: Libre Computer AML-A311D-CC Alta
954 20:20:45.616522 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 20:20:45.639957 DRAM: 2 GiB (effective 3.8 GiB)
956 20:20:45.782946 Core: 408 devices, 31 uclasses, devicetree: separate
957 20:20:45.788809 WDT: Not starting watchdog@f0d0
958 20:20:45.821011 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 20:20:45.833474 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 20:20:45.838466 ** Bad device specification mmc 0 **
961 20:20:45.848747 Card did not respond to voltage select! : -110
962 20:20:45.856435 ** Bad device specification mmc 0 **
963 20:20:45.856935 Couldn't find partition mmc 0
964 20:20:45.864778 Card did not respond to voltage select! : -110
965 20:20:45.870281 ** Bad device specification mmc 0 **
966 20:20:45.870766 Couldn't find partition mmc 0
967 20:20:45.875337 Error: could not access storage.
968 20:20:46.218930 Net: eth0: ethernet@ff3f0000
969 20:20:46.219527 starting USB...
970 20:20:46.470710 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 20:20:46.471277 Starting the controller
972 20:20:46.477643 USB XHCI 1.10
973 20:20:48.339618 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
974 20:20:48.340310 bl2_stage_init 0x81
975 20:20:48.345216 hw id: 0x0000 - pwm id 0x01
976 20:20:48.345921 bl2_stage_init 0xc1
977 20:20:48.346587 bl2_stage_init 0x02
978 20:20:48.347246
979 20:20:48.350783 L0:00000000
980 20:20:48.351276 L1:20000703
981 20:20:48.351739 L2:00008067
982 20:20:48.352228 L3:14000000
983 20:20:48.352674 B2:00402000
984 20:20:48.356437 B1:e0f83180
985 20:20:48.356927
986 20:20:48.357401 TE: 58150
987 20:20:48.357858
988 20:20:48.362050 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
989 20:20:48.362549
990 20:20:48.363027 Board ID = 1
991 20:20:48.367562 Set A53 clk to 24M
992 20:20:48.368110 Set A73 clk to 24M
993 20:20:48.368572 Set clk81 to 24M
994 20:20:48.373132 A53 clk: 1200 MHz
995 20:20:48.373607 A73 clk: 1200 MHz
996 20:20:48.374049 CLK81: 166.6M
997 20:20:48.374485 smccc: 00012aac
998 20:20:48.378717 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
999 20:20:48.384360 board id: 1
1000 20:20:48.390165 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1001 20:20:48.400907 fw parse done
1002 20:20:48.406798 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1003 20:20:48.449341 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1004 20:20:48.460240 PIEI prepare done
1005 20:20:48.460700 fastboot data load
1006 20:20:48.461134 fastboot data verify
1007 20:20:48.465906 verify result: 266
1008 20:20:48.471438 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1009 20:20:48.471894 LPDDR4 probe
1010 20:20:48.472390 ddr clk to 1584MHz
1011 20:20:48.479413 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1012 20:20:48.515752
1013 20:20:48.516303 dmc_version 0001
1014 20:20:48.523417 Check phy result
1015 20:20:48.529267 INFO : End of CA training
1016 20:20:48.529749 INFO : End of initialization
1017 20:20:48.534839 INFO : Training has run successfully!
1018 20:20:48.535313 Check phy result
1019 20:20:48.540436 INFO : End of initialization
1020 20:20:48.540912 INFO : End of read enable training
1021 20:20:48.546048 INFO : End of fine write leveling
1022 20:20:48.551619 INFO : End of Write leveling coarse delay
1023 20:20:48.552131 INFO : Training has run successfully!
1024 20:20:48.552580 Check phy result
1025 20:20:48.557303 INFO : End of initialization
1026 20:20:48.557780 INFO : End of read dq deskew training
1027 20:20:48.562802 INFO : End of MPR read delay center optimization
1028 20:20:48.568459 INFO : End of write delay center optimization
1029 20:20:48.574041 INFO : End of read delay center optimization
1030 20:20:48.574510 INFO : End of max read latency training
1031 20:20:48.579657 INFO : Training has run successfully!
1032 20:20:48.580170 1D training succeed
1033 20:20:48.588903 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1034 20:20:48.636493 Check phy result
1035 20:20:48.637017 INFO : End of initialization
1036 20:20:48.658056 INFO : End of 2D read delay Voltage center optimization
1037 20:20:48.677280 INFO : End of 2D read delay Voltage center optimization
1038 20:20:48.730061 INFO : End of 2D write delay Voltage center optimization
1039 20:20:48.779416 INFO : End of 2D write delay Voltage center optimization
1040 20:20:48.784934 INFO : Training has run successfully!
1041 20:20:48.785414
1042 20:20:48.785863 channel==0
1043 20:20:48.790636 RxClkDly_Margin_A0==88 ps 9
1044 20:20:48.791149 TxDqDly_Margin_A0==98 ps 10
1045 20:20:48.793834 RxClkDly_Margin_A1==88 ps 9
1046 20:20:48.794309 TxDqDly_Margin_A1==98 ps 10
1047 20:20:48.799440 TrainedVREFDQ_A0==74
1048 20:20:48.799949 TrainedVREFDQ_A1==75
1049 20:20:48.800449 VrefDac_Margin_A0==25
1050 20:20:48.805086 DeviceVref_Margin_A0==40
1051 20:20:48.805605 VrefDac_Margin_A1==25
1052 20:20:48.810636 DeviceVref_Margin_A1==39
1053 20:20:48.811107
1054 20:20:48.811553
1055 20:20:48.812016 channel==1
1056 20:20:48.812455 RxClkDly_Margin_A0==98 ps 10
1057 20:20:48.816232 TxDqDly_Margin_A0==98 ps 10
1058 20:20:48.816702 RxClkDly_Margin_A1==88 ps 9
1059 20:20:48.821820 TxDqDly_Margin_A1==88 ps 9
1060 20:20:48.822290 TrainedVREFDQ_A0==77
1061 20:20:48.822733 TrainedVREFDQ_A1==77
1062 20:20:48.827405 VrefDac_Margin_A0==22
1063 20:20:48.827862 DeviceVref_Margin_A0==37
1064 20:20:48.833057 VrefDac_Margin_A1==24
1065 20:20:48.833538 DeviceVref_Margin_A1==37
1066 20:20:48.833981
1067 20:20:48.838646 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1068 20:20:48.839123
1069 20:20:48.866714 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
1070 20:20:48.872217 2D training succeed
1071 20:20:48.877750 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1072 20:20:48.878228 auto size-- 65535DDR cs0 size: 2048MB
1073 20:20:48.883327 DDR cs1 size: 2048MB
1074 20:20:48.883804 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1075 20:20:48.888904 cs0 DataBus test pass
1076 20:20:48.889376 cs1 DataBus test pass
1077 20:20:48.889816 cs0 AddrBus test pass
1078 20:20:48.894506 cs1 AddrBus test pass
1079 20:20:48.894976
1080 20:20:48.895412 100bdlr_step_size ps== 420
1081 20:20:48.895859 result report
1082 20:20:48.900157 boot times 0Enable ddr reg access
1083 20:20:48.907747 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1084 20:20:48.921197 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1085 20:20:49.493381 0.0;M3 CHK:0;cm4_sp_mode 0
1086 20:20:49.494003 MVN_1=0x00000000
1087 20:20:49.498733 MVN_2=0x00000000
1088 20:20:49.504526 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1089 20:20:49.505041 OPS=0x10
1090 20:20:49.505501 ring efuse init
1091 20:20:49.505945 chipver efuse init
1092 20:20:49.510097 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1093 20:20:49.515704 [0.018960 Inits done]
1094 20:20:49.516221 secure task start!
1095 20:20:49.516674 high task start!
1096 20:20:49.520324 low task start!
1097 20:20:49.520822 run into bl31
1098 20:20:49.526970 NOTICE: BL31: v1.3(release):4fc40b1
1099 20:20:49.534759 NOTICE: BL31: Built : 15:58:17, May 22 2019
1100 20:20:49.535241 NOTICE: BL31: G12A normal boot!
1101 20:20:49.560167 NOTICE: BL31: BL33 decompress pass
1102 20:20:49.565856 ERROR: Error initializing runtime service opteed_fast
1103 20:20:50.798821
1104 20:20:50.799435
1105 20:20:50.807180 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1106 20:20:50.807696
1107 20:20:50.808254 Model: Libre Computer AML-A311D-CC Alta
1108 20:20:51.014784 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1109 20:20:51.039032 DRAM: 2 GiB (effective 3.8 GiB)
1110 20:20:51.181954 Core: 408 devices, 31 uclasses, devicetree: separate
1111 20:20:51.187780 WDT: Not starting watchdog@f0d0
1112 20:20:51.220175 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1113 20:20:51.232471 Loading Environment from FAT... Card did not respond to voltage select! : -110
1114 20:20:51.237441 ** Bad device specification mmc 0 **
1115 20:20:51.247782 Card did not respond to voltage select! : -110
1116 20:20:51.255449 ** Bad device specification mmc 0 **
1117 20:20:51.255945 Couldn't find partition mmc 0
1118 20:20:51.263816 Card did not respond to voltage select! : -110
1119 20:20:51.269300 ** Bad device specification mmc 0 **
1120 20:20:51.269798 Couldn't find partition mmc 0
1121 20:20:51.274333 Error: could not access storage.
1122 20:20:51.617081 Net: eth0: ethernet@ff3f0000
1123 20:20:51.617762 starting USB...
1124 20:20:51.868750 Bus usb@ff500000: Register 3000140 NbrPorts 3
1125 20:20:51.869190 Starting the controller
1126 20:20:51.875718 USB XHCI 1.10
1127 20:20:53.429771 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1128 20:20:53.438156 scanning usb for storage devices... 0 Storage Device(s) found
1130 20:20:53.489830 Hit any key to stop autoboot: 1
1131 20:20:53.490734 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1132 20:20:53.491402 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1133 20:20:53.491961 Setting prompt string to ['=>']
1134 20:20:53.492518 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1135 20:20:53.505545 0
1136 20:20:53.506439 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1137 20:20:53.506958 Sending with 10 millisecond of delay
1139 20:20:54.642020 => setenv autoload no
1140 20:20:54.652787 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1141 20:20:54.657681 setenv autoload no
1142 20:20:54.658426 Sending with 10 millisecond of delay
1144 20:20:56.456319 => setenv initrd_high 0xffffffff
1145 20:20:56.467137 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1146 20:20:56.468129 setenv initrd_high 0xffffffff
1147 20:20:56.468920 Sending with 10 millisecond of delay
1149 20:20:58.086955 => setenv fdt_high 0xffffffff
1150 20:20:58.097819 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1151 20:20:58.098799 setenv fdt_high 0xffffffff
1152 20:20:58.099587 Sending with 10 millisecond of delay
1154 20:20:58.391657 => dhcp
1155 20:20:58.402524 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1156 20:20:58.403447 dhcp
1157 20:20:58.403922 Speed: 1000, full duplex
1158 20:20:58.404447 BOOTP broadcast 1
1159 20:20:58.414628 DHCP client bound to address 192.168.6.27 (12 ms)
1160 20:20:58.415380 Sending with 10 millisecond of delay
1162 20:21:00.092266 => setenv serverip 192.168.6.2
1163 20:21:00.103071 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1164 20:21:00.103928 setenv serverip 192.168.6.2
1165 20:21:00.104710 Sending with 10 millisecond of delay
1167 20:21:03.829394 => tftpboot 0x01080000 935915/tftp-deploy-rwn099a7/kernel/uImage
1168 20:21:03.840221 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:13)
1169 20:21:03.841091 tftpboot 0x01080000 935915/tftp-deploy-rwn099a7/kernel/uImage
1170 20:21:03.841581 Speed: 1000, full duplex
1171 20:21:03.842040 Using ethernet@ff3f0000 device
1172 20:21:03.842845 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1173 20:21:03.848378 Filename '935915/tftp-deploy-rwn099a7/kernel/uImage'.
1174 20:21:03.851667 Load address: 0x1080000
1175 20:21:06.684108 Loading: *################################################## 43.6 MiB
1176 20:21:06.684754 15.4 MiB/s
1177 20:21:06.685229 done
1178 20:21:06.688649 Bytes transferred = 45713984 (2b98a40 hex)
1179 20:21:06.689492 Sending with 10 millisecond of delay
1181 20:21:11.377760 => tftpboot 0x08000000 935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
1182 20:21:11.388578 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1183 20:21:11.389477 tftpboot 0x08000000 935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot
1184 20:21:11.389967 Speed: 1000, full duplex
1185 20:21:11.390426 Using ethernet@ff3f0000 device
1186 20:21:11.391479 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1187 20:21:11.400007 Filename '935915/tftp-deploy-rwn099a7/ramdisk/ramdisk.cpio.gz.uboot'.
1188 20:21:11.400551 Load address: 0x8000000
1189 20:21:18.104145 Loading: *###################T ############################## UDP wrong checksum 00000005 0000984f
1190 20:21:22.860868 UDP wrong checksum 000000ff 00001687
1191 20:21:22.875647 UDP wrong checksum 000000ff 0000ac79
1192 20:21:23.107234 T UDP wrong checksum 00000005 0000984f
1193 20:21:33.109567 T T UDP wrong checksum 00000005 0000984f
1194 20:21:49.049683 T T T UDP wrong checksum 000000ff 00004945
1195 20:21:49.053814 UDP wrong checksum 000000ff 0000d637
1196 20:21:53.111902 T UDP wrong checksum 00000005 0000984f
1197 20:21:54.352898 UDP wrong checksum 000000ff 00007bf6
1198 20:21:54.392612 UDP wrong checksum 000000ff 000005e9
1199 20:22:08.116904 T T
1200 20:22:08.117333 Retry count exceeded; starting again
1202 20:22:08.120367 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1205 20:22:08.121357 end: 2.4 uboot-commands (duration 00:01:51) [common]
1207 20:22:08.122237 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1209 20:22:08.122901 end: 2 uboot-action (duration 00:01:51) [common]
1211 20:22:08.123742 Cleaning after the job
1212 20:22:08.124111 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/ramdisk
1213 20:22:08.125089 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/kernel
1214 20:22:08.150950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/dtb
1215 20:22:08.151772 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/nfsrootfs
1216 20:22:08.202395 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935915/tftp-deploy-rwn099a7/modules
1217 20:22:08.209580 start: 4.1 power-off (timeout 00:00:30) [common]
1218 20:22:08.210200 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1219 20:22:08.244123 >> OK - accepted request
1220 20:22:08.246186 Returned 0 in 0 seconds
1221 20:22:08.346918 end: 4.1 power-off (duration 00:00:00) [common]
1223 20:22:08.347892 start: 4.2 read-feedback (timeout 00:10:00) [common]
1224 20:22:08.348598 Listened to connection for namespace 'common' for up to 1s
1225 20:22:09.349545 Finalising connection for namespace 'common'
1226 20:22:09.350045 Disconnecting from shell: Finalise
1227 20:22:09.350345 =>
1228 20:22:09.451096 end: 4.2 read-feedback (duration 00:00:01) [common]
1229 20:22:09.451555 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/935915
1230 20:22:12.415503 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/935915
1231 20:22:12.416125 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.