Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:15:36.844354 lava-dispatcher, installed at version: 2024.01
2 20:15:36.845161 start: 0 validate
3 20:15:36.845628 Start time: 2024-11-04 20:15:36.845597+00:00 (UTC)
4 20:15:36.846182 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:15:36.846740 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:15:36.882243 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:15:36.882793 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:15:36.915365 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:15:36.915975 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:15:36.946939 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:15:36.947433 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:15:36.984257 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:15:36.984924 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-59-g5f9efdfe694c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 20:15:37.025868 validate duration: 0.18
16 20:15:37.026792 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:15:37.027177 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:15:37.027541 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:15:37.028136 Not decompressing ramdisk as can be used compressed.
20 20:15:37.028561 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 20:15:37.028890 saving as /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/ramdisk/initrd.cpio.gz
22 20:15:37.029169 total size: 5628140 (5 MB)
23 20:15:37.069495 progress 0 % (0 MB)
24 20:15:37.073803 progress 5 % (0 MB)
25 20:15:37.078069 progress 10 % (0 MB)
26 20:15:37.081809 progress 15 % (0 MB)
27 20:15:37.085955 progress 20 % (1 MB)
28 20:15:37.089838 progress 25 % (1 MB)
29 20:15:37.094312 progress 30 % (1 MB)
30 20:15:37.098812 progress 35 % (1 MB)
31 20:15:37.102815 progress 40 % (2 MB)
32 20:15:37.107283 progress 45 % (2 MB)
33 20:15:37.111518 progress 50 % (2 MB)
34 20:15:37.115922 progress 55 % (2 MB)
35 20:15:37.120476 progress 60 % (3 MB)
36 20:15:37.124365 progress 65 % (3 MB)
37 20:15:37.128862 progress 70 % (3 MB)
38 20:15:37.132871 progress 75 % (4 MB)
39 20:15:37.137301 progress 80 % (4 MB)
40 20:15:37.141333 progress 85 % (4 MB)
41 20:15:37.145642 progress 90 % (4 MB)
42 20:15:37.149787 progress 95 % (5 MB)
43 20:15:37.153332 progress 100 % (5 MB)
44 20:15:37.154046 5 MB downloaded in 0.12 s (42.99 MB/s)
45 20:15:37.154625 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:15:37.155575 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:15:37.155880 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:15:37.156234 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:15:37.156757 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/kernel/Image
51 20:15:37.157018 saving as /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/kernel/Image
52 20:15:37.157283 total size: 45713920 (43 MB)
53 20:15:37.157500 No compression specified
54 20:15:37.194816 progress 0 % (0 MB)
55 20:15:37.223132 progress 5 % (2 MB)
56 20:15:37.251326 progress 10 % (4 MB)
57 20:15:37.279498 progress 15 % (6 MB)
58 20:15:37.307783 progress 20 % (8 MB)
59 20:15:37.335488 progress 25 % (10 MB)
60 20:15:37.363460 progress 30 % (13 MB)
61 20:15:37.391507 progress 35 % (15 MB)
62 20:15:37.419650 progress 40 % (17 MB)
63 20:15:37.447091 progress 45 % (19 MB)
64 20:15:37.474967 progress 50 % (21 MB)
65 20:15:37.502820 progress 55 % (24 MB)
66 20:15:37.530727 progress 60 % (26 MB)
67 20:15:37.558334 progress 65 % (28 MB)
68 20:15:37.586162 progress 70 % (30 MB)
69 20:15:37.614111 progress 75 % (32 MB)
70 20:15:37.641898 progress 80 % (34 MB)
71 20:15:37.669184 progress 85 % (37 MB)
72 20:15:37.697309 progress 90 % (39 MB)
73 20:15:37.725999 progress 95 % (41 MB)
74 20:15:37.754497 progress 100 % (43 MB)
75 20:15:37.755025 43 MB downloaded in 0.60 s (72.94 MB/s)
76 20:15:37.755501 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:15:37.756361 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:15:37.756638 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:15:37.756905 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:15:37.757381 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:15:37.757655 saving as /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:15:37.757863 total size: 54703 (0 MB)
84 20:15:37.758076 No compression specified
85 20:15:37.798506 progress 59 % (0 MB)
86 20:15:37.799337 progress 100 % (0 MB)
87 20:15:37.799892 0 MB downloaded in 0.04 s (1.24 MB/s)
88 20:15:37.800448 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:15:37.801316 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:15:37.801602 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:15:37.801880 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:15:37.802359 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 20:15:37.802616 saving as /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/nfsrootfs/full.rootfs.tar
95 20:15:37.803029 total size: 474398908 (452 MB)
96 20:15:37.803259 Using unxz to decompress xz
97 20:15:37.838654 progress 0 % (0 MB)
98 20:15:38.936025 progress 5 % (22 MB)
99 20:15:40.400892 progress 10 % (45 MB)
100 20:15:40.863148 progress 15 % (67 MB)
101 20:15:41.715667 progress 20 % (90 MB)
102 20:15:42.260979 progress 25 % (113 MB)
103 20:15:42.650077 progress 30 % (135 MB)
104 20:15:43.294167 progress 35 % (158 MB)
105 20:15:44.165862 progress 40 % (181 MB)
106 20:15:44.960284 progress 45 % (203 MB)
107 20:15:45.541957 progress 50 % (226 MB)
108 20:15:46.182442 progress 55 % (248 MB)
109 20:15:47.468432 progress 60 % (271 MB)
110 20:15:48.958114 progress 65 % (294 MB)
111 20:15:50.534956 progress 70 % (316 MB)
112 20:15:53.693789 progress 75 % (339 MB)
113 20:15:56.155942 progress 80 % (361 MB)
114 20:15:59.057492 progress 85 % (384 MB)
115 20:16:02.194119 progress 90 % (407 MB)
116 20:16:05.382217 progress 95 % (429 MB)
117 20:16:08.594034 progress 100 % (452 MB)
118 20:16:08.606904 452 MB downloaded in 30.80 s (14.69 MB/s)
119 20:16:08.607970 end: 1.4.1 http-download (duration 00:00:31) [common]
121 20:16:08.609937 end: 1.4 download-retry (duration 00:00:31) [common]
122 20:16:08.610538 start: 1.5 download-retry (timeout 00:09:28) [common]
123 20:16:08.611161 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 20:16:08.612076 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-59-g5f9efdfe694c/arm64/defconfig/gcc-12/modules.tar.xz
125 20:16:08.612603 saving as /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/modules/modules.tar
126 20:16:08.613064 total size: 11618336 (11 MB)
127 20:16:08.613533 Using unxz to decompress xz
128 20:16:08.658760 progress 0 % (0 MB)
129 20:16:08.725419 progress 5 % (0 MB)
130 20:16:08.799694 progress 10 % (1 MB)
131 20:16:08.896592 progress 15 % (1 MB)
132 20:16:08.989133 progress 20 % (2 MB)
133 20:16:09.069186 progress 25 % (2 MB)
134 20:16:09.145070 progress 30 % (3 MB)
135 20:16:09.223671 progress 35 % (3 MB)
136 20:16:09.296439 progress 40 % (4 MB)
137 20:16:09.372542 progress 45 % (5 MB)
138 20:16:09.456774 progress 50 % (5 MB)
139 20:16:09.537607 progress 55 % (6 MB)
140 20:16:09.617777 progress 60 % (6 MB)
141 20:16:09.697696 progress 65 % (7 MB)
142 20:16:09.777730 progress 70 % (7 MB)
143 20:16:09.854759 progress 75 % (8 MB)
144 20:16:09.937864 progress 80 % (8 MB)
145 20:16:10.017276 progress 85 % (9 MB)
146 20:16:10.099841 progress 90 % (10 MB)
147 20:16:10.173857 progress 95 % (10 MB)
148 20:16:10.250481 progress 100 % (11 MB)
149 20:16:10.262951 11 MB downloaded in 1.65 s (6.72 MB/s)
150 20:16:10.263938 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:16:10.265855 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:16:10.266447 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 20:16:10.267034 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 20:16:25.946757 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/935889/extract-nfsrootfs-m0dz6vp3
156 20:16:25.947376 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 20:16:25.947680 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 20:16:25.948408 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu
159 20:16:25.948865 makedir: /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin
160 20:16:25.949193 makedir: /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/tests
161 20:16:25.949505 makedir: /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/results
162 20:16:25.949836 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-add-keys
163 20:16:25.950357 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-add-sources
164 20:16:25.951002 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-background-process-start
165 20:16:25.951529 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-background-process-stop
166 20:16:25.952120 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-common-functions
167 20:16:25.952632 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-echo-ipv4
168 20:16:25.953111 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-install-packages
169 20:16:25.953666 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-installed-packages
170 20:16:25.954150 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-os-build
171 20:16:25.956371 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-probe-channel
172 20:16:25.956896 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-probe-ip
173 20:16:25.957393 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-target-ip
174 20:16:25.957940 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-target-mac
175 20:16:25.958581 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-target-storage
176 20:16:25.959079 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-case
177 20:16:25.959560 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-event
178 20:16:25.960058 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-feedback
179 20:16:25.960544 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-raise
180 20:16:25.961030 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-reference
181 20:16:25.961525 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-runner
182 20:16:25.962034 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-set
183 20:16:25.962508 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-test-shell
184 20:16:25.963003 Updating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-install-packages (oe)
185 20:16:25.963527 Updating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/bin/lava-installed-packages (oe)
186 20:16:25.963965 Creating /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/environment
187 20:16:25.964358 LAVA metadata
188 20:16:25.964616 - LAVA_JOB_ID=935889
189 20:16:25.964829 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:16:25.965191 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 20:16:25.966142 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:16:25.966457 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 20:16:25.966664 skipped lava-vland-overlay
194 20:16:25.966903 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:16:25.967155 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 20:16:25.967371 skipped lava-multinode-overlay
197 20:16:25.967611 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:16:25.967859 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 20:16:25.968132 Loading test definitions
200 20:16:25.968411 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 20:16:25.968632 Using /lava-935889 at stage 0
202 20:16:25.969805 uuid=935889_1.6.2.4.1 testdef=None
203 20:16:25.970119 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:16:25.970382 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 20:16:25.972187 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:16:25.973030 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 20:16:25.976971 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:16:25.977923 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 20:16:25.980018 runner path: /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 935889_1.6.2.4.1
212 20:16:25.980599 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:16:25.981380 Creating lava-test-runner.conf files
215 20:16:25.981584 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/935889/lava-overlay-_xu1hpuu/lava-935889/0 for stage 0
216 20:16:25.981995 - 0_v4l2-decoder-conformance-vp9
217 20:16:25.982381 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:16:25.982658 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 20:16:26.006307 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:16:26.006716 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 20:16:26.006978 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:16:26.007245 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:16:26.007512 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 20:16:26.658554 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:16:26.659032 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 20:16:26.659301 extracting modules file /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935889/extract-nfsrootfs-m0dz6vp3
227 20:16:28.179621 extracting modules file /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk
228 20:16:29.600671 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:16:29.601146 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 20:16:29.601423 [common] Applying overlay to NFS
231 20:16:29.601635 [common] Applying overlay /var/lib/lava/dispatcher/tmp/935889/compress-overlay-f61mhm09/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/935889/extract-nfsrootfs-m0dz6vp3
232 20:16:29.630616 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:16:29.631022 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 20:16:29.631293 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 20:16:29.631520 Converting downloaded kernel to a uImage
236 20:16:29.631840 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/kernel/Image /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/kernel/uImage
237 20:16:30.094258 output: Image Name:
238 20:16:30.094680 output: Created: Mon Nov 4 20:16:29 2024
239 20:16:30.094890 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:16:30.095095 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 20:16:30.095295 output: Load Address: 01080000
242 20:16:30.095493 output: Entry Point: 01080000
243 20:16:30.095689 output:
244 20:16:30.096053 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 20:16:30.096339 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 20:16:30.096609 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 20:16:30.096861 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:16:30.097117 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 20:16:30.097371 Building ramdisk /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk
250 20:16:32.260060 >> 166774 blocks
251 20:16:40.003959 Adding RAMdisk u-boot header.
252 20:16:40.004475 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk.cpio.gz.uboot
253 20:16:40.246962 output: Image Name:
254 20:16:40.247387 output: Created: Mon Nov 4 20:16:40 2024
255 20:16:40.247598 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:16:40.247802 output: Data Size: 23428041 Bytes = 22878.95 KiB = 22.34 MiB
257 20:16:40.248086 output: Load Address: 00000000
258 20:16:40.248493 output: Entry Point: 00000000
259 20:16:40.248886 output:
260 20:16:40.249837 rename /var/lib/lava/dispatcher/tmp/935889/extract-overlay-ramdisk-fga39in0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
261 20:16:40.250553 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 20:16:40.251096 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 20:16:40.251653 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 20:16:40.252146 No LXC device requested
265 20:16:40.252652 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:16:40.253157 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 20:16:40.253644 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:16:40.254053 Checking files for TFTP limit of 4294967296 bytes.
269 20:16:40.256791 end: 1 tftp-deploy (duration 00:01:03) [common]
270 20:16:40.257390 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:16:40.257907 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:16:40.258393 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:16:40.258886 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:16:40.259406 Using kernel file from prepare-kernel: 935889/tftp-deploy-8fsv1_b6/kernel/uImage
275 20:16:40.260053 substitutions:
276 20:16:40.260465 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:16:40.260860 - {DTB_ADDR}: 0x01070000
278 20:16:40.261251 - {DTB}: 935889/tftp-deploy-8fsv1_b6/dtb/meson-g12b-a311d-libretech-cc.dtb
279 20:16:40.261641 - {INITRD}: 935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
280 20:16:40.262031 - {KERNEL_ADDR}: 0x01080000
281 20:16:40.262418 - {KERNEL}: 935889/tftp-deploy-8fsv1_b6/kernel/uImage
282 20:16:40.262803 - {LAVA_MAC}: None
283 20:16:40.263225 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/935889/extract-nfsrootfs-m0dz6vp3
284 20:16:40.263617 - {NFS_SERVER_IP}: 192.168.6.2
285 20:16:40.264023 - {PRESEED_CONFIG}: None
286 20:16:40.264413 - {PRESEED_LOCAL}: None
287 20:16:40.264797 - {RAMDISK_ADDR}: 0x08000000
288 20:16:40.265177 - {RAMDISK}: 935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
289 20:16:40.265559 - {ROOT_PART}: None
290 20:16:40.265944 - {ROOT}: None
291 20:16:40.266327 - {SERVER_IP}: 192.168.6.2
292 20:16:40.266707 - {TEE_ADDR}: 0x83000000
293 20:16:40.267091 - {TEE}: None
294 20:16:40.267471 Parsed boot commands:
295 20:16:40.267845 - setenv autoload no
296 20:16:40.268258 - setenv initrd_high 0xffffffff
297 20:16:40.268641 - setenv fdt_high 0xffffffff
298 20:16:40.269023 - dhcp
299 20:16:40.269401 - setenv serverip 192.168.6.2
300 20:16:40.269778 - tftpboot 0x01080000 935889/tftp-deploy-8fsv1_b6/kernel/uImage
301 20:16:40.270159 - tftpboot 0x08000000 935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
302 20:16:40.270534 - tftpboot 0x01070000 935889/tftp-deploy-8fsv1_b6/dtb/meson-g12b-a311d-libretech-cc.dtb
303 20:16:40.270911 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/935889/extract-nfsrootfs-m0dz6vp3,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:16:40.271303 - bootm 0x01080000 0x08000000 0x01070000
305 20:16:40.271800 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:16:40.273309 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:16:40.273724 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 20:16:40.288138 Setting prompt string to ['lava-test: # ']
310 20:16:40.289617 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:16:40.290200 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:16:40.290745 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:16:40.291278 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:16:40.292403 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 20:16:40.328932 >> OK - accepted request
316 20:16:40.331117 Returned 0 in 0 seconds
317 20:16:40.432339 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:16:40.434044 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:16:40.434616 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:16:40.435133 Setting prompt string to ['Hit any key to stop autoboot']
322 20:16:40.435599 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:16:40.437202 Trying 192.168.56.21...
324 20:16:40.437688 Connected to conserv1.
325 20:16:40.438105 Escape character is '^]'.
326 20:16:40.438522
327 20:16:40.438938 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 20:16:40.439347
329 20:16:52.567806 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 20:16:52.568303 bl2_stage_init 0x01
331 20:16:52.568567 bl2_stage_init 0x81
332 20:16:52.573128 hw id: 0x0000 - pwm id 0x01
333 20:16:52.573482 bl2_stage_init 0xc1
334 20:16:52.573735 bl2_stage_init 0x02
335 20:16:52.573961
336 20:16:52.578658 L0:00000000
337 20:16:52.579077 L1:20000703
338 20:16:52.579326 L2:00008067
339 20:16:52.579555 L3:14000000
340 20:16:52.581667 B2:00402000
341 20:16:52.582003 B1:e0f83180
342 20:16:52.582256
343 20:16:52.582490 TE: 58159
344 20:16:52.582717
345 20:16:52.592624 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 20:16:52.593015
347 20:16:52.593256 Board ID = 1
348 20:16:52.593485 Set A53 clk to 24M
349 20:16:52.593713 Set A73 clk to 24M
350 20:16:52.598368 Set clk81 to 24M
351 20:16:52.598673 A53 clk: 1200 MHz
352 20:16:52.598900 A73 clk: 1200 MHz
353 20:16:52.603854 CLK81: 166.6M
354 20:16:52.604164 smccc: 00012ab5
355 20:16:52.609759 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 20:16:52.610060 board id: 1
357 20:16:52.615029 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:16:52.628942 fw parse done
359 20:16:52.634736 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:16:52.677414 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:16:52.688188 PIEI prepare done
362 20:16:52.688622 fastboot data load
363 20:16:52.689017 fastboot data verify
364 20:16:52.693768 verify result: 266
365 20:16:52.699540 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 20:16:52.700036 LPDDR4 probe
367 20:16:52.700452 ddr clk to 1584MHz
368 20:16:52.707042 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:16:52.744706
370 20:16:52.745181 dmc_version 0001
371 20:16:52.751366 Check phy result
372 20:16:52.757146 INFO : End of CA training
373 20:16:52.757583 INFO : End of initialization
374 20:16:52.762766 INFO : Training has run successfully!
375 20:16:52.763202 Check phy result
376 20:16:52.768376 INFO : End of initialization
377 20:16:52.768811 INFO : End of read enable training
378 20:16:52.773973 INFO : End of fine write leveling
379 20:16:52.779574 INFO : End of Write leveling coarse delay
380 20:16:52.780029 INFO : Training has run successfully!
381 20:16:52.780438 Check phy result
382 20:16:52.785179 INFO : End of initialization
383 20:16:52.785613 INFO : End of read dq deskew training
384 20:16:52.790819 INFO : End of MPR read delay center optimization
385 20:16:52.796359 INFO : End of write delay center optimization
386 20:16:52.802025 INFO : End of read delay center optimization
387 20:16:52.802458 INFO : End of max read latency training
388 20:16:52.807527 INFO : Training has run successfully!
389 20:16:52.807957 1D training succeed
390 20:16:52.816801 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:16:52.864490 Check phy result
392 20:16:52.864990 INFO : End of initialization
393 20:16:52.886764 INFO : End of 2D read delay Voltage center optimization
394 20:16:52.907272 INFO : End of 2D read delay Voltage center optimization
395 20:16:52.959352 INFO : End of 2D write delay Voltage center optimization
396 20:16:53.008775 INFO : End of 2D write delay Voltage center optimization
397 20:16:53.014328 INFO : Training has run successfully!
398 20:16:53.014772
399 20:16:53.015186 channel==0
400 20:16:53.019926 RxClkDly_Margin_A0==88 ps 9
401 20:16:53.020396 TxDqDly_Margin_A0==98 ps 10
402 20:16:53.023241 RxClkDly_Margin_A1==88 ps 9
403 20:16:53.023677 TxDqDly_Margin_A1==98 ps 10
404 20:16:53.028814 TrainedVREFDQ_A0==74
405 20:16:53.029251 TrainedVREFDQ_A1==74
406 20:16:53.029659 VrefDac_Margin_A0==25
407 20:16:53.034455 DeviceVref_Margin_A0==40
408 20:16:53.034898 VrefDac_Margin_A1==25
409 20:16:53.040077 DeviceVref_Margin_A1==40
410 20:16:53.040519
411 20:16:53.040929
412 20:16:53.041329 channel==1
413 20:16:53.041727 RxClkDly_Margin_A0==88 ps 9
414 20:16:53.043449 TxDqDly_Margin_A0==98 ps 10
415 20:16:53.049062 RxClkDly_Margin_A1==98 ps 10
416 20:16:53.049502 TxDqDly_Margin_A1==88 ps 9
417 20:16:53.049910 TrainedVREFDQ_A0==77
418 20:16:53.054720 TrainedVREFDQ_A1==77
419 20:16:53.055158 VrefDac_Margin_A0==22
420 20:16:53.060317 DeviceVref_Margin_A0==37
421 20:16:53.060753 VrefDac_Margin_A1==22
422 20:16:53.061155 DeviceVref_Margin_A1==37
423 20:16:53.061550
424 20:16:53.069302 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:16:53.069752
426 20:16:53.097233 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 20:16:53.097773 2D training succeed
428 20:16:53.108423 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:16:53.108869 auto size-- 65535DDR cs0 size: 2048MB
430 20:16:53.109277 DDR cs1 size: 2048MB
431 20:16:53.113979 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:16:53.114421 cs0 DataBus test pass
433 20:16:53.119598 cs1 DataBus test pass
434 20:16:53.120069 cs0 AddrBus test pass
435 20:16:53.125198 cs1 AddrBus test pass
436 20:16:53.125638
437 20:16:53.126044 100bdlr_step_size ps== 420
438 20:16:53.126448 result report
439 20:16:53.130751 boot times 0Enable ddr reg access
440 20:16:53.137174 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:16:53.150742 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 20:16:53.724498 0.0;M3 CHK:0;cm4_sp_mode 0
443 20:16:53.725058 MVN_1=0x00000000
444 20:16:53.729969 MVN_2=0x00000000
445 20:16:53.735754 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 20:16:53.736245 OPS=0x10
447 20:16:53.736660 ring efuse init
448 20:16:53.737064 chipver efuse init
449 20:16:53.741394 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 20:16:53.746903 [0.018961 Inits done]
451 20:16:53.747331 secure task start!
452 20:16:53.747732 high task start!
453 20:16:53.751590 low task start!
454 20:16:53.752042 run into bl31
455 20:16:53.758112 NOTICE: BL31: v1.3(release):4fc40b1
456 20:16:53.765908 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 20:16:53.766351 NOTICE: BL31: G12A normal boot!
458 20:16:53.791242 NOTICE: BL31: BL33 decompress pass
459 20:16:53.796956 ERROR: Error initializing runtime service opteed_fast
460 20:16:55.029924
461 20:16:55.030557
462 20:16:55.038345 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 20:16:55.038867
464 20:16:55.039298 Model: Libre Computer AML-A311D-CC Alta
465 20:16:55.246785 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 20:16:55.270182 DRAM: 2 GiB (effective 3.8 GiB)
467 20:16:55.413165 Core: 408 devices, 31 uclasses, devicetree: separate
468 20:16:55.418925 WDT: Not starting watchdog@f0d0
469 20:16:55.451282 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 20:16:55.464043 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 20:16:55.468841 ** Bad device specification mmc 0 **
472 20:16:55.479224 Card did not respond to voltage select! : -110
473 20:16:55.486808 ** Bad device specification mmc 0 **
474 20:16:55.487596 Couldn't find partition mmc 0
475 20:16:55.495046 Card did not respond to voltage select! : -110
476 20:16:55.500589 ** Bad device specification mmc 0 **
477 20:16:55.501227 Couldn't find partition mmc 0
478 20:16:55.505640 Error: could not access storage.
479 20:16:56.768360 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 20:16:56.768855 bl2_stage_init 0x01
481 20:16:56.769112 bl2_stage_init 0x81
482 20:16:56.773775 hw id: 0x0000 - pwm id 0x01
483 20:16:56.774061 bl2_stage_init 0xc1
484 20:16:56.774310 bl2_stage_init 0x02
485 20:16:56.774552
486 20:16:56.779462 L0:00000000
487 20:16:56.779741 L1:20000703
488 20:16:56.780016 L2:00008067
489 20:16:56.780264 L3:14000000
490 20:16:56.782300 B2:00402000
491 20:16:56.782560 B1:e0f83180
492 20:16:56.782800
493 20:16:56.783039 TE: 58167
494 20:16:56.783281
495 20:16:56.793413 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 20:16:56.793701
497 20:16:56.793948 Board ID = 1
498 20:16:56.794179 Set A53 clk to 24M
499 20:16:56.794416 Set A73 clk to 24M
500 20:16:56.798986 Set clk81 to 24M
501 20:16:56.799296 A53 clk: 1200 MHz
502 20:16:56.799534 A73 clk: 1200 MHz
503 20:16:56.804661 CLK81: 166.6M
504 20:16:56.805246 smccc: 00012abe
505 20:16:56.810197 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 20:16:56.810762 board id: 1
507 20:16:56.818862 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 20:16:56.829507 fw parse done
509 20:16:56.834689 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 20:16:56.878078 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 20:16:56.889000 PIEI prepare done
512 20:16:56.889554 fastboot data load
513 20:16:56.890068 fastboot data verify
514 20:16:56.894588 verify result: 266
515 20:16:56.900230 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 20:16:56.900783 LPDDR4 probe
517 20:16:56.901296 ddr clk to 1584MHz
518 20:16:56.908206 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 20:16:56.945431
520 20:16:56.946020 dmc_version 0001
521 20:16:56.951121 Check phy result
522 20:16:56.958039 INFO : End of CA training
523 20:16:56.958592 INFO : End of initialization
524 20:16:56.963529 INFO : Training has run successfully!
525 20:16:56.964100 Check phy result
526 20:16:56.969186 INFO : End of initialization
527 20:16:56.969480 INFO : End of read enable training
528 20:16:56.974742 INFO : End of fine write leveling
529 20:16:56.980395 INFO : End of Write leveling coarse delay
530 20:16:56.980956 INFO : Training has run successfully!
531 20:16:56.981469 Check phy result
532 20:16:56.985974 INFO : End of initialization
533 20:16:56.986513 INFO : End of read dq deskew training
534 20:16:56.991518 INFO : End of MPR read delay center optimization
535 20:16:56.997202 INFO : End of write delay center optimization
536 20:16:57.002736 INFO : End of read delay center optimization
537 20:16:57.003272 INFO : End of max read latency training
538 20:16:57.008359 INFO : Training has run successfully!
539 20:16:57.008904 1D training succeed
540 20:16:57.017591 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 20:16:57.065242 Check phy result
542 20:16:57.065845 INFO : End of initialization
543 20:16:57.087601 INFO : End of 2D read delay Voltage center optimization
544 20:16:57.107744 INFO : End of 2D read delay Voltage center optimization
545 20:16:57.159679 INFO : End of 2D write delay Voltage center optimization
546 20:16:57.208910 INFO : End of 2D write delay Voltage center optimization
547 20:16:57.214475 INFO : Training has run successfully!
548 20:16:57.215023
549 20:16:57.215550 channel==0
550 20:16:57.220090 RxClkDly_Margin_A0==88 ps 9
551 20:16:57.220676 TxDqDly_Margin_A0==98 ps 10
552 20:16:57.225612 RxClkDly_Margin_A1==88 ps 9
553 20:16:57.226203 TxDqDly_Margin_A1==88 ps 9
554 20:16:57.226731 TrainedVREFDQ_A0==74
555 20:16:57.231305 TrainedVREFDQ_A1==74
556 20:16:57.231864 VrefDac_Margin_A0==25
557 20:16:57.232409 DeviceVref_Margin_A0==40
558 20:16:57.236788 VrefDac_Margin_A1==25
559 20:16:57.237320 DeviceVref_Margin_A1==40
560 20:16:57.237826
561 20:16:57.238319
562 20:16:57.238818 channel==1
563 20:16:57.242489 RxClkDly_Margin_A0==98 ps 10
564 20:16:57.243026 TxDqDly_Margin_A0==88 ps 9
565 20:16:57.248091 RxClkDly_Margin_A1==98 ps 10
566 20:16:57.248632 TxDqDly_Margin_A1==88 ps 9
567 20:16:57.253618 TrainedVREFDQ_A0==77
568 20:16:57.254157 TrainedVREFDQ_A1==77
569 20:16:57.254666 VrefDac_Margin_A0==22
570 20:16:57.259346 DeviceVref_Margin_A0==37
571 20:16:57.259882 VrefDac_Margin_A1==22
572 20:16:57.264848 DeviceVref_Margin_A1==37
573 20:16:57.265374
574 20:16:57.265887 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 20:16:57.266396
576 20:16:57.298435 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000017 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 20:16:57.298961 2D training succeed
578 20:16:57.304102 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 20:16:57.309515 auto size-- 65535DDR cs0 size: 2048MB
580 20:16:57.309953 DDR cs1 size: 2048MB
581 20:16:57.315208 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 20:16:57.315638 cs0 DataBus test pass
583 20:16:57.320723 cs1 DataBus test pass
584 20:16:57.321155 cs0 AddrBus test pass
585 20:16:57.321551 cs1 AddrBus test pass
586 20:16:57.321940
587 20:16:57.326356 100bdlr_step_size ps== 420
588 20:16:57.326796 result report
589 20:16:57.331948 boot times 0Enable ddr reg access
590 20:16:57.337269 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 20:16:57.350647 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 20:16:57.922643 0.0;M3 CHK:0;cm4_sp_mode 0
593 20:16:57.923241 MVN_1=0x00000000
594 20:16:57.928215 MVN_2=0x00000000
595 20:16:57.934174 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 20:16:57.934656 OPS=0x10
597 20:16:57.935072 ring efuse init
598 20:16:57.935496 chipver efuse init
599 20:16:57.939608 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 20:16:57.945168 [0.018961 Inits done]
601 20:16:57.945609 secure task start!
602 20:16:57.946000 high task start!
603 20:16:57.949691 low task start!
604 20:16:57.950119 run into bl31
605 20:16:57.956329 NOTICE: BL31: v1.3(release):4fc40b1
606 20:16:57.964181 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 20:16:57.964617 NOTICE: BL31: G12A normal boot!
608 20:16:57.990075 NOTICE: BL31: BL33 decompress pass
609 20:16:57.995660 ERROR: Error initializing runtime service opteed_fast
610 20:16:59.228552
611 20:16:59.229171
612 20:16:59.236912 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 20:16:59.237368
614 20:16:59.237801 Model: Libre Computer AML-A311D-CC Alta
615 20:16:59.445449 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 20:16:59.468787 DRAM: 2 GiB (effective 3.8 GiB)
617 20:16:59.611718 Core: 408 devices, 31 uclasses, devicetree: separate
618 20:16:59.617554 WDT: Not starting watchdog@f0d0
619 20:16:59.649845 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 20:16:59.662399 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 20:16:59.667242 ** Bad device specification mmc 0 **
622 20:16:59.677678 Card did not respond to voltage select! : -110
623 20:16:59.685307 ** Bad device specification mmc 0 **
624 20:16:59.685753 Couldn't find partition mmc 0
625 20:16:59.693607 Card did not respond to voltage select! : -110
626 20:16:59.699093 ** Bad device specification mmc 0 **
627 20:16:59.699533 Couldn't find partition mmc 0
628 20:16:59.704167 Error: could not access storage.
629 20:17:00.046695 Net: eth0: ethernet@ff3f0000
630 20:17:00.047267 starting USB...
631 20:17:00.298539 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 20:17:00.299091 Starting the controller
633 20:17:00.305445 USB XHCI 1.10
634 20:17:01.988228 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 20:17:01.988811 bl2_stage_init 0x01
636 20:17:01.989227 bl2_stage_init 0x81
637 20:17:01.993681 hw id: 0x0000 - pwm id 0x01
638 20:17:01.994124 bl2_stage_init 0xc1
639 20:17:01.994567 bl2_stage_init 0x02
640 20:17:01.995005
641 20:17:01.999289 L0:00000000
642 20:17:01.999732 L1:20000703
643 20:17:02.000195 L2:00008067
644 20:17:02.000600 L3:14000000
645 20:17:02.004876 B2:00402000
646 20:17:02.005319 B1:e0f83180
647 20:17:02.005729
648 20:17:02.006132 TE: 58124
649 20:17:02.006533
650 20:17:02.010493 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 20:17:02.010937
652 20:17:02.011344 Board ID = 1
653 20:17:02.016117 Set A53 clk to 24M
654 20:17:02.016577 Set A73 clk to 24M
655 20:17:02.016985 Set clk81 to 24M
656 20:17:02.021686 A53 clk: 1200 MHz
657 20:17:02.022126 A73 clk: 1200 MHz
658 20:17:02.022528 CLK81: 166.6M
659 20:17:02.022925 smccc: 00012a91
660 20:17:02.027298 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 20:17:02.032881 board id: 1
662 20:17:02.038749 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 20:17:02.049420 fw parse done
664 20:17:02.055407 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 20:17:02.098062 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 20:17:02.108991 PIEI prepare done
667 20:17:02.109448 fastboot data load
668 20:17:02.109860 fastboot data verify
669 20:17:02.114538 verify result: 266
670 20:17:02.120150 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 20:17:02.120613 LPDDR4 probe
672 20:17:02.121040 ddr clk to 1584MHz
673 20:17:02.127184 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 20:17:02.164506
675 20:17:02.165008 dmc_version 0001
676 20:17:02.171157 Check phy result
677 20:17:02.177976 INFO : End of CA training
678 20:17:02.178532 INFO : End of initialization
679 20:17:02.183661 INFO : Training has run successfully!
680 20:17:02.184254 Check phy result
681 20:17:02.189276 INFO : End of initialization
682 20:17:02.189802 INFO : End of read enable training
683 20:17:02.192583 INFO : End of fine write leveling
684 20:17:02.198004 INFO : End of Write leveling coarse delay
685 20:17:02.203667 INFO : Training has run successfully!
686 20:17:02.204233 Check phy result
687 20:17:02.204685 INFO : End of initialization
688 20:17:02.209235 INFO : End of read dq deskew training
689 20:17:02.214960 INFO : End of MPR read delay center optimization
690 20:17:02.215489 INFO : End of write delay center optimization
691 20:17:02.220444 INFO : End of read delay center optimization
692 20:17:02.226033 INFO : End of max read latency training
693 20:17:02.226571 INFO : Training has run successfully!
694 20:17:02.231636 1D training succeed
695 20:17:02.236619 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 20:17:02.285208 Check phy result
697 20:17:02.285787 INFO : End of initialization
698 20:17:02.307943 INFO : End of 2D read delay Voltage center optimization
699 20:17:02.328293 INFO : End of 2D read delay Voltage center optimization
700 20:17:02.379501 INFO : End of 2D write delay Voltage center optimization
701 20:17:02.429662 INFO : End of 2D write delay Voltage center optimization
702 20:17:02.435159 INFO : Training has run successfully!
703 20:17:02.435730
704 20:17:02.436246 channel==0
705 20:17:02.440663 RxClkDly_Margin_A0==88 ps 9
706 20:17:02.441247 TxDqDly_Margin_A0==98 ps 10
707 20:17:02.446340 RxClkDly_Margin_A1==88 ps 9
708 20:17:02.446879 TxDqDly_Margin_A1==98 ps 10
709 20:17:02.447347 TrainedVREFDQ_A0==74
710 20:17:02.451852 TrainedVREFDQ_A1==74
711 20:17:02.452431 VrefDac_Margin_A0==25
712 20:17:02.452895 DeviceVref_Margin_A0==40
713 20:17:02.457542 VrefDac_Margin_A1==25
714 20:17:02.458080 DeviceVref_Margin_A1==40
715 20:17:02.458547
716 20:17:02.458996
717 20:17:02.463165 channel==1
718 20:17:02.463720 RxClkDly_Margin_A0==98 ps 10
719 20:17:02.464228 TxDqDly_Margin_A0==88 ps 9
720 20:17:02.468735 RxClkDly_Margin_A1==98 ps 10
721 20:17:02.469277 TxDqDly_Margin_A1==88 ps 9
722 20:17:02.474223 TrainedVREFDQ_A0==77
723 20:17:02.474765 TrainedVREFDQ_A1==77
724 20:17:02.475228 VrefDac_Margin_A0==22
725 20:17:02.479882 DeviceVref_Margin_A0==37
726 20:17:02.480458 VrefDac_Margin_A1==24
727 20:17:02.485498 DeviceVref_Margin_A1==37
728 20:17:02.486036
729 20:17:02.486494 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 20:17:02.486945
731 20:17:02.519106 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 20:17:02.519710 2D training succeed
733 20:17:02.524743 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 20:17:02.530193 auto size-- 65535DDR cs0 size: 2048MB
735 20:17:02.530731 DDR cs1 size: 2048MB
736 20:17:02.535788 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 20:17:02.536354 cs0 DataBus test pass
738 20:17:02.541414 cs1 DataBus test pass
739 20:17:02.541946 cs0 AddrBus test pass
740 20:17:02.542403 cs1 AddrBus test pass
741 20:17:02.542845
742 20:17:02.547079 100bdlr_step_size ps== 420
743 20:17:02.547623 result report
744 20:17:02.552602 boot times 0Enable ddr reg access
745 20:17:02.557936 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 20:17:02.571393 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 20:17:03.145127 0.0;M3 CHK:0;cm4_sp_mode 0
748 20:17:03.145768 MVN_1=0x00000000
749 20:17:03.150668 MVN_2=0x00000000
750 20:17:03.156378 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 20:17:03.156934 OPS=0x10
752 20:17:03.157375 ring efuse init
753 20:17:03.157803 chipver efuse init
754 20:17:03.164632 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 20:17:03.165167 [0.018960 Inits done]
756 20:17:03.165608 secure task start!
757 20:17:03.172126 high task start!
758 20:17:03.172643 low task start!
759 20:17:03.173076 run into bl31
760 20:17:03.178825 NOTICE: BL31: v1.3(release):4fc40b1
761 20:17:03.186572 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 20:17:03.187085 NOTICE: BL31: G12A normal boot!
763 20:17:03.212128 NOTICE: BL31: BL33 decompress pass
764 20:17:03.217672 ERROR: Error initializing runtime service opteed_fast
765 20:17:04.450444
766 20:17:04.451089
767 20:17:04.458972 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 20:17:04.459522
769 20:17:04.460081 Model: Libre Computer AML-A311D-CC Alta
770 20:17:04.667341 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 20:17:04.690448 DRAM: 2 GiB (effective 3.8 GiB)
772 20:17:04.833694 Core: 408 devices, 31 uclasses, devicetree: separate
773 20:17:04.839660 WDT: Not starting watchdog@f0d0
774 20:17:04.871826 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 20:17:04.884316 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 20:17:04.889398 ** Bad device specification mmc 0 **
777 20:17:04.899687 Card did not respond to voltage select! : -110
778 20:17:04.907413 ** Bad device specification mmc 0 **
779 20:17:04.908059 Couldn't find partition mmc 0
780 20:17:04.915681 Card did not respond to voltage select! : -110
781 20:17:04.921161 ** Bad device specification mmc 0 **
782 20:17:04.921738 Couldn't find partition mmc 0
783 20:17:04.926238 Error: could not access storage.
784 20:17:05.269653 Net: eth0: ethernet@ff3f0000
785 20:17:05.270293 starting USB...
786 20:17:05.521426 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 20:17:05.522039 Starting the controller
788 20:17:05.528494 USB XHCI 1.10
789 20:17:07.688445 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 20:17:07.689109 bl2_stage_init 0x01
791 20:17:07.689588 bl2_stage_init 0x81
792 20:17:07.694071 hw id: 0x0000 - pwm id 0x01
793 20:17:07.694588 bl2_stage_init 0xc1
794 20:17:07.695051 bl2_stage_init 0x02
795 20:17:07.695503
796 20:17:07.699553 L0:00000000
797 20:17:07.700115 L1:20000703
798 20:17:07.700584 L2:00008067
799 20:17:07.701033 L3:14000000
800 20:17:07.705095 B2:00402000
801 20:17:07.705608 B1:e0f83180
802 20:17:07.706060
803 20:17:07.706508 TE: 58167
804 20:17:07.706955
805 20:17:07.710782 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 20:17:07.711294
807 20:17:07.711753 Board ID = 1
808 20:17:07.716314 Set A53 clk to 24M
809 20:17:07.716823 Set A73 clk to 24M
810 20:17:07.717279 Set clk81 to 24M
811 20:17:07.722034 A53 clk: 1200 MHz
812 20:17:07.722537 A73 clk: 1200 MHz
813 20:17:07.722989 CLK81: 166.6M
814 20:17:07.723431 smccc: 00012abe
815 20:17:07.727562 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 20:17:07.733204 board id: 1
817 20:17:07.739147 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 20:17:07.749790 fw parse done
819 20:17:07.755738 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 20:17:07.798294 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 20:17:07.809186 PIEI prepare done
822 20:17:07.809727 fastboot data load
823 20:17:07.810193 fastboot data verify
824 20:17:07.814837 verify result: 266
825 20:17:07.820430 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 20:17:07.820948 LPDDR4 probe
827 20:17:07.821404 ddr clk to 1584MHz
828 20:17:07.828378 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 20:17:07.865718
830 20:17:07.866290 dmc_version 0001
831 20:17:07.872379 Check phy result
832 20:17:07.878191 INFO : End of CA training
833 20:17:07.878699 INFO : End of initialization
834 20:17:07.883808 INFO : Training has run successfully!
835 20:17:07.884350 Check phy result
836 20:17:07.889405 INFO : End of initialization
837 20:17:07.889913 INFO : End of read enable training
838 20:17:07.892868 INFO : End of fine write leveling
839 20:17:07.898521 INFO : End of Write leveling coarse delay
840 20:17:07.904108 INFO : Training has run successfully!
841 20:17:07.904690 Check phy result
842 20:17:07.905149 INFO : End of initialization
843 20:17:07.909718 INFO : End of read dq deskew training
844 20:17:07.913071 INFO : End of MPR read delay center optimization
845 20:17:07.918643 INFO : End of write delay center optimization
846 20:17:07.924265 INFO : End of read delay center optimization
847 20:17:07.924863 INFO : End of max read latency training
848 20:17:07.929910 INFO : Training has run successfully!
849 20:17:07.930486 1D training succeed
850 20:17:07.937896 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 20:17:07.985382 Check phy result
852 20:17:07.985974 INFO : End of initialization
853 20:17:08.007152 INFO : End of 2D read delay Voltage center optimization
854 20:17:08.027419 INFO : End of 2D read delay Voltage center optimization
855 20:17:08.079449 INFO : End of 2D write delay Voltage center optimization
856 20:17:08.128945 INFO : End of 2D write delay Voltage center optimization
857 20:17:08.134488 INFO : Training has run successfully!
858 20:17:08.134993
859 20:17:08.135446 channel==0
860 20:17:08.140070 RxClkDly_Margin_A0==88 ps 9
861 20:17:08.140578 TxDqDly_Margin_A0==98 ps 10
862 20:17:08.143328 RxClkDly_Margin_A1==88 ps 9
863 20:17:08.143823 TxDqDly_Margin_A1==88 ps 9
864 20:17:08.148910 TrainedVREFDQ_A0==74
865 20:17:08.149426 TrainedVREFDQ_A1==74
866 20:17:08.149894 VrefDac_Margin_A0==25
867 20:17:08.154509 DeviceVref_Margin_A0==40
868 20:17:08.155032 VrefDac_Margin_A1==23
869 20:17:08.160095 DeviceVref_Margin_A1==40
870 20:17:08.160598
871 20:17:08.161030
872 20:17:08.161455 channel==1
873 20:17:08.161877 RxClkDly_Margin_A0==98 ps 10
874 20:17:08.165580 TxDqDly_Margin_A0==88 ps 9
875 20:17:08.166079 RxClkDly_Margin_A1==88 ps 9
876 20:17:08.171279 TxDqDly_Margin_A1==98 ps 10
877 20:17:08.171773 TrainedVREFDQ_A0==77
878 20:17:08.172246 TrainedVREFDQ_A1==77
879 20:17:08.176924 VrefDac_Margin_A0==22
880 20:17:08.177414 DeviceVref_Margin_A0==37
881 20:17:08.182461 VrefDac_Margin_A1==24
882 20:17:08.182946 DeviceVref_Margin_A1==37
883 20:17:08.183379
884 20:17:08.187975 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 20:17:08.188503
886 20:17:08.215883 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 20:17:08.221539 2D training succeed
888 20:17:08.227131 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 20:17:08.227630 auto size-- 65535DDR cs0 size: 2048MB
890 20:17:08.232798 DDR cs1 size: 2048MB
891 20:17:08.233284 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 20:17:08.238342 cs0 DataBus test pass
893 20:17:08.238832 cs1 DataBus test pass
894 20:17:08.239263 cs0 AddrBus test pass
895 20:17:08.244008 cs1 AddrBus test pass
896 20:17:08.244534
897 20:17:08.244982 100bdlr_step_size ps== 420
898 20:17:08.245429 result report
899 20:17:08.249580 boot times 0Enable ddr reg access
900 20:17:08.257174 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 20:17:08.270633 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 20:17:08.844169 0.0;M3 CHK:0;cm4_sp_mode 0
903 20:17:08.844800 MVN_1=0x00000000
904 20:17:08.849787 MVN_2=0x00000000
905 20:17:08.855566 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 20:17:08.856115 OPS=0x10
907 20:17:08.856578 ring efuse init
908 20:17:08.857024 chipver efuse init
909 20:17:08.861090 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 20:17:08.866794 [0.018960 Inits done]
911 20:17:08.867292 secure task start!
912 20:17:08.867739 high task start!
913 20:17:08.871263 low task start!
914 20:17:08.871756 run into bl31
915 20:17:08.877961 NOTICE: BL31: v1.3(release):4fc40b1
916 20:17:08.884937 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 20:17:08.885447 NOTICE: BL31: G12A normal boot!
918 20:17:08.911027 NOTICE: BL31: BL33 decompress pass
919 20:17:08.915972 ERROR: Error initializing runtime service opteed_fast
920 20:17:10.149563
921 20:17:10.150181
922 20:17:10.158059 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 20:17:10.158581
924 20:17:10.159042 Model: Libre Computer AML-A311D-CC Alta
925 20:17:10.366436 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 20:17:10.389909 DRAM: 2 GiB (effective 3.8 GiB)
927 20:17:10.532954 Core: 408 devices, 31 uclasses, devicetree: separate
928 20:17:10.538845 WDT: Not starting watchdog@f0d0
929 20:17:10.571104 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 20:17:10.583531 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 20:17:10.588433 ** Bad device specification mmc 0 **
932 20:17:10.598794 Card did not respond to voltage select! : -110
933 20:17:10.606434 ** Bad device specification mmc 0 **
934 20:17:10.606972 Couldn't find partition mmc 0
935 20:17:10.614798 Card did not respond to voltage select! : -110
936 20:17:10.620281 ** Bad device specification mmc 0 **
937 20:17:10.620801 Couldn't find partition mmc 0
938 20:17:10.625396 Error: could not access storage.
939 20:17:10.967873 Net: eth0: ethernet@ff3f0000
940 20:17:10.968563 starting USB...
941 20:17:11.219627 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 20:17:11.220309 Starting the controller
943 20:17:11.226604 USB XHCI 1.10
944 20:17:12.780601 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 20:17:12.789013 scanning usb for storage devices... 0 Storage Device(s) found
947 20:17:12.840715 Hit any key to stop autoboot: 1
948 20:17:12.841810 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 20:17:12.842520 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
950 20:17:12.843085 Setting prompt string to ['=>']
951 20:17:12.843641 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
952 20:17:12.856520 0
953 20:17:12.857522 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 20:17:12.858099 Sending with 10 millisecond of delay
956 20:17:13.993538 => setenv autoload no
957 20:17:14.004426 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
958 20:17:14.009992 setenv autoload no
959 20:17:14.010792 Sending with 10 millisecond of delay
961 20:17:15.808633 => setenv initrd_high 0xffffffff
962 20:17:15.819482 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
963 20:17:15.820487 setenv initrd_high 0xffffffff
964 20:17:15.821257 Sending with 10 millisecond of delay
966 20:17:17.438788 => setenv fdt_high 0xffffffff
967 20:17:17.449597 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 20:17:17.450457 setenv fdt_high 0xffffffff
969 20:17:17.451217 Sending with 10 millisecond of delay
971 20:17:17.743138 => dhcp
972 20:17:17.753876 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 20:17:17.754761 dhcp
974 20:17:17.755239 Speed: 1000, full duplex
975 20:17:17.755693 BOOTP broadcast 1
976 20:17:17.762408 DHCP client bound to address 192.168.6.27 (9 ms)
977 20:17:17.763185 Sending with 10 millisecond of delay
979 20:17:19.439610 => setenv serverip 192.168.6.2
980 20:17:19.450489 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 20:17:19.451482 setenv serverip 192.168.6.2
982 20:17:19.452221 Sending with 10 millisecond of delay
984 20:17:23.175696 => tftpboot 0x01080000 935889/tftp-deploy-8fsv1_b6/kernel/uImage
985 20:17:23.186604 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 20:17:23.187484 tftpboot 0x01080000 935889/tftp-deploy-8fsv1_b6/kernel/uImage
987 20:17:23.188025 Speed: 1000, full duplex
988 20:17:23.188495 Using ethernet@ff3f0000 device
989 20:17:23.189484 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 20:17:23.195045 Filename '935889/tftp-deploy-8fsv1_b6/kernel/uImage'.
991 20:17:23.198823 Load address: 0x1080000
992 20:17:26.063341 Loading: *################################################## 43.6 MiB
993 20:17:26.064041 15.2 MiB/s
994 20:17:26.064539 done
995 20:17:26.067697 Bytes transferred = 45713984 (2b98a40 hex)
996 20:17:26.068578 Sending with 10 millisecond of delay
998 20:17:30.757581 => tftpboot 0x08000000 935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
999 20:17:30.768353 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1000 20:17:30.769147 tftpboot 0x08000000 935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot
1001 20:17:30.769597 Speed: 1000, full duplex
1002 20:17:30.770012 Using ethernet@ff3f0000 device
1003 20:17:30.770759 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 20:17:30.782555 Filename '935889/tftp-deploy-8fsv1_b6/ramdisk/ramdisk.cpio.gz.uboot'.
1005 20:17:30.783012 Load address: 0x8000000
1006 20:17:37.732916 Loading: *##################T ############################### UDP wrong checksum 00000005 0000b3c9
1007 20:17:42.733439 T UDP wrong checksum 00000005 0000b3c9
1008 20:17:45.415642 UDP wrong checksum 000000ff 00001541
1009 20:17:45.427884 UDP wrong checksum 000000ff 00009e33
1010 20:17:52.736408 T T UDP wrong checksum 00000005 0000b3c9
1011 20:17:58.624603 T UDP wrong checksum 000000ff 00007bc2
1012 20:17:58.651117 UDP wrong checksum 000000ff 000012b5
1013 20:17:58.673056 UDP wrong checksum 000000ff 00006af7
1014 20:17:58.729077 UDP wrong checksum 000000ff 0000aaa3
1015 20:17:58.753024 UDP wrong checksum 000000ff 0000f5e9
1016 20:17:58.779255 UDP wrong checksum 000000ff 00003b96
1017 20:18:12.740408 T T T UDP wrong checksum 00000005 0000b3c9
1018 20:18:27.744827 T T
1019 20:18:27.745462 Retry count exceeded; starting again
1021 20:18:27.746956 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1024 20:18:27.748925 end: 2.4 uboot-commands (duration 00:01:47) [common]
1026 20:18:27.750286 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1028 20:18:27.751295 end: 2 uboot-action (duration 00:01:47) [common]
1030 20:18:27.752827 Cleaning after the job
1031 20:18:27.753370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/ramdisk
1032 20:18:27.754587 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/kernel
1033 20:18:27.782034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/dtb
1034 20:18:27.783204 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/nfsrootfs
1035 20:18:28.043412 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/935889/tftp-deploy-8fsv1_b6/modules
1036 20:18:28.065675 start: 4.1 power-off (timeout 00:00:30) [common]
1037 20:18:28.066365 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1038 20:18:28.100818 >> OK - accepted request
1039 20:18:28.102845 Returned 0 in 0 seconds
1040 20:18:28.203887 end: 4.1 power-off (duration 00:00:00) [common]
1042 20:18:28.205125 start: 4.2 read-feedback (timeout 00:10:00) [common]
1043 20:18:28.205834 Listened to connection for namespace 'common' for up to 1s
1044 20:18:29.206853 Finalising connection for namespace 'common'
1045 20:18:29.207544 Disconnecting from shell: Finalise
1046 20:18:29.207973 =>
1047 20:18:29.308871 end: 4.2 read-feedback (duration 00:00:01) [common]
1048 20:18:29.309431 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/935889
1049 20:18:32.076768 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/935889
1050 20:18:32.077370 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.