Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 14:49:17.170085 lava-dispatcher, installed at version: 2024.01
2 14:49:17.170916 start: 0 validate
3 14:49:17.171415 Start time: 2024-11-05 14:49:17.171386+00:00 (UTC)
4 14:49:17.172027 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 14:49:17.172583 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 14:49:17.212596 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 14:49:17.213172 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-60-ge38568da5f05b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 14:49:17.246536 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 14:49:17.247173 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-60-ge38568da5f05b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 14:49:18.298701 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 14:49:18.299225 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-60-ge38568da5f05b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 14:49:18.347948 validate duration: 1.18
14 14:49:18.349532 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:49:18.350136 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:49:18.350704 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:49:18.351655 Not decompressing ramdisk as can be used compressed.
18 14:49:18.352416 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 14:49:18.352912 saving as /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/ramdisk/rootfs.cpio.gz
20 14:49:18.353421 total size: 8181887 (7 MB)
21 14:49:18.394413 progress 0 % (0 MB)
22 14:49:18.406601 progress 5 % (0 MB)
23 14:49:18.417814 progress 10 % (0 MB)
24 14:49:18.429268 progress 15 % (1 MB)
25 14:49:18.434932 progress 20 % (1 MB)
26 14:49:18.440646 progress 25 % (1 MB)
27 14:49:18.445807 progress 30 % (2 MB)
28 14:49:18.451567 progress 35 % (2 MB)
29 14:49:18.456827 progress 40 % (3 MB)
30 14:49:18.462435 progress 45 % (3 MB)
31 14:49:18.467625 progress 50 % (3 MB)
32 14:49:18.473194 progress 55 % (4 MB)
33 14:49:18.478302 progress 60 % (4 MB)
34 14:49:18.483811 progress 65 % (5 MB)
35 14:49:18.488985 progress 70 % (5 MB)
36 14:49:18.494501 progress 75 % (5 MB)
37 14:49:18.499638 progress 80 % (6 MB)
38 14:49:18.505196 progress 85 % (6 MB)
39 14:49:18.510360 progress 90 % (7 MB)
40 14:49:18.515952 progress 95 % (7 MB)
41 14:49:18.520894 progress 100 % (7 MB)
42 14:49:18.521608 7 MB downloaded in 0.17 s (46.40 MB/s)
43 14:49:18.522223 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:49:18.523157 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:49:18.523471 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:49:18.523759 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:49:18.524290 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-60-ge38568da5f05b/arm64/defconfig/gcc-12/kernel/Image
49 14:49:18.524569 saving as /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/kernel/Image
50 14:49:18.524794 total size: 45713920 (43 MB)
51 14:49:18.525018 No compression specified
52 14:49:18.560392 progress 0 % (0 MB)
53 14:49:18.588931 progress 5 % (2 MB)
54 14:49:18.617930 progress 10 % (4 MB)
55 14:49:18.646671 progress 15 % (6 MB)
56 14:49:18.675106 progress 20 % (8 MB)
57 14:49:18.704800 progress 25 % (10 MB)
58 14:49:18.733515 progress 30 % (13 MB)
59 14:49:18.762087 progress 35 % (15 MB)
60 14:49:18.790998 progress 40 % (17 MB)
61 14:49:18.819724 progress 45 % (19 MB)
62 14:49:18.849519 progress 50 % (21 MB)
63 14:49:18.878545 progress 55 % (24 MB)
64 14:49:18.907171 progress 60 % (26 MB)
65 14:49:18.935973 progress 65 % (28 MB)
66 14:49:18.964864 progress 70 % (30 MB)
67 14:49:18.993998 progress 75 % (32 MB)
68 14:49:19.022588 progress 80 % (34 MB)
69 14:49:19.050809 progress 85 % (37 MB)
70 14:49:19.080016 progress 90 % (39 MB)
71 14:49:19.109034 progress 95 % (41 MB)
72 14:49:19.137112 progress 100 % (43 MB)
73 14:49:19.137642 43 MB downloaded in 0.61 s (71.14 MB/s)
74 14:49:19.138120 end: 1.2.1 http-download (duration 00:00:01) [common]
76 14:49:19.138945 end: 1.2 download-retry (duration 00:00:01) [common]
77 14:49:19.139218 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:49:19.139481 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:49:19.139950 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-60-ge38568da5f05b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 14:49:19.140253 saving as /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 14:49:19.140483 total size: 53209 (0 MB)
82 14:49:19.140731 No compression specified
83 14:49:19.179525 progress 61 % (0 MB)
84 14:49:19.180377 progress 100 % (0 MB)
85 14:49:19.180918 0 MB downloaded in 0.04 s (1.26 MB/s)
86 14:49:19.181375 end: 1.3.1 http-download (duration 00:00:00) [common]
88 14:49:19.182186 end: 1.3 download-retry (duration 00:00:00) [common]
89 14:49:19.182443 start: 1.4 download-retry (timeout 00:09:59) [common]
90 14:49:19.182706 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 14:49:19.183155 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-60-ge38568da5f05b/arm64/defconfig/gcc-12/modules.tar.xz
92 14:49:19.183391 saving as /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/modules/modules.tar
93 14:49:19.183595 total size: 11603148 (11 MB)
94 14:49:19.183804 Using unxz to decompress xz
95 14:49:19.217821 progress 0 % (0 MB)
96 14:49:19.284615 progress 5 % (0 MB)
97 14:49:19.360931 progress 10 % (1 MB)
98 14:49:19.460302 progress 15 % (1 MB)
99 14:49:19.553144 progress 20 % (2 MB)
100 14:49:19.632173 progress 25 % (2 MB)
101 14:49:19.707961 progress 30 % (3 MB)
102 14:49:19.782265 progress 35 % (3 MB)
103 14:49:19.859357 progress 40 % (4 MB)
104 14:49:19.935974 progress 45 % (5 MB)
105 14:49:20.020230 progress 50 % (5 MB)
106 14:49:20.097460 progress 55 % (6 MB)
107 14:49:20.182082 progress 60 % (6 MB)
108 14:49:20.262569 progress 65 % (7 MB)
109 14:49:20.338513 progress 70 % (7 MB)
110 14:49:20.420433 progress 75 % (8 MB)
111 14:49:20.503393 progress 80 % (8 MB)
112 14:49:20.578775 progress 85 % (9 MB)
113 14:49:20.660911 progress 90 % (9 MB)
114 14:49:20.738005 progress 95 % (10 MB)
115 14:49:20.814788 progress 100 % (11 MB)
116 14:49:20.826173 11 MB downloaded in 1.64 s (6.74 MB/s)
117 14:49:20.826735 end: 1.4.1 http-download (duration 00:00:02) [common]
119 14:49:20.827554 end: 1.4 download-retry (duration 00:00:02) [common]
120 14:49:20.827822 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 14:49:20.828289 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 14:49:20.828846 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 14:49:20.829418 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 14:49:20.830508 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z
125 14:49:20.831415 makedir: /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin
126 14:49:20.832137 makedir: /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/tests
127 14:49:20.832816 makedir: /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/results
128 14:49:20.833471 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-add-keys
129 14:49:20.834475 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-add-sources
130 14:49:20.835491 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-background-process-start
131 14:49:20.836546 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-background-process-stop
132 14:49:20.837624 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-common-functions
133 14:49:20.838602 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-echo-ipv4
134 14:49:20.839590 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-install-packages
135 14:49:20.840608 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-installed-packages
136 14:49:20.841564 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-os-build
137 14:49:20.842521 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-probe-channel
138 14:49:20.843492 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-probe-ip
139 14:49:20.844499 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-target-ip
140 14:49:20.845464 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-target-mac
141 14:49:20.846420 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-target-storage
142 14:49:20.847391 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-case
143 14:49:20.848395 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-event
144 14:49:20.849355 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-feedback
145 14:49:20.850304 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-raise
146 14:49:20.851272 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-reference
147 14:49:20.852276 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-runner
148 14:49:20.853438 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-set
149 14:49:20.854492 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-test-shell
150 14:49:20.855548 Updating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-install-packages (oe)
151 14:49:20.856694 Updating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/bin/lava-installed-packages (oe)
152 14:49:20.857624 Creating /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/environment
153 14:49:20.858388 LAVA metadata
154 14:49:20.858909 - LAVA_JOB_ID=940371
155 14:49:20.859380 - LAVA_DISPATCHER_IP=192.168.6.2
156 14:49:20.860114 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 14:49:20.862060 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 14:49:20.862691 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 14:49:20.863145 skipped lava-vland-overlay
160 14:49:20.863680 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 14:49:20.864318 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 14:49:20.864752 skipped lava-multinode-overlay
163 14:49:20.865253 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 14:49:20.865754 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 14:49:20.866231 Loading test definitions
166 14:49:20.866769 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 14:49:20.867204 Using /lava-940371 at stage 0
168 14:49:20.869360 uuid=940371_1.5.2.4.1 testdef=None
169 14:49:20.869915 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 14:49:20.870422 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 14:49:20.872975 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 14:49:20.873789 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 14:49:20.876143 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 14:49:20.876975 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 14:49:20.879195 runner path: /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/0/tests/0_dmesg test_uuid 940371_1.5.2.4.1
178 14:49:20.879742 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 14:49:20.880528 Creating lava-test-runner.conf files
181 14:49:20.880734 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/940371/lava-overlay-dbyg_4_z/lava-940371/0 for stage 0
182 14:49:20.881072 - 0_dmesg
183 14:49:20.881418 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 14:49:20.881712 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 14:49:20.905116 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 14:49:20.905476 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 14:49:20.905739 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 14:49:20.906002 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 14:49:20.906261 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 14:49:21.873534 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 14:49:21.874015 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 14:49:21.874285 extracting modules file /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk
193 14:49:23.181698 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 14:49:23.182201 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 14:49:23.182494 [common] Applying overlay /var/lib/lava/dispatcher/tmp/940371/compress-overlay-gpvh445w/overlay-1.5.2.5.tar.gz to ramdisk
196 14:49:23.182726 [common] Applying overlay /var/lib/lava/dispatcher/tmp/940371/compress-overlay-gpvh445w/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk
197 14:49:23.213386 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 14:49:23.213844 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 14:49:23.214112 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 14:49:23.214340 Converting downloaded kernel to a uImage
201 14:49:23.214648 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/kernel/Image /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/kernel/uImage
202 14:49:23.677893 output: Image Name:
203 14:49:23.678319 output: Created: Tue Nov 5 14:49:23 2024
204 14:49:23.678529 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 14:49:23.678736 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 14:49:23.678936 output: Load Address: 01080000
207 14:49:23.679134 output: Entry Point: 01080000
208 14:49:23.679330 output:
209 14:49:23.679661 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 14:49:23.679927 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 14:49:23.680250 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 14:49:23.680507 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 14:49:23.680766 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 14:49:23.681020 Building ramdisk /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk
215 14:49:26.018278 >> 181557 blocks
216 14:49:34.831797 Adding RAMdisk u-boot header.
217 14:49:34.832272 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk.cpio.gz.uboot
218 14:49:35.119055 output: Image Name:
219 14:49:35.119489 output: Created: Tue Nov 5 14:49:34 2024
220 14:49:35.119719 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 14:49:35.119939 output: Data Size: 26056295 Bytes = 25445.60 KiB = 24.85 MiB
222 14:49:35.120196 output: Load Address: 00000000
223 14:49:35.120409 output: Entry Point: 00000000
224 14:49:35.120613 output:
225 14:49:35.121268 rename /var/lib/lava/dispatcher/tmp/940371/extract-overlay-ramdisk-5fkazbyu/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
226 14:49:35.121704 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 14:49:35.122011 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 14:49:35.122338 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 14:49:35.122595 No LXC device requested
230 14:49:35.122865 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 14:49:35.123135 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 14:49:35.123394 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 14:49:35.123614 Checking files for TFTP limit of 4294967296 bytes.
234 14:49:35.125173 end: 1 tftp-deploy (duration 00:00:17) [common]
235 14:49:35.125507 start: 2 uboot-action (timeout 00:05:00) [common]
236 14:49:35.125796 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 14:49:35.126065 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 14:49:35.126342 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 14:49:35.126641 Using kernel file from prepare-kernel: 940371/tftp-deploy-j3f241j1/kernel/uImage
240 14:49:35.126968 substitutions:
241 14:49:35.127189 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 14:49:35.127402 - {DTB_ADDR}: 0x01070000
243 14:49:35.127606 - {DTB}: 940371/tftp-deploy-j3f241j1/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 14:49:35.127818 - {INITRD}: 940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
245 14:49:35.128042 - {KERNEL_ADDR}: 0x01080000
246 14:49:35.128247 - {KERNEL}: 940371/tftp-deploy-j3f241j1/kernel/uImage
247 14:49:35.128451 - {LAVA_MAC}: None
248 14:49:35.128678 - {PRESEED_CONFIG}: None
249 14:49:35.128890 - {PRESEED_LOCAL}: None
250 14:49:35.129095 - {RAMDISK_ADDR}: 0x08000000
251 14:49:35.129293 - {RAMDISK}: 940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
252 14:49:35.129495 - {ROOT_PART}: None
253 14:49:35.129699 - {ROOT}: None
254 14:49:35.129902 - {SERVER_IP}: 192.168.6.2
255 14:49:35.130103 - {TEE_ADDR}: 0x83000000
256 14:49:35.130303 - {TEE}: None
257 14:49:35.130504 Parsed boot commands:
258 14:49:35.130698 - setenv autoload no
259 14:49:35.130900 - setenv initrd_high 0xffffffff
260 14:49:35.131101 - setenv fdt_high 0xffffffff
261 14:49:35.131298 - dhcp
262 14:49:35.131498 - setenv serverip 192.168.6.2
263 14:49:35.131698 - tftpboot 0x01080000 940371/tftp-deploy-j3f241j1/kernel/uImage
264 14:49:35.131899 - tftpboot 0x08000000 940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
265 14:49:35.132119 - tftpboot 0x01070000 940371/tftp-deploy-j3f241j1/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 14:49:35.132321 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 14:49:35.132527 - bootm 0x01080000 0x08000000 0x01070000
268 14:49:35.132790 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 14:49:35.133576 start: 2.3 connect-device (timeout 00:05:00) [common]
271 14:49:35.133826 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 14:49:35.146692 Setting prompt string to ['lava-test: # ']
273 14:49:35.147666 end: 2.3 connect-device (duration 00:00:00) [common]
274 14:49:35.148058 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 14:49:35.148384 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 14:49:35.148684 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 14:49:35.149325 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 14:49:35.179521 >> OK - accepted request
279 14:49:35.181584 Returned 0 in 0 seconds
280 14:49:35.282714 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 14:49:35.284464 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 14:49:35.285025 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 14:49:35.285532 Setting prompt string to ['Hit any key to stop autoboot']
285 14:49:35.285981 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 14:49:35.287562 Trying 192.168.56.21...
287 14:49:35.288063 Connected to conserv1.
288 14:49:35.288480 Escape character is '^]'.
289 14:49:35.288884
290 14:49:35.289308 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 14:49:35.289740
292 14:49:43.058808 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 14:49:43.059473 bl2_stage_init 0x01
294 14:49:43.059923 bl2_stage_init 0x81
295 14:49:43.064342 hw id: 0x0000 - pwm id 0x01
296 14:49:43.064872 bl2_stage_init 0xc1
297 14:49:43.068659 bl2_stage_init 0x02
298 14:49:43.069159
299 14:49:43.069601 L0:00000000
300 14:49:43.070022 L1:00000703
301 14:49:43.070428 L2:00008067
302 14:49:43.074227 L3:15000000
303 14:49:43.074731 S1:00000000
304 14:49:43.075140 B2:20282000
305 14:49:43.075529 B1:a0f83180
306 14:49:43.075913
307 14:49:43.076346 TE: 72149
308 14:49:43.076737
309 14:49:43.085394 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 14:49:43.085889
311 14:49:43.086295 Board ID = 1
312 14:49:43.086690 Set cpu clk to 24M
313 14:49:43.087082 Set clk81 to 24M
314 14:49:43.088808 Use GP1_pll as DSU clk.
315 14:49:43.094348 DSU clk: 1200 Mhz
316 14:49:43.094655 CPU clk: 1200 MHz
317 14:49:43.094946 Set clk81 to 166.6M
318 14:49:43.100009 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 14:49:43.105551 board id: 1
320 14:49:43.108854 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 14:49:43.121544 fw parse done
322 14:49:43.127444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 14:49:43.170770 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 14:49:43.181935 PIEI prepare done
325 14:49:43.182286 fastboot data load
326 14:49:43.182559 fastboot data verify
327 14:49:43.187343 verify result: 266
328 14:49:43.192921 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 14:49:43.193221 LPDDR4 probe
330 14:49:43.193435 ddr clk to 1584MHz
331 14:49:43.200924 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 14:49:43.238875
333 14:49:43.239284 dmc_version 0001
334 14:49:43.245766 Check phy result
335 14:49:43.251702 INFO : End of CA training
336 14:49:43.252020 INFO : End of initialization
337 14:49:43.257279 INFO : Training has run successfully!
338 14:49:43.257572 Check phy result
339 14:49:43.262893 INFO : End of initialization
340 14:49:43.263206 INFO : End of read enable training
341 14:49:43.268523 INFO : End of fine write leveling
342 14:49:43.274120 INFO : End of Write leveling coarse delay
343 14:49:43.274449 INFO : Training has run successfully!
344 14:49:43.274662 Check phy result
345 14:49:43.279739 INFO : End of initialization
346 14:49:43.280066 INFO : End of read dq deskew training
347 14:49:43.285333 INFO : End of MPR read delay center optimization
348 14:49:43.290984 INFO : End of write delay center optimization
349 14:49:43.296475 INFO : End of read delay center optimization
350 14:49:43.296807 INFO : End of max read latency training
351 14:49:43.302101 INFO : Training has run successfully!
352 14:49:43.302413 1D training succeed
353 14:49:43.311248 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 14:49:43.359761 Check phy result
355 14:49:43.360436 INFO : End of initialization
356 14:49:43.386241 INFO : End of 2D read delay Voltage center optimization
357 14:49:43.410551 INFO : End of 2D read delay Voltage center optimization
358 14:49:43.467052 INFO : End of 2D write delay Voltage center optimization
359 14:49:43.521159 INFO : End of 2D write delay Voltage center optimization
360 14:49:43.526500 INFO : Training has run successfully!
361 14:49:43.526952
362 14:49:43.527356 channel==0
363 14:49:43.532101 RxClkDly_Margin_A0==78 ps 8
364 14:49:43.532526 TxDqDly_Margin_A0==98 ps 10
365 14:49:43.537727 RxClkDly_Margin_A1==78 ps 8
366 14:49:43.538144 TxDqDly_Margin_A1==88 ps 9
367 14:49:43.538542 TrainedVREFDQ_A0==74
368 14:49:43.543283 TrainedVREFDQ_A1==74
369 14:49:43.543711 VrefDac_Margin_A0==24
370 14:49:43.544146 DeviceVref_Margin_A0==40
371 14:49:43.548955 VrefDac_Margin_A1==22
372 14:49:43.549374 DeviceVref_Margin_A1==40
373 14:49:43.549768
374 14:49:43.550231
375 14:49:43.550643 channel==1
376 14:49:43.554658 RxClkDly_Margin_A0==88 ps 9
377 14:49:43.555127 TxDqDly_Margin_A0==98 ps 10
378 14:49:43.560231 RxClkDly_Margin_A1==88 ps 9
379 14:49:43.560724 TxDqDly_Margin_A1==98 ps 10
380 14:49:43.565778 TrainedVREFDQ_A0==78
381 14:49:43.566268 TrainedVREFDQ_A1==78
382 14:49:43.566673 VrefDac_Margin_A0==21
383 14:49:43.571374 DeviceVref_Margin_A0==36
384 14:49:43.572064 VrefDac_Margin_A1==22
385 14:49:43.576977 DeviceVref_Margin_A1==36
386 14:49:43.577459
387 14:49:43.577941 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 14:49:43.578449
389 14:49:43.610518 soc_vref_reg_value 0x 00000019 00000017 00000018 00000016 00000018 00000014 00000017 00000015 00000017 00000017 00000016 00000017 00000016 00000017 00000017 00000018 00000018 00000017 00000018 00000014 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
390 14:49:43.611120 2D training succeed
391 14:49:43.616124 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 14:49:43.621748 auto size-- 65535DDR cs0 size: 2048MB
393 14:49:43.622173 DDR cs1 size: 2048MB
394 14:49:43.627315 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 14:49:43.627732 cs0 DataBus test pass
396 14:49:43.632940 cs1 DataBus test pass
397 14:49:43.633369 cs0 AddrBus test pass
398 14:49:43.633758 cs1 AddrBus test pass
399 14:49:43.634147
400 14:49:43.638516 100bdlr_step_size ps== 478
401 14:49:43.638950 result report
402 14:49:43.644172 boot times 0Enable ddr reg access
403 14:49:43.649396 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 14:49:43.663356 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 14:49:44.322726 bl2z: ptr: 05129330, size: 00001e40
406 14:49:44.330863 0.0;M3 CHK:0;cm4_sp_mode 0
407 14:49:44.331338 MVN_1=0x00000000
408 14:49:44.331740 MVN_2=0x00000000
409 14:49:44.342344 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 14:49:44.342793 OPS=0x04
411 14:49:44.343193 ring efuse init
412 14:49:44.345233 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 14:49:44.351565 [0.017355 Inits done]
414 14:49:44.352011 secure task start!
415 14:49:44.352412 high task start!
416 14:49:44.352803 low task start!
417 14:49:44.355924 run into bl31
418 14:49:44.364488 NOTICE: BL31: v1.3(release):4fc40b1
419 14:49:44.372305 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 14:49:44.372733 NOTICE: BL31: G12A normal boot!
421 14:49:44.387975 NOTICE: BL31: BL33 decompress pass
422 14:49:44.393572 ERROR: Error initializing runtime service opteed_fast
423 14:49:47.108539 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 14:49:47.109168 bl2_stage_init 0x01
425 14:49:47.109574 bl2_stage_init 0x81
426 14:49:47.114183 hw id: 0x0000 - pwm id 0x01
427 14:49:47.114640 bl2_stage_init 0xc1
428 14:49:47.118604 bl2_stage_init 0x02
429 14:49:47.119033
430 14:49:47.119429 L0:00000000
431 14:49:47.119816 L1:00000703
432 14:49:47.120246 L2:00008067
433 14:49:47.124188 L3:15000000
434 14:49:47.124605 S1:00000000
435 14:49:47.124997 B2:20282000
436 14:49:47.125384 B1:a0f83180
437 14:49:47.125768
438 14:49:47.126151 TE: 70715
439 14:49:47.126536
440 14:49:47.135369 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 14:49:47.135788
442 14:49:47.136209 Board ID = 1
443 14:49:47.136594 Set cpu clk to 24M
444 14:49:47.136977 Set clk81 to 24M
445 14:49:47.138825 Use GP1_pll as DSU clk.
446 14:49:47.144443 DSU clk: 1200 Mhz
447 14:49:47.144852 CPU clk: 1200 MHz
448 14:49:47.145237 Set clk81 to 166.6M
449 14:49:47.149952 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 14:49:47.155578 board id: 1
451 14:49:47.159602 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 14:49:47.171514 fw parse done
453 14:49:47.177501 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 14:49:47.220491 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 14:49:47.231546 PIEI prepare done
456 14:49:47.231974 fastboot data load
457 14:49:47.232410 fastboot data verify
458 14:49:47.237150 verify result: 266
459 14:49:47.242755 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 14:49:47.243174 LPDDR4 probe
461 14:49:47.243563 ddr clk to 1584MHz
462 14:49:47.250732 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 14:49:47.289290
464 14:49:47.289726 dmc_version 0001
465 14:49:47.295554 Check phy result
466 14:49:47.301522 INFO : End of CA training
467 14:49:47.301947 INFO : End of initialization
468 14:49:47.307092 INFO : Training has run successfully!
469 14:49:47.307505 Check phy result
470 14:49:47.312692 INFO : End of initialization
471 14:49:47.313111 INFO : End of read enable training
472 14:49:47.318386 INFO : End of fine write leveling
473 14:49:47.323868 INFO : End of Write leveling coarse delay
474 14:49:47.324308 INFO : Training has run successfully!
475 14:49:47.324699 Check phy result
476 14:49:47.329496 INFO : End of initialization
477 14:49:47.329912 INFO : End of read dq deskew training
478 14:49:47.335065 INFO : End of MPR read delay center optimization
479 14:49:47.340749 INFO : End of write delay center optimization
480 14:49:47.346389 INFO : End of read delay center optimization
481 14:49:47.346801 INFO : End of max read latency training
482 14:49:47.351887 INFO : Training has run successfully!
483 14:49:47.352347 1D training succeed
484 14:49:47.361105 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 14:49:47.409360 Check phy result
486 14:49:47.409793 INFO : End of initialization
487 14:49:47.436761 INFO : End of 2D read delay Voltage center optimization
488 14:49:47.460932 INFO : End of 2D read delay Voltage center optimization
489 14:49:47.517629 INFO : End of 2D write delay Voltage center optimization
490 14:49:47.571637 INFO : End of 2D write delay Voltage center optimization
491 14:49:47.577196 INFO : Training has run successfully!
492 14:49:47.577617
493 14:49:47.578009 channel==0
494 14:49:47.582791 RxClkDly_Margin_A0==88 ps 9
495 14:49:47.583204 TxDqDly_Margin_A0==98 ps 10
496 14:49:47.588414 RxClkDly_Margin_A1==69 ps 7
497 14:49:47.588817 TxDqDly_Margin_A1==88 ps 9
498 14:49:47.589210 TrainedVREFDQ_A0==74
499 14:49:47.593979 TrainedVREFDQ_A1==74
500 14:49:47.594412 VrefDac_Margin_A0==24
501 14:49:47.594804 DeviceVref_Margin_A0==40
502 14:49:47.599562 VrefDac_Margin_A1==23
503 14:49:47.600022 DeviceVref_Margin_A1==40
504 14:49:47.600426
505 14:49:47.600813
506 14:49:47.601199 channel==1
507 14:49:47.605185 RxClkDly_Margin_A0==78 ps 8
508 14:49:47.605600 TxDqDly_Margin_A0==98 ps 10
509 14:49:47.610747 RxClkDly_Margin_A1==88 ps 9
510 14:49:47.611165 TxDqDly_Margin_A1==88 ps 9
511 14:49:47.616426 TrainedVREFDQ_A0==78
512 14:49:47.616837 TrainedVREFDQ_A1==77
513 14:49:47.617231 VrefDac_Margin_A0==22
514 14:49:47.621976 DeviceVref_Margin_A0==36
515 14:49:47.622386 VrefDac_Margin_A1==22
516 14:49:47.627584 DeviceVref_Margin_A1==37
517 14:49:47.628016
518 14:49:47.628410 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 14:49:47.628802
520 14:49:47.661201 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
521 14:49:47.661657 2D training succeed
522 14:49:47.666751 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 14:49:47.672431 auto size-- 65535DDR cs0 size: 2048MB
524 14:49:47.672847 DDR cs1 size: 2048MB
525 14:49:47.677988 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 14:49:47.678397 cs0 DataBus test pass
527 14:49:47.683573 cs1 DataBus test pass
528 14:49:47.684014 cs0 AddrBus test pass
529 14:49:47.684408 cs1 AddrBus test pass
530 14:49:47.684795
531 14:49:47.689193 100bdlr_step_size ps== 471
532 14:49:47.689616 result report
533 14:49:47.694782 boot times 0Enable ddr reg access
534 14:49:47.699948 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 14:49:47.713046 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 14:49:48.373002 bl2z: ptr: 05129330, size: 00001e40
537 14:49:48.381086 0.0;M3 CHK:0;cm4_sp_mode 0
538 14:49:48.381541 MVN_1=0x00000000
539 14:49:48.381941 MVN_2=0x00000000
540 14:49:48.392583 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 14:49:48.393022 OPS=0x04
542 14:49:48.393425 ring efuse init
543 14:49:48.395561 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 14:49:48.401158 [0.017354 Inits done]
545 14:49:48.401584 secure task start!
546 14:49:48.401980 high task start!
547 14:49:48.402369 low task start!
548 14:49:48.405478 run into bl31
549 14:49:48.414063 NOTICE: BL31: v1.3(release):4fc40b1
550 14:49:48.421870 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 14:49:48.422299 NOTICE: BL31: G12A normal boot!
552 14:49:48.437413 NOTICE: BL31: BL33 decompress pass
553 14:49:48.443076 ERROR: Error initializing runtime service opteed_fast
554 14:49:49.805320 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 14:49:49.805921 bl2_stage_init 0x01
556 14:49:49.806328 bl2_stage_init 0x81
557 14:49:49.810869 hw id: 0x0000 - pwm id 0x01
558 14:49:49.811299 bl2_stage_init 0xc1
559 14:49:49.816485 bl2_stage_init 0x02
560 14:49:49.816908
561 14:49:49.817304 L0:00000000
562 14:49:49.817692 L1:00000703
563 14:49:49.818078 L2:00008067
564 14:49:49.818464 L3:15000000
565 14:49:49.822070 S1:00000000
566 14:49:49.822494 B2:20282000
567 14:49:49.822882 B1:a0f83180
568 14:49:49.823269
569 14:49:49.823661 TE: 68303
570 14:49:49.824078
571 14:49:49.827729 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 14:49:49.828182
573 14:49:49.833259 Board ID = 1
574 14:49:49.833676 Set cpu clk to 24M
575 14:49:49.834065 Set clk81 to 24M
576 14:49:49.838866 Use GP1_pll as DSU clk.
577 14:49:49.839282 DSU clk: 1200 Mhz
578 14:49:49.839672 CPU clk: 1200 MHz
579 14:49:49.844473 Set clk81 to 166.6M
580 14:49:49.850073 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 14:49:49.850491 board id: 1
582 14:49:49.857258 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 14:49:49.867919 fw parse done
584 14:49:49.873882 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 14:49:49.916521 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 14:49:49.927399 PIEI prepare done
587 14:49:49.927834 fastboot data load
588 14:49:49.928279 fastboot data verify
589 14:49:49.933023 verify result: 266
590 14:49:49.938625 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 14:49:49.939043 LPDDR4 probe
592 14:49:49.939430 ddr clk to 1584MHz
593 14:49:49.946612 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 14:49:49.983838
595 14:49:49.984290 dmc_version 0001
596 14:49:49.990533 Check phy result
597 14:49:49.996457 INFO : End of CA training
598 14:49:49.996871 INFO : End of initialization
599 14:49:50.002053 INFO : Training has run successfully!
600 14:49:50.002478 Check phy result
601 14:49:50.007729 INFO : End of initialization
602 14:49:50.008168 INFO : End of read enable training
603 14:49:50.013265 INFO : End of fine write leveling
604 14:49:50.018850 INFO : End of Write leveling coarse delay
605 14:49:50.019264 INFO : Training has run successfully!
606 14:49:50.019656 Check phy result
607 14:49:50.024459 INFO : End of initialization
608 14:49:50.024874 INFO : End of read dq deskew training
609 14:49:50.030042 INFO : End of MPR read delay center optimization
610 14:49:50.035772 INFO : End of write delay center optimization
611 14:49:50.041256 INFO : End of read delay center optimization
612 14:49:50.041670 INFO : End of max read latency training
613 14:49:50.046847 INFO : Training has run successfully!
614 14:49:50.047258 1D training succeed
615 14:49:50.056053 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 14:49:50.103644 Check phy result
617 14:49:50.104119 INFO : End of initialization
618 14:49:50.125140 INFO : End of 2D read delay Voltage center optimization
619 14:49:50.145150 INFO : End of 2D read delay Voltage center optimization
620 14:49:50.197049 INFO : End of 2D write delay Voltage center optimization
621 14:49:50.246244 INFO : End of 2D write delay Voltage center optimization
622 14:49:50.251801 INFO : Training has run successfully!
623 14:49:50.252278
624 14:49:50.252676 channel==0
625 14:49:50.257388 RxClkDly_Margin_A0==88 ps 9
626 14:49:50.257816 TxDqDly_Margin_A0==88 ps 9
627 14:49:50.262990 RxClkDly_Margin_A1==78 ps 8
628 14:49:50.263406 TxDqDly_Margin_A1==98 ps 10
629 14:49:50.263803 TrainedVREFDQ_A0==74
630 14:49:50.268601 TrainedVREFDQ_A1==74
631 14:49:50.269054 VrefDac_Margin_A0==24
632 14:49:50.269451 DeviceVref_Margin_A0==40
633 14:49:50.274224 VrefDac_Margin_A1==23
634 14:49:50.274645 DeviceVref_Margin_A1==40
635 14:49:50.275031
636 14:49:50.275419
637 14:49:50.275802 channel==1
638 14:49:50.279798 RxClkDly_Margin_A0==78 ps 8
639 14:49:50.280250 TxDqDly_Margin_A0==98 ps 10
640 14:49:50.285363 RxClkDly_Margin_A1==78 ps 8
641 14:49:50.285779 TxDqDly_Margin_A1==88 ps 9
642 14:49:50.290995 TrainedVREFDQ_A0==78
643 14:49:50.291415 TrainedVREFDQ_A1==77
644 14:49:50.291804 VrefDac_Margin_A0==22
645 14:49:50.296619 DeviceVref_Margin_A0==36
646 14:49:50.297042 VrefDac_Margin_A1==22
647 14:49:50.302194 DeviceVref_Margin_A1==37
648 14:49:50.302624
649 14:49:50.303015 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 14:49:50.303401
651 14:49:50.335830 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
652 14:49:50.336345 2D training succeed
653 14:49:50.341472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 14:49:50.346992 auto size-- 65535DDR cs0 size: 2048MB
655 14:49:50.347412 DDR cs1 size: 2048MB
656 14:49:50.352592 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 14:49:50.353010 cs0 DataBus test pass
658 14:49:50.358198 cs1 DataBus test pass
659 14:49:50.358612 cs0 AddrBus test pass
660 14:49:50.359002 cs1 AddrBus test pass
661 14:49:50.359386
662 14:49:50.363803 100bdlr_step_size ps== 478
663 14:49:50.364270 result report
664 14:49:50.369387 boot times 0Enable ddr reg access
665 14:49:50.374574 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 14:49:50.388415 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 14:49:51.044317 bl2z: ptr: 05129330, size: 00001e40
668 14:49:51.049801 0.0;M3 CHK:0;cm4_sp_mode 0
669 14:49:51.050265 MVN_1=0x00000000
670 14:49:51.050676 MVN_2=0x00000000
671 14:49:51.055398 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 14:49:51.055839 OPS=0x04
673 14:49:51.061295 ring efuse init
674 14:49:51.066911 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 14:49:51.067350 [0.017319 Inits done]
676 14:49:51.067755 secure task start!
677 14:49:51.073596 high task start!
678 14:49:51.074025 low task start!
679 14:49:51.074427 run into bl31
680 14:49:51.082194 NOTICE: BL31: v1.3(release):4fc40b1
681 14:49:51.090026 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 14:49:51.090467 NOTICE: BL31: G12A normal boot!
683 14:49:51.105509 NOTICE: BL31: BL33 decompress pass
684 14:49:51.111217 ERROR: Error initializing runtime service opteed_fast
685 14:49:51.906747
686 14:49:51.907394
687 14:49:51.912083 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 14:49:51.912697
689 14:49:51.915471 Model: Libre Computer AML-S905D3-CC Solitude
690 14:49:52.062577 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 14:49:52.077875 DRAM: 2 GiB (effective 3.8 GiB)
692 14:49:52.178961 Core: 406 devices, 33 uclasses, devicetree: separate
693 14:49:52.184724 WDT: Not starting watchdog@f0d0
694 14:49:52.209966 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 14:49:52.222256 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 14:49:52.227222 ** Bad device specification mmc 0 **
697 14:49:52.237235 Card did not respond to voltage select! : -110
698 14:49:52.244851 ** Bad device specification mmc 0 **
699 14:49:52.245289 Couldn't find partition mmc 0
700 14:49:52.253261 Card did not respond to voltage select! : -110
701 14:49:52.258683 ** Bad device specification mmc 0 **
702 14:49:52.259118 Couldn't find partition mmc 0
703 14:49:52.263777 Error: could not access storage.
704 14:49:52.560249 Net: eth0: ethernet@ff3f0000
705 14:49:52.560855 starting USB...
706 14:49:52.804807 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 14:49:52.805332 Starting the controller
708 14:49:52.811868 USB XHCI 1.10
709 14:49:54.368596 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 14:49:54.377009 scanning usb for storage devices... 0 Storage Device(s) found
712 14:49:54.428672 Hit any key to stop autoboot: 1
713 14:49:54.429632 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 14:49:54.430220 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 14:49:54.430697 Setting prompt string to ['=>']
716 14:49:54.431178 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 14:49:54.442884 0
718 14:49:54.443817 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 14:49:54.545168 => setenv autoload no
721 14:49:54.545970 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 14:49:54.550791 setenv autoload no
724 14:49:54.654650 => setenv initrd_high 0xffffffff
725 14:49:54.655459 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
726 14:49:54.660349 setenv initrd_high 0xffffffff
728 14:49:54.762007 => setenv fdt_high 0xffffffff
729 14:49:54.762784 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
730 14:49:54.769002 setenv fdt_high 0xffffffff
732 14:49:54.870561 => dhcp
733 14:49:54.871228 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
734 14:49:54.875625 dhcp
735 14:49:55.681285 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 14:49:55.681932 Speed: 1000, full duplex
737 14:49:55.682387 BOOTP broadcast 1
738 14:49:55.689737 DHCP client bound to address 192.168.6.21 (7 ms)
740 14:49:55.791234 => setenv serverip 192.168.6.2
741 14:49:55.791934 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
742 14:49:55.796566 setenv serverip 192.168.6.2
744 14:49:55.898054 => tftpboot 0x01080000 940371/tftp-deploy-j3f241j1/kernel/uImage
745 14:49:55.898705 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
746 14:49:55.905345 tftpboot 0x01080000 940371/tftp-deploy-j3f241j1/kernel/uImage
747 14:49:55.905856 Speed: 1000, full duplex
748 14:49:55.906301 Using ethernet@ff3f0000 device
749 14:49:55.910921 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 14:49:55.916300 Filename '940371/tftp-deploy-j3f241j1/kernel/uImage'.
751 14:49:55.920266 Load address: 0x1080000
752 14:49:58.873915 Loading: *################################################## 43.6 MiB
753 14:49:58.874604 14.7 MiB/s
754 14:49:58.875055 done
755 14:49:58.878470 Bytes transferred = 45713984 (2b98a40 hex)
757 14:49:58.980218 => tftpboot 0x08000000 940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
758 14:49:58.981027 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
759 14:49:58.987890 tftpboot 0x08000000 940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot
760 14:49:58.988478 Speed: 1000, full duplex
761 14:49:58.988920 Using ethernet@ff3f0000 device
762 14:49:58.993402 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
763 14:49:59.002119 Filename '940371/tftp-deploy-j3f241j1/ramdisk/ramdisk.cpio.gz.uboot'.
764 14:49:59.002557 Load address: 0x8000000
765 14:50:00.584241 Loading: *################################################# UDP wrong checksum 00000005 00009a15
766 14:50:05.585594 T UDP wrong checksum 00000005 00009a15
767 14:50:15.587529 T T UDP wrong checksum 00000005 00009a15
768 14:50:35.591775 T T T T UDP wrong checksum 00000005 00009a15
769 14:50:55.596818 T T T
770 14:50:55.597492 Retry count exceeded; starting again
772 14:50:55.598958 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
775 14:50:55.601048 end: 2.4 uboot-commands (duration 00:01:20) [common]
777 14:50:55.602489 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
779 14:50:55.603588 end: 2 uboot-action (duration 00:01:20) [common]
781 14:50:55.605264 Cleaning after the job
782 14:50:55.605857 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/ramdisk
783 14:50:55.607277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/kernel
784 14:50:55.655297 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/dtb
785 14:50:55.656146 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/940371/tftp-deploy-j3f241j1/modules
786 14:50:55.674976 start: 4.1 power-off (timeout 00:00:30) [common]
787 14:50:55.675617 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
788 14:50:55.708987 >> OK - accepted request
789 14:50:55.710685 Returned 0 in 0 seconds
790 14:50:55.811424 end: 4.1 power-off (duration 00:00:00) [common]
792 14:50:55.812400 start: 4.2 read-feedback (timeout 00:10:00) [common]
793 14:50:55.813060 Listened to connection for namespace 'common' for up to 1s
794 14:50:56.814069 Finalising connection for namespace 'common'
795 14:50:56.814850 Disconnecting from shell: Finalise
796 14:50:56.815407 =>
797 14:50:56.916464 end: 4.2 read-feedback (duration 00:00:01) [common]
798 14:50:56.917112 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/940371
799 14:50:57.198219 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/940371
800 14:50:57.198830 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.