Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:05:24.945476 lava-dispatcher, installed at version: 2024.01
2 02:05:24.946273 start: 0 validate
3 02:05:24.946736 Start time: 2024-11-07 02:05:24.946706+00:00 (UTC)
4 02:05:24.947270 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:05:24.947808 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:05:24.986049 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:05:24.986617 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:05:25.017950 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:05:25.018568 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:05:25.054150 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:05:25.054929 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:05:25.086926 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:05:25.087409 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:05:25.126145 validate duration: 0.18
16 02:05:25.126971 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:05:25.127298 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:05:25.127615 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:05:25.128207 Not decompressing ramdisk as can be used compressed.
20 02:05:25.128674 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:05:25.128956 saving as /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/ramdisk/initrd.cpio.gz
22 02:05:25.129227 total size: 5628169 (5 MB)
23 02:05:25.163666 progress 0 % (0 MB)
24 02:05:25.171323 progress 5 % (0 MB)
25 02:05:25.179204 progress 10 % (0 MB)
26 02:05:25.186065 progress 15 % (0 MB)
27 02:05:25.191004 progress 20 % (1 MB)
28 02:05:25.194533 progress 25 % (1 MB)
29 02:05:25.198429 progress 30 % (1 MB)
30 02:05:25.202362 progress 35 % (1 MB)
31 02:05:25.205844 progress 40 % (2 MB)
32 02:05:25.209762 progress 45 % (2 MB)
33 02:05:25.213296 progress 50 % (2 MB)
34 02:05:25.217117 progress 55 % (2 MB)
35 02:05:25.221010 progress 60 % (3 MB)
36 02:05:25.224479 progress 65 % (3 MB)
37 02:05:25.228410 progress 70 % (3 MB)
38 02:05:25.231861 progress 75 % (4 MB)
39 02:05:25.235732 progress 80 % (4 MB)
40 02:05:25.239247 progress 85 % (4 MB)
41 02:05:25.243122 progress 90 % (4 MB)
42 02:05:25.246733 progress 95 % (5 MB)
43 02:05:25.249953 progress 100 % (5 MB)
44 02:05:25.250582 5 MB downloaded in 0.12 s (44.24 MB/s)
45 02:05:25.251115 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:05:25.252024 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:05:25.252320 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:05:25.252591 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:05:25.253057 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/kernel/Image
51 02:05:25.253296 saving as /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/kernel/Image
52 02:05:25.253504 total size: 45713920 (43 MB)
53 02:05:25.253712 No compression specified
54 02:05:25.289079 progress 0 % (0 MB)
55 02:05:25.317662 progress 5 % (2 MB)
56 02:05:25.346582 progress 10 % (4 MB)
57 02:05:25.375283 progress 15 % (6 MB)
58 02:05:25.406305 progress 20 % (8 MB)
59 02:05:25.434780 progress 25 % (10 MB)
60 02:05:25.464133 progress 30 % (13 MB)
61 02:05:25.493092 progress 35 % (15 MB)
62 02:05:25.522122 progress 40 % (17 MB)
63 02:05:25.550711 progress 45 % (19 MB)
64 02:05:25.579507 progress 50 % (21 MB)
65 02:05:25.608253 progress 55 % (24 MB)
66 02:05:25.639135 progress 60 % (26 MB)
67 02:05:25.671105 progress 65 % (28 MB)
68 02:05:25.700506 progress 70 % (30 MB)
69 02:05:25.729862 progress 75 % (32 MB)
70 02:05:25.759645 progress 80 % (34 MB)
71 02:05:25.789027 progress 85 % (37 MB)
72 02:05:25.818489 progress 90 % (39 MB)
73 02:05:25.847723 progress 95 % (41 MB)
74 02:05:25.876205 progress 100 % (43 MB)
75 02:05:25.876754 43 MB downloaded in 0.62 s (69.95 MB/s)
76 02:05:25.877236 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:05:25.878053 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:05:25.878328 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:05:25.878593 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:05:25.879051 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:05:25.879330 saving as /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:05:25.879540 total size: 54703 (0 MB)
84 02:05:25.879749 No compression specified
85 02:05:25.920172 progress 59 % (0 MB)
86 02:05:25.921043 progress 100 % (0 MB)
87 02:05:25.921594 0 MB downloaded in 0.04 s (1.24 MB/s)
88 02:05:25.922062 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:05:25.922882 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:05:25.923147 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:05:25.923411 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:05:25.923871 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:05:25.924148 saving as /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/nfsrootfs/full.rootfs.tar
95 02:05:25.924355 total size: 120894716 (115 MB)
96 02:05:25.924566 Using unxz to decompress xz
97 02:05:25.963599 progress 0 % (0 MB)
98 02:05:26.778922 progress 5 % (5 MB)
99 02:05:27.622198 progress 10 % (11 MB)
100 02:05:28.423010 progress 15 % (17 MB)
101 02:05:29.159855 progress 20 % (23 MB)
102 02:05:29.759659 progress 25 % (28 MB)
103 02:05:30.594350 progress 30 % (34 MB)
104 02:05:31.407430 progress 35 % (40 MB)
105 02:05:31.760680 progress 40 % (46 MB)
106 02:05:32.136417 progress 45 % (51 MB)
107 02:05:32.868107 progress 50 % (57 MB)
108 02:05:33.763480 progress 55 % (63 MB)
109 02:05:34.553566 progress 60 % (69 MB)
110 02:05:35.311364 progress 65 % (74 MB)
111 02:05:36.093054 progress 70 % (80 MB)
112 02:05:36.992412 progress 75 % (86 MB)
113 02:05:37.904571 progress 80 % (92 MB)
114 02:05:38.681521 progress 85 % (98 MB)
115 02:05:39.531539 progress 90 % (103 MB)
116 02:05:40.309699 progress 95 % (109 MB)
117 02:05:41.143616 progress 100 % (115 MB)
118 02:05:41.156403 115 MB downloaded in 15.23 s (7.57 MB/s)
119 02:05:41.157249 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:05:41.158795 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:05:41.159297 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:05:41.159798 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:05:41.160612 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/modules.tar.xz
125 02:05:41.161057 saving as /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/modules/modules.tar
126 02:05:41.161451 total size: 11609296 (11 MB)
127 02:05:41.161855 Using unxz to decompress xz
128 02:05:41.209115 progress 0 % (0 MB)
129 02:05:41.275123 progress 5 % (0 MB)
130 02:05:41.349910 progress 10 % (1 MB)
131 02:05:41.446052 progress 15 % (1 MB)
132 02:05:41.542140 progress 20 % (2 MB)
133 02:05:41.621817 progress 25 % (2 MB)
134 02:05:41.698196 progress 30 % (3 MB)
135 02:05:41.776964 progress 35 % (3 MB)
136 02:05:41.849813 progress 40 % (4 MB)
137 02:05:41.926367 progress 45 % (5 MB)
138 02:05:42.012187 progress 50 % (5 MB)
139 02:05:42.090970 progress 55 % (6 MB)
140 02:05:42.178097 progress 60 % (6 MB)
141 02:05:42.262166 progress 65 % (7 MB)
142 02:05:42.343967 progress 70 % (7 MB)
143 02:05:42.422222 progress 75 % (8 MB)
144 02:05:42.507852 progress 80 % (8 MB)
145 02:05:42.588042 progress 85 % (9 MB)
146 02:05:42.666023 progress 90 % (9 MB)
147 02:05:42.743016 progress 95 % (10 MB)
148 02:05:42.819604 progress 100 % (11 MB)
149 02:05:42.830873 11 MB downloaded in 1.67 s (6.63 MB/s)
150 02:05:42.831438 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:05:42.832545 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:05:42.833066 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 02:05:42.833578 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 02:05:59.551483 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949909/extract-nfsrootfs-zc1uwi2l
156 02:05:59.552137 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:05:59.552441 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 02:05:59.553148 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o
159 02:05:59.553597 makedir: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin
160 02:05:59.553927 makedir: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/tests
161 02:05:59.554237 makedir: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/results
162 02:05:59.554576 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-add-keys
163 02:05:59.555131 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-add-sources
164 02:05:59.555655 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-background-process-start
165 02:05:59.556200 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-background-process-stop
166 02:05:59.556741 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-common-functions
167 02:05:59.557261 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-echo-ipv4
168 02:05:59.557795 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-install-packages
169 02:05:59.558268 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-installed-packages
170 02:05:59.558735 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-os-build
171 02:05:59.559211 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-probe-channel
172 02:05:59.559682 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-probe-ip
173 02:05:59.560196 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-target-ip
174 02:05:59.560684 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-target-mac
175 02:05:59.561193 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-target-storage
176 02:05:59.561742 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-case
177 02:05:59.562235 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-event
178 02:05:59.562705 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-feedback
179 02:05:59.563180 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-raise
180 02:05:59.563644 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-reference
181 02:05:59.564145 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-runner
182 02:05:59.564644 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-set
183 02:05:59.565141 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-test-shell
184 02:05:59.565625 Updating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-add-keys (debian)
185 02:05:59.566166 Updating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-add-sources (debian)
186 02:05:59.566678 Updating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-install-packages (debian)
187 02:05:59.567178 Updating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-installed-packages (debian)
188 02:05:59.567674 Updating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/bin/lava-os-build (debian)
189 02:05:59.568151 Creating /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/environment
190 02:05:59.568557 LAVA metadata
191 02:05:59.568823 - LAVA_JOB_ID=949909
192 02:05:59.569038 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:05:59.569419 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 02:05:59.570415 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:05:59.570742 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 02:05:59.570949 skipped lava-vland-overlay
197 02:05:59.571187 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:05:59.571440 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 02:05:59.571657 skipped lava-multinode-overlay
200 02:05:59.571901 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:05:59.572193 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 02:05:59.572452 Loading test definitions
203 02:05:59.572730 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 02:05:59.572950 Using /lava-949909 at stage 0
205 02:05:59.574055 uuid=949909_1.6.2.4.1 testdef=None
206 02:05:59.574362 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:05:59.574623 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 02:05:59.576202 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:05:59.576990 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 02:05:59.578902 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:05:59.579713 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 02:05:59.581544 runner path: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/0/tests/0_timesync-off test_uuid 949909_1.6.2.4.1
215 02:05:59.582109 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:05:59.582907 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 02:05:59.583131 Using /lava-949909 at stage 0
219 02:05:59.583480 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:05:59.583770 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/0/tests/1_kselftest-alsa'
221 02:06:03.337504 Running '/usr/bin/git checkout kernelci.org
222 02:06:03.631752 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 02:06:03.634476 uuid=949909_1.6.2.4.5 testdef=None
224 02:06:03.635144 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:06:03.636804 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 02:06:03.643098 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:06:03.644909 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 02:06:03.652903 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:06:03.654745 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 02:06:03.662593 runner path: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/0/tests/1_kselftest-alsa test_uuid 949909_1.6.2.4.5
234 02:06:03.663190 BOARD='meson-g12b-a311d-libretech-cc'
235 02:06:03.663656 BRANCH='broonie-spi'
236 02:06:03.664132 SKIPFILE='/dev/null'
237 02:06:03.664583 SKIP_INSTALL='True'
238 02:06:03.665021 TESTPROG_URL='http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:06:03.665508 TST_CASENAME=''
240 02:06:03.665954 TST_CMDFILES='alsa'
241 02:06:03.667083 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:06:03.668837 Creating lava-test-runner.conf files
244 02:06:03.669298 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949909/lava-overlay-qivfi36o/lava-949909/0 for stage 0
245 02:06:03.670026 - 0_timesync-off
246 02:06:03.670544 - 1_kselftest-alsa
247 02:06:03.671262 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:06:03.671870 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 02:06:27.192545 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 02:06:27.192998 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 02:06:27.193291 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:06:27.193599 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 02:06:27.193890 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 02:06:27.810105 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:06:27.810584 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 02:06:27.810854 extracting modules file /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949909/extract-nfsrootfs-zc1uwi2l
257 02:06:29.354206 extracting modules file /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk
258 02:06:30.884775 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:06:30.885268 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 02:06:30.885564 [common] Applying overlay to NFS
261 02:06:30.885798 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949909/compress-overlay-iijp3v3v/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949909/extract-nfsrootfs-zc1uwi2l
262 02:06:33.637547 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:06:33.638037 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 02:06:33.638345 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 02:06:33.638615 Converting downloaded kernel to a uImage
266 02:06:33.638951 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/kernel/Image /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/kernel/uImage
267 02:06:34.115740 output: Image Name:
268 02:06:34.116197 output: Created: Thu Nov 7 02:06:33 2024
269 02:06:34.116428 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:06:34.116644 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 02:06:34.116851 output: Load Address: 01080000
272 02:06:34.117057 output: Entry Point: 01080000
273 02:06:34.117261 output:
274 02:06:34.117600 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 02:06:34.117877 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 02:06:34.118158 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 02:06:34.118420 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:06:34.118689 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 02:06:34.118953 Building ramdisk /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk
280 02:06:36.261362 >> 166774 blocks
281 02:06:43.993779 Adding RAMdisk u-boot header.
282 02:06:43.994288 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk.cpio.gz.uboot
283 02:06:44.248097 output: Image Name:
284 02:06:44.248758 output: Created: Thu Nov 7 02:06:43 2024
285 02:06:44.249653 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:06:44.250066 output: Data Size: 23428547 Bytes = 22879.44 KiB = 22.34 MiB
287 02:06:44.250467 output: Load Address: 00000000
288 02:06:44.250865 output: Entry Point: 00000000
289 02:06:44.251266 output:
290 02:06:44.252423 rename /var/lib/lava/dispatcher/tmp/949909/extract-overlay-ramdisk-x3hap95v/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
291 02:06:44.253182 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:06:44.254114 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 02:06:44.254700 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 02:06:44.255149 No LXC device requested
295 02:06:44.255649 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:06:44.256212 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 02:06:44.256712 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:06:44.257121 Checking files for TFTP limit of 4294967296 bytes.
299 02:06:44.259821 end: 1 tftp-deploy (duration 00:01:19) [common]
300 02:06:44.260481 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:06:44.261016 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:06:44.261512 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:06:44.262016 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:06:44.262552 Using kernel file from prepare-kernel: 949909/tftp-deploy-5xy22w79/kernel/uImage
305 02:06:44.263184 substitutions:
306 02:06:44.263593 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:06:44.264022 - {DTB_ADDR}: 0x01070000
308 02:06:44.264467 - {DTB}: 949909/tftp-deploy-5xy22w79/dtb/meson-g12b-a311d-libretech-cc.dtb
309 02:06:44.264870 - {INITRD}: 949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
310 02:06:44.265270 - {KERNEL_ADDR}: 0x01080000
311 02:06:44.265661 - {KERNEL}: 949909/tftp-deploy-5xy22w79/kernel/uImage
312 02:06:44.266056 - {LAVA_MAC}: None
313 02:06:44.266489 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949909/extract-nfsrootfs-zc1uwi2l
314 02:06:44.266887 - {NFS_SERVER_IP}: 192.168.6.2
315 02:06:44.267272 - {PRESEED_CONFIG}: None
316 02:06:44.267661 - {PRESEED_LOCAL}: None
317 02:06:44.268076 - {RAMDISK_ADDR}: 0x08000000
318 02:06:44.268468 - {RAMDISK}: 949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
319 02:06:44.268859 - {ROOT_PART}: None
320 02:06:44.269246 - {ROOT}: None
321 02:06:44.269635 - {SERVER_IP}: 192.168.6.2
322 02:06:44.270024 - {TEE_ADDR}: 0x83000000
323 02:06:44.270406 - {TEE}: None
324 02:06:44.270789 Parsed boot commands:
325 02:06:44.271163 - setenv autoload no
326 02:06:44.271547 - setenv initrd_high 0xffffffff
327 02:06:44.271930 - setenv fdt_high 0xffffffff
328 02:06:44.272339 - dhcp
329 02:06:44.272722 - setenv serverip 192.168.6.2
330 02:06:44.273108 - tftpboot 0x01080000 949909/tftp-deploy-5xy22w79/kernel/uImage
331 02:06:44.273498 - tftpboot 0x08000000 949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
332 02:06:44.273889 - tftpboot 0x01070000 949909/tftp-deploy-5xy22w79/dtb/meson-g12b-a311d-libretech-cc.dtb
333 02:06:44.274276 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949909/extract-nfsrootfs-zc1uwi2l,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:06:44.274678 - bootm 0x01080000 0x08000000 0x01070000
335 02:06:44.275197 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:06:44.276729 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:06:44.277151 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 02:06:44.292727 Setting prompt string to ['lava-test: # ']
340 02:06:44.294417 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:06:44.295051 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:06:44.295642 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:06:44.296226 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:06:44.297388 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 02:06:44.334803 >> OK - accepted request
346 02:06:44.336997 Returned 0 in 0 seconds
347 02:06:44.438148 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:06:44.439818 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:06:44.440428 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:06:44.440945 Setting prompt string to ['Hit any key to stop autoboot']
352 02:06:44.441391 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:06:44.442974 Trying 192.168.56.21...
354 02:06:44.443454 Connected to conserv1.
355 02:06:44.443866 Escape character is '^]'.
356 02:06:44.444324
357 02:06:44.444751 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 02:06:44.445163
359 02:06:56.040031 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 02:06:56.040445 bl2_stage_init 0x01
361 02:06:56.040669 bl2_stage_init 0x81
362 02:06:56.045458 hw id: 0x0000 - pwm id 0x01
363 02:06:56.045749 bl2_stage_init 0xc1
364 02:06:56.045968 bl2_stage_init 0x02
365 02:06:56.046186
366 02:06:56.050976 L0:00000000
367 02:06:56.051260 L1:20000703
368 02:06:56.051481 L2:00008067
369 02:06:56.051695 L3:14000000
370 02:06:56.053884 B2:00402000
371 02:06:56.054144 B1:e0f83180
372 02:06:56.054364
373 02:06:56.054567 TE: 58124
374 02:06:56.054768
375 02:06:56.065037 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 02:06:56.065309
377 02:06:56.065519 Board ID = 1
378 02:06:56.065721 Set A53 clk to 24M
379 02:06:56.065920 Set A73 clk to 24M
380 02:06:56.070727 Set clk81 to 24M
381 02:06:56.070970 A53 clk: 1200 MHz
382 02:06:56.071174 A73 clk: 1200 MHz
383 02:06:56.076283 CLK81: 166.6M
384 02:06:56.076533 smccc: 00012a91
385 02:06:56.081816 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 02:06:56.082053 board id: 1
387 02:06:56.087394 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 02:06:56.100976 fw parse done
389 02:06:56.106913 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:06:56.149566 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 02:06:56.160486 PIEI prepare done
392 02:06:56.160737 fastboot data load
393 02:06:56.160940 fastboot data verify
394 02:06:56.166121 verify result: 266
395 02:06:56.171711 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 02:06:56.171960 LPDDR4 probe
397 02:06:56.172212 ddr clk to 1584MHz
398 02:06:56.179761 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 02:06:56.216943
400 02:06:56.217229 dmc_version 0001
401 02:06:56.223622 Check phy result
402 02:06:56.229474 INFO : End of CA training
403 02:06:56.229717 INFO : End of initialization
404 02:06:56.235083 INFO : Training has run successfully!
405 02:06:56.235324 Check phy result
406 02:06:56.240701 INFO : End of initialization
407 02:06:56.240968 INFO : End of read enable training
408 02:06:56.246294 INFO : End of fine write leveling
409 02:06:56.251880 INFO : End of Write leveling coarse delay
410 02:06:56.252146 INFO : Training has run successfully!
411 02:06:56.252355 Check phy result
412 02:06:56.257532 INFO : End of initialization
413 02:06:56.257779 INFO : End of read dq deskew training
414 02:06:56.263071 INFO : End of MPR read delay center optimization
415 02:06:56.268689 INFO : End of write delay center optimization
416 02:06:56.274276 INFO : End of read delay center optimization
417 02:06:56.274534 INFO : End of max read latency training
418 02:06:56.279878 INFO : Training has run successfully!
419 02:06:56.280167 1D training succeed
420 02:06:56.289097 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 02:06:56.336722 Check phy result
422 02:06:56.337006 INFO : End of initialization
423 02:06:56.358412 INFO : End of 2D read delay Voltage center optimization
424 02:06:56.378508 INFO : End of 2D read delay Voltage center optimization
425 02:06:56.430884 INFO : End of 2D write delay Voltage center optimization
426 02:06:56.480109 INFO : End of 2D write delay Voltage center optimization
427 02:06:56.485748 INFO : Training has run successfully!
428 02:06:56.486023
429 02:06:56.486239 channel==0
430 02:06:56.491256 RxClkDly_Margin_A0==88 ps 9
431 02:06:56.491510 TxDqDly_Margin_A0==98 ps 10
432 02:06:56.494590 RxClkDly_Margin_A1==88 ps 9
433 02:06:56.494838 TxDqDly_Margin_A1==98 ps 10
434 02:06:56.500216 TrainedVREFDQ_A0==74
435 02:06:56.500483 TrainedVREFDQ_A1==76
436 02:06:56.500698 VrefDac_Margin_A0==25
437 02:06:56.505794 DeviceVref_Margin_A0==40
438 02:06:56.506061 VrefDac_Margin_A1==25
439 02:06:56.511438 DeviceVref_Margin_A1==38
440 02:06:56.511750
441 02:06:56.511963
442 02:06:56.512220 channel==1
443 02:06:56.512429 RxClkDly_Margin_A0==98 ps 10
444 02:06:56.514761 TxDqDly_Margin_A0==98 ps 10
445 02:06:56.520354 RxClkDly_Margin_A1==88 ps 9
446 02:06:56.520653 TxDqDly_Margin_A1==88 ps 9
447 02:06:56.520870 TrainedVREFDQ_A0==77
448 02:06:56.525917 TrainedVREFDQ_A1==77
449 02:06:56.526206 VrefDac_Margin_A0==22
450 02:06:56.531621 DeviceVref_Margin_A0==37
451 02:06:56.531917 VrefDac_Margin_A1==24
452 02:06:56.532169 DeviceVref_Margin_A1==37
453 02:06:56.532381
454 02:06:56.537168 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 02:06:56.537468
456 02:06:56.570865 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 02:06:56.571304 2D training succeed
458 02:06:56.576250 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 02:06:56.581833 auto size-- 65535DDR cs0 size: 2048MB
460 02:06:56.582133 DDR cs1 size: 2048MB
461 02:06:56.587450 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 02:06:56.587740 cs0 DataBus test pass
463 02:06:56.587950 cs1 DataBus test pass
464 02:06:56.593101 cs0 AddrBus test pass
465 02:06:56.593590 cs1 AddrBus test pass
466 02:06:56.593997
467 02:06:56.598685 100bdlr_step_size ps== 420
468 02:06:56.599147 result report
469 02:06:56.599549 boot times 0Enable ddr reg access
470 02:06:56.608732 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 02:06:56.622126 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 02:06:57.195463 0.0;M3 CHK:0;cm4_sp_mode 0
473 02:06:57.196143 MVN_1=0x00000000
474 02:06:57.200867 MVN_2=0x00000000
475 02:06:57.206510 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 02:06:57.206955 OPS=0x10
477 02:06:57.207360 ring efuse init
478 02:06:57.207752 chipver efuse init
479 02:06:57.212122 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 02:06:57.217713 [0.018961 Inits done]
481 02:06:57.218150 secure task start!
482 02:06:57.218547 high task start!
483 02:06:57.222295 low task start!
484 02:06:57.222732 run into bl31
485 02:06:57.228978 NOTICE: BL31: v1.3(release):4fc40b1
486 02:06:57.236786 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 02:06:57.237224 NOTICE: BL31: G12A normal boot!
488 02:06:57.262719 NOTICE: BL31: BL33 decompress pass
489 02:06:57.268378 ERROR: Error initializing runtime service opteed_fast
490 02:06:58.501376
491 02:06:58.502003
492 02:06:58.509713 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 02:06:58.510200
494 02:06:58.510627 Model: Libre Computer AML-A311D-CC Alta
495 02:06:58.718205 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 02:06:58.741496 DRAM: 2 GiB (effective 3.8 GiB)
497 02:06:58.884472 Core: 408 devices, 31 uclasses, devicetree: separate
498 02:06:58.890350 WDT: Not starting watchdog@f0d0
499 02:06:58.922597 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 02:06:58.935077 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 02:06:58.940150 ** Bad device specification mmc 0 **
502 02:06:58.950471 Card did not respond to voltage select! : -110
503 02:06:58.958336 ** Bad device specification mmc 0 **
504 02:06:58.958898 Couldn't find partition mmc 0
505 02:06:58.966539 Card did not respond to voltage select! : -110
506 02:06:58.972103 ** Bad device specification mmc 0 **
507 02:06:58.972663 Couldn't find partition mmc 0
508 02:06:58.977081 Error: could not access storage.
509 02:07:00.240308 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 02:07:00.241112 bl2_stage_init 0x01
511 02:07:00.241720 bl2_stage_init 0x81
512 02:07:00.245886 hw id: 0x0000 - pwm id 0x01
513 02:07:00.246432 bl2_stage_init 0xc1
514 02:07:00.246922 bl2_stage_init 0x02
515 02:07:00.247500
516 02:07:00.251671 L0:00000000
517 02:07:00.252359 L1:20000703
518 02:07:00.252831 L2:00008067
519 02:07:00.253250 L3:14000000
520 02:07:00.254369 B2:00402000
521 02:07:00.254923 B1:e0f83180
522 02:07:00.255348
523 02:07:00.255764 TE: 58167
524 02:07:00.256222
525 02:07:00.265436 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 02:07:00.266035
527 02:07:00.266531 Board ID = 1
528 02:07:00.267023 Set A53 clk to 24M
529 02:07:00.267443 Set A73 clk to 24M
530 02:07:00.271469 Set clk81 to 24M
531 02:07:00.272069 A53 clk: 1200 MHz
532 02:07:00.272526 A73 clk: 1200 MHz
533 02:07:00.274387 CLK81: 166.6M
534 02:07:00.274945 smccc: 00012abe
535 02:07:00.280034 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 02:07:00.285810 board id: 1
537 02:07:00.291033 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 02:07:00.303902 fw parse done
539 02:07:00.307601 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:07:00.350131 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 02:07:00.361153 PIEI prepare done
542 02:07:00.361744 fastboot data load
543 02:07:00.362179 fastboot data verify
544 02:07:00.366741 verify result: 266
545 02:07:00.372446 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 02:07:00.372987 LPDDR4 probe
547 02:07:00.373410 ddr clk to 1584MHz
548 02:07:00.380312 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 02:07:00.417600
550 02:07:00.418158 dmc_version 0001
551 02:07:00.424319 Check phy result
552 02:07:00.430182 INFO : End of CA training
553 02:07:00.430746 INFO : End of initialization
554 02:07:00.435764 INFO : Training has run successfully!
555 02:07:00.436360 Check phy result
556 02:07:00.441367 INFO : End of initialization
557 02:07:00.441928 INFO : End of read enable training
558 02:07:00.446937 INFO : End of fine write leveling
559 02:07:00.452545 INFO : End of Write leveling coarse delay
560 02:07:00.453100 INFO : Training has run successfully!
561 02:07:00.453523 Check phy result
562 02:07:00.458137 INFO : End of initialization
563 02:07:00.458684 INFO : End of read dq deskew training
564 02:07:00.463748 INFO : End of MPR read delay center optimization
565 02:07:00.469351 INFO : End of write delay center optimization
566 02:07:00.474971 INFO : End of read delay center optimization
567 02:07:00.475580 INFO : End of max read latency training
568 02:07:00.480636 INFO : Training has run successfully!
569 02:07:00.481203 1D training succeed
570 02:07:00.489707 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 02:07:00.537657 Check phy result
572 02:07:00.538121 INFO : End of initialization
573 02:07:00.558959 INFO : End of 2D read delay Voltage center optimization
574 02:07:00.579188 INFO : End of 2D read delay Voltage center optimization
575 02:07:00.631270 INFO : End of 2D write delay Voltage center optimization
576 02:07:00.680627 INFO : End of 2D write delay Voltage center optimization
577 02:07:00.686193 INFO : Training has run successfully!
578 02:07:00.686680
579 02:07:00.687105 channel==0
580 02:07:00.691775 RxClkDly_Margin_A0==88 ps 9
581 02:07:00.692289 TxDqDly_Margin_A0==98 ps 10
582 02:07:00.697453 RxClkDly_Margin_A1==88 ps 9
583 02:07:00.697933 TxDqDly_Margin_A1==98 ps 10
584 02:07:00.698357 TrainedVREFDQ_A0==74
585 02:07:00.702992 TrainedVREFDQ_A1==74
586 02:07:00.703482 VrefDac_Margin_A0==25
587 02:07:00.703897 DeviceVref_Margin_A0==40
588 02:07:00.708576 VrefDac_Margin_A1==25
589 02:07:00.709055 DeviceVref_Margin_A1==40
590 02:07:00.709469
591 02:07:00.709880
592 02:07:00.714198 channel==1
593 02:07:00.714679 RxClkDly_Margin_A0==98 ps 10
594 02:07:00.715093 TxDqDly_Margin_A0==98 ps 10
595 02:07:00.719793 RxClkDly_Margin_A1==88 ps 9
596 02:07:00.720310 TxDqDly_Margin_A1==88 ps 9
597 02:07:00.725463 TrainedVREFDQ_A0==77
598 02:07:00.725951 TrainedVREFDQ_A1==77
599 02:07:00.726368 VrefDac_Margin_A0==22
600 02:07:00.730994 DeviceVref_Margin_A0==37
601 02:07:00.731472 VrefDac_Margin_A1==24
602 02:07:00.736587 DeviceVref_Margin_A1==37
603 02:07:00.737076
604 02:07:00.737490 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 02:07:00.737903
606 02:07:00.770121 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 02:07:00.770695 2D training succeed
608 02:07:00.775788 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 02:07:00.781465 auto size-- 65535DDR cs0 size: 2048MB
610 02:07:00.781951 DDR cs1 size: 2048MB
611 02:07:00.786975 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 02:07:00.787459 cs0 DataBus test pass
613 02:07:00.792603 cs1 DataBus test pass
614 02:07:00.793091 cs0 AddrBus test pass
615 02:07:00.793504 cs1 AddrBus test pass
616 02:07:00.793906
617 02:07:00.798174 100bdlr_step_size ps== 420
618 02:07:00.798665 result report
619 02:07:00.803800 boot times 0Enable ddr reg access
620 02:07:00.809136 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 02:07:00.822613 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 02:07:01.396531 0.0;M3 CHK:0;cm4_sp_mode 0
623 02:07:01.397112 MVN_1=0x00000000
624 02:07:01.401967 MVN_2=0x00000000
625 02:07:01.407813 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 02:07:01.408360 OPS=0x10
627 02:07:01.408797 ring efuse init
628 02:07:01.409190 chipver efuse init
629 02:07:01.413341 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 02:07:01.419081 [0.018961 Inits done]
631 02:07:01.419555 secure task start!
632 02:07:01.419946 high task start!
633 02:07:01.423551 low task start!
634 02:07:01.424039 run into bl31
635 02:07:01.430085 NOTICE: BL31: v1.3(release):4fc40b1
636 02:07:01.437902 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 02:07:01.438369 NOTICE: BL31: G12A normal boot!
638 02:07:01.463256 NOTICE: BL31: BL33 decompress pass
639 02:07:01.468954 ERROR: Error initializing runtime service opteed_fast
640 02:07:02.702099
641 02:07:02.702730
642 02:07:02.710426 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 02:07:02.710916
644 02:07:02.711336 Model: Libre Computer AML-A311D-CC Alta
645 02:07:02.918854 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 02:07:02.942179 DRAM: 2 GiB (effective 3.8 GiB)
647 02:07:03.085264 Core: 408 devices, 31 uclasses, devicetree: separate
648 02:07:03.091113 WDT: Not starting watchdog@f0d0
649 02:07:03.123387 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 02:07:03.135656 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 02:07:03.140797 ** Bad device specification mmc 0 **
652 02:07:03.151083 Card did not respond to voltage select! : -110
653 02:07:03.158805 ** Bad device specification mmc 0 **
654 02:07:03.159275 Couldn't find partition mmc 0
655 02:07:03.167159 Card did not respond to voltage select! : -110
656 02:07:03.172601 ** Bad device specification mmc 0 **
657 02:07:03.173089 Couldn't find partition mmc 0
658 02:07:03.177591 Error: could not access storage.
659 02:07:03.520197 Net: eth0: ethernet@ff3f0000
660 02:07:03.520604 starting USB...
661 02:07:03.772090 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 02:07:03.772706 Starting the controller
663 02:07:03.778935 USB XHCI 1.10
664 02:07:05.490616 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 02:07:05.491237 bl2_stage_init 0x01
666 02:07:05.491670 bl2_stage_init 0x81
667 02:07:05.496311 hw id: 0x0000 - pwm id 0x01
668 02:07:05.496776 bl2_stage_init 0xc1
669 02:07:05.497330 bl2_stage_init 0x02
670 02:07:05.497605
671 02:07:05.501745 L0:00000000
672 02:07:05.502053 L1:20000703
673 02:07:05.502278 L2:00008067
674 02:07:05.502491 L3:14000000
675 02:07:05.507419 B2:00402000
676 02:07:05.507715 B1:e0f83180
677 02:07:05.507935
678 02:07:05.508180 TE: 58124
679 02:07:05.508410
680 02:07:05.512978 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 02:07:05.513388
682 02:07:05.513737 Board ID = 1
683 02:07:05.518470 Set A53 clk to 24M
684 02:07:05.518784 Set A73 clk to 24M
685 02:07:05.519006 Set clk81 to 24M
686 02:07:05.524210 A53 clk: 1200 MHz
687 02:07:05.524668 A73 clk: 1200 MHz
688 02:07:05.525028 CLK81: 166.6M
689 02:07:05.525380 smccc: 00012a91
690 02:07:05.529837 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 02:07:05.535294 board id: 1
692 02:07:05.541455 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 02:07:05.551808 fw parse done
694 02:07:05.557743 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 02:07:05.600329 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 02:07:05.611210 PIEI prepare done
697 02:07:05.611480 fastboot data load
698 02:07:05.611942 fastboot data verify
699 02:07:05.617043 verify result: 266
700 02:07:05.622515 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 02:07:05.622976 LPDDR4 probe
702 02:07:05.623390 ddr clk to 1584MHz
703 02:07:05.630548 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 02:07:05.667872
705 02:07:05.668449 dmc_version 0001
706 02:07:05.674970 Check phy result
707 02:07:05.680631 INFO : End of CA training
708 02:07:05.681281 INFO : End of initialization
709 02:07:05.686289 INFO : Training has run successfully!
710 02:07:05.686828 Check phy result
711 02:07:05.692272 INFO : End of initialization
712 02:07:05.692813 INFO : End of read enable training
713 02:07:05.695513 INFO : End of fine write leveling
714 02:07:05.700687 INFO : End of Write leveling coarse delay
715 02:07:05.706253 INFO : Training has run successfully!
716 02:07:05.706757 Check phy result
717 02:07:05.707183 INFO : End of initialization
718 02:07:05.711585 INFO : End of read dq deskew training
719 02:07:05.717295 INFO : End of MPR read delay center optimization
720 02:07:05.717785 INFO : End of write delay center optimization
721 02:07:05.723094 INFO : End of read delay center optimization
722 02:07:05.728837 INFO : End of max read latency training
723 02:07:05.729330 INFO : Training has run successfully!
724 02:07:05.734387 1D training succeed
725 02:07:05.740264 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 02:07:05.787579 Check phy result
727 02:07:05.788175 INFO : End of initialization
728 02:07:05.809130 INFO : End of 2D read delay Voltage center optimization
729 02:07:05.829368 INFO : End of 2D read delay Voltage center optimization
730 02:07:05.881404 INFO : End of 2D write delay Voltage center optimization
731 02:07:05.930740 INFO : End of 2D write delay Voltage center optimization
732 02:07:05.936320 INFO : Training has run successfully!
733 02:07:05.936769
734 02:07:05.937182 channel==0
735 02:07:05.941916 RxClkDly_Margin_A0==88 ps 9
736 02:07:05.942361 TxDqDly_Margin_A0==98 ps 10
737 02:07:05.947530 RxClkDly_Margin_A1==88 ps 9
738 02:07:05.948010 TxDqDly_Margin_A1==88 ps 9
739 02:07:05.948436 TrainedVREFDQ_A0==74
740 02:07:05.953121 TrainedVREFDQ_A1==74
741 02:07:05.953597 VrefDac_Margin_A0==25
742 02:07:05.954014 DeviceVref_Margin_A0==40
743 02:07:05.958704 VrefDac_Margin_A1==25
744 02:07:05.959149 DeviceVref_Margin_A1==40
745 02:07:05.959557
746 02:07:05.959958
747 02:07:05.960399 channel==1
748 02:07:05.964320 RxClkDly_Margin_A0==98 ps 10
749 02:07:05.964768 TxDqDly_Margin_A0==98 ps 10
750 02:07:05.969909 RxClkDly_Margin_A1==88 ps 9
751 02:07:05.970348 TxDqDly_Margin_A1==88 ps 9
752 02:07:05.975501 TrainedVREFDQ_A0==77
753 02:07:05.975959 TrainedVREFDQ_A1==77
754 02:07:05.976405 VrefDac_Margin_A0==22
755 02:07:05.981104 DeviceVref_Margin_A0==37
756 02:07:05.981539 VrefDac_Margin_A1==24
757 02:07:05.986702 DeviceVref_Margin_A1==37
758 02:07:05.987137
759 02:07:05.987548 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 02:07:05.987948
761 02:07:06.020337 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 02:07:06.020842 2D training succeed
763 02:07:06.025921 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 02:07:06.031503 auto size-- 65535DDR cs0 size: 2048MB
765 02:07:06.031949 DDR cs1 size: 2048MB
766 02:07:06.037129 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 02:07:06.037562 cs0 DataBus test pass
768 02:07:06.042676 cs1 DataBus test pass
769 02:07:06.043099 cs0 AddrBus test pass
770 02:07:06.043489 cs1 AddrBus test pass
771 02:07:06.043874
772 02:07:06.048328 100bdlr_step_size ps== 420
773 02:07:06.048764 result report
774 02:07:06.053967 boot times 0Enable ddr reg access
775 02:07:06.059213 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 02:07:06.072692 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 02:07:06.646557 0.0;M3 CHK:0;cm4_sp_mode 0
778 02:07:06.647198 MVN_1=0x00000000
779 02:07:06.651899 MVN_2=0x00000000
780 02:07:06.657702 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 02:07:06.658255 OPS=0x10
782 02:07:06.658659 ring efuse init
783 02:07:06.659045 chipver efuse init
784 02:07:06.663277 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 02:07:06.668842 [0.018961 Inits done]
786 02:07:06.669291 secure task start!
787 02:07:06.669682 high task start!
788 02:07:06.673427 low task start!
789 02:07:06.673867 run into bl31
790 02:07:06.680176 NOTICE: BL31: v1.3(release):4fc40b1
791 02:07:06.687916 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 02:07:06.688432 NOTICE: BL31: G12A normal boot!
793 02:07:06.713270 NOTICE: BL31: BL33 decompress pass
794 02:07:06.718893 ERROR: Error initializing runtime service opteed_fast
795 02:07:07.951951
796 02:07:07.952608
797 02:07:07.960209 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 02:07:07.960667
799 02:07:07.961083 Model: Libre Computer AML-A311D-CC Alta
800 02:07:08.168741 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 02:07:08.191975 DRAM: 2 GiB (effective 3.8 GiB)
802 02:07:08.335038 Core: 408 devices, 31 uclasses, devicetree: separate
803 02:07:08.340859 WDT: Not starting watchdog@f0d0
804 02:07:08.373076 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 02:07:08.385557 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 02:07:08.390529 ** Bad device specification mmc 0 **
807 02:07:08.400905 Card did not respond to voltage select! : -110
808 02:07:08.408654 ** Bad device specification mmc 0 **
809 02:07:08.409162 Couldn't find partition mmc 0
810 02:07:08.416986 Card did not respond to voltage select! : -110
811 02:07:08.422498 ** Bad device specification mmc 0 **
812 02:07:08.423020 Couldn't find partition mmc 0
813 02:07:08.427568 Error: could not access storage.
814 02:07:08.770030 Net: eth0: ethernet@ff3f0000
815 02:07:08.770625 starting USB...
816 02:07:09.215657 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 02:07:09.216301 Starting the controller
818 02:07:09.218676 USB XHCI 1.10
819 02:07:11.192236 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 02:07:11.192854 bl2_stage_init 0x01
821 02:07:11.193287 bl2_stage_init 0x81
822 02:07:11.197927 hw id: 0x0000 - pwm id 0x01
823 02:07:11.198429 bl2_stage_init 0xc1
824 02:07:11.198847 bl2_stage_init 0x02
825 02:07:11.199250
826 02:07:11.203436 L0:00000000
827 02:07:11.203926 L1:20000703
828 02:07:11.204380 L2:00008067
829 02:07:11.204795 L3:14000000
830 02:07:11.209034 B2:00402000
831 02:07:11.209526 B1:e0f83180
832 02:07:11.209941
833 02:07:11.210343 TE: 58124
834 02:07:11.210752
835 02:07:11.214605 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 02:07:11.215096
837 02:07:11.215510 Board ID = 1
838 02:07:11.220256 Set A53 clk to 24M
839 02:07:11.220743 Set A73 clk to 24M
840 02:07:11.221154 Set clk81 to 24M
841 02:07:11.225904 A53 clk: 1200 MHz
842 02:07:11.226400 A73 clk: 1200 MHz
843 02:07:11.226815 CLK81: 166.6M
844 02:07:11.227220 smccc: 00012a92
845 02:07:11.231510 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 02:07:11.237120 board id: 1
847 02:07:11.242978 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 02:07:11.254663 fw parse done
849 02:07:11.259444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 02:07:11.301950 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 02:07:11.312875 PIEI prepare done
852 02:07:11.313404 fastboot data load
853 02:07:11.313836 fastboot data verify
854 02:07:11.318536 verify result: 266
855 02:07:11.324117 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 02:07:11.324614 LPDDR4 probe
857 02:07:11.325040 ddr clk to 1584MHz
858 02:07:11.331166 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 02:07:11.369333
860 02:07:11.369869 dmc_version 0001
861 02:07:11.376097 Check phy result
862 02:07:11.381928 INFO : End of CA training
863 02:07:11.382436 INFO : End of initialization
864 02:07:11.387539 INFO : Training has run successfully!
865 02:07:11.388075 Check phy result
866 02:07:11.393134 INFO : End of initialization
867 02:07:11.393633 INFO : End of read enable training
868 02:07:11.398719 INFO : End of fine write leveling
869 02:07:11.404352 INFO : End of Write leveling coarse delay
870 02:07:11.404870 INFO : Training has run successfully!
871 02:07:11.405295 Check phy result
872 02:07:11.409926 INFO : End of initialization
873 02:07:11.410433 INFO : End of read dq deskew training
874 02:07:11.415538 INFO : End of MPR read delay center optimization
875 02:07:11.421105 INFO : End of write delay center optimization
876 02:07:11.426689 INFO : End of read delay center optimization
877 02:07:11.427177 INFO : End of max read latency training
878 02:07:11.432287 INFO : Training has run successfully!
879 02:07:11.432774 1D training succeed
880 02:07:11.441464 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 02:07:11.489134 Check phy result
882 02:07:11.489677 INFO : End of initialization
883 02:07:11.510737 INFO : End of 2D read delay Voltage center optimization
884 02:07:11.530818 INFO : End of 2D read delay Voltage center optimization
885 02:07:11.582724 INFO : End of 2D write delay Voltage center optimization
886 02:07:11.632027 INFO : End of 2D write delay Voltage center optimization
887 02:07:11.637517 INFO : Training has run successfully!
888 02:07:11.637998
889 02:07:11.638419 channel==0
890 02:07:11.643075 RxClkDly_Margin_A0==88 ps 9
891 02:07:11.643549 TxDqDly_Margin_A0==98 ps 10
892 02:07:11.646405 RxClkDly_Margin_A1==88 ps 9
893 02:07:11.646877 TxDqDly_Margin_A1==98 ps 10
894 02:07:11.652080 TrainedVREFDQ_A0==74
895 02:07:11.652583 TrainedVREFDQ_A1==74
896 02:07:11.653003 VrefDac_Margin_A0==25
897 02:07:11.657602 DeviceVref_Margin_A0==40
898 02:07:11.658082 VrefDac_Margin_A1==25
899 02:07:11.663189 DeviceVref_Margin_A1==40
900 02:07:11.663657
901 02:07:11.664084
902 02:07:11.664480 channel==1
903 02:07:11.664865 RxClkDly_Margin_A0==98 ps 10
904 02:07:11.668839 TxDqDly_Margin_A0==98 ps 10
905 02:07:11.669310 RxClkDly_Margin_A1==98 ps 10
906 02:07:11.674437 TxDqDly_Margin_A1==88 ps 9
907 02:07:11.674915 TrainedVREFDQ_A0==77
908 02:07:11.675310 TrainedVREFDQ_A1==77
909 02:07:11.680016 VrefDac_Margin_A0==22
910 02:07:11.680476 DeviceVref_Margin_A0==37
911 02:07:11.685594 VrefDac_Margin_A1==22
912 02:07:11.686047 DeviceVref_Margin_A1==37
913 02:07:11.686434
914 02:07:11.691209 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 02:07:11.691667
916 02:07:11.719150 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 02:07:11.724822 2D training succeed
918 02:07:11.730389 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 02:07:11.730851 auto size-- 65535DDR cs0 size: 2048MB
920 02:07:11.736030 DDR cs1 size: 2048MB
921 02:07:11.736497 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 02:07:11.741607 cs0 DataBus test pass
923 02:07:11.742064 cs1 DataBus test pass
924 02:07:11.742453 cs0 AddrBus test pass
925 02:07:11.747211 cs1 AddrBus test pass
926 02:07:11.747682
927 02:07:11.748111 100bdlr_step_size ps== 420
928 02:07:11.748517 result report
929 02:07:11.752860 boot times 0Enable ddr reg access
930 02:07:11.760605 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 02:07:11.774038 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 02:07:12.345998 0.0;M3 CHK:0;cm4_sp_mode 0
933 02:07:12.346627 MVN_1=0x00000000
934 02:07:12.351465 MVN_2=0x00000000
935 02:07:12.357224 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 02:07:12.357709 OPS=0x10
937 02:07:12.358131 ring efuse init
938 02:07:12.358541 chipver efuse init
939 02:07:12.362849 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 02:07:12.368415 [0.018961 Inits done]
941 02:07:12.368887 secure task start!
942 02:07:12.369299 high task start!
943 02:07:12.373008 low task start!
944 02:07:12.373484 run into bl31
945 02:07:12.379662 NOTICE: BL31: v1.3(release):4fc40b1
946 02:07:12.387451 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 02:07:12.387940 NOTICE: BL31: G12A normal boot!
948 02:07:12.412786 NOTICE: BL31: BL33 decompress pass
949 02:07:12.418481 ERROR: Error initializing runtime service opteed_fast
950 02:07:13.651364
951 02:07:13.652022
952 02:07:13.659746 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 02:07:13.660261
954 02:07:13.660704 Model: Libre Computer AML-A311D-CC Alta
955 02:07:13.868225 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 02:07:13.891655 DRAM: 2 GiB (effective 3.8 GiB)
957 02:07:14.034519 Core: 408 devices, 31 uclasses, devicetree: separate
958 02:07:14.040394 WDT: Not starting watchdog@f0d0
959 02:07:14.072657 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 02:07:14.085104 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 02:07:14.090148 ** Bad device specification mmc 0 **
962 02:07:14.100442 Card did not respond to voltage select! : -110
963 02:07:14.108161 ** Bad device specification mmc 0 **
964 02:07:14.108636 Couldn't find partition mmc 0
965 02:07:14.116457 Card did not respond to voltage select! : -110
966 02:07:14.121951 ** Bad device specification mmc 0 **
967 02:07:14.122426 Couldn't find partition mmc 0
968 02:07:14.127010 Error: could not access storage.
969 02:07:14.469496 Net: eth0: ethernet@ff3f0000
970 02:07:14.470086 starting USB...
971 02:07:14.721316 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 02:07:14.721869 Starting the controller
973 02:07:14.728309 USB XHCI 1.10
974 02:07:16.284757 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 02:07:16.292960 scanning usb for storage devices... 0 Storage Device(s) found
977 02:07:16.344464 Hit any key to stop autoboot: 1
978 02:07:16.345494 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 02:07:16.346125 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 02:07:16.346606 Setting prompt string to ['=>']
981 02:07:16.347091 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 02:07:16.360435 0
983 02:07:16.361307 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 02:07:16.361820 Sending with 10 millisecond of delay
986 02:07:17.497150 => setenv autoload no
987 02:07:17.510255 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 02:07:17.515394 setenv autoload no
989 02:07:17.516185 Sending with 10 millisecond of delay
991 02:07:19.313232 => setenv initrd_high 0xffffffff
992 02:07:19.324043 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 02:07:19.324902 setenv initrd_high 0xffffffff
994 02:07:19.325607 Sending with 10 millisecond of delay
996 02:07:20.942827 => setenv fdt_high 0xffffffff
997 02:07:20.953756 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 02:07:20.954653 setenv fdt_high 0xffffffff
999 02:07:20.955419 Sending with 10 millisecond of delay
1001 02:07:21.251100 => dhcp
1002 02:07:21.261946 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 02:07:21.262840 dhcp
1004 02:07:21.263317 Speed: 1000, full duplex
1005 02:07:21.263762 BOOTP broadcast 1
1006 02:07:21.265422 DHCP client bound to address 192.168.6.27 (3 ms)
1007 02:07:21.266143 Sending with 10 millisecond of delay
1009 02:07:22.943216 => setenv serverip 192.168.6.2
1010 02:07:22.954035 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 02:07:22.954959 setenv serverip 192.168.6.2
1012 02:07:22.955697 Sending with 10 millisecond of delay
1014 02:07:26.680233 => tftpboot 0x01080000 949909/tftp-deploy-5xy22w79/kernel/uImage
1015 02:07:26.691077 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 02:07:26.691951 tftpboot 0x01080000 949909/tftp-deploy-5xy22w79/kernel/uImage
1017 02:07:26.692490 Speed: 1000, full duplex
1018 02:07:26.692954 Using ethernet@ff3f0000 device
1019 02:07:26.693809 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 02:07:26.699248 Filename '949909/tftp-deploy-5xy22w79/kernel/uImage'.
1021 02:07:26.703178 Load address: 0x1080000
1022 02:07:29.455732 Loading: *################################################## 43.6 MiB
1023 02:07:29.456446 15.8 MiB/s
1024 02:07:29.456930 done
1025 02:07:29.460096 Bytes transferred = 45713984 (2b98a40 hex)
1026 02:07:29.460945 Sending with 10 millisecond of delay
1028 02:07:34.151039 => tftpboot 0x08000000 949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
1029 02:07:34.161824 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 02:07:34.162610 tftpboot 0x08000000 949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot
1031 02:07:34.163051 Speed: 1000, full duplex
1032 02:07:34.163465 Using ethernet@ff3f0000 device
1033 02:07:34.164730 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 02:07:34.176434 Filename '949909/tftp-deploy-5xy22w79/ramdisk/ramdisk.cpio.gz.uboot'.
1035 02:07:34.176949 Load address: 0x8000000
1036 02:07:40.828884 Loading: *######################T ########################### UDP wrong checksum 00000005 0000a9fb
1037 02:07:45.829271 T UDP wrong checksum 00000005 0000a9fb
1038 02:07:55.832579 T T UDP wrong checksum 00000005 0000a9fb
1039 02:08:10.480663 T T UDP wrong checksum 000000ff 0000b691
1040 02:08:10.521962 UDP wrong checksum 000000ff 00004184
1041 02:08:15.836453 T T UDP wrong checksum 00000005 0000a9fb
1042 02:08:30.840667 T T
1043 02:08:30.841106 Retry count exceeded; starting again
1045 02:08:30.844165 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1048 02:08:30.845149 end: 2.4 uboot-commands (duration 00:01:47) [common]
1050 02:08:30.845875 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1052 02:08:30.846456 end: 2 uboot-action (duration 00:01:47) [common]
1054 02:08:30.847297 Cleaning after the job
1055 02:08:30.847624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/ramdisk
1056 02:08:30.848360 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/kernel
1057 02:08:30.874091 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/dtb
1058 02:08:30.874913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/nfsrootfs
1059 02:08:31.043967 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949909/tftp-deploy-5xy22w79/modules
1060 02:08:31.066650 start: 4.1 power-off (timeout 00:00:30) [common]
1061 02:08:31.067342 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1062 02:08:31.101741 >> OK - accepted request
1063 02:08:31.103847 Returned 0 in 0 seconds
1064 02:08:31.204783 end: 4.1 power-off (duration 00:00:00) [common]
1066 02:08:31.206043 start: 4.2 read-feedback (timeout 00:10:00) [common]
1067 02:08:31.206716 Listened to connection for namespace 'common' for up to 1s
1068 02:08:32.207638 Finalising connection for namespace 'common'
1069 02:08:32.208200 Disconnecting from shell: Finalise
1070 02:08:32.208520 =>
1071 02:08:32.309269 end: 4.2 read-feedback (duration 00:00:01) [common]
1072 02:08:32.309927 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949909
1073 02:08:35.364459 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949909
1074 02:08:35.365092 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.