Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:09:04.999904 lava-dispatcher, installed at version: 2024.01
2 02:09:05.000789 start: 0 validate
3 02:09:05.001327 Start time: 2024-11-07 02:09:05.001294+00:00 (UTC)
4 02:09:05.001920 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:09:05.002489 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:09:05.049749 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:09:05.050378 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:09:05.080632 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:09:05.081312 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:09:05.111755 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:09:05.112346 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:09:05.141941 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:09:05.142456 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:09:05.179000 validate duration: 0.18
16 02:09:05.179878 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:09:05.180245 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:09:05.180576 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:09:05.181163 Not decompressing ramdisk as can be used compressed.
20 02:09:05.181624 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 02:09:05.181913 saving as /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/ramdisk/initrd.cpio.gz
22 02:09:05.182198 total size: 5628169 (5 MB)
23 02:09:05.218518 progress 0 % (0 MB)
24 02:09:05.222881 progress 5 % (0 MB)
25 02:09:05.227389 progress 10 % (0 MB)
26 02:09:05.231455 progress 15 % (0 MB)
27 02:09:05.235727 progress 20 % (1 MB)
28 02:09:05.239430 progress 25 % (1 MB)
29 02:09:05.243579 progress 30 % (1 MB)
30 02:09:05.247780 progress 35 % (1 MB)
31 02:09:05.251468 progress 40 % (2 MB)
32 02:09:05.255590 progress 45 % (2 MB)
33 02:09:05.259295 progress 50 % (2 MB)
34 02:09:05.263324 progress 55 % (2 MB)
35 02:09:05.267446 progress 60 % (3 MB)
36 02:09:05.271151 progress 65 % (3 MB)
37 02:09:05.275406 progress 70 % (3 MB)
38 02:09:05.279152 progress 75 % (4 MB)
39 02:09:05.283255 progress 80 % (4 MB)
40 02:09:05.286926 progress 85 % (4 MB)
41 02:09:05.290983 progress 90 % (4 MB)
42 02:09:05.294699 progress 95 % (5 MB)
43 02:09:05.298009 progress 100 % (5 MB)
44 02:09:05.298681 5 MB downloaded in 0.12 s (46.08 MB/s)
45 02:09:05.299221 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:09:05.300167 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:09:05.300480 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:09:05.300768 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:09:05.301250 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/kernel/Image
51 02:09:05.301506 saving as /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/kernel/Image
52 02:09:05.301729 total size: 45713920 (43 MB)
53 02:09:05.301949 No compression specified
54 02:09:05.337616 progress 0 % (0 MB)
55 02:09:05.365988 progress 5 % (2 MB)
56 02:09:05.394449 progress 10 % (4 MB)
57 02:09:05.422769 progress 15 % (6 MB)
58 02:09:05.451118 progress 20 % (8 MB)
59 02:09:05.479480 progress 25 % (10 MB)
60 02:09:05.507741 progress 30 % (13 MB)
61 02:09:05.537461 progress 35 % (15 MB)
62 02:09:05.567200 progress 40 % (17 MB)
63 02:09:05.596017 progress 45 % (19 MB)
64 02:09:05.624229 progress 50 % (21 MB)
65 02:09:05.652171 progress 55 % (24 MB)
66 02:09:05.680848 progress 60 % (26 MB)
67 02:09:05.708672 progress 65 % (28 MB)
68 02:09:05.736892 progress 70 % (30 MB)
69 02:09:05.765024 progress 75 % (32 MB)
70 02:09:05.793679 progress 80 % (34 MB)
71 02:09:05.821423 progress 85 % (37 MB)
72 02:09:05.849679 progress 90 % (39 MB)
73 02:09:05.877587 progress 95 % (41 MB)
74 02:09:05.905165 progress 100 % (43 MB)
75 02:09:05.905731 43 MB downloaded in 0.60 s (72.18 MB/s)
76 02:09:05.906224 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:09:05.907076 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:09:05.907373 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:09:05.907657 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:09:05.908165 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:09:05.908448 saving as /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:09:05.908670 total size: 54703 (0 MB)
84 02:09:05.908891 No compression specified
85 02:09:05.947852 progress 59 % (0 MB)
86 02:09:05.948737 progress 100 % (0 MB)
87 02:09:05.949304 0 MB downloaded in 0.04 s (1.28 MB/s)
88 02:09:05.949777 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:09:05.950604 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:09:05.950875 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:09:05.951148 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:09:05.951624 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 02:09:05.951878 saving as /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/nfsrootfs/full.rootfs.tar
95 02:09:05.952117 total size: 120894716 (115 MB)
96 02:09:05.952339 Using unxz to decompress xz
97 02:09:05.985785 progress 0 % (0 MB)
98 02:09:06.794004 progress 5 % (5 MB)
99 02:09:07.645101 progress 10 % (11 MB)
100 02:09:08.455406 progress 15 % (17 MB)
101 02:09:09.199111 progress 20 % (23 MB)
102 02:09:09.802098 progress 25 % (28 MB)
103 02:09:10.627272 progress 30 % (34 MB)
104 02:09:11.425446 progress 35 % (40 MB)
105 02:09:11.776565 progress 40 % (46 MB)
106 02:09:12.152516 progress 45 % (51 MB)
107 02:09:12.882918 progress 50 % (57 MB)
108 02:09:13.777579 progress 55 % (63 MB)
109 02:09:14.568439 progress 60 % (69 MB)
110 02:09:15.358169 progress 65 % (74 MB)
111 02:09:16.156582 progress 70 % (80 MB)
112 02:09:16.984148 progress 75 % (86 MB)
113 02:09:17.781568 progress 80 % (92 MB)
114 02:09:18.551179 progress 85 % (98 MB)
115 02:09:19.533015 progress 90 % (103 MB)
116 02:09:20.305127 progress 95 % (109 MB)
117 02:09:21.140771 progress 100 % (115 MB)
118 02:09:21.154305 115 MB downloaded in 15.20 s (7.58 MB/s)
119 02:09:21.155026 end: 1.4.1 http-download (duration 00:00:15) [common]
121 02:09:21.156864 end: 1.4 download-retry (duration 00:00:15) [common]
122 02:09:21.157449 start: 1.5 download-retry (timeout 00:09:44) [common]
123 02:09:21.158025 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 02:09:21.158921 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/modules.tar.xz
125 02:09:21.159446 saving as /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/modules/modules.tar
126 02:09:21.159901 total size: 11609296 (11 MB)
127 02:09:21.160419 Using unxz to decompress xz
128 02:09:21.200287 progress 0 % (0 MB)
129 02:09:21.266277 progress 5 % (0 MB)
130 02:09:21.341632 progress 10 % (1 MB)
131 02:09:21.439760 progress 15 % (1 MB)
132 02:09:21.533045 progress 20 % (2 MB)
133 02:09:21.612209 progress 25 % (2 MB)
134 02:09:21.687802 progress 30 % (3 MB)
135 02:09:21.765976 progress 35 % (3 MB)
136 02:09:21.838449 progress 40 % (4 MB)
137 02:09:21.914304 progress 45 % (5 MB)
138 02:09:21.999514 progress 50 % (5 MB)
139 02:09:22.076886 progress 55 % (6 MB)
140 02:09:22.161891 progress 60 % (6 MB)
141 02:09:22.241821 progress 65 % (7 MB)
142 02:09:22.322302 progress 70 % (7 MB)
143 02:09:22.402776 progress 75 % (8 MB)
144 02:09:22.487511 progress 80 % (8 MB)
145 02:09:22.569984 progress 85 % (9 MB)
146 02:09:22.650355 progress 90 % (9 MB)
147 02:09:22.730053 progress 95 % (10 MB)
148 02:09:22.806628 progress 100 % (11 MB)
149 02:09:22.818541 11 MB downloaded in 1.66 s (6.68 MB/s)
150 02:09:22.819498 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:09:22.821351 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:09:22.821950 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 02:09:22.822540 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 02:09:39.617109 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949912/extract-nfsrootfs-nvueh62w
156 02:09:39.617711 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 02:09:39.617994 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 02:09:39.618710 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e
159 02:09:39.619153 makedir: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin
160 02:09:39.619499 makedir: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/tests
161 02:09:39.619815 makedir: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/results
162 02:09:39.620173 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-add-keys
163 02:09:39.620700 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-add-sources
164 02:09:39.621195 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-background-process-start
165 02:09:39.621683 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-background-process-stop
166 02:09:39.622192 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-common-functions
167 02:09:39.622685 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-echo-ipv4
168 02:09:39.623164 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-install-packages
169 02:09:39.623629 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-installed-packages
170 02:09:39.624130 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-os-build
171 02:09:39.624608 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-probe-channel
172 02:09:39.625103 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-probe-ip
173 02:09:39.625597 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-target-ip
174 02:09:39.626065 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-target-mac
175 02:09:39.626527 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-target-storage
176 02:09:39.626998 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-case
177 02:09:39.627462 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-event
178 02:09:39.627917 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-feedback
179 02:09:39.628465 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-raise
180 02:09:39.628968 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-reference
181 02:09:39.629452 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-runner
182 02:09:39.629926 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-set
183 02:09:39.630391 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-test-shell
184 02:09:39.630863 Updating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-add-keys (debian)
185 02:09:39.631380 Updating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-add-sources (debian)
186 02:09:39.631949 Updating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-install-packages (debian)
187 02:09:39.632491 Updating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-installed-packages (debian)
188 02:09:39.632981 Updating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/bin/lava-os-build (debian)
189 02:09:39.633404 Creating /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/environment
190 02:09:39.633758 LAVA metadata
191 02:09:39.634008 - LAVA_JOB_ID=949912
192 02:09:39.634222 - LAVA_DISPATCHER_IP=192.168.6.2
193 02:09:39.634578 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 02:09:39.635511 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 02:09:39.635815 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 02:09:39.636043 skipped lava-vland-overlay
197 02:09:39.636285 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 02:09:39.636540 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 02:09:39.636754 skipped lava-multinode-overlay
200 02:09:39.636993 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 02:09:39.637241 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 02:09:39.637483 Loading test definitions
203 02:09:39.637755 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 02:09:39.637971 Using /lava-949912 at stage 0
205 02:09:39.639023 uuid=949912_1.6.2.4.1 testdef=None
206 02:09:39.639324 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 02:09:39.639585 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 02:09:39.641131 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 02:09:39.641907 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 02:09:39.643764 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 02:09:39.644630 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 02:09:39.646417 runner path: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/0/tests/0_timesync-off test_uuid 949912_1.6.2.4.1
215 02:09:39.646946 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 02:09:39.647748 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 02:09:39.647970 Using /lava-949912 at stage 0
219 02:09:39.648343 Fetching tests from https://github.com/kernelci/test-definitions.git
220 02:09:39.648629 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/0/tests/1_kselftest-dt'
221 02:09:42.935938 Running '/usr/bin/git checkout kernelci.org
222 02:09:43.399245 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 02:09:43.400784 uuid=949912_1.6.2.4.5 testdef=None
224 02:09:43.401168 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 02:09:43.401919 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 02:09:43.405461 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 02:09:43.407225 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 02:09:43.415823 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 02:09:43.417859 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 02:09:43.424843 runner path: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/0/tests/1_kselftest-dt test_uuid 949912_1.6.2.4.5
234 02:09:43.425187 BOARD='meson-g12b-a311d-libretech-cc'
235 02:09:43.425396 BRANCH='broonie-spi'
236 02:09:43.425594 SKIPFILE='/dev/null'
237 02:09:43.425795 SKIP_INSTALL='True'
238 02:09:43.425990 TESTPROG_URL='http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 02:09:43.426221 TST_CASENAME=''
240 02:09:43.426421 TST_CMDFILES='dt'
241 02:09:43.427157 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 02:09:43.428003 Creating lava-test-runner.conf files
244 02:09:43.428219 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949912/lava-overlay-wf0gbq9e/lava-949912/0 for stage 0
245 02:09:43.428661 - 0_timesync-off
246 02:09:43.428934 - 1_kselftest-dt
247 02:09:43.429288 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 02:09:43.429583 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 02:10:06.668221 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 02:10:06.668652 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 02:10:06.668916 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 02:10:06.669186 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 02:10:06.669450 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 02:10:07.283059 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 02:10:07.283525 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 02:10:07.283807 extracting modules file /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949912/extract-nfsrootfs-nvueh62w
257 02:10:08.651121 extracting modules file /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk
258 02:10:10.066397 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 02:10:10.066845 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 02:10:10.067121 [common] Applying overlay to NFS
261 02:10:10.067338 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949912/compress-overlay-r_tpae2n/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949912/extract-nfsrootfs-nvueh62w
262 02:10:12.802198 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 02:10:12.802665 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 02:10:12.802939 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 02:10:12.803169 Converting downloaded kernel to a uImage
266 02:10:12.803477 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/kernel/Image /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/kernel/uImage
267 02:10:13.259270 output: Image Name:
268 02:10:13.259689 output: Created: Thu Nov 7 02:10:12 2024
269 02:10:13.259899 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 02:10:13.260152 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 02:10:13.260358 output: Load Address: 01080000
272 02:10:13.260561 output: Entry Point: 01080000
273 02:10:13.260759 output:
274 02:10:13.261092 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 02:10:13.261362 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 02:10:13.261633 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 02:10:13.261888 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 02:10:13.262146 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 02:10:13.262402 Building ramdisk /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk
280 02:10:15.453459 >> 166774 blocks
281 02:10:23.210238 Adding RAMdisk u-boot header.
282 02:10:23.210959 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk.cpio.gz.uboot
283 02:10:23.471569 output: Image Name:
284 02:10:23.472048 output: Created: Thu Nov 7 02:10:23 2024
285 02:10:23.472482 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 02:10:23.472887 output: Data Size: 23428571 Bytes = 22879.46 KiB = 22.34 MiB
287 02:10:23.473307 output: Load Address: 00000000
288 02:10:23.473705 output: Entry Point: 00000000
289 02:10:23.474101 output:
290 02:10:23.475194 rename /var/lib/lava/dispatcher/tmp/949912/extract-overlay-ramdisk-x8xkq86t/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
291 02:10:23.475902 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 02:10:23.476477 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 02:10:23.477003 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 02:10:23.477456 No LXC device requested
295 02:10:23.477953 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 02:10:23.478458 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 02:10:23.478946 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 02:10:23.479352 Checking files for TFTP limit of 4294967296 bytes.
299 02:10:23.482013 end: 1 tftp-deploy (duration 00:01:18) [common]
300 02:10:23.482577 start: 2 uboot-action (timeout 00:05:00) [common]
301 02:10:23.483092 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 02:10:23.483582 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 02:10:23.484106 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 02:10:23.484631 Using kernel file from prepare-kernel: 949912/tftp-deploy-06rj4lgg/kernel/uImage
305 02:10:23.485252 substitutions:
306 02:10:23.485650 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 02:10:23.486045 - {DTB_ADDR}: 0x01070000
308 02:10:23.486437 - {DTB}: 949912/tftp-deploy-06rj4lgg/dtb/meson-g12b-a311d-libretech-cc.dtb
309 02:10:23.486835 - {INITRD}: 949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
310 02:10:23.487225 - {KERNEL_ADDR}: 0x01080000
311 02:10:23.487613 - {KERNEL}: 949912/tftp-deploy-06rj4lgg/kernel/uImage
312 02:10:23.488037 - {LAVA_MAC}: None
313 02:10:23.488470 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949912/extract-nfsrootfs-nvueh62w
314 02:10:23.488867 - {NFS_SERVER_IP}: 192.168.6.2
315 02:10:23.489254 - {PRESEED_CONFIG}: None
316 02:10:23.489637 - {PRESEED_LOCAL}: None
317 02:10:23.490024 - {RAMDISK_ADDR}: 0x08000000
318 02:10:23.490406 - {RAMDISK}: 949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
319 02:10:23.490790 - {ROOT_PART}: None
320 02:10:23.491170 - {ROOT}: None
321 02:10:23.491549 - {SERVER_IP}: 192.168.6.2
322 02:10:23.491931 - {TEE_ADDR}: 0x83000000
323 02:10:23.492383 - {TEE}: None
324 02:10:23.492770 Parsed boot commands:
325 02:10:23.493144 - setenv autoload no
326 02:10:23.493523 - setenv initrd_high 0xffffffff
327 02:10:23.493900 - setenv fdt_high 0xffffffff
328 02:10:23.494278 - dhcp
329 02:10:23.494656 - setenv serverip 192.168.6.2
330 02:10:23.495038 - tftpboot 0x01080000 949912/tftp-deploy-06rj4lgg/kernel/uImage
331 02:10:23.495421 - tftpboot 0x08000000 949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
332 02:10:23.495804 - tftpboot 0x01070000 949912/tftp-deploy-06rj4lgg/dtb/meson-g12b-a311d-libretech-cc.dtb
333 02:10:23.496220 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949912/extract-nfsrootfs-nvueh62w,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 02:10:23.496620 - bootm 0x01080000 0x08000000 0x01070000
335 02:10:23.497134 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 02:10:23.498007 start: 2.3 connect-device (timeout 00:05:00) [common]
338 02:10:23.498279 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 02:10:23.510728 Setting prompt string to ['lava-test: # ']
340 02:10:23.511681 end: 2.3 connect-device (duration 00:00:00) [common]
341 02:10:23.512111 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 02:10:23.512457 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 02:10:23.512781 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 02:10:23.513445 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 02:10:23.548718 >> OK - accepted request
346 02:10:23.550798 Returned 0 in 0 seconds
347 02:10:23.651681 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 02:10:23.653523 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 02:10:23.654136 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 02:10:23.654687 Setting prompt string to ['Hit any key to stop autoboot']
352 02:10:23.655189 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 02:10:23.656906 Trying 192.168.56.21...
354 02:10:23.657437 Connected to conserv1.
355 02:10:23.657883 Escape character is '^]'.
356 02:10:23.658325
357 02:10:23.658773 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 02:10:23.659240
359 02:10:35.011803 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
360 02:10:35.012519 bl2_stage_init 0x81
361 02:10:35.017341 hw id: 0x0000 - pwm id 0x01
362 02:10:35.017837 bl2_stage_init 0xc1
363 02:10:35.018276 bl2_stage_init 0x02
364 02:10:35.018720
365 02:10:35.023070 L0:00000000
366 02:10:35.023572 L1:20000703
367 02:10:35.024050 L2:00008067
368 02:10:35.024511 L3:14000000
369 02:10:35.024958 B2:00402000
370 02:10:35.028537 B1:e0f83180
371 02:10:35.029034
372 02:10:35.029497 TE: 58150
373 02:10:35.029937
374 02:10:35.034039 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
375 02:10:35.034537
376 02:10:35.034971 Board ID = 1
377 02:10:35.039673 Set A53 clk to 24M
378 02:10:35.040179 Set A73 clk to 24M
379 02:10:35.040608 Set clk81 to 24M
380 02:10:35.045245 A53 clk: 1200 MHz
381 02:10:35.045715 A73 clk: 1200 MHz
382 02:10:35.046146 CLK81: 166.6M
383 02:10:35.046569 smccc: 00012aac
384 02:10:35.050868 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
385 02:10:35.056452 board id: 1
386 02:10:35.062225 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
387 02:10:35.072897 fw parse done
388 02:10:35.078889 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
389 02:10:35.121481 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
390 02:10:35.132370 PIEI prepare done
391 02:10:35.132844 fastboot data load
392 02:10:35.133273 fastboot data verify
393 02:10:35.138090 verify result: 266
394 02:10:35.143671 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
395 02:10:35.144203 LPDDR4 probe
396 02:10:35.144645 ddr clk to 1584MHz
397 02:10:35.151647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
398 02:10:35.188876
399 02:10:35.189368 dmc_version 0001
400 02:10:35.195558 Check phy result
401 02:10:35.201433 INFO : End of CA training
402 02:10:35.201922 INFO : End of initialization
403 02:10:35.207100 INFO : Training has run successfully!
404 02:10:35.207587 Check phy result
405 02:10:35.212610 INFO : End of initialization
406 02:10:35.213096 INFO : End of read enable training
407 02:10:35.215957 INFO : End of fine write leveling
408 02:10:35.221545 INFO : End of Write leveling coarse delay
409 02:10:35.227147 INFO : Training has run successfully!
410 02:10:35.227631 Check phy result
411 02:10:35.228099 INFO : End of initialization
412 02:10:35.232758 INFO : End of read dq deskew training
413 02:10:35.238381 INFO : End of MPR read delay center optimization
414 02:10:35.238872 INFO : End of write delay center optimization
415 02:10:35.243955 INFO : End of read delay center optimization
416 02:10:35.249544 INFO : End of max read latency training
417 02:10:35.250032 INFO : Training has run successfully!
418 02:10:35.255143 1D training succeed
419 02:10:35.261044 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
420 02:10:35.308620 Check phy result
421 02:10:35.309124 INFO : End of initialization
422 02:10:35.331261 INFO : End of 2D read delay Voltage center optimization
423 02:10:35.351482 INFO : End of 2D read delay Voltage center optimization
424 02:10:35.403587 INFO : End of 2D write delay Voltage center optimization
425 02:10:35.452879 INFO : End of 2D write delay Voltage center optimization
426 02:10:35.458515 INFO : Training has run successfully!
427 02:10:35.459006
428 02:10:35.459449 channel==0
429 02:10:35.464086 RxClkDly_Margin_A0==88 ps 9
430 02:10:35.464578 TxDqDly_Margin_A0==98 ps 10
431 02:10:35.467438 RxClkDly_Margin_A1==88 ps 9
432 02:10:35.467922 TxDqDly_Margin_A1==98 ps 10
433 02:10:35.472998 TrainedVREFDQ_A0==74
434 02:10:35.473501 TrainedVREFDQ_A1==74
435 02:10:35.473942 VrefDac_Margin_A0==25
436 02:10:35.478532 DeviceVref_Margin_A0==40
437 02:10:35.479022 VrefDac_Margin_A1==25
438 02:10:35.484252 DeviceVref_Margin_A1==40
439 02:10:35.484754
440 02:10:35.485192
441 02:10:35.485625 channel==1
442 02:10:35.486056 RxClkDly_Margin_A0==98 ps 10
443 02:10:35.487662 TxDqDly_Margin_A0==88 ps 9
444 02:10:35.493198 RxClkDly_Margin_A1==98 ps 10
445 02:10:35.493687 TxDqDly_Margin_A1==88 ps 9
446 02:10:35.494125 TrainedVREFDQ_A0==76
447 02:10:35.498868 TrainedVREFDQ_A1==77
448 02:10:35.499365 VrefDac_Margin_A0==22
449 02:10:35.504360 DeviceVref_Margin_A0==38
450 02:10:35.504849 VrefDac_Margin_A1==22
451 02:10:35.505311 DeviceVref_Margin_A1==37
452 02:10:35.505739
453 02:10:35.510107 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
454 02:10:35.510628
455 02:10:35.543439 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
456 02:10:35.544106 2D training succeed
457 02:10:35.549142 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
458 02:10:35.554735 auto size-- 65535DDR cs0 size: 2048MB
459 02:10:35.555236 DDR cs1 size: 2048MB
460 02:10:35.560322 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
461 02:10:35.560819 cs0 DataBus test pass
462 02:10:35.561252 cs1 DataBus test pass
463 02:10:35.565903 cs0 AddrBus test pass
464 02:10:35.566408 cs1 AddrBus test pass
465 02:10:35.566845
466 02:10:35.571522 100bdlr_step_size ps== 420
467 02:10:35.572079 result report
468 02:10:35.572530 boot times 0Enable ddr reg access
469 02:10:35.581264 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
470 02:10:35.594761 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
471 02:10:36.168490 0.0;M3 CHK:0;cm4_sp_mode 0
472 02:10:36.169135 MVN_1=0x00000000
473 02:10:36.173955 MVN_2=0x00000000
474 02:10:36.179670 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
475 02:10:36.180218 OPS=0x10
476 02:10:36.180680 ring efuse init
477 02:10:36.181127 chipver efuse init
478 02:10:36.185272 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
479 02:10:36.190926 [0.018960 Inits done]
480 02:10:36.191407 secure task start!
481 02:10:36.191857 high task start!
482 02:10:36.195456 low task start!
483 02:10:36.195937 run into bl31
484 02:10:36.202111 NOTICE: BL31: v1.3(release):4fc40b1
485 02:10:36.209964 NOTICE: BL31: Built : 15:58:17, May 22 2019
486 02:10:36.210451 NOTICE: BL31: G12A normal boot!
487 02:10:36.235222 NOTICE: BL31: BL33 decompress pass
488 02:10:36.240924 ERROR: Error initializing runtime service opteed_fast
489 02:10:37.473966
490 02:10:37.474610
491 02:10:37.482357 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
492 02:10:37.482849
493 02:10:37.483306 Model: Libre Computer AML-A311D-CC Alta
494 02:10:37.690737 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
495 02:10:37.714082 DRAM: 2 GiB (effective 3.8 GiB)
496 02:10:37.857066 Core: 408 devices, 31 uclasses, devicetree: separate
497 02:10:37.862937 WDT: Not starting watchdog@f0d0
498 02:10:37.895177 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
499 02:10:37.907613 Loading Environment from FAT... Card did not respond to voltage select! : -110
500 02:10:37.912603 ** Bad device specification mmc 0 **
501 02:10:37.922984 Card did not respond to voltage select! : -110
502 02:10:37.930596 ** Bad device specification mmc 0 **
503 02:10:37.931071 Couldn't find partition mmc 0
504 02:10:37.938953 Card did not respond to voltage select! : -110
505 02:10:37.944447 ** Bad device specification mmc 0 **
506 02:10:37.944928 Couldn't find partition mmc 0
507 02:10:37.949522 Error: could not access storage.
508 02:10:39.211664 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
509 02:10:39.212329 bl2_stage_init 0x01
510 02:10:39.212803 bl2_stage_init 0x81
511 02:10:39.217243 hw id: 0x0000 - pwm id 0x01
512 02:10:39.217730 bl2_stage_init 0xc1
513 02:10:39.218185 bl2_stage_init 0x02
514 02:10:39.218632
515 02:10:39.222803 L0:00000000
516 02:10:39.223281 L1:20000703
517 02:10:39.223722 L2:00008067
518 02:10:39.224197 L3:14000000
519 02:10:39.228483 B2:00402000
520 02:10:39.228963 B1:e0f83180
521 02:10:39.229412
522 02:10:39.229856 TE: 58124
523 02:10:39.230300
524 02:10:39.234020 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 02:10:39.234498
526 02:10:39.234947 Board ID = 1
527 02:10:39.239634 Set A53 clk to 24M
528 02:10:39.240131 Set A73 clk to 24M
529 02:10:39.240580 Set clk81 to 24M
530 02:10:39.245236 A53 clk: 1200 MHz
531 02:10:39.245710 A73 clk: 1200 MHz
532 02:10:39.246154 CLK81: 166.6M
533 02:10:39.246592 smccc: 00012a92
534 02:10:39.250815 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 02:10:39.256469 board id: 1
536 02:10:39.262290 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 02:10:39.272931 fw parse done
538 02:10:39.278923 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 02:10:39.321570 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 02:10:39.332483 PIEI prepare done
541 02:10:39.332958 fastboot data load
542 02:10:39.333409 fastboot data verify
543 02:10:39.338172 verify result: 266
544 02:10:39.343772 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 02:10:39.344307 LPDDR4 probe
546 02:10:39.344757 ddr clk to 1584MHz
547 02:10:39.351725 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 02:10:39.389028
549 02:10:39.389538 dmc_version 0001
550 02:10:39.395702 Check phy result
551 02:10:39.401616 INFO : End of CA training
552 02:10:39.402111 INFO : End of initialization
553 02:10:39.407152 INFO : Training has run successfully!
554 02:10:39.407646 Check phy result
555 02:10:39.412785 INFO : End of initialization
556 02:10:39.413292 INFO : End of read enable training
557 02:10:39.418411 INFO : End of fine write leveling
558 02:10:39.424004 INFO : End of Write leveling coarse delay
559 02:10:39.424507 INFO : Training has run successfully!
560 02:10:39.424959 Check phy result
561 02:10:39.429626 INFO : End of initialization
562 02:10:39.430117 INFO : End of read dq deskew training
563 02:10:39.435171 INFO : End of MPR read delay center optimization
564 02:10:39.440773 INFO : End of write delay center optimization
565 02:10:39.446375 INFO : End of read delay center optimization
566 02:10:39.446870 INFO : End of max read latency training
567 02:10:39.451932 INFO : Training has run successfully!
568 02:10:39.452461 1D training succeed
569 02:10:39.461099 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 02:10:39.508786 Check phy result
571 02:10:39.509304 INFO : End of initialization
572 02:10:39.530573 INFO : End of 2D read delay Voltage center optimization
573 02:10:39.550821 INFO : End of 2D read delay Voltage center optimization
574 02:10:39.602911 INFO : End of 2D write delay Voltage center optimization
575 02:10:39.652207 INFO : End of 2D write delay Voltage center optimization
576 02:10:39.657721 INFO : Training has run successfully!
577 02:10:39.658219
578 02:10:39.658676 channel==0
579 02:10:39.663315 RxClkDly_Margin_A0==78 ps 8
580 02:10:39.663810 TxDqDly_Margin_A0==98 ps 10
581 02:10:39.666678 RxClkDly_Margin_A1==88 ps 9
582 02:10:39.667175 TxDqDly_Margin_A1==98 ps 10
583 02:10:39.672338 TrainedVREFDQ_A0==74
584 02:10:39.672857 TrainedVREFDQ_A1==74
585 02:10:39.673312 VrefDac_Margin_A0==25
586 02:10:39.680242 DeviceVref_Margin_A0==40
587 02:10:39.680863 VrefDac_Margin_A1==26
588 02:10:39.683761 DeviceVref_Margin_A1==40
589 02:10:39.684316
590 02:10:39.684753
591 02:10:39.685175 channel==1
592 02:10:39.685718 RxClkDly_Margin_A0==88 ps 9
593 02:10:39.689252 TxDqDly_Margin_A0==88 ps 9
594 02:10:39.689865 RxClkDly_Margin_A1==88 ps 9
595 02:10:39.694918 TxDqDly_Margin_A1==88 ps 9
596 02:10:39.695420 TrainedVREFDQ_A0==77
597 02:10:39.695847 TrainedVREFDQ_A1==77
598 02:10:39.700218 VrefDac_Margin_A0==22
599 02:10:39.700719 DeviceVref_Margin_A0==37
600 02:10:39.706229 VrefDac_Margin_A1==24
601 02:10:39.706738 DeviceVref_Margin_A1==37
602 02:10:39.707164
603 02:10:39.711940 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 02:10:39.712454
605 02:10:39.739522 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
606 02:10:39.745703 2D training succeed
607 02:10:39.751101 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 02:10:39.751622 auto size-- 65535DDR cs0 size: 2048MB
609 02:10:39.756707 DDR cs1 size: 2048MB
610 02:10:39.757275 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 02:10:39.761839 cs0 DataBus test pass
612 02:10:39.762331 cs1 DataBus test pass
613 02:10:39.762752 cs0 AddrBus test pass
614 02:10:39.767322 cs1 AddrBus test pass
615 02:10:39.767840
616 02:10:39.768327 100bdlr_step_size ps== 420
617 02:10:39.768760 result report
618 02:10:39.772917 boot times 0Enable ddr reg access
619 02:10:39.779431 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 02:10:39.795794 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 02:10:40.367479 0.0;M3 CHK:0;cm4_sp_mode 0
622 02:10:40.368077 MVN_1=0x00000000
623 02:10:40.373019 MVN_2=0x00000000
624 02:10:40.378803 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 02:10:40.379313 OPS=0x10
626 02:10:40.379801 ring efuse init
627 02:10:40.380301 chipver efuse init
628 02:10:40.384346 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 02:10:40.389993 [0.018961 Inits done]
630 02:10:40.390427 secure task start!
631 02:10:40.390817 high task start!
632 02:10:40.394587 low task start!
633 02:10:40.395009 run into bl31
634 02:10:40.401144 NOTICE: BL31: v1.3(release):4fc40b1
635 02:10:40.409020 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 02:10:40.409521 NOTICE: BL31: G12A normal boot!
637 02:10:40.434347 NOTICE: BL31: BL33 decompress pass
638 02:10:40.439999 ERROR: Error initializing runtime service opteed_fast
639 02:10:41.673137
640 02:10:41.673724
641 02:10:41.681419 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 02:10:41.681866
643 02:10:41.682273 Model: Libre Computer AML-A311D-CC Alta
644 02:10:41.889822 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 02:10:41.913206 DRAM: 2 GiB (effective 3.8 GiB)
646 02:10:42.056308 Core: 408 devices, 31 uclasses, devicetree: separate
647 02:10:42.062111 WDT: Not starting watchdog@f0d0
648 02:10:42.094323 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 02:10:42.106778 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 02:10:42.111669 ** Bad device specification mmc 0 **
651 02:10:42.122085 Card did not respond to voltage select! : -110
652 02:10:42.129785 ** Bad device specification mmc 0 **
653 02:10:42.130227 Couldn't find partition mmc 0
654 02:10:42.138053 Card did not respond to voltage select! : -110
655 02:10:42.143513 ** Bad device specification mmc 0 **
656 02:10:42.143947 Couldn't find partition mmc 0
657 02:10:42.148680 Error: could not access storage.
658 02:10:42.491228 Net: eth0: ethernet@ff3f0000
659 02:10:42.491797 starting USB...
660 02:10:42.742920 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 02:10:42.743444 Starting the controller
662 02:10:42.749916 USB XHCI 1.10
663 02:10:44.462361 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 02:10:44.462997 bl2_stage_init 0x01
665 02:10:44.463427 bl2_stage_init 0x81
666 02:10:44.467627 hw id: 0x0000 - pwm id 0x01
667 02:10:44.468113 bl2_stage_init 0xc1
668 02:10:44.468528 bl2_stage_init 0x02
669 02:10:44.468933
670 02:10:44.473337 L0:00000000
671 02:10:44.473770 L1:20000703
672 02:10:44.474174 L2:00008067
673 02:10:44.474574 L3:14000000
674 02:10:44.476337 B2:00402000
675 02:10:44.476771 B1:e0f83180
676 02:10:44.477176
677 02:10:44.477576 TE: 58159
678 02:10:44.477974
679 02:10:44.487367 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 02:10:44.487815
681 02:10:44.488258 Board ID = 1
682 02:10:44.488661 Set A53 clk to 24M
683 02:10:44.489058 Set A73 clk to 24M
684 02:10:44.493056 Set clk81 to 24M
685 02:10:44.493497 A53 clk: 1200 MHz
686 02:10:44.493903 A73 clk: 1200 MHz
687 02:10:44.496602 CLK81: 166.6M
688 02:10:44.497032 smccc: 00012ab5
689 02:10:44.502200 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 02:10:44.507713 board id: 1
691 02:10:44.512779 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 02:10:44.523430 fw parse done
693 02:10:44.529494 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 02:10:44.571895 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 02:10:44.582858 PIEI prepare done
696 02:10:44.583322 fastboot data load
697 02:10:44.583738 fastboot data verify
698 02:10:44.588427 verify result: 266
699 02:10:44.594032 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 02:10:44.594463 LPDDR4 probe
701 02:10:44.594866 ddr clk to 1584MHz
702 02:10:44.601996 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 02:10:44.639219
704 02:10:44.639661 dmc_version 0001
705 02:10:44.645917 Check phy result
706 02:10:44.651795 INFO : End of CA training
707 02:10:44.652252 INFO : End of initialization
708 02:10:44.657407 INFO : Training has run successfully!
709 02:10:44.657836 Check phy result
710 02:10:44.663018 INFO : End of initialization
711 02:10:44.663447 INFO : End of read enable training
712 02:10:44.668601 INFO : End of fine write leveling
713 02:10:44.674262 INFO : End of Write leveling coarse delay
714 02:10:44.674690 INFO : Training has run successfully!
715 02:10:44.675088 Check phy result
716 02:10:44.679796 INFO : End of initialization
717 02:10:44.680264 INFO : End of read dq deskew training
718 02:10:44.685403 INFO : End of MPR read delay center optimization
719 02:10:44.691013 INFO : End of write delay center optimization
720 02:10:44.696602 INFO : End of read delay center optimization
721 02:10:44.697045 INFO : End of max read latency training
722 02:10:44.702249 INFO : Training has run successfully!
723 02:10:44.702671 1D training succeed
724 02:10:44.711457 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 02:10:44.758969 Check phy result
726 02:10:44.759439 INFO : End of initialization
727 02:10:44.780741 INFO : End of 2D read delay Voltage center optimization
728 02:10:44.801112 INFO : End of 2D read delay Voltage center optimization
729 02:10:44.854727 INFO : End of 2D write delay Voltage center optimization
730 02:10:44.902532 INFO : End of 2D write delay Voltage center optimization
731 02:10:44.907886 INFO : Training has run successfully!
732 02:10:44.908255
733 02:10:44.908475 channel==0
734 02:10:44.913476 RxClkDly_Margin_A0==88 ps 9
735 02:10:44.913849 TxDqDly_Margin_A0==98 ps 10
736 02:10:44.919161 RxClkDly_Margin_A1==88 ps 9
737 02:10:44.919542 TxDqDly_Margin_A1==98 ps 10
738 02:10:44.919789 TrainedVREFDQ_A0==74
739 02:10:44.924689 TrainedVREFDQ_A1==75
740 02:10:44.924957 VrefDac_Margin_A0==25
741 02:10:44.925166 DeviceVref_Margin_A0==40
742 02:10:44.930273 VrefDac_Margin_A1==25
743 02:10:44.930642 DeviceVref_Margin_A1==39
744 02:10:44.930959
745 02:10:44.931270
746 02:10:44.935899 channel==1
747 02:10:44.936273 RxClkDly_Margin_A0==98 ps 10
748 02:10:44.936510 TxDqDly_Margin_A0==98 ps 10
749 02:10:44.941459 RxClkDly_Margin_A1==88 ps 9
750 02:10:44.941717 TxDqDly_Margin_A1==88 ps 9
751 02:10:44.947165 TrainedVREFDQ_A0==77
752 02:10:44.947432 TrainedVREFDQ_A1==77
753 02:10:44.947642 VrefDac_Margin_A0==22
754 02:10:44.952672 DeviceVref_Margin_A0==37
755 02:10:44.953037 VrefDac_Margin_A1==24
756 02:10:44.958270 DeviceVref_Margin_A1==37
757 02:10:44.958630
758 02:10:44.958960 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 02:10:44.959271
760 02:10:44.991875 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
761 02:10:44.992193 2D training succeed
762 02:10:44.997468 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 02:10:45.003149 auto size-- 65535DDR cs0 size: 2048MB
764 02:10:45.003536 DDR cs1 size: 2048MB
765 02:10:45.008653 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 02:10:45.008921 cs0 DataBus test pass
767 02:10:45.014273 cs1 DataBus test pass
768 02:10:45.014530 cs0 AddrBus test pass
769 02:10:45.014739 cs1 AddrBus test pass
770 02:10:45.014940
771 02:10:45.020043 100bdlr_step_size ps== 420
772 02:10:45.020489 result report
773 02:10:45.025584 boot times 0Enable ddr reg access
774 02:10:45.030992 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 02:10:45.044372 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 02:10:45.618218 0.0;M3 CHK:0;cm4_sp_mode 0
777 02:10:45.618654 MVN_1=0x00000000
778 02:10:45.623672 MVN_2=0x00000000
779 02:10:45.629489 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 02:10:45.629941 OPS=0x10
781 02:10:45.630344 ring efuse init
782 02:10:45.630756 chipver efuse init
783 02:10:45.634963 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 02:10:45.640561 [0.018960 Inits done]
785 02:10:45.640986 secure task start!
786 02:10:45.641378 high task start!
787 02:10:45.645126 low task start!
788 02:10:45.645545 run into bl31
789 02:10:45.651829 NOTICE: BL31: v1.3(release):4fc40b1
790 02:10:45.659609 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 02:10:45.660061 NOTICE: BL31: G12A normal boot!
792 02:10:45.684895 NOTICE: BL31: BL33 decompress pass
793 02:10:45.690629 ERROR: Error initializing runtime service opteed_fast
794 02:10:46.923605
795 02:10:46.924269
796 02:10:46.931863 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 02:10:46.932349
798 02:10:46.932748 Model: Libre Computer AML-A311D-CC Alta
799 02:10:47.140431 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 02:10:47.163738 DRAM: 2 GiB (effective 3.8 GiB)
801 02:10:47.306695 Core: 408 devices, 31 uclasses, devicetree: separate
802 02:10:47.312608 WDT: Not starting watchdog@f0d0
803 02:10:47.344798 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 02:10:47.357319 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 02:10:47.362274 ** Bad device specification mmc 0 **
806 02:10:47.372676 Card did not respond to voltage select! : -110
807 02:10:47.380327 ** Bad device specification mmc 0 **
808 02:10:47.380853 Couldn't find partition mmc 0
809 02:10:47.388717 Card did not respond to voltage select! : -110
810 02:10:47.394109 ** Bad device specification mmc 0 **
811 02:10:47.394553 Couldn't find partition mmc 0
812 02:10:47.399166 Error: could not access storage.
813 02:10:47.741627 Net: eth0: ethernet@ff3f0000
814 02:10:47.742198 starting USB...
815 02:10:47.993484 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 02:10:47.994045 Starting the controller
817 02:10:48.000406 USB XHCI 1.10
818 02:10:50.162247 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 02:10:50.162859 bl2_stage_init 0x01
820 02:10:50.163292 bl2_stage_init 0x81
821 02:10:50.167898 hw id: 0x0000 - pwm id 0x01
822 02:10:50.168376 bl2_stage_init 0xc1
823 02:10:50.168790 bl2_stage_init 0x02
824 02:10:50.169199
825 02:10:50.173497 L0:00000000
826 02:10:50.173940 L1:20000703
827 02:10:50.174347 L2:00008067
828 02:10:50.174744 L3:14000000
829 02:10:50.176399 B2:00402000
830 02:10:50.176844 B1:e0f83180
831 02:10:50.177252
832 02:10:50.177656 TE: 58167
833 02:10:50.178059
834 02:10:50.187576 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 02:10:50.188043
836 02:10:50.188457 Board ID = 1
837 02:10:50.188853 Set A53 clk to 24M
838 02:10:50.189251 Set A73 clk to 24M
839 02:10:50.193252 Set clk81 to 24M
840 02:10:50.193690 A53 clk: 1200 MHz
841 02:10:50.194096 A73 clk: 1200 MHz
842 02:10:50.198832 CLK81: 166.6M
843 02:10:50.199269 smccc: 00012abd
844 02:10:50.204274 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 02:10:50.204722 board id: 1
846 02:10:50.213002 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 02:10:50.223513 fw parse done
848 02:10:50.229619 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 02:10:50.272234 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 02:10:50.282955 PIEI prepare done
851 02:10:50.283402 fastboot data load
852 02:10:50.283811 fastboot data verify
853 02:10:50.288602 verify result: 266
854 02:10:50.294190 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 02:10:50.294638 LPDDR4 probe
856 02:10:50.295045 ddr clk to 1584MHz
857 02:10:50.302223 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 02:10:50.339434
859 02:10:50.339885 dmc_version 0001
860 02:10:50.346231 Check phy result
861 02:10:50.351997 INFO : End of CA training
862 02:10:50.352435 INFO : End of initialization
863 02:10:50.357554 INFO : Training has run successfully!
864 02:10:50.358002 Check phy result
865 02:10:50.363209 INFO : End of initialization
866 02:10:50.363661 INFO : End of read enable training
867 02:10:50.368806 INFO : End of fine write leveling
868 02:10:50.374446 INFO : End of Write leveling coarse delay
869 02:10:50.374950 INFO : Training has run successfully!
870 02:10:50.375367 Check phy result
871 02:10:50.380037 INFO : End of initialization
872 02:10:50.380557 INFO : End of read dq deskew training
873 02:10:50.385606 INFO : End of MPR read delay center optimization
874 02:10:50.391187 INFO : End of write delay center optimization
875 02:10:50.396789 INFO : End of read delay center optimization
876 02:10:50.397223 INFO : End of max read latency training
877 02:10:50.402414 INFO : Training has run successfully!
878 02:10:50.402844 1D training succeed
879 02:10:50.411689 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 02:10:50.459315 Check phy result
881 02:10:50.459881 INFO : End of initialization
882 02:10:50.481770 INFO : End of 2D read delay Voltage center optimization
883 02:10:50.502064 INFO : End of 2D read delay Voltage center optimization
884 02:10:50.553296 INFO : End of 2D write delay Voltage center optimization
885 02:10:50.603434 INFO : End of 2D write delay Voltage center optimization
886 02:10:50.608952 INFO : Training has run successfully!
887 02:10:50.609467
888 02:10:50.609914 channel==0
889 02:10:50.614570 RxClkDly_Margin_A0==88 ps 9
890 02:10:50.615057 TxDqDly_Margin_A0==98 ps 10
891 02:10:50.620228 RxClkDly_Margin_A1==88 ps 9
892 02:10:50.620705 TxDqDly_Margin_A1==98 ps 10
893 02:10:50.621147 TrainedVREFDQ_A0==74
894 02:10:50.625755 TrainedVREFDQ_A1==76
895 02:10:50.626232 VrefDac_Margin_A0==24
896 02:10:50.626662 DeviceVref_Margin_A0==40
897 02:10:50.631376 VrefDac_Margin_A1==25
898 02:10:50.631857 DeviceVref_Margin_A1==38
899 02:10:50.632336
900 02:10:50.632769
901 02:10:50.636935 channel==1
902 02:10:50.637421 RxClkDly_Margin_A0==98 ps 10
903 02:10:50.637852 TxDqDly_Margin_A0==98 ps 10
904 02:10:50.642531 RxClkDly_Margin_A1==98 ps 10
905 02:10:50.642998 TxDqDly_Margin_A1==88 ps 9
906 02:10:50.648249 TrainedVREFDQ_A0==77
907 02:10:50.648734 TrainedVREFDQ_A1==77
908 02:10:50.649169 VrefDac_Margin_A0==22
909 02:10:50.653726 DeviceVref_Margin_A0==37
910 02:10:50.654193 VrefDac_Margin_A1==22
911 02:10:50.659355 DeviceVref_Margin_A1==37
912 02:10:50.659845
913 02:10:50.660317 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 02:10:50.664976
915 02:10:50.692861 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
916 02:10:50.693390 2D training succeed
917 02:10:50.698448 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 02:10:50.704138 auto size-- 65535DDR cs0 size: 2048MB
919 02:10:50.704615 DDR cs1 size: 2048MB
920 02:10:50.709665 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 02:10:50.710141 cs0 DataBus test pass
922 02:10:50.715275 cs1 DataBus test pass
923 02:10:50.715742 cs0 AddrBus test pass
924 02:10:50.716225 cs1 AddrBus test pass
925 02:10:50.716658
926 02:10:50.720872 100bdlr_step_size ps== 420
927 02:10:50.721360 result report
928 02:10:50.726479 boot times 0Enable ddr reg access
929 02:10:50.731877 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 02:10:50.745372 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 02:10:51.319262 0.0;M3 CHK:0;cm4_sp_mode 0
932 02:10:51.319920 MVN_1=0x00000000
933 02:10:51.324636 MVN_2=0x00000000
934 02:10:51.330362 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 02:10:51.330900 OPS=0x10
936 02:10:51.331382 ring efuse init
937 02:10:51.331843 chipver efuse init
938 02:10:51.335999 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 02:10:51.341548 [0.018960 Inits done]
940 02:10:51.342053 secure task start!
941 02:10:51.342518 high task start!
942 02:10:51.346158 low task start!
943 02:10:51.346654 run into bl31
944 02:10:51.352782 NOTICE: BL31: v1.3(release):4fc40b1
945 02:10:51.360625 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 02:10:51.361129 NOTICE: BL31: G12A normal boot!
947 02:10:51.386587 NOTICE: BL31: BL33 decompress pass
948 02:10:51.392314 ERROR: Error initializing runtime service opteed_fast
949 02:10:52.625274
950 02:10:52.625938
951 02:10:52.633509 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 02:10:52.634027
953 02:10:52.634492 Model: Libre Computer AML-A311D-CC Alta
954 02:10:52.841916 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 02:10:52.865328 DRAM: 2 GiB (effective 3.8 GiB)
956 02:10:53.008361 Core: 408 devices, 31 uclasses, devicetree: separate
957 02:10:53.014162 WDT: Not starting watchdog@f0d0
958 02:10:53.046621 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 02:10:53.058905 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 02:10:53.063863 ** Bad device specification mmc 0 **
961 02:10:53.074213 Card did not respond to voltage select! : -110
962 02:10:53.081914 ** Bad device specification mmc 0 **
963 02:10:53.082429 Couldn't find partition mmc 0
964 02:10:53.090270 Card did not respond to voltage select! : -110
965 02:10:53.095730 ** Bad device specification mmc 0 **
966 02:10:53.096255 Couldn't find partition mmc 0
967 02:10:53.100782 Error: could not access storage.
968 02:10:53.443317 Net: eth0: ethernet@ff3f0000
969 02:10:53.443955 starting USB...
970 02:10:53.695069 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 02:10:53.695661 Starting the controller
972 02:10:53.702035 USB XHCI 1.10
973 02:10:55.562054 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
974 02:10:55.562722 bl2_stage_init 0x01
975 02:10:55.563203 bl2_stage_init 0x81
976 02:10:55.567628 hw id: 0x0000 - pwm id 0x01
977 02:10:55.568191 bl2_stage_init 0xc1
978 02:10:55.568663 bl2_stage_init 0x02
979 02:10:55.569114
980 02:10:55.573234 L0:00000000
981 02:10:55.573736 L1:20000703
982 02:10:55.574198 L2:00008067
983 02:10:55.574651 L3:14000000
984 02:10:55.578805 B2:00402000
985 02:10:55.579304 B1:e0f83180
986 02:10:55.579763
987 02:10:55.580262 TE: 58124
988 02:10:55.580718
989 02:10:55.584394 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
990 02:10:55.584902
991 02:10:55.585360 Board ID = 1
992 02:10:55.589995 Set A53 clk to 24M
993 02:10:55.590490 Set A73 clk to 24M
994 02:10:55.590942 Set clk81 to 24M
995 02:10:55.595585 A53 clk: 1200 MHz
996 02:10:55.596104 A73 clk: 1200 MHz
997 02:10:55.596565 CLK81: 166.6M
998 02:10:55.597011 smccc: 00012a92
999 02:10:55.601171 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1000 02:10:55.606822 board id: 1
1001 02:10:55.612669 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1002 02:10:55.623297 fw parse done
1003 02:10:55.629335 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1004 02:10:55.672009 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1005 02:10:55.683276 PIEI prepare done
1006 02:10:55.683765 fastboot data load
1007 02:10:55.684236 fastboot data verify
1008 02:10:55.688631 verify result: 266
1009 02:10:55.694200 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1010 02:10:55.694672 LPDDR4 probe
1011 02:10:55.695103 ddr clk to 1584MHz
1012 02:10:55.702213 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1013 02:10:55.739391
1014 02:10:55.739867 dmc_version 0001
1015 02:10:55.746206 Check phy result
1016 02:10:55.752072 INFO : End of CA training
1017 02:10:55.752535 INFO : End of initialization
1018 02:10:55.757649 INFO : Training has run successfully!
1019 02:10:55.758111 Check phy result
1020 02:10:55.763172 INFO : End of initialization
1021 02:10:55.763733 INFO : End of read enable training
1022 02:10:55.766556 INFO : End of fine write leveling
1023 02:10:55.772031 INFO : End of Write leveling coarse delay
1024 02:10:55.777572 INFO : Training has run successfully!
1025 02:10:55.778061 Check phy result
1026 02:10:55.778517 INFO : End of initialization
1027 02:10:55.783322 INFO : End of read dq deskew training
1028 02:10:55.788776 INFO : End of MPR read delay center optimization
1029 02:10:55.789270 INFO : End of write delay center optimization
1030 02:10:55.794269 INFO : End of read delay center optimization
1031 02:10:55.799863 INFO : End of max read latency training
1032 02:10:55.800387 INFO : Training has run successfully!
1033 02:10:55.805447 1D training succeed
1034 02:10:55.811472 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1035 02:10:55.859059 Check phy result
1036 02:10:55.859554 INFO : End of initialization
1037 02:10:55.881647 INFO : End of 2D read delay Voltage center optimization
1038 02:10:55.901951 INFO : End of 2D read delay Voltage center optimization
1039 02:10:55.953953 INFO : End of 2D write delay Voltage center optimization
1040 02:10:56.003271 INFO : End of 2D write delay Voltage center optimization
1041 02:10:56.008876 INFO : Training has run successfully!
1042 02:10:56.009370
1043 02:10:56.009831 channel==0
1044 02:10:56.014339 RxClkDly_Margin_A0==88 ps 9
1045 02:10:56.014827 TxDqDly_Margin_A0==98 ps 10
1046 02:10:56.019969 RxClkDly_Margin_A1==88 ps 9
1047 02:10:56.020496 TxDqDly_Margin_A1==98 ps 10
1048 02:10:56.020957 TrainedVREFDQ_A0==74
1049 02:10:56.025811 TrainedVREFDQ_A1==75
1050 02:10:56.026334 VrefDac_Margin_A0==24
1051 02:10:56.026793 DeviceVref_Margin_A0==40
1052 02:10:56.031342 VrefDac_Margin_A1==24
1053 02:10:56.031837 DeviceVref_Margin_A1==39
1054 02:10:56.032328
1055 02:10:56.032784
1056 02:10:56.036950 channel==1
1057 02:10:56.037443 RxClkDly_Margin_A0==98 ps 10
1058 02:10:56.037897 TxDqDly_Margin_A0==88 ps 9
1059 02:10:56.042342 RxClkDly_Margin_A1==98 ps 10
1060 02:10:56.042831 TxDqDly_Margin_A1==88 ps 9
1061 02:10:56.047966 TrainedVREFDQ_A0==77
1062 02:10:56.048485 TrainedVREFDQ_A1==77
1063 02:10:56.048941 VrefDac_Margin_A0==22
1064 02:10:56.053606 DeviceVref_Margin_A0==37
1065 02:10:56.054088 VrefDac_Margin_A1==22
1066 02:10:56.059261 DeviceVref_Margin_A1==37
1067 02:10:56.059747
1068 02:10:56.060243 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1069 02:10:56.060692
1070 02:10:56.092828 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000018 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1071 02:10:56.093364 2D training succeed
1072 02:10:56.098318 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1073 02:10:56.103920 auto size-- 65535DDR cs0 size: 2048MB
1074 02:10:56.104450 DDR cs1 size: 2048MB
1075 02:10:56.109506 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1076 02:10:56.109997 cs0 DataBus test pass
1077 02:10:56.115099 cs1 DataBus test pass
1078 02:10:56.115585 cs0 AddrBus test pass
1079 02:10:56.116062 cs1 AddrBus test pass
1080 02:10:56.116508
1081 02:10:56.120731 100bdlr_step_size ps== 420
1082 02:10:56.121229 result report
1083 02:10:56.126291 boot times 0Enable ddr reg access
1084 02:10:56.131644 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1085 02:10:56.145145 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1086 02:10:56.718963 0.0;M3 CHK:0;cm4_sp_mode 0
1087 02:10:56.719581 MVN_1=0x00000000
1088 02:10:56.724324 MVN_2=0x00000000
1089 02:10:56.730063 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1090 02:10:56.730558 OPS=0x10
1091 02:10:56.731014 ring efuse init
1092 02:10:56.731458 chipver efuse init
1093 02:10:56.735663 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1094 02:10:56.741255 [0.018961 Inits done]
1095 02:10:56.741745 secure task start!
1096 02:10:56.742198 high task start!
1097 02:10:56.745849 low task start!
1098 02:10:56.746332 run into bl31
1099 02:10:56.752517 NOTICE: BL31: v1.3(release):4fc40b1
1100 02:10:56.760320 NOTICE: BL31: Built : 15:58:17, May 22 2019
1101 02:10:56.760813 NOTICE: BL31: G12A normal boot!
1102 02:10:56.786238 NOTICE: BL31: BL33 decompress pass
1103 02:10:56.792029 ERROR: Error initializing runtime service opteed_fast
1104 02:10:58.024918
1105 02:10:58.025552
1106 02:10:58.033305 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1107 02:10:58.033840
1108 02:10:58.034272 Model: Libre Computer AML-A311D-CC Alta
1109 02:10:58.241583 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1110 02:10:58.265054 DRAM: 2 GiB (effective 3.8 GiB)
1111 02:10:58.408023 Core: 408 devices, 31 uclasses, devicetree: separate
1112 02:10:58.413949 WDT: Not starting watchdog@f0d0
1113 02:10:58.446268 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1114 02:10:58.458596 Loading Environment from FAT... Card did not respond to voltage select! : -110
1115 02:10:58.463600 ** Bad device specification mmc 0 **
1116 02:10:58.473912 Card did not respond to voltage select! : -110
1117 02:10:58.481581 ** Bad device specification mmc 0 **
1118 02:10:58.482071 Couldn't find partition mmc 0
1119 02:10:58.489925 Card did not respond to voltage select! : -110
1120 02:10:58.495450 ** Bad device specification mmc 0 **
1121 02:10:58.495940 Couldn't find partition mmc 0
1122 02:10:58.500541 Error: could not access storage.
1123 02:10:58.842968 Net: eth0: ethernet@ff3f0000
1124 02:10:58.843532 starting USB...
1125 02:10:59.094839 Bus usb@ff500000: Register 3000140 NbrPorts 3
1126 02:10:59.095415 Starting the controller
1127 02:10:59.101787 USB XHCI 1.10
1128 02:11:00.658952 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1129 02:11:00.667323 scanning usb for storage devices... 0 Storage Device(s) found
1131 02:11:00.719057 Hit any key to stop autoboot: 1
1132 02:11:00.720111 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1133 02:11:00.720950 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1134 02:11:00.721559 Setting prompt string to ['=>']
1135 02:11:00.722169 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1136 02:11:00.734689 0
1137 02:11:00.735585 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1138 02:11:00.736104 Sending with 10 millisecond of delay
1140 02:11:01.870606 => setenv autoload no
1141 02:11:01.881403 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1142 02:11:01.886251 setenv autoload no
1143 02:11:01.886995 Sending with 10 millisecond of delay
1145 02:11:03.683681 => setenv initrd_high 0xffffffff
1146 02:11:03.694494 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1147 02:11:03.695355 setenv initrd_high 0xffffffff
1148 02:11:03.696086 Sending with 10 millisecond of delay
1150 02:11:05.312331 => setenv fdt_high 0xffffffff
1151 02:11:05.323066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1152 02:11:05.323893 setenv fdt_high 0xffffffff
1153 02:11:05.324642 Sending with 10 millisecond of delay
1155 02:11:05.616472 => dhcp
1156 02:11:05.627250 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1157 02:11:05.628113 dhcp
1158 02:11:05.628557 Speed: 1000, full duplex
1159 02:11:05.628968 BOOTP broadcast 1
1160 02:11:05.639444 DHCP client bound to address 192.168.6.27 (11 ms)
1161 02:11:05.640175 Sending with 10 millisecond of delay
1163 02:11:07.316501 => setenv serverip 192.168.6.2
1164 02:11:07.327255 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1165 02:11:07.328199 setenv serverip 192.168.6.2
1166 02:11:07.328902 Sending with 10 millisecond of delay
1168 02:11:11.053765 => tftpboot 0x01080000 949912/tftp-deploy-06rj4lgg/kernel/uImage
1169 02:11:11.064519 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1170 02:11:11.065339 tftpboot 0x01080000 949912/tftp-deploy-06rj4lgg/kernel/uImage
1171 02:11:11.065806 Speed: 1000, full duplex
1172 02:11:11.066220 Using ethernet@ff3f0000 device
1173 02:11:11.067327 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1174 02:11:11.072747 Filename '949912/tftp-deploy-06rj4lgg/kernel/uImage'.
1175 02:11:11.076830 Load address: 0x1080000
1176 02:11:13.857960 Loading: *################################################## 43.6 MiB
1177 02:11:13.858558 15.7 MiB/s
1178 02:11:13.858989 done
1179 02:11:13.862326 Bytes transferred = 45713984 (2b98a40 hex)
1180 02:11:13.863114 Sending with 10 millisecond of delay
1182 02:11:18.550263 => tftpboot 0x08000000 949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
1183 02:11:18.561123 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1184 02:11:18.562013 tftpboot 0x08000000 949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot
1185 02:11:18.562503 Speed: 1000, full duplex
1186 02:11:18.562960 Using ethernet@ff3f0000 device
1187 02:11:18.563766 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1188 02:11:18.572387 Filename '949912/tftp-deploy-06rj4lgg/ramdisk/ramdisk.cpio.gz.uboot'.
1189 02:11:18.572913 Load address: 0x8000000
1190 02:11:25.182398 Loading: *#######################T ########################## UDP wrong checksum 00000005 00007e93
1191 02:11:30.183651 T UDP wrong checksum 00000005 00007e93
1192 02:11:40.186151 T T UDP wrong checksum 00000005 00007e93
1193 02:12:00.191004 T T T T UDP wrong checksum 00000005 00007e93
1194 02:12:15.195110 T T
1195 02:12:15.195916 Retry count exceeded; starting again
1197 02:12:15.197785 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1200 02:12:15.200306 end: 2.4 uboot-commands (duration 00:01:52) [common]
1202 02:12:15.202056 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1204 02:12:15.203350 end: 2 uboot-action (duration 00:01:52) [common]
1206 02:12:15.205344 Cleaning after the job
1207 02:12:15.206027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/ramdisk
1208 02:12:15.207737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/kernel
1209 02:12:15.257548 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/dtb
1210 02:12:15.258614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/nfsrootfs
1211 02:12:15.465312 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949912/tftp-deploy-06rj4lgg/modules
1212 02:12:15.486744 start: 4.1 power-off (timeout 00:00:30) [common]
1213 02:12:15.487448 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1214 02:12:15.521976 >> OK - accepted request
1215 02:12:15.524198 Returned 0 in 0 seconds
1216 02:12:15.625122 end: 4.1 power-off (duration 00:00:00) [common]
1218 02:12:15.626212 start: 4.2 read-feedback (timeout 00:10:00) [common]
1219 02:12:15.626901 Listened to connection for namespace 'common' for up to 1s
1220 02:12:16.627837 Finalising connection for namespace 'common'
1221 02:12:16.628361 Disconnecting from shell: Finalise
1222 02:12:16.628660 =>
1223 02:12:16.729380 end: 4.2 read-feedback (duration 00:00:01) [common]
1224 02:12:16.729827 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949912
1225 02:12:19.828206 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949912
1226 02:12:19.828828 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.