Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:27:45.665129 lava-dispatcher, installed at version: 2024.01
2 02:27:45.665914 start: 0 validate
3 02:27:45.666384 Start time: 2024-11-07 02:27:45.666354+00:00 (UTC)
4 02:27:45.666924 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:27:45.667453 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:27:45.708533 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:27:45.709106 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:27:45.743190 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:27:45.744443 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:27:45.780360 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:27:45.780859 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:27:45.812961 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:27:45.813471 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-62-g773a2a71b65d8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:27:45.857924 validate duration: 0.19
16 02:27:45.859532 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:27:45.860215 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:27:45.860814 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:27:45.861957 Not decompressing ramdisk as can be used compressed.
20 02:27:45.862823 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:27:45.863355 saving as /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/ramdisk/initrd.cpio.gz
22 02:27:45.863900 total size: 5628140 (5 MB)
23 02:27:45.902843 progress 0 % (0 MB)
24 02:27:45.910625 progress 5 % (0 MB)
25 02:27:45.918611 progress 10 % (0 MB)
26 02:27:45.925556 progress 15 % (0 MB)
27 02:27:45.933455 progress 20 % (1 MB)
28 02:27:45.938308 progress 25 % (1 MB)
29 02:27:45.942368 progress 30 % (1 MB)
30 02:27:45.946445 progress 35 % (1 MB)
31 02:27:45.950063 progress 40 % (2 MB)
32 02:27:45.954049 progress 45 % (2 MB)
33 02:27:45.957744 progress 50 % (2 MB)
34 02:27:45.961723 progress 55 % (2 MB)
35 02:27:45.965651 progress 60 % (3 MB)
36 02:27:45.969356 progress 65 % (3 MB)
37 02:27:45.973342 progress 70 % (3 MB)
38 02:27:45.976917 progress 75 % (4 MB)
39 02:27:45.980911 progress 80 % (4 MB)
40 02:27:45.984492 progress 85 % (4 MB)
41 02:27:45.988460 progress 90 % (4 MB)
42 02:27:45.992302 progress 95 % (5 MB)
43 02:27:45.995688 progress 100 % (5 MB)
44 02:27:45.996336 5 MB downloaded in 0.13 s (40.53 MB/s)
45 02:27:45.996876 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:27:45.997746 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:27:45.998035 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:27:45.998303 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:27:45.998769 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/kernel/Image
51 02:27:45.999004 saving as /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/kernel/Image
52 02:27:45.999212 total size: 45713920 (43 MB)
53 02:27:45.999422 No compression specified
54 02:27:46.034416 progress 0 % (0 MB)
55 02:27:46.061831 progress 5 % (2 MB)
56 02:27:46.089472 progress 10 % (4 MB)
57 02:27:46.116816 progress 15 % (6 MB)
58 02:27:46.144288 progress 20 % (8 MB)
59 02:27:46.171376 progress 25 % (10 MB)
60 02:27:46.199298 progress 30 % (13 MB)
61 02:27:46.226791 progress 35 % (15 MB)
62 02:27:46.254215 progress 40 % (17 MB)
63 02:27:46.281457 progress 45 % (19 MB)
64 02:27:46.308746 progress 50 % (21 MB)
65 02:27:46.336124 progress 55 % (24 MB)
66 02:27:46.363696 progress 60 % (26 MB)
67 02:27:46.391304 progress 65 % (28 MB)
68 02:27:46.419348 progress 70 % (30 MB)
69 02:27:46.446899 progress 75 % (32 MB)
70 02:27:46.474347 progress 80 % (34 MB)
71 02:27:46.501726 progress 85 % (37 MB)
72 02:27:46.529066 progress 90 % (39 MB)
73 02:27:46.556374 progress 95 % (41 MB)
74 02:27:46.583639 progress 100 % (43 MB)
75 02:27:46.584222 43 MB downloaded in 0.58 s (74.52 MB/s)
76 02:27:46.584701 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:27:46.585515 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:27:46.585788 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:27:46.586052 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:27:46.586513 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:27:46.586771 saving as /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:27:46.586978 total size: 53209 (0 MB)
84 02:27:46.587185 No compression specified
85 02:27:46.620216 progress 61 % (0 MB)
86 02:27:46.621038 progress 100 % (0 MB)
87 02:27:46.621566 0 MB downloaded in 0.03 s (1.47 MB/s)
88 02:27:46.622018 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:27:46.622816 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:27:46.623077 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:27:46.623338 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:27:46.623787 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:27:46.624043 saving as /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/nfsrootfs/full.rootfs.tar
95 02:27:46.624251 total size: 474398908 (452 MB)
96 02:27:46.624464 Using unxz to decompress xz
97 02:27:46.657497 progress 0 % (0 MB)
98 02:27:47.797044 progress 5 % (22 MB)
99 02:27:49.244444 progress 10 % (45 MB)
100 02:27:49.675405 progress 15 % (67 MB)
101 02:27:50.460242 progress 20 % (90 MB)
102 02:27:50.994674 progress 25 % (113 MB)
103 02:27:51.345631 progress 30 % (135 MB)
104 02:27:51.943479 progress 35 % (158 MB)
105 02:27:52.859152 progress 40 % (181 MB)
106 02:27:53.700385 progress 45 % (203 MB)
107 02:27:54.414741 progress 50 % (226 MB)
108 02:27:55.165344 progress 55 % (248 MB)
109 02:27:56.521701 progress 60 % (271 MB)
110 02:27:58.013282 progress 65 % (294 MB)
111 02:27:59.654043 progress 70 % (316 MB)
112 02:28:02.784154 progress 75 % (339 MB)
113 02:28:05.230913 progress 80 % (361 MB)
114 02:28:08.134259 progress 85 % (384 MB)
115 02:28:11.329911 progress 90 % (407 MB)
116 02:28:14.542475 progress 95 % (429 MB)
117 02:28:17.847426 progress 100 % (452 MB)
118 02:28:17.861334 452 MB downloaded in 31.24 s (14.48 MB/s)
119 02:28:17.862282 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:28:17.864100 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:28:17.864695 start: 1.5 download-retry (timeout 00:09:28) [common]
123 02:28:17.865271 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 02:28:17.866321 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-62-g773a2a71b65d8/arm64/defconfig/gcc-12/modules.tar.xz
125 02:28:17.866838 saving as /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/modules/modules.tar
126 02:28:17.867291 total size: 11609296 (11 MB)
127 02:28:17.867756 Using unxz to decompress xz
128 02:28:17.911898 progress 0 % (0 MB)
129 02:28:17.982604 progress 5 % (0 MB)
130 02:28:18.058768 progress 10 % (1 MB)
131 02:28:18.156985 progress 15 % (1 MB)
132 02:28:18.249159 progress 20 % (2 MB)
133 02:28:18.329063 progress 25 % (2 MB)
134 02:28:18.404787 progress 30 % (3 MB)
135 02:28:18.483499 progress 35 % (3 MB)
136 02:28:18.561618 progress 40 % (4 MB)
137 02:28:18.641250 progress 45 % (5 MB)
138 02:28:18.729407 progress 50 % (5 MB)
139 02:28:18.810040 progress 55 % (6 MB)
140 02:28:18.898276 progress 60 % (6 MB)
141 02:28:18.981234 progress 65 % (7 MB)
142 02:28:19.064525 progress 70 % (7 MB)
143 02:28:19.144683 progress 75 % (8 MB)
144 02:28:19.229877 progress 80 % (8 MB)
145 02:28:19.310101 progress 85 % (9 MB)
146 02:28:19.387843 progress 90 % (9 MB)
147 02:28:19.465156 progress 95 % (10 MB)
148 02:28:19.541656 progress 100 % (11 MB)
149 02:28:19.553841 11 MB downloaded in 1.69 s (6.56 MB/s)
150 02:28:19.554779 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:28:19.556567 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:28:19.557134 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 02:28:19.557696 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 02:28:35.186416 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949881/extract-nfsrootfs-0gtw3_u0
156 02:28:35.187023 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 02:28:35.187310 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 02:28:35.188065 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu
159 02:28:35.188556 makedir: /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin
160 02:28:35.188887 makedir: /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/tests
161 02:28:35.189202 makedir: /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/results
162 02:28:35.189531 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-add-keys
163 02:28:35.190115 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-add-sources
164 02:28:35.190643 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-background-process-start
165 02:28:35.191143 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-background-process-stop
166 02:28:35.191697 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-common-functions
167 02:28:35.192271 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-echo-ipv4
168 02:28:35.192779 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-install-packages
169 02:28:35.193266 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-installed-packages
170 02:28:35.193749 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-os-build
171 02:28:35.194224 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-probe-channel
172 02:28:35.194695 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-probe-ip
173 02:28:35.195166 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-target-ip
174 02:28:35.195660 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-target-mac
175 02:28:35.196187 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-target-storage
176 02:28:35.196679 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-case
177 02:28:35.197156 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-event
178 02:28:35.197622 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-feedback
179 02:28:35.198090 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-raise
180 02:28:35.198550 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-reference
181 02:28:35.199017 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-runner
182 02:28:35.199520 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-set
183 02:28:35.200061 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-test-shell
184 02:28:35.200561 Updating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-install-packages (oe)
185 02:28:35.201093 Updating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/bin/lava-installed-packages (oe)
186 02:28:35.201526 Creating /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/environment
187 02:28:35.201888 LAVA metadata
188 02:28:35.202144 - LAVA_JOB_ID=949881
189 02:28:35.202357 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:28:35.202708 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 02:28:35.203691 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:28:35.204025 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 02:28:35.204240 skipped lava-vland-overlay
194 02:28:35.204485 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:28:35.204737 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 02:28:35.204956 skipped lava-multinode-overlay
197 02:28:35.205196 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:28:35.205445 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 02:28:35.205693 Loading test definitions
200 02:28:35.205969 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 02:28:35.206189 Using /lava-949881 at stage 0
202 02:28:35.207333 uuid=949881_1.6.2.4.1 testdef=None
203 02:28:35.207641 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:28:35.207906 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 02:28:35.209657 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:28:35.210435 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 02:28:35.212566 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:28:35.213392 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 02:28:35.215419 runner path: /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 949881_1.6.2.4.1
212 02:28:35.216020 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:28:35.216791 Creating lava-test-runner.conf files
215 02:28:35.216993 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949881/lava-overlay-tbsh87gu/lava-949881/0 for stage 0
216 02:28:35.217329 - 0_v4l2-decoder-conformance-h264
217 02:28:35.217667 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:28:35.217936 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 02:28:35.239193 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:28:35.239535 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 02:28:35.239792 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:28:35.240078 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:28:35.240344 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 02:28:35.854220 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:28:35.854694 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 02:28:35.854943 extracting modules file /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949881/extract-nfsrootfs-0gtw3_u0
227 02:28:37.225375 extracting modules file /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk
228 02:28:38.625866 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:28:38.626347 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 02:28:38.626624 [common] Applying overlay to NFS
231 02:28:38.626837 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949881/compress-overlay-wi5ui6gh/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949881/extract-nfsrootfs-0gtw3_u0
232 02:28:38.656332 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:28:38.656765 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 02:28:38.657049 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 02:28:38.657289 Converting downloaded kernel to a uImage
236 02:28:38.657619 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/kernel/Image /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/kernel/uImage
237 02:28:39.123833 output: Image Name:
238 02:28:39.124270 output: Created: Thu Nov 7 02:28:38 2024
239 02:28:39.124482 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:28:39.124686 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 02:28:39.124887 output: Load Address: 01080000
242 02:28:39.125085 output: Entry Point: 01080000
243 02:28:39.125281 output:
244 02:28:39.125618 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:28:39.125886 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:28:39.126154 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 02:28:39.126406 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:28:39.126663 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 02:28:39.126916 Building ramdisk /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk
250 02:28:41.428340 >> 166774 blocks
251 02:28:49.166222 Adding RAMdisk u-boot header.
252 02:28:49.166905 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk.cpio.gz.uboot
253 02:28:49.431805 output: Image Name:
254 02:28:49.432391 output: Created: Thu Nov 7 02:28:49 2024
255 02:28:49.432834 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:28:49.433250 output: Data Size: 23428851 Bytes = 22879.74 KiB = 22.34 MiB
257 02:28:49.433652 output: Load Address: 00000000
258 02:28:49.434050 output: Entry Point: 00000000
259 02:28:49.434447 output:
260 02:28:49.435526 rename /var/lib/lava/dispatcher/tmp/949881/extract-overlay-ramdisk-hwnprtea/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
261 02:28:49.436285 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:28:49.436848 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 02:28:49.437386 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 02:28:49.437850 No LXC device requested
265 02:28:49.438363 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:28:49.438878 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 02:28:49.439379 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:28:49.439797 Checking files for TFTP limit of 4294967296 bytes.
269 02:28:49.442504 end: 1 tftp-deploy (duration 00:01:04) [common]
270 02:28:49.443091 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:28:49.443625 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:28:49.444168 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:28:49.444684 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:28:49.445217 Using kernel file from prepare-kernel: 949881/tftp-deploy-fifxnx38/kernel/uImage
275 02:28:49.445852 substitutions:
276 02:28:49.446262 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:28:49.446663 - {DTB_ADDR}: 0x01070000
278 02:28:49.447064 - {DTB}: 949881/tftp-deploy-fifxnx38/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 02:28:49.447461 - {INITRD}: 949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
280 02:28:49.447859 - {KERNEL_ADDR}: 0x01080000
281 02:28:49.448288 - {KERNEL}: 949881/tftp-deploy-fifxnx38/kernel/uImage
282 02:28:49.448687 - {LAVA_MAC}: None
283 02:28:49.449120 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949881/extract-nfsrootfs-0gtw3_u0
284 02:28:49.449521 - {NFS_SERVER_IP}: 192.168.6.2
285 02:28:49.449910 - {PRESEED_CONFIG}: None
286 02:28:49.450300 - {PRESEED_LOCAL}: None
287 02:28:49.450688 - {RAMDISK_ADDR}: 0x08000000
288 02:28:49.451073 - {RAMDISK}: 949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
289 02:28:49.451461 - {ROOT_PART}: None
290 02:28:49.451847 - {ROOT}: None
291 02:28:49.452271 - {SERVER_IP}: 192.168.6.2
292 02:28:49.452667 - {TEE_ADDR}: 0x83000000
293 02:28:49.453059 - {TEE}: None
294 02:28:49.453446 Parsed boot commands:
295 02:28:49.453826 - setenv autoload no
296 02:28:49.454214 - setenv initrd_high 0xffffffff
297 02:28:49.454598 - setenv fdt_high 0xffffffff
298 02:28:49.454981 - dhcp
299 02:28:49.455371 - setenv serverip 192.168.6.2
300 02:28:49.455754 - tftpboot 0x01080000 949881/tftp-deploy-fifxnx38/kernel/uImage
301 02:28:49.456173 - tftpboot 0x08000000 949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
302 02:28:49.456565 - tftpboot 0x01070000 949881/tftp-deploy-fifxnx38/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 02:28:49.456955 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949881/extract-nfsrootfs-0gtw3_u0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:28:49.457355 - bootm 0x01080000 0x08000000 0x01070000
305 02:28:49.457851 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:28:49.459328 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:28:49.459749 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 02:28:49.474525 Setting prompt string to ['lava-test: # ']
310 02:28:49.475977 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:28:49.476643 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:28:49.477390 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:28:49.477961 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:28:49.479101 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 02:28:49.513456 >> OK - accepted request
316 02:28:49.515493 Returned 0 in 0 seconds
317 02:28:49.616516 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:28:49.618296 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:28:49.618963 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:28:49.619544 Setting prompt string to ['Hit any key to stop autoboot']
322 02:28:49.620125 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:28:49.621868 Trying 192.168.56.21...
324 02:28:49.622397 Connected to conserv1.
325 02:28:49.622881 Escape character is '^]'.
326 02:28:49.623351
327 02:28:49.623826 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:28:49.624332
329 02:28:57.365014 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 02:28:57.365679 bl2_stage_init 0x01
331 02:28:57.366143 bl2_stage_init 0x81
332 02:28:57.370637 hw id: 0x0000 - pwm id 0x01
333 02:28:57.371120 bl2_stage_init 0xc1
334 02:28:57.376213 bl2_stage_init 0x02
335 02:28:57.376693
336 02:28:57.377142 L0:00000000
337 02:28:57.377592 L1:00000703
338 02:28:57.378024 L2:00008067
339 02:28:57.378453 L3:15000000
340 02:28:57.381717 S1:00000000
341 02:28:57.382180 B2:20282000
342 02:28:57.382637 B1:a0f83180
343 02:28:57.383100
344 02:28:57.383539 TE: 70235
345 02:28:57.384018
346 02:28:57.387376 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 02:28:57.387851
348 02:28:57.392944 Board ID = 1
349 02:28:57.393409 Set cpu clk to 24M
350 02:28:57.393840 Set clk81 to 24M
351 02:28:57.398595 Use GP1_pll as DSU clk.
352 02:28:57.399055 DSU clk: 1200 Mhz
353 02:28:57.399485 CPU clk: 1200 MHz
354 02:28:57.404181 Set clk81 to 166.6M
355 02:28:57.409801 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 02:28:57.410269 board id: 1
357 02:28:57.417137 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:28:57.427551 fw parse done
359 02:28:57.433536 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:28:57.476212 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:28:57.487252 PIEI prepare done
362 02:28:57.487713 fastboot data load
363 02:28:57.488200 fastboot data verify
364 02:28:57.492748 verify result: 266
365 02:28:57.498309 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 02:28:57.498781 LPDDR4 probe
367 02:28:57.499214 ddr clk to 1584MHz
368 02:28:57.506339 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:28:57.543650
370 02:28:57.544215 dmc_version 0001
371 02:28:57.550365 Check phy result
372 02:28:57.556236 INFO : End of CA training
373 02:28:57.556699 INFO : End of initialization
374 02:28:57.561780 INFO : Training has run successfully!
375 02:28:57.562240 Check phy result
376 02:28:57.567375 INFO : End of initialization
377 02:28:57.567841 INFO : End of read enable training
378 02:28:57.573003 INFO : End of fine write leveling
379 02:28:57.578593 INFO : End of Write leveling coarse delay
380 02:28:57.579052 INFO : Training has run successfully!
381 02:28:57.579482 Check phy result
382 02:28:57.584240 INFO : End of initialization
383 02:28:57.584698 INFO : End of read dq deskew training
384 02:28:57.589761 INFO : End of MPR read delay center optimization
385 02:28:57.595374 INFO : End of write delay center optimization
386 02:28:57.601017 INFO : End of read delay center optimization
387 02:28:57.601469 INFO : End of max read latency training
388 02:28:57.606600 INFO : Training has run successfully!
389 02:28:57.607058 1D training succeed
390 02:28:57.615778 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:28:57.663363 Check phy result
392 02:28:57.663910 INFO : End of initialization
393 02:28:57.685657 INFO : End of 2D read delay Voltage center optimization
394 02:28:57.704086 INFO : End of 2D read delay Voltage center optimization
395 02:28:57.756810 INFO : End of 2D write delay Voltage center optimization
396 02:28:57.805925 INFO : End of 2D write delay Voltage center optimization
397 02:28:57.811552 INFO : Training has run successfully!
398 02:28:57.812050
399 02:28:57.812501 channel==0
400 02:28:57.817031 RxClkDly_Margin_A0==78 ps 8
401 02:28:57.817487 TxDqDly_Margin_A0==88 ps 9
402 02:28:57.822728 RxClkDly_Margin_A1==88 ps 9
403 02:28:57.823191 TxDqDly_Margin_A1==98 ps 10
404 02:28:57.823625 TrainedVREFDQ_A0==74
405 02:28:57.828347 TrainedVREFDQ_A1==75
406 02:28:57.828810 VrefDac_Margin_A0==24
407 02:28:57.829239 DeviceVref_Margin_A0==40
408 02:28:57.833936 VrefDac_Margin_A1==22
409 02:28:57.834390 DeviceVref_Margin_A1==39
410 02:28:57.834820
411 02:28:57.835246
412 02:28:57.835671 channel==1
413 02:28:57.839485 RxClkDly_Margin_A0==78 ps 8
414 02:28:57.839943 TxDqDly_Margin_A0==98 ps 10
415 02:28:57.845058 RxClkDly_Margin_A1==78 ps 8
416 02:28:57.845514 TxDqDly_Margin_A1==78 ps 8
417 02:28:57.850650 TrainedVREFDQ_A0==78
418 02:28:57.851102 TrainedVREFDQ_A1==75
419 02:28:57.851532 VrefDac_Margin_A0==23
420 02:28:57.856286 DeviceVref_Margin_A0==36
421 02:28:57.856739 VrefDac_Margin_A1==22
422 02:28:57.861891 DeviceVref_Margin_A1==39
423 02:28:57.862336
424 02:28:57.862768 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:28:57.863194
426 02:28:57.895482 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 02:28:57.896048 2D training succeed
428 02:28:57.901016 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:28:57.906660 auto size-- 65535DDR cs0 size: 2048MB
430 02:28:57.907120 DDR cs1 size: 2048MB
431 02:28:57.912273 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:28:57.912730 cs0 DataBus test pass
433 02:28:57.917869 cs1 DataBus test pass
434 02:28:57.918321 cs0 AddrBus test pass
435 02:28:57.918753 cs1 AddrBus test pass
436 02:28:57.919177
437 02:28:57.923488 100bdlr_step_size ps== 478
438 02:28:57.923954 result report
439 02:28:57.929040 boot times 0Enable ddr reg access
440 02:28:57.934453 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:28:57.948066 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 02:28:58.602650 bl2z: ptr: 05129330, size: 00001e40
443 02:28:58.609790 0.0;M3 CHK:0;cm4_sp_mode 0
444 02:28:58.610293 MVN_1=0x00000000
445 02:28:58.610742 MVN_2=0x00000000
446 02:28:58.621311 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 02:28:58.621791 OPS=0x04
448 02:28:58.622244 ring efuse init
449 02:28:58.626893 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 02:28:58.627369 [0.017319 Inits done]
451 02:28:58.627810 secure task start!
452 02:28:58.634759 high task start!
453 02:28:58.635229 low task start!
454 02:28:58.635677 run into bl31
455 02:28:58.643377 NOTICE: BL31: v1.3(release):4fc40b1
456 02:28:58.651333 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 02:28:58.651824 NOTICE: BL31: G12A normal boot!
458 02:28:58.666650 NOTICE: BL31: BL33 decompress pass
459 02:28:58.672380 ERROR: Error initializing runtime service opteed_fast
460 02:29:01.416766 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 02:29:01.417433 bl2_stage_init 0x01
462 02:29:01.417915 bl2_stage_init 0x81
463 02:29:01.422400 hw id: 0x0000 - pwm id 0x01
464 02:29:01.422925 bl2_stage_init 0xc1
465 02:29:01.428017 bl2_stage_init 0x02
466 02:29:01.428344
467 02:29:01.428550 L0:00000000
468 02:29:01.428748 L1:00000703
469 02:29:01.428946 L2:00008067
470 02:29:01.429140 L3:15000000
471 02:29:01.433649 S1:00000000
472 02:29:01.434118 B2:20282000
473 02:29:01.434550 B1:a0f83180
474 02:29:01.434975
475 02:29:01.435401 TE: 70921
476 02:29:01.435826
477 02:29:01.439125 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 02:29:01.439590
479 02:29:01.444727 Board ID = 1
480 02:29:01.445188 Set cpu clk to 24M
481 02:29:01.445617 Set clk81 to 24M
482 02:29:01.450304 Use GP1_pll as DSU clk.
483 02:29:01.450765 DSU clk: 1200 Mhz
484 02:29:01.451193 CPU clk: 1200 MHz
485 02:29:01.455905 Set clk81 to 166.6M
486 02:29:01.461633 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 02:29:01.462094 board id: 1
488 02:29:01.468709 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 02:29:01.479630 fw parse done
490 02:29:01.485719 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 02:29:01.528736 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 02:29:01.539932 PIEI prepare done
493 02:29:01.540472 fastboot data load
494 02:29:01.540908 fastboot data verify
495 02:29:01.545471 verify result: 266
496 02:29:01.551056 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 02:29:01.551522 LPDDR4 probe
498 02:29:01.551954 ddr clk to 1584MHz
499 02:29:01.559041 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 02:29:01.596819
501 02:29:01.597289 dmc_version 0001
502 02:29:01.603849 Check phy result
503 02:29:01.609803 INFO : End of CA training
504 02:29:01.610258 INFO : End of initialization
505 02:29:01.615463 INFO : Training has run successfully!
506 02:29:01.615923 Check phy result
507 02:29:01.620997 INFO : End of initialization
508 02:29:01.621471 INFO : End of read enable training
509 02:29:01.626709 INFO : End of fine write leveling
510 02:29:01.632221 INFO : End of Write leveling coarse delay
511 02:29:01.632692 INFO : Training has run successfully!
512 02:29:01.633138 Check phy result
513 02:29:01.637812 INFO : End of initialization
514 02:29:01.638273 INFO : End of read dq deskew training
515 02:29:01.643473 INFO : End of MPR read delay center optimization
516 02:29:01.648996 INFO : End of write delay center optimization
517 02:29:01.654729 INFO : End of read delay center optimization
518 02:29:01.655193 INFO : End of max read latency training
519 02:29:01.660233 INFO : Training has run successfully!
520 02:29:01.660699 1D training succeed
521 02:29:01.669413 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 02:29:01.717663 Check phy result
523 02:29:01.718135 INFO : End of initialization
524 02:29:01.745039 INFO : End of 2D read delay Voltage center optimization
525 02:29:01.769233 INFO : End of 2D read delay Voltage center optimization
526 02:29:01.825932 INFO : End of 2D write delay Voltage center optimization
527 02:29:01.879907 INFO : End of 2D write delay Voltage center optimization
528 02:29:01.885510 INFO : Training has run successfully!
529 02:29:01.885977
530 02:29:01.886439 channel==0
531 02:29:01.891085 RxClkDly_Margin_A0==78 ps 8
532 02:29:01.891550 TxDqDly_Margin_A0==98 ps 10
533 02:29:01.896751 RxClkDly_Margin_A1==69 ps 7
534 02:29:01.897212 TxDqDly_Margin_A1==88 ps 9
535 02:29:01.897657 TrainedVREFDQ_A0==74
536 02:29:01.902308 TrainedVREFDQ_A1==74
537 02:29:01.902799 VrefDac_Margin_A0==23
538 02:29:01.903245 DeviceVref_Margin_A0==40
539 02:29:01.907894 VrefDac_Margin_A1==23
540 02:29:01.908388 DeviceVref_Margin_A1==40
541 02:29:01.908833
542 02:29:01.909275
543 02:29:01.909714 channel==1
544 02:29:01.913510 RxClkDly_Margin_A0==78 ps 8
545 02:29:01.913974 TxDqDly_Margin_A0==98 ps 10
546 02:29:01.919055 RxClkDly_Margin_A1==78 ps 8
547 02:29:01.919530 TxDqDly_Margin_A1==88 ps 9
548 02:29:01.924746 TrainedVREFDQ_A0==78
549 02:29:01.925226 TrainedVREFDQ_A1==78
550 02:29:01.925672 VrefDac_Margin_A0==22
551 02:29:01.930282 DeviceVref_Margin_A0==36
552 02:29:01.930747 VrefDac_Margin_A1==22
553 02:29:01.935918 DeviceVref_Margin_A1==36
554 02:29:01.936488
555 02:29:01.936959 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 02:29:01.937415
557 02:29:01.969530 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 02:29:01.970048 2D training succeed
559 02:29:01.975077 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 02:29:01.980773 auto size-- 65535DDR cs0 size: 2048MB
561 02:29:01.981267 DDR cs1 size: 2048MB
562 02:29:01.986269 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 02:29:01.986740 cs0 DataBus test pass
564 02:29:01.991878 cs1 DataBus test pass
565 02:29:01.992390 cs0 AddrBus test pass
566 02:29:01.992837 cs1 AddrBus test pass
567 02:29:01.993277
568 02:29:01.997523 100bdlr_step_size ps== 471
569 02:29:01.998007 result report
570 02:29:02.003122 boot times 0Enable ddr reg access
571 02:29:02.008271 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 02:29:02.022140 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 02:29:02.681155 bl2z: ptr: 05129330, size: 00001e40
574 02:29:02.689186 0.0;M3 CHK:0;cm4_sp_mode 0
575 02:29:02.689692 MVN_1=0x00000000
576 02:29:02.690139 MVN_2=0x00000000
577 02:29:02.700633 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 02:29:02.701133 OPS=0x04
579 02:29:02.701586 ring efuse init
580 02:29:02.706275 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 02:29:02.706768 [0.017354 Inits done]
582 02:29:02.707215 secure task start!
583 02:29:02.714359 high task start!
584 02:29:02.714836 low task start!
585 02:29:02.715280 run into bl31
586 02:29:02.722958 NOTICE: BL31: v1.3(release):4fc40b1
587 02:29:02.730891 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 02:29:02.731372 NOTICE: BL31: G12A normal boot!
589 02:29:02.746357 NOTICE: BL31: BL33 decompress pass
590 02:29:02.752072 ERROR: Error initializing runtime service opteed_fast
591 02:29:04.115350 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 02:29:04.115971 bl2_stage_init 0x01
593 02:29:04.116482 bl2_stage_init 0x81
594 02:29:04.121079 hw id: 0x0000 - pwm id 0x01
595 02:29:04.121567 bl2_stage_init 0xc1
596 02:29:04.126572 bl2_stage_init 0x02
597 02:29:04.127059
598 02:29:04.127518 L0:00000000
599 02:29:04.127961 L1:00000703
600 02:29:04.128444 L2:00008067
601 02:29:04.128882 L3:15000000
602 02:29:04.132661 S1:00000000
603 02:29:04.133135 B2:20282000
604 02:29:04.133580 B1:a0f83180
605 02:29:04.134017
606 02:29:04.134452 TE: 70747
607 02:29:04.134889
608 02:29:04.138192 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 02:29:04.138681
610 02:29:04.143844 Board ID = 1
611 02:29:04.144347 Set cpu clk to 24M
612 02:29:04.144791 Set clk81 to 24M
613 02:29:04.147174 Use GP1_pll as DSU clk.
614 02:29:04.147645 DSU clk: 1200 Mhz
615 02:29:04.152825 CPU clk: 1200 MHz
616 02:29:04.153293 Set clk81 to 166.6M
617 02:29:04.158326 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 02:29:04.158793 board id: 1
619 02:29:04.166415 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 02:29:04.178248 fw parse done
621 02:29:04.183284 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 02:29:04.226526 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 02:29:04.238491 PIEI prepare done
624 02:29:04.238984 fastboot data load
625 02:29:04.239497 fastboot data verify
626 02:29:04.244116 verify result: 266
627 02:29:04.249704 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 02:29:04.250174 LPDDR4 probe
629 02:29:04.250619 ddr clk to 1584MHz
630 02:29:04.256720 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 02:29:04.295378
632 02:29:04.295850 dmc_version 0001
633 02:29:04.301461 Check phy result
634 02:29:04.308452 INFO : End of CA training
635 02:29:04.308919 INFO : End of initialization
636 02:29:04.314103 INFO : Training has run successfully!
637 02:29:04.314582 Check phy result
638 02:29:04.319630 INFO : End of initialization
639 02:29:04.320124 INFO : End of read enable training
640 02:29:04.325218 INFO : End of fine write leveling
641 02:29:04.330847 INFO : End of Write leveling coarse delay
642 02:29:04.331317 INFO : Training has run successfully!
643 02:29:04.331759 Check phy result
644 02:29:04.336433 INFO : End of initialization
645 02:29:04.336896 INFO : End of read dq deskew training
646 02:29:04.342093 INFO : End of MPR read delay center optimization
647 02:29:04.347625 INFO : End of write delay center optimization
648 02:29:04.353276 INFO : End of read delay center optimization
649 02:29:04.353745 INFO : End of max read latency training
650 02:29:04.358845 INFO : Training has run successfully!
651 02:29:04.359311 1D training succeed
652 02:29:04.367117 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 02:29:04.415410 Check phy result
654 02:29:04.415908 INFO : End of initialization
655 02:29:04.443691 INFO : End of 2D read delay Voltage center optimization
656 02:29:04.467503 INFO : End of 2D read delay Voltage center optimization
657 02:29:04.524583 INFO : End of 2D write delay Voltage center optimization
658 02:29:04.578552 INFO : End of 2D write delay Voltage center optimization
659 02:29:04.584182 INFO : Training has run successfully!
660 02:29:04.584656
661 02:29:04.585104 channel==0
662 02:29:04.589709 RxClkDly_Margin_A0==78 ps 8
663 02:29:04.590184 TxDqDly_Margin_A0==98 ps 10
664 02:29:04.595302 RxClkDly_Margin_A1==78 ps 8
665 02:29:04.595772 TxDqDly_Margin_A1==88 ps 9
666 02:29:04.596282 TrainedVREFDQ_A0==74
667 02:29:04.600935 TrainedVREFDQ_A1==74
668 02:29:04.601403 VrefDac_Margin_A0==23
669 02:29:04.601846 DeviceVref_Margin_A0==40
670 02:29:04.606515 VrefDac_Margin_A1==23
671 02:29:04.606983 DeviceVref_Margin_A1==40
672 02:29:04.607432
673 02:29:04.607871
674 02:29:04.608348 channel==1
675 02:29:04.612165 RxClkDly_Margin_A0==78 ps 8
676 02:29:04.612631 TxDqDly_Margin_A0==98 ps 10
677 02:29:04.617694 RxClkDly_Margin_A1==78 ps 8
678 02:29:04.618166 TxDqDly_Margin_A1==88 ps 9
679 02:29:04.623324 TrainedVREFDQ_A0==78
680 02:29:04.623798 TrainedVREFDQ_A1==77
681 02:29:04.624280 VrefDac_Margin_A0==22
682 02:29:04.628941 DeviceVref_Margin_A0==36
683 02:29:04.629415 VrefDac_Margin_A1==22
684 02:29:04.634521 DeviceVref_Margin_A1==37
685 02:29:04.634985
686 02:29:04.635428 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 02:29:04.635869
688 02:29:04.668163 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 02:29:04.668668 2D training succeed
690 02:29:04.673711 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 02:29:04.679341 auto size-- 65535DDR cs0 size: 2048MB
692 02:29:04.679915 DDR cs1 size: 2048MB
693 02:29:04.684944 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 02:29:04.685432 cs0 DataBus test pass
695 02:29:04.690530 cs1 DataBus test pass
696 02:29:04.691001 cs0 AddrBus test pass
697 02:29:04.691445 cs1 AddrBus test pass
698 02:29:04.691880
699 02:29:04.696192 100bdlr_step_size ps== 478
700 02:29:04.696675 result report
701 02:29:04.701684 boot times 0Enable ddr reg access
702 02:29:04.706176 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 02:29:04.720763 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 02:29:05.380327 bl2z: ptr: 05129330, size: 00001e40
705 02:29:05.387240 0.0;M3 CHK:0;cm4_sp_mode 0
706 02:29:05.387746 MVN_1=0x00000000
707 02:29:05.388254 MVN_2=0x00000000
708 02:29:05.398747 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 02:29:05.399231 OPS=0x04
710 02:29:05.399681 ring efuse init
711 02:29:05.401657 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 02:29:05.408058 [0.017354 Inits done]
713 02:29:05.408538 secure task start!
714 02:29:05.408992 high task start!
715 02:29:05.409440 low task start!
716 02:29:05.412332 run into bl31
717 02:29:05.420999 NOTICE: BL31: v1.3(release):4fc40b1
718 02:29:05.428182 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 02:29:05.428680 NOTICE: BL31: G12A normal boot!
720 02:29:05.444397 NOTICE: BL31: BL33 decompress pass
721 02:29:05.450103 ERROR: Error initializing runtime service opteed_fast
722 02:29:06.245583
723 02:29:06.246201
724 02:29:06.250949 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 02:29:06.251435
726 02:29:06.254421 Model: Libre Computer AML-S905D3-CC Solitude
727 02:29:06.402504 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 02:29:06.416992 DRAM: 2 GiB (effective 3.8 GiB)
729 02:29:06.517971 Core: 406 devices, 33 uclasses, devicetree: separate
730 02:29:06.523720 WDT: Not starting watchdog@f0d0
731 02:29:06.549063 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 02:29:06.561186 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 02:29:06.566071 ** Bad device specification mmc 0 **
734 02:29:06.576327 Card did not respond to voltage select! : -110
735 02:29:06.583758 ** Bad device specification mmc 0 **
736 02:29:06.584224 Couldn't find partition mmc 0
737 02:29:06.592135 Card did not respond to voltage select! : -110
738 02:29:06.597580 ** Bad device specification mmc 0 **
739 02:29:06.597886 Couldn't find partition mmc 0
740 02:29:06.602651 Error: could not access storage.
741 02:29:06.900106 Net: eth0: ethernet@ff3f0000
742 02:29:06.900757 starting USB...
743 02:29:07.144656 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 02:29:07.145224 Starting the controller
745 02:29:07.151651 USB XHCI 1.10
746 02:29:08.705726 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 02:29:08.713260 scanning usb for storage devices... 0 Storage Device(s) found
749 02:29:08.764740 Hit any key to stop autoboot: 1
750 02:29:08.765575 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 02:29:08.766190 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 02:29:08.766682 Setting prompt string to ['=>']
753 02:29:08.767170 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 02:29:08.779941 0
755 02:29:08.780853 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 02:29:08.882060 => setenv autoload no
758 02:29:08.882701 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 02:29:08.887444 setenv autoload no
761 02:29:08.988895 => setenv initrd_high 0xffffffff
762 02:29:08.989582 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 02:29:08.994073 setenv initrd_high 0xffffffff
765 02:29:09.095508 => setenv fdt_high 0xffffffff
766 02:29:09.096261 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 02:29:09.099792 setenv fdt_high 0xffffffff
769 02:29:09.201266 => dhcp
770 02:29:09.201921 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 02:29:09.205101 dhcp
772 02:29:10.162032 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 02:29:10.162648 Speed: 1000, full duplex
774 02:29:10.163064 BOOTP broadcast 1
775 02:29:10.174163 DHCP client bound to address 192.168.6.21 (11 ms)
777 02:29:10.275546 => setenv serverip 192.168.6.2
778 02:29:10.276191 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 02:29:10.280746 setenv serverip 192.168.6.2
781 02:29:10.382141 => tftpboot 0x01080000 949881/tftp-deploy-fifxnx38/kernel/uImage
782 02:29:10.382793 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 02:29:10.389552 tftpboot 0x01080000 949881/tftp-deploy-fifxnx38/kernel/uImage
784 02:29:10.390023 Speed: 1000, full duplex
785 02:29:10.390438 Using ethernet@ff3f0000 device
786 02:29:10.395102 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 02:29:10.400530 Filename '949881/tftp-deploy-fifxnx38/kernel/uImage'.
788 02:29:10.404503 Load address: 0x1080000
789 02:29:13.181588 Loading: *################################################## 43.6 MiB
790 02:29:13.182197 15.7 MiB/s
791 02:29:13.182633 done
792 02:29:13.186062 Bytes transferred = 45713984 (2b98a40 hex)
794 02:29:13.287604 => tftpboot 0x08000000 949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
795 02:29:13.288354 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 02:29:13.294885 tftpboot 0x08000000 949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot
797 02:29:13.295347 Speed: 1000, full duplex
798 02:29:13.295746 Using ethernet@ff3f0000 device
799 02:29:13.300385 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 02:29:13.310179 Filename '949881/tftp-deploy-fifxnx38/ramdisk/ramdisk.cpio.gz.uboot'.
801 02:29:13.310608 Load address: 0x8000000
802 02:29:14.740390 Loading: *################################################# UDP wrong checksum 00000005 00007214
803 02:29:17.015532 UDP wrong checksum 000000ff 00003c0d
804 02:29:17.025853 UDP wrong checksum 000000ff 0000c8ff
805 02:29:19.742214 T UDP wrong checksum 00000005 00007214
806 02:29:29.744471 T T UDP wrong checksum 00000005 00007214
807 02:29:49.748581 T T T T UDP wrong checksum 00000005 00007214
808 02:30:05.741110 T T T UDP wrong checksum 000000ff 00002300
809 02:30:05.747717 UDP wrong checksum 000000ff 0000aaf2
810 02:30:09.753249
811 02:30:09.753881 Retry count exceeded; starting again
813 02:30:09.755284 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
816 02:30:09.757156 end: 2.4 uboot-commands (duration 00:01:20) [common]
818 02:30:09.758516 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
820 02:30:09.759551 end: 2 uboot-action (duration 00:01:20) [common]
822 02:30:09.761133 Cleaning after the job
823 02:30:09.761697 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/ramdisk
824 02:30:09.762960 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/kernel
825 02:30:09.807237 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/dtb
826 02:30:09.808090 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/nfsrootfs
827 02:30:10.124351 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949881/tftp-deploy-fifxnx38/modules
828 02:30:10.145684 start: 4.1 power-off (timeout 00:00:30) [common]
829 02:30:10.146345 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
830 02:30:10.180405 >> OK - accepted request
831 02:30:10.182669 Returned 0 in 0 seconds
832 02:30:10.283441 end: 4.1 power-off (duration 00:00:00) [common]
834 02:30:10.284430 start: 4.2 read-feedback (timeout 00:10:00) [common]
835 02:30:10.285086 Listened to connection for namespace 'common' for up to 1s
836 02:30:11.286018 Finalising connection for namespace 'common'
837 02:30:11.286499 Disconnecting from shell: Finalise
838 02:30:11.286757 =>
839 02:30:11.387467 end: 4.2 read-feedback (duration 00:00:01) [common]
840 02:30:11.387894 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949881
841 02:30:14.008274 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949881
842 02:30:14.008873 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.