Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:59:11.224798 lava-dispatcher, installed at version: 2024.01
2 21:59:11.225703 start: 0 validate
3 21:59:11.226209 Start time: 2024-11-07 21:59:11.226178+00:00 (UTC)
4 21:59:11.226770 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:59:11.227308 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:59:11.264644 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:59:11.265231 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:59:11.299806 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:59:11.300516 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:59:11.334431 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:59:11.335231 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:59:11.363847 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:59:11.364398 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:59:11.401716 validate duration: 0.18
16 21:59:11.402574 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:59:11.402903 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:59:11.403223 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:59:11.403838 Not decompressing ramdisk as can be used compressed.
20 21:59:11.404335 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 21:59:11.404628 saving as /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/ramdisk/initrd.cpio.gz
22 21:59:11.404912 total size: 5628182 (5 MB)
23 21:59:11.440906 progress 0 % (0 MB)
24 21:59:11.448489 progress 5 % (0 MB)
25 21:59:11.456377 progress 10 % (0 MB)
26 21:59:11.463230 progress 15 % (0 MB)
27 21:59:11.467778 progress 20 % (1 MB)
28 21:59:11.471468 progress 25 % (1 MB)
29 21:59:11.475458 progress 30 % (1 MB)
30 21:59:11.479470 progress 35 % (1 MB)
31 21:59:11.483036 progress 40 % (2 MB)
32 21:59:11.486957 progress 45 % (2 MB)
33 21:59:11.490631 progress 50 % (2 MB)
34 21:59:11.494609 progress 55 % (2 MB)
35 21:59:11.498549 progress 60 % (3 MB)
36 21:59:11.502108 progress 65 % (3 MB)
37 21:59:11.506132 progress 70 % (3 MB)
38 21:59:11.509815 progress 75 % (4 MB)
39 21:59:11.513727 progress 80 % (4 MB)
40 21:59:11.517313 progress 85 % (4 MB)
41 21:59:11.521328 progress 90 % (4 MB)
42 21:59:11.525195 progress 95 % (5 MB)
43 21:59:11.528433 progress 100 % (5 MB)
44 21:59:11.529087 5 MB downloaded in 0.12 s (43.23 MB/s)
45 21:59:11.529623 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:59:11.530495 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:59:11.530786 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:59:11.531055 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:59:11.531537 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/kernel/Image
51 21:59:11.531784 saving as /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/kernel/Image
52 21:59:11.532018 total size: 45713920 (43 MB)
53 21:59:11.532234 No compression specified
54 21:59:11.573037 progress 0 % (0 MB)
55 21:59:11.601235 progress 5 % (2 MB)
56 21:59:11.629221 progress 10 % (4 MB)
57 21:59:11.657279 progress 15 % (6 MB)
58 21:59:11.684869 progress 20 % (8 MB)
59 21:59:11.712742 progress 25 % (10 MB)
60 21:59:11.740447 progress 30 % (13 MB)
61 21:59:11.768003 progress 35 % (15 MB)
62 21:59:11.795568 progress 40 % (17 MB)
63 21:59:11.823497 progress 45 % (19 MB)
64 21:59:11.851627 progress 50 % (21 MB)
65 21:59:11.879468 progress 55 % (24 MB)
66 21:59:11.908314 progress 60 % (26 MB)
67 21:59:11.936202 progress 65 % (28 MB)
68 21:59:11.964196 progress 70 % (30 MB)
69 21:59:11.992305 progress 75 % (32 MB)
70 21:59:12.021128 progress 80 % (34 MB)
71 21:59:12.049857 progress 85 % (37 MB)
72 21:59:12.078533 progress 90 % (39 MB)
73 21:59:12.106551 progress 95 % (41 MB)
74 21:59:12.134322 progress 100 % (43 MB)
75 21:59:12.134881 43 MB downloaded in 0.60 s (72.32 MB/s)
76 21:59:12.135362 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:59:12.136210 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:59:12.136485 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:59:12.136750 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:59:12.137218 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 21:59:12.137459 saving as /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/dtb/meson-g12b-a311d-libretech-cc.dtb
83 21:59:12.137665 total size: 54703 (0 MB)
84 21:59:12.137872 No compression specified
85 21:59:12.174800 progress 59 % (0 MB)
86 21:59:12.175671 progress 100 % (0 MB)
87 21:59:12.176292 0 MB downloaded in 0.04 s (1.35 MB/s)
88 21:59:12.176799 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:59:12.177640 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:59:12.177910 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:59:12.178181 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:59:12.178659 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 21:59:12.178909 saving as /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/nfsrootfs/full.rootfs.tar
95 21:59:12.179116 total size: 107552908 (102 MB)
96 21:59:12.179330 Using unxz to decompress xz
97 21:59:12.213270 progress 0 % (0 MB)
98 21:59:12.873950 progress 5 % (5 MB)
99 21:59:13.605759 progress 10 % (10 MB)
100 21:59:14.333921 progress 15 % (15 MB)
101 21:59:15.100698 progress 20 % (20 MB)
102 21:59:15.676719 progress 25 % (25 MB)
103 21:59:16.300409 progress 30 % (30 MB)
104 21:59:17.043726 progress 35 % (35 MB)
105 21:59:17.422433 progress 40 % (41 MB)
106 21:59:17.860257 progress 45 % (46 MB)
107 21:59:18.594706 progress 50 % (51 MB)
108 21:59:19.297618 progress 55 % (56 MB)
109 21:59:20.057468 progress 60 % (61 MB)
110 21:59:20.813440 progress 65 % (66 MB)
111 21:59:21.550610 progress 70 % (71 MB)
112 21:59:22.323473 progress 75 % (76 MB)
113 21:59:23.005585 progress 80 % (82 MB)
114 21:59:23.719794 progress 85 % (87 MB)
115 21:59:24.461490 progress 90 % (92 MB)
116 21:59:25.193802 progress 95 % (97 MB)
117 21:59:25.954312 progress 100 % (102 MB)
118 21:59:25.967544 102 MB downloaded in 13.79 s (7.44 MB/s)
119 21:59:25.968558 end: 1.4.1 http-download (duration 00:00:14) [common]
121 21:59:25.970372 end: 1.4 download-retry (duration 00:00:14) [common]
122 21:59:25.970973 start: 1.5 download-retry (timeout 00:09:45) [common]
123 21:59:25.971562 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 21:59:25.972658 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/modules.tar.xz
125 21:59:25.973215 saving as /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/modules/modules.tar
126 21:59:25.973682 total size: 11603932 (11 MB)
127 21:59:25.974157 Using unxz to decompress xz
128 21:59:26.024829 progress 0 % (0 MB)
129 21:59:26.091688 progress 5 % (0 MB)
130 21:59:26.166488 progress 10 % (1 MB)
131 21:59:26.264554 progress 15 % (1 MB)
132 21:59:26.357841 progress 20 % (2 MB)
133 21:59:26.437998 progress 25 % (2 MB)
134 21:59:26.515737 progress 30 % (3 MB)
135 21:59:26.593666 progress 35 % (3 MB)
136 21:59:26.672805 progress 40 % (4 MB)
137 21:59:26.749639 progress 45 % (5 MB)
138 21:59:26.836569 progress 50 % (5 MB)
139 21:59:26.914790 progress 55 % (6 MB)
140 21:59:27.001923 progress 60 % (6 MB)
141 21:59:27.083480 progress 65 % (7 MB)
142 21:59:27.160999 progress 70 % (7 MB)
143 21:59:27.244741 progress 75 % (8 MB)
144 21:59:27.330160 progress 80 % (8 MB)
145 21:59:27.426145 progress 85 % (9 MB)
146 21:59:27.525136 progress 90 % (9 MB)
147 21:59:27.618633 progress 95 % (10 MB)
148 21:59:27.711356 progress 100 % (11 MB)
149 21:59:27.724205 11 MB downloaded in 1.75 s (6.32 MB/s)
150 21:59:27.724811 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:59:27.725644 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:59:27.725919 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 21:59:27.726189 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 21:59:37.470583 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/955867/extract-nfsrootfs-t3h4x9ss
156 21:59:37.471185 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 21:59:37.471482 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 21:59:37.472123 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c
159 21:59:37.472573 makedir: /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin
160 21:59:37.472907 makedir: /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/tests
161 21:59:37.473228 makedir: /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/results
162 21:59:37.473556 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-add-keys
163 21:59:37.474101 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-add-sources
164 21:59:37.474652 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-background-process-start
165 21:59:37.475162 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-background-process-stop
166 21:59:37.475693 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-common-functions
167 21:59:37.476235 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-echo-ipv4
168 21:59:37.476741 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-install-packages
169 21:59:37.477244 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-installed-packages
170 21:59:37.477729 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-os-build
171 21:59:37.478219 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-probe-channel
172 21:59:37.478716 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-probe-ip
173 21:59:37.479203 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-target-ip
174 21:59:37.479688 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-target-mac
175 21:59:37.480210 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-target-storage
176 21:59:37.480723 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-case
177 21:59:37.481221 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-event
178 21:59:37.481702 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-feedback
179 21:59:37.482187 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-raise
180 21:59:37.482670 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-reference
181 21:59:37.483159 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-runner
182 21:59:37.483650 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-set
183 21:59:37.484183 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-test-shell
184 21:59:37.484696 Updating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-install-packages (oe)
185 21:59:37.485241 Updating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/bin/lava-installed-packages (oe)
186 21:59:37.485699 Creating /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/environment
187 21:59:37.486086 LAVA metadata
188 21:59:37.486355 - LAVA_JOB_ID=955867
189 21:59:37.486575 - LAVA_DISPATCHER_IP=192.168.6.2
190 21:59:37.486954 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 21:59:37.487944 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 21:59:37.488304 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 21:59:37.488520 skipped lava-vland-overlay
194 21:59:37.488767 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 21:59:37.489025 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 21:59:37.489251 skipped lava-multinode-overlay
197 21:59:37.489498 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 21:59:37.489753 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 21:59:37.490011 Loading test definitions
200 21:59:37.490297 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 21:59:37.490523 Using /lava-955867 at stage 0
202 21:59:37.491751 uuid=955867_1.6.2.4.1 testdef=None
203 21:59:37.492115 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 21:59:37.492390 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 21:59:37.494238 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 21:59:37.495044 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 21:59:37.497434 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 21:59:37.498289 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 21:59:37.500550 runner path: /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/0/tests/0_dmesg test_uuid 955867_1.6.2.4.1
212 21:59:37.501147 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 21:59:37.501921 Creating lava-test-runner.conf files
215 21:59:37.502124 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955867/lava-overlay-w2yqaa1c/lava-955867/0 for stage 0
216 21:59:37.502471 - 0_dmesg
217 21:59:37.502824 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 21:59:37.503107 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 21:59:37.525275 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 21:59:37.525724 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 21:59:37.525992 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 21:59:37.526266 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 21:59:37.526534 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 21:59:38.174804 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 21:59:38.175281 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 21:59:38.175532 extracting modules file /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955867/extract-nfsrootfs-t3h4x9ss
227 21:59:39.756157 extracting modules file /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk
228 21:59:41.389121 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 21:59:41.389689 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 21:59:41.390054 [common] Applying overlay to NFS
231 21:59:41.390337 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955867/compress-overlay-3kaiwb76/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955867/extract-nfsrootfs-t3h4x9ss
232 21:59:41.426973 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 21:59:41.427531 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 21:59:41.427869 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 21:59:41.428189 Converting downloaded kernel to a uImage
236 21:59:41.428595 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/kernel/Image /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/kernel/uImage
237 21:59:41.895113 output: Image Name:
238 21:59:41.895522 output: Created: Thu Nov 7 21:59:41 2024
239 21:59:41.895735 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 21:59:41.895939 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 21:59:41.896181 output: Load Address: 01080000
242 21:59:41.896386 output: Entry Point: 01080000
243 21:59:41.896586 output:
244 21:59:41.896915 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 21:59:41.897184 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 21:59:41.897455 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 21:59:41.897712 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 21:59:41.897974 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 21:59:41.898230 Building ramdisk /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk
250 21:59:44.051353 >> 166774 blocks
251 21:59:51.851154 Adding RAMdisk u-boot header.
252 21:59:51.851593 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk.cpio.gz.uboot
253 21:59:52.098008 output: Image Name:
254 21:59:52.098528 output: Created: Thu Nov 7 21:59:51 2024
255 21:59:52.098788 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 21:59:52.099043 output: Data Size: 23426501 Bytes = 22877.44 KiB = 22.34 MiB
257 21:59:52.099292 output: Load Address: 00000000
258 21:59:52.099537 output: Entry Point: 00000000
259 21:59:52.099778 output:
260 21:59:52.100834 rename /var/lib/lava/dispatcher/tmp/955867/extract-overlay-ramdisk-cq21iibd/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
261 21:59:52.101779 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 21:59:52.102493 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 21:59:52.103189 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 21:59:52.103775 No LXC device requested
265 21:59:52.104464 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 21:59:52.105146 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 21:59:52.105801 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 21:59:52.106345 Checking files for TFTP limit of 4294967296 bytes.
269 21:59:52.109847 end: 1 tftp-deploy (duration 00:00:41) [common]
270 21:59:52.110584 start: 2 uboot-action (timeout 00:05:00) [common]
271 21:59:52.111264 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 21:59:52.111905 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 21:59:52.112585 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 21:59:52.113264 Using kernel file from prepare-kernel: 955867/tftp-deploy-dxu5j4vd/kernel/uImage
275 21:59:52.114076 substitutions:
276 21:59:52.114596 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 21:59:52.115114 - {DTB_ADDR}: 0x01070000
278 21:59:52.115625 - {DTB}: 955867/tftp-deploy-dxu5j4vd/dtb/meson-g12b-a311d-libretech-cc.dtb
279 21:59:52.116199 - {INITRD}: 955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
280 21:59:52.116714 - {KERNEL_ADDR}: 0x01080000
281 21:59:52.117218 - {KERNEL}: 955867/tftp-deploy-dxu5j4vd/kernel/uImage
282 21:59:52.117723 - {LAVA_MAC}: None
283 21:59:52.118279 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/955867/extract-nfsrootfs-t3h4x9ss
284 21:59:52.118789 - {NFS_SERVER_IP}: 192.168.6.2
285 21:59:52.119292 - {PRESEED_CONFIG}: None
286 21:59:52.119794 - {PRESEED_LOCAL}: None
287 21:59:52.120370 - {RAMDISK_ADDR}: 0x08000000
288 21:59:52.120892 - {RAMDISK}: 955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
289 21:59:52.121411 - {ROOT_PART}: None
290 21:59:52.121921 - {ROOT}: None
291 21:59:52.122431 - {SERVER_IP}: 192.168.6.2
292 21:59:52.122939 - {TEE_ADDR}: 0x83000000
293 21:59:52.123444 - {TEE}: None
294 21:59:52.123945 Parsed boot commands:
295 21:59:52.124482 - setenv autoload no
296 21:59:52.124974 - setenv initrd_high 0xffffffff
297 21:59:52.125472 - setenv fdt_high 0xffffffff
298 21:59:52.125971 - dhcp
299 21:59:52.126469 - setenv serverip 192.168.6.2
300 21:59:52.126957 - tftpboot 0x01080000 955867/tftp-deploy-dxu5j4vd/kernel/uImage
301 21:59:52.127458 - tftpboot 0x08000000 955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
302 21:59:52.127963 - tftpboot 0x01070000 955867/tftp-deploy-dxu5j4vd/dtb/meson-g12b-a311d-libretech-cc.dtb
303 21:59:52.128505 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/955867/extract-nfsrootfs-t3h4x9ss,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 21:59:52.129036 - bootm 0x01080000 0x08000000 0x01070000
305 21:59:52.129705 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 21:59:52.131664 start: 2.3 connect-device (timeout 00:05:00) [common]
308 21:59:52.132282 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 21:59:52.149550 Setting prompt string to ['lava-test: # ']
310 21:59:52.151369 end: 2.3 connect-device (duration 00:00:00) [common]
311 21:59:52.152190 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 21:59:52.152913 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 21:59:52.153581 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 21:59:52.154992 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 21:59:52.193761 >> OK - accepted request
316 21:59:52.195910 Returned 0 in 0 seconds
317 21:59:52.297339 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 21:59:52.299340 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 21:59:52.300110 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 21:59:52.300783 Setting prompt string to ['Hit any key to stop autoboot']
322 21:59:52.301378 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 21:59:52.303353 Trying 192.168.56.21...
324 21:59:52.303957 Connected to conserv1.
325 21:59:52.304537 Escape character is '^]'.
326 21:59:52.305082
327 21:59:52.305756 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 21:59:52.306320
329 22:00:04.031090 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 22:00:04.031910 bl2_stage_init 0x01
331 22:00:04.032490 bl2_stage_init 0x81
332 22:00:04.036688 hw id: 0x0000 - pwm id 0x01
333 22:00:04.037256 bl2_stage_init 0xc1
334 22:00:04.037779 bl2_stage_init 0x02
335 22:00:04.038275
336 22:00:04.042148 L0:00000000
337 22:00:04.042694 L1:20000703
338 22:00:04.043211 L2:00008067
339 22:00:04.043714 L3:14000000
340 22:00:04.047744 B2:00402000
341 22:00:04.048321 B1:e0f83180
342 22:00:04.048838
343 22:00:04.049350 TE: 58124
344 22:00:04.049864
345 22:00:04.053344 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 22:00:04.053920
347 22:00:04.054437 Board ID = 1
348 22:00:04.058926 Set A53 clk to 24M
349 22:00:04.059480 Set A73 clk to 24M
350 22:00:04.060022 Set clk81 to 24M
351 22:00:04.064619 A53 clk: 1200 MHz
352 22:00:04.065162 A73 clk: 1200 MHz
353 22:00:04.065665 CLK81: 166.6M
354 22:00:04.066152 smccc: 00012a92
355 22:00:04.070137 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 22:00:04.075704 board id: 1
357 22:00:04.081706 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:00:04.092233 fw parse done
359 22:00:04.098225 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:00:04.140866 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:00:04.151752 PIEI prepare done
362 22:00:04.152327 fastboot data load
363 22:00:04.152847 fastboot data verify
364 22:00:04.157446 verify result: 266
365 22:00:04.163009 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 22:00:04.163548 LPDDR4 probe
367 22:00:04.164074 ddr clk to 1584MHz
368 22:00:04.170999 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:00:04.208241
370 22:00:04.208793 dmc_version 0001
371 22:00:04.214935 Check phy result
372 22:00:04.220817 INFO : End of CA training
373 22:00:04.221345 INFO : End of initialization
374 22:00:04.226394 INFO : Training has run successfully!
375 22:00:04.226932 Check phy result
376 22:00:04.232005 INFO : End of initialization
377 22:00:04.232548 INFO : End of read enable training
378 22:00:04.237684 INFO : End of fine write leveling
379 22:00:04.243203 INFO : End of Write leveling coarse delay
380 22:00:04.243739 INFO : Training has run successfully!
381 22:00:04.244281 Check phy result
382 22:00:04.248803 INFO : End of initialization
383 22:00:04.249349 INFO : End of read dq deskew training
384 22:00:04.254363 INFO : End of MPR read delay center optimization
385 22:00:04.260022 INFO : End of write delay center optimization
386 22:00:04.265694 INFO : End of read delay center optimization
387 22:00:04.266243 INFO : End of max read latency training
388 22:00:04.271203 INFO : Training has run successfully!
389 22:00:04.271727 1D training succeed
390 22:00:04.280390 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:00:04.328102 Check phy result
392 22:00:04.328784 INFO : End of initialization
393 22:00:04.349615 INFO : End of 2D read delay Voltage center optimization
394 22:00:04.369825 INFO : End of 2D read delay Voltage center optimization
395 22:00:04.421817 INFO : End of 2D write delay Voltage center optimization
396 22:00:04.470896 INFO : End of 2D write delay Voltage center optimization
397 22:00:04.476402 INFO : Training has run successfully!
398 22:00:04.476972
399 22:00:04.477500 channel==0
400 22:00:04.482026 RxClkDly_Margin_A0==88 ps 9
401 22:00:04.482352 TxDqDly_Margin_A0==98 ps 10
402 22:00:04.487692 RxClkDly_Margin_A1==88 ps 9
403 22:00:04.487974 TxDqDly_Margin_A1==98 ps 10
404 22:00:04.488244 TrainedVREFDQ_A0==74
405 22:00:04.493265 TrainedVREFDQ_A1==75
406 22:00:04.493553 VrefDac_Margin_A0==25
407 22:00:04.493787 DeviceVref_Margin_A0==40
408 22:00:04.498782 VrefDac_Margin_A1==25
409 22:00:04.499063 DeviceVref_Margin_A1==39
410 22:00:04.499293
411 22:00:04.499515
412 22:00:04.504369 channel==1
413 22:00:04.504669 RxClkDly_Margin_A0==98 ps 10
414 22:00:04.504898 TxDqDly_Margin_A0==98 ps 10
415 22:00:04.509997 RxClkDly_Margin_A1==88 ps 9
416 22:00:04.510279 TxDqDly_Margin_A1==88 ps 9
417 22:00:04.515578 TrainedVREFDQ_A0==77
418 22:00:04.515874 TrainedVREFDQ_A1==77
419 22:00:04.516132 VrefDac_Margin_A0==22
420 22:00:04.521197 DeviceVref_Margin_A0==37
421 22:00:04.521481 VrefDac_Margin_A1==24
422 22:00:04.526782 DeviceVref_Margin_A1==37
423 22:00:04.527074
424 22:00:04.527304 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:00:04.527526
426 22:00:04.560405 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 22:00:04.560831 2D training succeed
428 22:00:04.565974 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:00:04.571567 auto size-- 65535DDR cs0 size: 2048MB
430 22:00:04.571868 DDR cs1 size: 2048MB
431 22:00:04.577154 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:00:04.577438 cs0 DataBus test pass
433 22:00:04.582782 cs1 DataBus test pass
434 22:00:04.583049 cs0 AddrBus test pass
435 22:00:04.583271 cs1 AddrBus test pass
436 22:00:04.583486
437 22:00:04.588378 100bdlr_step_size ps== 420
438 22:00:04.588651 result report
439 22:00:04.593979 boot times 0Enable ddr reg access
440 22:00:04.599345 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:00:04.612782 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 22:00:05.184956 0.0;M3 CHK:0;cm4_sp_mode 0
443 22:00:05.185467 MVN_1=0x00000000
444 22:00:05.190260 MVN_2=0x00000000
445 22:00:05.196062 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 22:00:05.196397 OPS=0x10
447 22:00:05.196694 ring efuse init
448 22:00:05.196972 chipver efuse init
449 22:00:05.201738 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 22:00:05.207235 [0.018961 Inits done]
451 22:00:05.207601 secure task start!
452 22:00:05.207886 high task start!
453 22:00:05.211868 low task start!
454 22:00:05.212231 run into bl31
455 22:00:05.218503 NOTICE: BL31: v1.3(release):4fc40b1
456 22:00:05.226401 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 22:00:05.227058 NOTICE: BL31: G12A normal boot!
458 22:00:05.251771 NOTICE: BL31: BL33 decompress pass
459 22:00:05.257383 ERROR: Error initializing runtime service opteed_fast
460 22:00:06.490664
461 22:00:06.491452
462 22:00:06.498830 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 22:00:06.499407
464 22:00:06.499935 Model: Libre Computer AML-A311D-CC Alta
465 22:00:06.707462 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 22:00:06.730699 DRAM: 2 GiB (effective 3.8 GiB)
467 22:00:06.873595 Core: 408 devices, 31 uclasses, devicetree: separate
468 22:00:06.879550 WDT: Not starting watchdog@f0d0
469 22:00:06.911762 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 22:00:06.924174 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 22:00:06.929356 ** Bad device specification mmc 0 **
472 22:00:06.939516 Card did not respond to voltage select! : -110
473 22:00:06.947215 ** Bad device specification mmc 0 **
474 22:00:06.947759 Couldn't find partition mmc 0
475 22:00:06.955412 Card did not respond to voltage select! : -110
476 22:00:06.961033 ** Bad device specification mmc 0 **
477 22:00:06.961570 Couldn't find partition mmc 0
478 22:00:06.966212 Error: could not access storage.
479 22:00:08.231723 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 22:00:08.232521 bl2_stage_init 0x01
481 22:00:08.233042 bl2_stage_init 0x81
482 22:00:08.237296 hw id: 0x0000 - pwm id 0x01
483 22:00:08.237849 bl2_stage_init 0xc1
484 22:00:08.238372 bl2_stage_init 0x02
485 22:00:08.238891
486 22:00:08.242852 L0:00000000
487 22:00:08.243375 L1:20000703
488 22:00:08.243880 L2:00008067
489 22:00:08.244421 L3:14000000
490 22:00:08.245701 B2:00402000
491 22:00:08.246232 B1:e0f83180
492 22:00:08.246731
493 22:00:08.247225 TE: 58167
494 22:00:08.247727
495 22:00:08.256850 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 22:00:08.257394
497 22:00:08.257902 Board ID = 1
498 22:00:08.258395 Set A53 clk to 24M
499 22:00:08.258896 Set A73 clk to 24M
500 22:00:08.262387 Set clk81 to 24M
501 22:00:08.262914 A53 clk: 1200 MHz
502 22:00:08.263420 A73 clk: 1200 MHz
503 22:00:08.265941 CLK81: 166.6M
504 22:00:08.266464 smccc: 00012abd
505 22:00:08.271543 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 22:00:08.277157 board id: 1
507 22:00:08.282291 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 22:00:08.292964 fw parse done
509 22:00:08.298987 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 22:00:08.341451 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 22:00:08.352332 PIEI prepare done
512 22:00:08.352872 fastboot data load
513 22:00:08.353404 fastboot data verify
514 22:00:08.357920 verify result: 266
515 22:00:08.363512 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 22:00:08.364072 LPDDR4 probe
517 22:00:08.364583 ddr clk to 1584MHz
518 22:00:08.371530 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 22:00:08.408905
520 22:00:08.409526 dmc_version 0001
521 22:00:08.415493 Check phy result
522 22:00:08.421353 INFO : End of CA training
523 22:00:08.421911 INFO : End of initialization
524 22:00:08.426931 INFO : Training has run successfully!
525 22:00:08.427476 Check phy result
526 22:00:08.432524 INFO : End of initialization
527 22:00:08.433057 INFO : End of read enable training
528 22:00:08.438117 INFO : End of fine write leveling
529 22:00:08.443717 INFO : End of Write leveling coarse delay
530 22:00:08.444271 INFO : Training has run successfully!
531 22:00:08.444782 Check phy result
532 22:00:08.449331 INFO : End of initialization
533 22:00:08.449871 INFO : End of read dq deskew training
534 22:00:08.454927 INFO : End of MPR read delay center optimization
535 22:00:08.460506 INFO : End of write delay center optimization
536 22:00:08.466136 INFO : End of read delay center optimization
537 22:00:08.466686 INFO : End of max read latency training
538 22:00:08.471704 INFO : Training has run successfully!
539 22:00:08.472288 1D training succeed
540 22:00:08.480907 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 22:00:08.528614 Check phy result
542 22:00:08.529204 INFO : End of initialization
543 22:00:08.550129 INFO : End of 2D read delay Voltage center optimization
544 22:00:08.570236 INFO : End of 2D read delay Voltage center optimization
545 22:00:08.622160 INFO : End of 2D write delay Voltage center optimization
546 22:00:08.671341 INFO : End of 2D write delay Voltage center optimization
547 22:00:08.676941 INFO : Training has run successfully!
548 22:00:08.677485
549 22:00:08.678018 channel==0
550 22:00:08.682544 RxClkDly_Margin_A0==88 ps 9
551 22:00:08.683070 TxDqDly_Margin_A0==98 ps 10
552 22:00:08.688199 RxClkDly_Margin_A1==88 ps 9
553 22:00:08.688726 TxDqDly_Margin_A1==98 ps 10
554 22:00:08.689233 TrainedVREFDQ_A0==74
555 22:00:08.693733 TrainedVREFDQ_A1==74
556 22:00:08.694281 VrefDac_Margin_A0==25
557 22:00:08.694788 DeviceVref_Margin_A0==40
558 22:00:08.699344 VrefDac_Margin_A1==25
559 22:00:08.699874 DeviceVref_Margin_A1==40
560 22:00:08.700412
561 22:00:08.700913
562 22:00:08.704939 channel==1
563 22:00:08.705461 RxClkDly_Margin_A0==98 ps 10
564 22:00:08.705960 TxDqDly_Margin_A0==88 ps 9
565 22:00:08.710515 RxClkDly_Margin_A1==98 ps 10
566 22:00:08.711047 TxDqDly_Margin_A1==88 ps 9
567 22:00:08.716182 TrainedVREFDQ_A0==76
568 22:00:08.716707 TrainedVREFDQ_A1==77
569 22:00:08.717212 VrefDac_Margin_A0==22
570 22:00:08.721726 DeviceVref_Margin_A0==38
571 22:00:08.722263 VrefDac_Margin_A1==22
572 22:00:08.727326 DeviceVref_Margin_A1==37
573 22:00:08.727858
574 22:00:08.728406 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 22:00:08.728910
576 22:00:08.760934 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 22:00:08.761516 2D training succeed
578 22:00:08.766531 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 22:00:08.772190 auto size-- 65535DDR cs0 size: 2048MB
580 22:00:08.772733 DDR cs1 size: 2048MB
581 22:00:08.777737 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 22:00:08.778263 cs0 DataBus test pass
583 22:00:08.783344 cs1 DataBus test pass
584 22:00:08.783868 cs0 AddrBus test pass
585 22:00:08.784401 cs1 AddrBus test pass
586 22:00:08.784901
587 22:00:08.788916 100bdlr_step_size ps== 420
588 22:00:08.789464 result report
589 22:00:08.794517 boot times 0Enable ddr reg access
590 22:00:08.799882 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 22:00:08.813364 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 22:00:09.385576 0.0;M3 CHK:0;cm4_sp_mode 0
593 22:00:09.386277 MVN_1=0x00000000
594 22:00:09.390900 MVN_2=0x00000000
595 22:00:09.396661 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 22:00:09.397298 OPS=0x10
597 22:00:09.397888 ring efuse init
598 22:00:09.398401 chipver efuse init
599 22:00:09.404954 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 22:00:09.405553 [0.018961 Inits done]
601 22:00:09.406058 secure task start!
602 22:00:09.412456 high task start!
603 22:00:09.413042 low task start!
604 22:00:09.413548 run into bl31
605 22:00:09.419055 NOTICE: BL31: v1.3(release):4fc40b1
606 22:00:09.426851 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 22:00:09.427395 NOTICE: BL31: G12A normal boot!
608 22:00:09.452303 NOTICE: BL31: BL33 decompress pass
609 22:00:09.457880 ERROR: Error initializing runtime service opteed_fast
610 22:00:10.690809
611 22:00:10.691316
612 22:00:10.699193 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 22:00:10.699743
614 22:00:10.700210 Model: Libre Computer AML-A311D-CC Alta
615 22:00:10.907617 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 22:00:10.930988 DRAM: 2 GiB (effective 3.8 GiB)
617 22:00:11.074011 Core: 408 devices, 31 uclasses, devicetree: separate
618 22:00:11.079767 WDT: Not starting watchdog@f0d0
619 22:00:11.112135 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 22:00:11.124556 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 22:00:11.129467 ** Bad device specification mmc 0 **
622 22:00:11.139867 Card did not respond to voltage select! : -110
623 22:00:11.147497 ** Bad device specification mmc 0 **
624 22:00:11.148129 Couldn't find partition mmc 0
625 22:00:11.155837 Card did not respond to voltage select! : -110
626 22:00:11.161323 ** Bad device specification mmc 0 **
627 22:00:11.161835 Couldn't find partition mmc 0
628 22:00:11.166397 Error: could not access storage.
629 22:00:11.510075 Net: eth0: ethernet@ff3f0000
630 22:00:11.510550 starting USB...
631 22:00:11.762027 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 22:00:11.762799 Starting the controller
633 22:00:11.768776 USB XHCI 1.10
634 22:00:13.480343 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 22:00:13.480777 bl2_stage_init 0x01
636 22:00:13.481004 bl2_stage_init 0x81
637 22:00:13.486192 hw id: 0x0000 - pwm id 0x01
638 22:00:13.486801 bl2_stage_init 0xc1
639 22:00:13.487284 bl2_stage_init 0x02
640 22:00:13.487749
641 22:00:13.492240 L0:00000000
642 22:00:13.493112 L1:20000703
643 22:00:13.493629 L2:00008067
644 22:00:13.494091 L3:14000000
645 22:00:13.497261 B2:00402000
646 22:00:13.497846 B1:e0f83180
647 22:00:13.498362
648 22:00:13.498883 TE: 58159
649 22:00:13.499368
650 22:00:13.502906 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 22:00:13.503646
652 22:00:13.504123 Board ID = 1
653 22:00:13.508499 Set A53 clk to 24M
654 22:00:13.509408 Set A73 clk to 24M
655 22:00:13.509905 Set clk81 to 24M
656 22:00:13.514481 A53 clk: 1200 MHz
657 22:00:13.515158 A73 clk: 1200 MHz
658 22:00:13.516089 CLK81: 166.6M
659 22:00:13.516617 smccc: 00012ab5
660 22:00:13.520541 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 22:00:13.525895 board id: 1
662 22:00:13.534608 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 22:00:13.541597 fw parse done
664 22:00:13.548592 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 22:00:13.590137 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 22:00:13.601101 PIEI prepare done
667 22:00:13.601557 fastboot data load
668 22:00:13.601868 fastboot data verify
669 22:00:13.606693 verify result: 266
670 22:00:13.612319 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 22:00:13.612909 LPDDR4 probe
672 22:00:13.613222 ddr clk to 1584MHz
673 22:00:13.620426 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 22:00:13.657649
675 22:00:13.658280 dmc_version 0001
676 22:00:13.664252 Check phy result
677 22:00:13.669996 INFO : End of CA training
678 22:00:13.670336 INFO : End of initialization
679 22:00:13.675574 INFO : Training has run successfully!
680 22:00:13.676091 Check phy result
681 22:00:13.681165 INFO : End of initialization
682 22:00:13.681491 INFO : End of read enable training
683 22:00:13.686819 INFO : End of fine write leveling
684 22:00:13.692401 INFO : End of Write leveling coarse delay
685 22:00:13.692911 INFO : Training has run successfully!
686 22:00:13.693197 Check phy result
687 22:00:13.698031 INFO : End of initialization
688 22:00:13.698540 INFO : End of read dq deskew training
689 22:00:13.703605 INFO : End of MPR read delay center optimization
690 22:00:13.709217 INFO : End of write delay center optimization
691 22:00:13.714821 INFO : End of read delay center optimization
692 22:00:13.715180 INFO : End of max read latency training
693 22:00:13.720608 INFO : Training has run successfully!
694 22:00:13.721261 1D training succeed
695 22:00:13.729698 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 22:00:13.777346 Check phy result
697 22:00:13.777986 INFO : End of initialization
698 22:00:13.798893 INFO : End of 2D read delay Voltage center optimization
699 22:00:13.818995 INFO : End of 2D read delay Voltage center optimization
700 22:00:13.870893 INFO : End of 2D write delay Voltage center optimization
701 22:00:13.920126 INFO : End of 2D write delay Voltage center optimization
702 22:00:13.925710 INFO : Training has run successfully!
703 22:00:13.926219
704 22:00:13.926688 channel==0
705 22:00:13.931238 RxClkDly_Margin_A0==88 ps 9
706 22:00:13.931760 TxDqDly_Margin_A0==98 ps 10
707 22:00:13.936896 RxClkDly_Margin_A1==88 ps 9
708 22:00:13.937410 TxDqDly_Margin_A1==98 ps 10
709 22:00:13.937871 TrainedVREFDQ_A0==74
710 22:00:13.942454 TrainedVREFDQ_A1==74
711 22:00:13.942964 VrefDac_Margin_A0==25
712 22:00:13.943424 DeviceVref_Margin_A0==40
713 22:00:13.948094 VrefDac_Margin_A1==25
714 22:00:13.948597 DeviceVref_Margin_A1==40
715 22:00:13.949054
716 22:00:13.949511
717 22:00:13.953682 channel==1
718 22:00:13.954172 RxClkDly_Margin_A0==98 ps 10
719 22:00:13.954630 TxDqDly_Margin_A0==88 ps 9
720 22:00:13.959267 RxClkDly_Margin_A1==88 ps 9
721 22:00:13.959764 TxDqDly_Margin_A1==108 ps 11
722 22:00:13.964897 TrainedVREFDQ_A0==77
723 22:00:13.965405 TrainedVREFDQ_A1==77
724 22:00:13.965862 VrefDac_Margin_A0==22
725 22:00:13.970441 DeviceVref_Margin_A0==37
726 22:00:13.970930 VrefDac_Margin_A1==24
727 22:00:13.976083 DeviceVref_Margin_A1==37
728 22:00:13.976574
729 22:00:13.977032 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 22:00:13.981652
731 22:00:14.009655 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 22:00:14.010243 2D training succeed
733 22:00:14.015286 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 22:00:14.020895 auto size-- 65535DDR cs0 size: 2048MB
735 22:00:14.021400 DDR cs1 size: 2048MB
736 22:00:14.026505 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 22:00:14.027004 cs0 DataBus test pass
738 22:00:14.032101 cs1 DataBus test pass
739 22:00:14.032618 cs0 AddrBus test pass
740 22:00:14.033077 cs1 AddrBus test pass
741 22:00:14.033525
742 22:00:14.037642 100bdlr_step_size ps== 420
743 22:00:14.038153 result report
744 22:00:14.043256 boot times 0Enable ddr reg access
745 22:00:14.048679 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 22:00:14.062141 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 22:00:14.634299 0.0;M3 CHK:0;cm4_sp_mode 0
748 22:00:14.634978 MVN_1=0x00000000
749 22:00:14.639617 MVN_2=0x00000000
750 22:00:14.645449 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 22:00:14.646132 OPS=0x10
752 22:00:14.646636 ring efuse init
753 22:00:14.647099 chipver efuse init
754 22:00:14.651086 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 22:00:14.656576 [0.018960 Inits done]
756 22:00:14.657071 secure task start!
757 22:00:14.657522 high task start!
758 22:00:14.661186 low task start!
759 22:00:14.661665 run into bl31
760 22:00:14.667820 NOTICE: BL31: v1.3(release):4fc40b1
761 22:00:14.675621 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 22:00:14.676144 NOTICE: BL31: G12A normal boot!
763 22:00:14.701100 NOTICE: BL31: BL33 decompress pass
764 22:00:14.706650 ERROR: Error initializing runtime service opteed_fast
765 22:00:15.939756
766 22:00:15.940533
767 22:00:15.948020 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 22:00:15.948546
769 22:00:15.949014 Model: Libre Computer AML-A311D-CC Alta
770 22:00:16.156491 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 22:00:16.179821 DRAM: 2 GiB (effective 3.8 GiB)
772 22:00:16.322925 Core: 408 devices, 31 uclasses, devicetree: separate
773 22:00:16.328653 WDT: Not starting watchdog@f0d0
774 22:00:16.360916 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 22:00:16.373436 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 22:00:16.378394 ** Bad device specification mmc 0 **
777 22:00:16.388663 Card did not respond to voltage select! : -110
778 22:00:16.396374 ** Bad device specification mmc 0 **
779 22:00:16.396869 Couldn't find partition mmc 0
780 22:00:16.404746 Card did not respond to voltage select! : -110
781 22:00:16.410303 ** Bad device specification mmc 0 **
782 22:00:16.410793 Couldn't find partition mmc 0
783 22:00:16.415262 Error: could not access storage.
784 22:00:16.757792 Net: eth0: ethernet@ff3f0000
785 22:00:16.758422 starting USB...
786 22:00:17.009665 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 22:00:17.010330 Starting the controller
788 22:00:17.016489 USB XHCI 1.10
789 22:00:19.180476 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 22:00:19.181141 bl2_stage_init 0x01
791 22:00:19.181617 bl2_stage_init 0x81
792 22:00:19.186042 hw id: 0x0000 - pwm id 0x01
793 22:00:19.186555 bl2_stage_init 0xc1
794 22:00:19.187013 bl2_stage_init 0x02
795 22:00:19.187461
796 22:00:19.191628 L0:00000000
797 22:00:19.192207 L1:20000703
798 22:00:19.192674 L2:00008067
799 22:00:19.193126 L3:14000000
800 22:00:19.197239 B2:00402000
801 22:00:19.197728 B1:e0f83180
802 22:00:19.198177
803 22:00:19.198628 TE: 58167
804 22:00:19.199077
805 22:00:19.202827 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 22:00:19.203317
807 22:00:19.203771 Board ID = 1
808 22:00:19.208370 Set A53 clk to 24M
809 22:00:19.208855 Set A73 clk to 24M
810 22:00:19.209299 Set clk81 to 24M
811 22:00:19.213922 A53 clk: 1200 MHz
812 22:00:19.214405 A73 clk: 1200 MHz
813 22:00:19.214847 CLK81: 166.6M
814 22:00:19.215285 smccc: 00012abe
815 22:00:19.219516 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 22:00:19.225125 board id: 1
817 22:00:19.231012 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 22:00:19.241731 fw parse done
819 22:00:19.247648 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 22:00:19.290306 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 22:00:19.301183 PIEI prepare done
822 22:00:19.301672 fastboot data load
823 22:00:19.302130 fastboot data verify
824 22:00:19.306875 verify result: 266
825 22:00:19.312404 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 22:00:19.312885 LPDDR4 probe
827 22:00:19.313328 ddr clk to 1584MHz
828 22:00:19.320386 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 22:00:19.357671
830 22:00:19.358213 dmc_version 0001
831 22:00:19.364307 Check phy result
832 22:00:19.370403 INFO : End of CA training
833 22:00:19.370882 INFO : End of initialization
834 22:00:19.375917 INFO : Training has run successfully!
835 22:00:19.376430 Check phy result
836 22:00:19.381482 INFO : End of initialization
837 22:00:19.381964 INFO : End of read enable training
838 22:00:19.387132 INFO : End of fine write leveling
839 22:00:19.392573 INFO : End of Write leveling coarse delay
840 22:00:19.393059 INFO : Training has run successfully!
841 22:00:19.393507 Check phy result
842 22:00:19.398153 INFO : End of initialization
843 22:00:19.398626 INFO : End of read dq deskew training
844 22:00:19.403933 INFO : End of MPR read delay center optimization
845 22:00:19.409412 INFO : End of write delay center optimization
846 22:00:19.415007 INFO : End of read delay center optimization
847 22:00:19.415503 INFO : End of max read latency training
848 22:00:19.420577 INFO : Training has run successfully!
849 22:00:19.421060 1D training succeed
850 22:00:19.429822 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 22:00:19.477500 Check phy result
852 22:00:19.478025 INFO : End of initialization
853 22:00:19.499136 INFO : End of 2D read delay Voltage center optimization
854 22:00:19.519425 INFO : End of 2D read delay Voltage center optimization
855 22:00:19.571475 INFO : End of 2D write delay Voltage center optimization
856 22:00:19.620795 INFO : End of 2D write delay Voltage center optimization
857 22:00:19.626451 INFO : Training has run successfully!
858 22:00:19.626934
859 22:00:19.627388 channel==0
860 22:00:19.632011 RxClkDly_Margin_A0==88 ps 9
861 22:00:19.632518 TxDqDly_Margin_A0==98 ps 10
862 22:00:19.637659 RxClkDly_Margin_A1==88 ps 9
863 22:00:19.638140 TxDqDly_Margin_A1==98 ps 10
864 22:00:19.638609 TrainedVREFDQ_A0==74
865 22:00:19.643235 TrainedVREFDQ_A1==74
866 22:00:19.643762 VrefDac_Margin_A0==25
867 22:00:19.644256 DeviceVref_Margin_A0==40
868 22:00:19.648823 VrefDac_Margin_A1==25
869 22:00:19.649334 DeviceVref_Margin_A1==40
870 22:00:19.649785
871 22:00:19.650254
872 22:00:19.654478 channel==1
873 22:00:19.655021 RxClkDly_Margin_A0==98 ps 10
874 22:00:19.655453 TxDqDly_Margin_A0==98 ps 10
875 22:00:19.660005 RxClkDly_Margin_A1==98 ps 10
876 22:00:19.660481 TxDqDly_Margin_A1==88 ps 9
877 22:00:19.665586 TrainedVREFDQ_A0==76
878 22:00:19.666054 TrainedVREFDQ_A1==77
879 22:00:19.666488 VrefDac_Margin_A0==22
880 22:00:19.671219 DeviceVref_Margin_A0==38
881 22:00:19.671681 VrefDac_Margin_A1==22
882 22:00:19.676864 DeviceVref_Margin_A1==37
883 22:00:19.677324
884 22:00:19.677756 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 22:00:19.682364
886 22:00:19.710355 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
887 22:00:19.710936 2D training succeed
888 22:00:19.715886 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 22:00:19.721464 auto size-- 65535DDR cs0 size: 2048MB
890 22:00:19.721954 DDR cs1 size: 2048MB
891 22:00:19.727085 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 22:00:19.727553 cs0 DataBus test pass
893 22:00:19.732689 cs1 DataBus test pass
894 22:00:19.733159 cs0 AddrBus test pass
895 22:00:19.733590 cs1 AddrBus test pass
896 22:00:19.734016
897 22:00:19.738260 100bdlr_step_size ps== 420
898 22:00:19.738732 result report
899 22:00:19.743850 boot times 0Enable ddr reg access
900 22:00:19.749301 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 22:00:19.762876 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 22:00:20.336581 0.0;M3 CHK:0;cm4_sp_mode 0
903 22:00:20.337268 MVN_1=0x00000000
904 22:00:20.342051 MVN_2=0x00000000
905 22:00:20.347779 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 22:00:20.348348 OPS=0x10
907 22:00:20.348819 ring efuse init
908 22:00:20.349271 chipver efuse init
909 22:00:20.353355 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 22:00:20.358962 [0.018961 Inits done]
911 22:00:20.359477 secure task start!
912 22:00:20.359930 high task start!
913 22:00:20.363537 low task start!
914 22:00:20.364077 run into bl31
915 22:00:20.370285 NOTICE: BL31: v1.3(release):4fc40b1
916 22:00:20.378098 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 22:00:20.378661 NOTICE: BL31: G12A normal boot!
918 22:00:20.403481 NOTICE: BL31: BL33 decompress pass
919 22:00:20.409106 ERROR: Error initializing runtime service opteed_fast
920 22:00:21.641985
921 22:00:21.642660
922 22:00:21.650417 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 22:00:21.651003
924 22:00:21.651479 Model: Libre Computer AML-A311D-CC Alta
925 22:00:21.858879 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 22:00:21.882342 DRAM: 2 GiB (effective 3.8 GiB)
927 22:00:22.025438 Core: 408 devices, 31 uclasses, devicetree: separate
928 22:00:22.031116 WDT: Not starting watchdog@f0d0
929 22:00:22.063329 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 22:00:22.075788 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 22:00:22.080758 ** Bad device specification mmc 0 **
932 22:00:22.091124 Card did not respond to voltage select! : -110
933 22:00:22.098742 ** Bad device specification mmc 0 **
934 22:00:22.099272 Couldn't find partition mmc 0
935 22:00:22.107141 Card did not respond to voltage select! : -110
936 22:00:22.112634 ** Bad device specification mmc 0 **
937 22:00:22.113154 Couldn't find partition mmc 0
938 22:00:22.117666 Error: could not access storage.
939 22:00:22.460141 Net: eth0: ethernet@ff3f0000
940 22:00:22.460807 starting USB...
941 22:00:22.711959 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 22:00:22.712677 Starting the controller
943 22:00:22.718850 USB XHCI 1.10
944 22:00:24.272978 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 22:00:24.281305 scanning usb for storage devices... 0 Storage Device(s) found
947 22:00:24.333063 Hit any key to stop autoboot: 1
948 22:00:24.334374 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 22:00:24.335066 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 22:00:24.335622 Setting prompt string to ['=>']
951 22:00:24.336242 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 22:00:24.348728 0
953 22:00:24.349851 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 22:00:24.350443 Sending with 10 millisecond of delay
956 22:00:25.487672 => setenv autoload no
957 22:00:25.498885 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 22:00:25.501621 setenv autoload no
959 22:00:25.502148 Sending with 10 millisecond of delay
961 22:00:27.299935 => setenv initrd_high 0xffffffff
962 22:00:27.310873 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 22:00:27.311860 setenv initrd_high 0xffffffff
964 22:00:27.312684 Sending with 10 millisecond of delay
966 22:00:28.929967 => setenv fdt_high 0xffffffff
967 22:00:28.940826 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 22:00:28.941768 setenv fdt_high 0xffffffff
969 22:00:28.942534 Sending with 10 millisecond of delay
971 22:00:29.234516 => dhcp
972 22:00:29.245347 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 22:00:29.246290 dhcp
974 22:00:29.246773 Speed: 1000, full duplex
975 22:00:29.247233 BOOTP broadcast 1
976 22:00:29.253874 DHCP client bound to address 192.168.6.27 (8 ms)
977 22:00:29.254694 Sending with 10 millisecond of delay
979 22:00:30.932416 => setenv serverip 192.168.6.2
980 22:00:30.943287 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 22:00:30.944322 setenv serverip 192.168.6.2
982 22:00:30.945079 Sending with 10 millisecond of delay
984 22:00:34.671509 => tftpboot 0x01080000 955867/tftp-deploy-dxu5j4vd/kernel/uImage
985 22:00:34.682430 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 22:00:34.683428 tftpboot 0x01080000 955867/tftp-deploy-dxu5j4vd/kernel/uImage
987 22:00:34.683954 Speed: 1000, full duplex
988 22:00:34.684477 Using ethernet@ff3f0000 device
989 22:00:34.685509 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 22:00:34.690816 Filename '955867/tftp-deploy-dxu5j4vd/kernel/uImage'.
991 22:00:34.694742 Load address: 0x1080000
992 22:00:37.538168 Loading: *################################################## 43.6 MiB
993 22:00:37.538839 15.3 MiB/s
994 22:00:37.539321 done
995 22:00:37.542768 Bytes transferred = 45713984 (2b98a40 hex)
996 22:00:37.543639 Sending with 10 millisecond of delay
998 22:00:42.233328 => tftpboot 0x08000000 955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
999 22:00:42.244193 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 22:00:42.245137 tftpboot 0x08000000 955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot
1001 22:00:42.245629 Speed: 1000, full duplex
1002 22:00:42.246091 Using ethernet@ff3f0000 device
1003 22:00:42.247251 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 22:00:42.255695 Filename '955867/tftp-deploy-dxu5j4vd/ramdisk/ramdisk.cpio.gz.uboot'.
1005 22:00:42.256288 Load address: 0x8000000
1006 22:00:48.832377 Loading: *######################T ########################### UDP wrong checksum 00000005 0000225d
1007 22:00:53.832765 T UDP wrong checksum 00000005 0000225d
1008 22:01:03.836092 T T UDP wrong checksum 00000005 0000225d
1009 22:01:06.959271 UDP wrong checksum 000000ff 0000d392
1010 22:01:06.997277 UDP wrong checksum 000000ff 00006485
1011 22:01:15.639963 T T UDP wrong checksum 000000ff 0000fba6
1012 22:01:15.653053 UDP wrong checksum 000000ff 00008499
1013 22:01:23.840157 T T UDP wrong checksum 00000005 0000225d
1014 22:01:38.844014 T T
1015 22:01:38.844459 Retry count exceeded; starting again
1017 22:01:38.845340 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 22:01:38.846274 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 22:01:38.846992 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 22:01:38.847540 end: 2 uboot-action (duration 00:01:47) [common]
1026 22:01:38.848408 Cleaning after the job
1027 22:01:38.848729 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/ramdisk
1028 22:01:38.849573 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/kernel
1029 22:01:38.855105 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/dtb
1030 22:01:38.855842 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/nfsrootfs
1031 22:01:38.882704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955867/tftp-deploy-dxu5j4vd/modules
1032 22:01:38.889565 start: 4.1 power-off (timeout 00:00:30) [common]
1033 22:01:38.890167 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 22:01:38.923795 >> OK - accepted request
1035 22:01:38.925886 Returned 0 in 0 seconds
1036 22:01:39.026659 end: 4.1 power-off (duration 00:00:00) [common]
1038 22:01:39.027736 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 22:01:39.028466 Listened to connection for namespace 'common' for up to 1s
1040 22:01:40.029383 Finalising connection for namespace 'common'
1041 22:01:40.029900 Disconnecting from shell: Finalise
1042 22:01:40.030187 =>
1043 22:01:40.130911 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 22:01:40.131390 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955867
1045 22:01:42.236464 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955867
1046 22:01:42.237088 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.